RoomFitMCU.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .1st_Sector 00004000 08008000 08008000 00002000 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .2nd_Sector 00004000 0800c000 0800c000 00006000 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 2 .isr_vector 000001c4 08004000 08004000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .text 00019eb4 08010000 08010000 0000a000 2**4 CONTENTS, ALLOC, LOAD, READONLY, CODE 4 .rodata 00003c60 08029eb4 08029eb4 00023eb4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .ARM.extab 00000000 0802db14 0802db14 00028094 2**0 CONTENTS 6 .ARM 00000008 0802db14 0802db14 00027b14 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .preinit_array 00000000 0802db1c 0802db1c 00028094 2**0 CONTENTS, ALLOC, LOAD, DATA 8 .init_array 00000004 0802db1c 0802db1c 00027b1c 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .fini_array 00000004 0802db20 0802db20 00027b20 2**2 CONTENTS, ALLOC, LOAD, DATA 10 .data 00000094 20000000 0802db24 00028000 2**2 CONTENTS, ALLOC, LOAD, DATA 11 .bss 00005524 20000094 0802dbb8 00028094 2**2 ALLOC 12 ._user_heap_stack 00000600 200055b8 0802dbb8 000285b8 2**0 ALLOC 13 .ARM.attributes 00000030 00000000 00000000 00028094 2**0 CONTENTS, READONLY 14 .debug_info 0002af5f 00000000 00000000 000280c4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_abbrev 00005937 00000000 00000000 00053023 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_aranges 00001e60 00000000 00000000 00058960 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_rnglists 000017e9 00000000 00000000 0005a7c0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_macro 0002a0f6 00000000 00000000 0005bfa9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .debug_line 0002d0f5 00000000 00000000 0008609f 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 20 .debug_str 000eb277 00000000 00000000 000b3194 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .comment 00000043 00000000 00000000 0019e40b 2**0 CONTENTS, READONLY 22 .debug_frame 000087a8 00000000 00000000 0019e450 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 23 .debug_line_str 00000061 00000000 00000000 001a6bf8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 08010000 <__do_global_dtors_aux>: 8010000: b510 push {r4, lr} 8010002: 4c05 ldr r4, [pc, #20] @ (8010018 <__do_global_dtors_aux+0x18>) 8010004: 7823 ldrb r3, [r4, #0] 8010006: b933 cbnz r3, 8010016 <__do_global_dtors_aux+0x16> 8010008: 4b04 ldr r3, [pc, #16] @ (801001c <__do_global_dtors_aux+0x1c>) 801000a: b113 cbz r3, 8010012 <__do_global_dtors_aux+0x12> 801000c: 4804 ldr r0, [pc, #16] @ (8010020 <__do_global_dtors_aux+0x20>) 801000e: f3af 8000 nop.w 8010012: 2301 movs r3, #1 8010014: 7023 strb r3, [r4, #0] 8010016: bd10 pop {r4, pc} 8010018: 20000094 .word 0x20000094 801001c: 00000000 .word 0x00000000 8010020: 08029e9c .word 0x08029e9c 08010024 : 8010024: b508 push {r3, lr} 8010026: 4b03 ldr r3, [pc, #12] @ (8010034 ) 8010028: b11b cbz r3, 8010032 801002a: 4903 ldr r1, [pc, #12] @ (8010038 ) 801002c: 4803 ldr r0, [pc, #12] @ (801003c ) 801002e: f3af 8000 nop.w 8010032: bd08 pop {r3, pc} 8010034: 00000000 .word 0x00000000 8010038: 20000098 .word 0x20000098 801003c: 08029e9c .word 0x08029e9c 08010040 : 8010040: f001 01ff and.w r1, r1, #255 @ 0xff 8010044: 2a10 cmp r2, #16 8010046: db2b blt.n 80100a0 8010048: f010 0f07 tst.w r0, #7 801004c: d008 beq.n 8010060 801004e: f810 3b01 ldrb.w r3, [r0], #1 8010052: 3a01 subs r2, #1 8010054: 428b cmp r3, r1 8010056: d02d beq.n 80100b4 8010058: f010 0f07 tst.w r0, #7 801005c: b342 cbz r2, 80100b0 801005e: d1f6 bne.n 801004e 8010060: b4f0 push {r4, r5, r6, r7} 8010062: ea41 2101 orr.w r1, r1, r1, lsl #8 8010066: ea41 4101 orr.w r1, r1, r1, lsl #16 801006a: f022 0407 bic.w r4, r2, #7 801006e: f07f 0700 mvns.w r7, #0 8010072: 2300 movs r3, #0 8010074: e8f0 5602 ldrd r5, r6, [r0], #8 8010078: 3c08 subs r4, #8 801007a: ea85 0501 eor.w r5, r5, r1 801007e: ea86 0601 eor.w r6, r6, r1 8010082: fa85 f547 uadd8 r5, r5, r7 8010086: faa3 f587 sel r5, r3, r7 801008a: fa86 f647 uadd8 r6, r6, r7 801008e: faa5 f687 sel r6, r5, r7 8010092: b98e cbnz r6, 80100b8 8010094: d1ee bne.n 8010074 8010096: bcf0 pop {r4, r5, r6, r7} 8010098: f001 01ff and.w r1, r1, #255 @ 0xff 801009c: f002 0207 and.w r2, r2, #7 80100a0: b132 cbz r2, 80100b0 80100a2: f810 3b01 ldrb.w r3, [r0], #1 80100a6: 3a01 subs r2, #1 80100a8: ea83 0301 eor.w r3, r3, r1 80100ac: b113 cbz r3, 80100b4 80100ae: d1f8 bne.n 80100a2 80100b0: 2000 movs r0, #0 80100b2: 4770 bx lr 80100b4: 3801 subs r0, #1 80100b6: 4770 bx lr 80100b8: 2d00 cmp r5, #0 80100ba: bf06 itte eq 80100bc: 4635 moveq r5, r6 80100be: 3803 subeq r0, #3 80100c0: 3807 subne r0, #7 80100c2: f015 0f01 tst.w r5, #1 80100c6: d107 bne.n 80100d8 80100c8: 3001 adds r0, #1 80100ca: f415 7f80 tst.w r5, #256 @ 0x100 80100ce: bf02 ittt eq 80100d0: 3001 addeq r0, #1 80100d2: f415 3fc0 tsteq.w r5, #98304 @ 0x18000 80100d6: 3001 addeq r0, #1 80100d8: bcf0 pop {r4, r5, r6, r7} 80100da: 3801 subs r0, #1 80100dc: 4770 bx lr 80100de: bf00 nop 080100e0 <__aeabi_drsub>: 80100e0: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 80100e4: e002 b.n 80100ec <__adddf3> 80100e6: bf00 nop 080100e8 <__aeabi_dsub>: 80100e8: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 080100ec <__adddf3>: 80100ec: b530 push {r4, r5, lr} 80100ee: ea4f 0441 mov.w r4, r1, lsl #1 80100f2: ea4f 0543 mov.w r5, r3, lsl #1 80100f6: ea94 0f05 teq r4, r5 80100fa: bf08 it eq 80100fc: ea90 0f02 teqeq r0, r2 8010100: bf1f itttt ne 8010102: ea54 0c00 orrsne.w ip, r4, r0 8010106: ea55 0c02 orrsne.w ip, r5, r2 801010a: ea7f 5c64 mvnsne.w ip, r4, asr #21 801010e: ea7f 5c65 mvnsne.w ip, r5, asr #21 8010112: f000 80e2 beq.w 80102da <__adddf3+0x1ee> 8010116: ea4f 5454 mov.w r4, r4, lsr #21 801011a: ebd4 5555 rsbs r5, r4, r5, lsr #21 801011e: bfb8 it lt 8010120: 426d neglt r5, r5 8010122: dd0c ble.n 801013e <__adddf3+0x52> 8010124: 442c add r4, r5 8010126: ea80 0202 eor.w r2, r0, r2 801012a: ea81 0303 eor.w r3, r1, r3 801012e: ea82 0000 eor.w r0, r2, r0 8010132: ea83 0101 eor.w r1, r3, r1 8010136: ea80 0202 eor.w r2, r0, r2 801013a: ea81 0303 eor.w r3, r1, r3 801013e: 2d36 cmp r5, #54 @ 0x36 8010140: bf88 it hi 8010142: bd30 pophi {r4, r5, pc} 8010144: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8010148: ea4f 3101 mov.w r1, r1, lsl #12 801014c: f44f 1c80 mov.w ip, #1048576 @ 0x100000 8010150: ea4c 3111 orr.w r1, ip, r1, lsr #12 8010154: d002 beq.n 801015c <__adddf3+0x70> 8010156: 4240 negs r0, r0 8010158: eb61 0141 sbc.w r1, r1, r1, lsl #1 801015c: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 8010160: ea4f 3303 mov.w r3, r3, lsl #12 8010164: ea4c 3313 orr.w r3, ip, r3, lsr #12 8010168: d002 beq.n 8010170 <__adddf3+0x84> 801016a: 4252 negs r2, r2 801016c: eb63 0343 sbc.w r3, r3, r3, lsl #1 8010170: ea94 0f05 teq r4, r5 8010174: f000 80a7 beq.w 80102c6 <__adddf3+0x1da> 8010178: f1a4 0401 sub.w r4, r4, #1 801017c: f1d5 0e20 rsbs lr, r5, #32 8010180: db0d blt.n 801019e <__adddf3+0xb2> 8010182: fa02 fc0e lsl.w ip, r2, lr 8010186: fa22 f205 lsr.w r2, r2, r5 801018a: 1880 adds r0, r0, r2 801018c: f141 0100 adc.w r1, r1, #0 8010190: fa03 f20e lsl.w r2, r3, lr 8010194: 1880 adds r0, r0, r2 8010196: fa43 f305 asr.w r3, r3, r5 801019a: 4159 adcs r1, r3 801019c: e00e b.n 80101bc <__adddf3+0xd0> 801019e: f1a5 0520 sub.w r5, r5, #32 80101a2: f10e 0e20 add.w lr, lr, #32 80101a6: 2a01 cmp r2, #1 80101a8: fa03 fc0e lsl.w ip, r3, lr 80101ac: bf28 it cs 80101ae: f04c 0c02 orrcs.w ip, ip, #2 80101b2: fa43 f305 asr.w r3, r3, r5 80101b6: 18c0 adds r0, r0, r3 80101b8: eb51 71e3 adcs.w r1, r1, r3, asr #31 80101bc: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 80101c0: d507 bpl.n 80101d2 <__adddf3+0xe6> 80101c2: f04f 0e00 mov.w lr, #0 80101c6: f1dc 0c00 rsbs ip, ip, #0 80101ca: eb7e 0000 sbcs.w r0, lr, r0 80101ce: eb6e 0101 sbc.w r1, lr, r1 80101d2: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 80101d6: d31b bcc.n 8010210 <__adddf3+0x124> 80101d8: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 80101dc: d30c bcc.n 80101f8 <__adddf3+0x10c> 80101de: 0849 lsrs r1, r1, #1 80101e0: ea5f 0030 movs.w r0, r0, rrx 80101e4: ea4f 0c3c mov.w ip, ip, rrx 80101e8: f104 0401 add.w r4, r4, #1 80101ec: ea4f 5244 mov.w r2, r4, lsl #21 80101f0: f512 0f80 cmn.w r2, #4194304 @ 0x400000 80101f4: f080 809a bcs.w 801032c <__adddf3+0x240> 80101f8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 80101fc: bf08 it eq 80101fe: ea5f 0c50 movseq.w ip, r0, lsr #1 8010202: f150 0000 adcs.w r0, r0, #0 8010206: eb41 5104 adc.w r1, r1, r4, lsl #20 801020a: ea41 0105 orr.w r1, r1, r5 801020e: bd30 pop {r4, r5, pc} 8010210: ea5f 0c4c movs.w ip, ip, lsl #1 8010214: 4140 adcs r0, r0 8010216: eb41 0101 adc.w r1, r1, r1 801021a: 3c01 subs r4, #1 801021c: bf28 it cs 801021e: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 8010222: d2e9 bcs.n 80101f8 <__adddf3+0x10c> 8010224: f091 0f00 teq r1, #0 8010228: bf04 itt eq 801022a: 4601 moveq r1, r0 801022c: 2000 moveq r0, #0 801022e: fab1 f381 clz r3, r1 8010232: bf08 it eq 8010234: 3320 addeq r3, #32 8010236: f1a3 030b sub.w r3, r3, #11 801023a: f1b3 0220 subs.w r2, r3, #32 801023e: da0c bge.n 801025a <__adddf3+0x16e> 8010240: 320c adds r2, #12 8010242: dd08 ble.n 8010256 <__adddf3+0x16a> 8010244: f102 0c14 add.w ip, r2, #20 8010248: f1c2 020c rsb r2, r2, #12 801024c: fa01 f00c lsl.w r0, r1, ip 8010250: fa21 f102 lsr.w r1, r1, r2 8010254: e00c b.n 8010270 <__adddf3+0x184> 8010256: f102 0214 add.w r2, r2, #20 801025a: bfd8 it le 801025c: f1c2 0c20 rsble ip, r2, #32 8010260: fa01 f102 lsl.w r1, r1, r2 8010264: fa20 fc0c lsr.w ip, r0, ip 8010268: bfdc itt le 801026a: ea41 010c orrle.w r1, r1, ip 801026e: 4090 lslle r0, r2 8010270: 1ae4 subs r4, r4, r3 8010272: bfa2 ittt ge 8010274: eb01 5104 addge.w r1, r1, r4, lsl #20 8010278: 4329 orrge r1, r5 801027a: bd30 popge {r4, r5, pc} 801027c: ea6f 0404 mvn.w r4, r4 8010280: 3c1f subs r4, #31 8010282: da1c bge.n 80102be <__adddf3+0x1d2> 8010284: 340c adds r4, #12 8010286: dc0e bgt.n 80102a6 <__adddf3+0x1ba> 8010288: f104 0414 add.w r4, r4, #20 801028c: f1c4 0220 rsb r2, r4, #32 8010290: fa20 f004 lsr.w r0, r0, r4 8010294: fa01 f302 lsl.w r3, r1, r2 8010298: ea40 0003 orr.w r0, r0, r3 801029c: fa21 f304 lsr.w r3, r1, r4 80102a0: ea45 0103 orr.w r1, r5, r3 80102a4: bd30 pop {r4, r5, pc} 80102a6: f1c4 040c rsb r4, r4, #12 80102aa: f1c4 0220 rsb r2, r4, #32 80102ae: fa20 f002 lsr.w r0, r0, r2 80102b2: fa01 f304 lsl.w r3, r1, r4 80102b6: ea40 0003 orr.w r0, r0, r3 80102ba: 4629 mov r1, r5 80102bc: bd30 pop {r4, r5, pc} 80102be: fa21 f004 lsr.w r0, r1, r4 80102c2: 4629 mov r1, r5 80102c4: bd30 pop {r4, r5, pc} 80102c6: f094 0f00 teq r4, #0 80102ca: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 80102ce: bf06 itte eq 80102d0: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 80102d4: 3401 addeq r4, #1 80102d6: 3d01 subne r5, #1 80102d8: e74e b.n 8010178 <__adddf3+0x8c> 80102da: ea7f 5c64 mvns.w ip, r4, asr #21 80102de: bf18 it ne 80102e0: ea7f 5c65 mvnsne.w ip, r5, asr #21 80102e4: d029 beq.n 801033a <__adddf3+0x24e> 80102e6: ea94 0f05 teq r4, r5 80102ea: bf08 it eq 80102ec: ea90 0f02 teqeq r0, r2 80102f0: d005 beq.n 80102fe <__adddf3+0x212> 80102f2: ea54 0c00 orrs.w ip, r4, r0 80102f6: bf04 itt eq 80102f8: 4619 moveq r1, r3 80102fa: 4610 moveq r0, r2 80102fc: bd30 pop {r4, r5, pc} 80102fe: ea91 0f03 teq r1, r3 8010302: bf1e ittt ne 8010304: 2100 movne r1, #0 8010306: 2000 movne r0, #0 8010308: bd30 popne {r4, r5, pc} 801030a: ea5f 5c54 movs.w ip, r4, lsr #21 801030e: d105 bne.n 801031c <__adddf3+0x230> 8010310: 0040 lsls r0, r0, #1 8010312: 4149 adcs r1, r1 8010314: bf28 it cs 8010316: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 801031a: bd30 pop {r4, r5, pc} 801031c: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 8010320: bf3c itt cc 8010322: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 8010326: bd30 popcc {r4, r5, pc} 8010328: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 801032c: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 8010330: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 8010334: f04f 0000 mov.w r0, #0 8010338: bd30 pop {r4, r5, pc} 801033a: ea7f 5c64 mvns.w ip, r4, asr #21 801033e: bf1a itte ne 8010340: 4619 movne r1, r3 8010342: 4610 movne r0, r2 8010344: ea7f 5c65 mvnseq.w ip, r5, asr #21 8010348: bf1c itt ne 801034a: 460b movne r3, r1 801034c: 4602 movne r2, r0 801034e: ea50 3401 orrs.w r4, r0, r1, lsl #12 8010352: bf06 itte eq 8010354: ea52 3503 orrseq.w r5, r2, r3, lsl #12 8010358: ea91 0f03 teqeq r1, r3 801035c: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 8010360: bd30 pop {r4, r5, pc} 8010362: bf00 nop 08010364 <__aeabi_ui2d>: 8010364: f090 0f00 teq r0, #0 8010368: bf04 itt eq 801036a: 2100 moveq r1, #0 801036c: 4770 bxeq lr 801036e: b530 push {r4, r5, lr} 8010370: f44f 6480 mov.w r4, #1024 @ 0x400 8010374: f104 0432 add.w r4, r4, #50 @ 0x32 8010378: f04f 0500 mov.w r5, #0 801037c: f04f 0100 mov.w r1, #0 8010380: e750 b.n 8010224 <__adddf3+0x138> 8010382: bf00 nop 08010384 <__aeabi_i2d>: 8010384: f090 0f00 teq r0, #0 8010388: bf04 itt eq 801038a: 2100 moveq r1, #0 801038c: 4770 bxeq lr 801038e: b530 push {r4, r5, lr} 8010390: f44f 6480 mov.w r4, #1024 @ 0x400 8010394: f104 0432 add.w r4, r4, #50 @ 0x32 8010398: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 801039c: bf48 it mi 801039e: 4240 negmi r0, r0 80103a0: f04f 0100 mov.w r1, #0 80103a4: e73e b.n 8010224 <__adddf3+0x138> 80103a6: bf00 nop 080103a8 <__aeabi_f2d>: 80103a8: 0042 lsls r2, r0, #1 80103aa: ea4f 01e2 mov.w r1, r2, asr #3 80103ae: ea4f 0131 mov.w r1, r1, rrx 80103b2: ea4f 7002 mov.w r0, r2, lsl #28 80103b6: bf1f itttt ne 80103b8: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 80103bc: f093 4f7f teqne r3, #4278190080 @ 0xff000000 80103c0: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 80103c4: 4770 bxne lr 80103c6: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 80103ca: bf08 it eq 80103cc: 4770 bxeq lr 80103ce: f093 4f7f teq r3, #4278190080 @ 0xff000000 80103d2: bf04 itt eq 80103d4: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 80103d8: 4770 bxeq lr 80103da: b530 push {r4, r5, lr} 80103dc: f44f 7460 mov.w r4, #896 @ 0x380 80103e0: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 80103e4: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80103e8: e71c b.n 8010224 <__adddf3+0x138> 80103ea: bf00 nop 080103ec <__aeabi_ul2d>: 80103ec: ea50 0201 orrs.w r2, r0, r1 80103f0: bf08 it eq 80103f2: 4770 bxeq lr 80103f4: b530 push {r4, r5, lr} 80103f6: f04f 0500 mov.w r5, #0 80103fa: e00a b.n 8010412 <__aeabi_l2d+0x16> 080103fc <__aeabi_l2d>: 80103fc: ea50 0201 orrs.w r2, r0, r1 8010400: bf08 it eq 8010402: 4770 bxeq lr 8010404: b530 push {r4, r5, lr} 8010406: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 801040a: d502 bpl.n 8010412 <__aeabi_l2d+0x16> 801040c: 4240 negs r0, r0 801040e: eb61 0141 sbc.w r1, r1, r1, lsl #1 8010412: f44f 6480 mov.w r4, #1024 @ 0x400 8010416: f104 0432 add.w r4, r4, #50 @ 0x32 801041a: ea5f 5c91 movs.w ip, r1, lsr #22 801041e: f43f aed8 beq.w 80101d2 <__adddf3+0xe6> 8010422: f04f 0203 mov.w r2, #3 8010426: ea5f 0cdc movs.w ip, ip, lsr #3 801042a: bf18 it ne 801042c: 3203 addne r2, #3 801042e: ea5f 0cdc movs.w ip, ip, lsr #3 8010432: bf18 it ne 8010434: 3203 addne r2, #3 8010436: eb02 02dc add.w r2, r2, ip, lsr #3 801043a: f1c2 0320 rsb r3, r2, #32 801043e: fa00 fc03 lsl.w ip, r0, r3 8010442: fa20 f002 lsr.w r0, r0, r2 8010446: fa01 fe03 lsl.w lr, r1, r3 801044a: ea40 000e orr.w r0, r0, lr 801044e: fa21 f102 lsr.w r1, r1, r2 8010452: 4414 add r4, r2 8010454: e6bd b.n 80101d2 <__adddf3+0xe6> 8010456: bf00 nop 08010458 <__aeabi_dmul>: 8010458: b570 push {r4, r5, r6, lr} 801045a: f04f 0cff mov.w ip, #255 @ 0xff 801045e: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 8010462: ea1c 5411 ands.w r4, ip, r1, lsr #20 8010466: bf1d ittte ne 8010468: ea1c 5513 andsne.w r5, ip, r3, lsr #20 801046c: ea94 0f0c teqne r4, ip 8010470: ea95 0f0c teqne r5, ip 8010474: f000 f8de bleq 8010634 <__aeabi_dmul+0x1dc> 8010478: 442c add r4, r5 801047a: ea81 0603 eor.w r6, r1, r3 801047e: ea21 514c bic.w r1, r1, ip, lsl #21 8010482: ea23 534c bic.w r3, r3, ip, lsl #21 8010486: ea50 3501 orrs.w r5, r0, r1, lsl #12 801048a: bf18 it ne 801048c: ea52 3503 orrsne.w r5, r2, r3, lsl #12 8010490: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8010494: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8010498: d038 beq.n 801050c <__aeabi_dmul+0xb4> 801049a: fba0 ce02 umull ip, lr, r0, r2 801049e: f04f 0500 mov.w r5, #0 80104a2: fbe1 e502 umlal lr, r5, r1, r2 80104a6: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 80104aa: fbe0 e503 umlal lr, r5, r0, r3 80104ae: f04f 0600 mov.w r6, #0 80104b2: fbe1 5603 umlal r5, r6, r1, r3 80104b6: f09c 0f00 teq ip, #0 80104ba: bf18 it ne 80104bc: f04e 0e01 orrne.w lr, lr, #1 80104c0: f1a4 04ff sub.w r4, r4, #255 @ 0xff 80104c4: f5b6 7f00 cmp.w r6, #512 @ 0x200 80104c8: f564 7440 sbc.w r4, r4, #768 @ 0x300 80104cc: d204 bcs.n 80104d8 <__aeabi_dmul+0x80> 80104ce: ea5f 0e4e movs.w lr, lr, lsl #1 80104d2: 416d adcs r5, r5 80104d4: eb46 0606 adc.w r6, r6, r6 80104d8: ea42 21c6 orr.w r1, r2, r6, lsl #11 80104dc: ea41 5155 orr.w r1, r1, r5, lsr #21 80104e0: ea4f 20c5 mov.w r0, r5, lsl #11 80104e4: ea40 505e orr.w r0, r0, lr, lsr #21 80104e8: ea4f 2ece mov.w lr, lr, lsl #11 80104ec: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 80104f0: bf88 it hi 80104f2: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 80104f6: d81e bhi.n 8010536 <__aeabi_dmul+0xde> 80104f8: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 80104fc: bf08 it eq 80104fe: ea5f 0e50 movseq.w lr, r0, lsr #1 8010502: f150 0000 adcs.w r0, r0, #0 8010506: eb41 5104 adc.w r1, r1, r4, lsl #20 801050a: bd70 pop {r4, r5, r6, pc} 801050c: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 8010510: ea46 0101 orr.w r1, r6, r1 8010514: ea40 0002 orr.w r0, r0, r2 8010518: ea81 0103 eor.w r1, r1, r3 801051c: ebb4 045c subs.w r4, r4, ip, lsr #1 8010520: bfc2 ittt gt 8010522: ebd4 050c rsbsgt r5, r4, ip 8010526: ea41 5104 orrgt.w r1, r1, r4, lsl #20 801052a: bd70 popgt {r4, r5, r6, pc} 801052c: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8010530: f04f 0e00 mov.w lr, #0 8010534: 3c01 subs r4, #1 8010536: f300 80ab bgt.w 8010690 <__aeabi_dmul+0x238> 801053a: f114 0f36 cmn.w r4, #54 @ 0x36 801053e: bfde ittt le 8010540: 2000 movle r0, #0 8010542: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 8010546: bd70 pople {r4, r5, r6, pc} 8010548: f1c4 0400 rsb r4, r4, #0 801054c: 3c20 subs r4, #32 801054e: da35 bge.n 80105bc <__aeabi_dmul+0x164> 8010550: 340c adds r4, #12 8010552: dc1b bgt.n 801058c <__aeabi_dmul+0x134> 8010554: f104 0414 add.w r4, r4, #20 8010558: f1c4 0520 rsb r5, r4, #32 801055c: fa00 f305 lsl.w r3, r0, r5 8010560: fa20 f004 lsr.w r0, r0, r4 8010564: fa01 f205 lsl.w r2, r1, r5 8010568: ea40 0002 orr.w r0, r0, r2 801056c: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 8010570: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8010574: eb10 70d3 adds.w r0, r0, r3, lsr #31 8010578: fa21 f604 lsr.w r6, r1, r4 801057c: eb42 0106 adc.w r1, r2, r6 8010580: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8010584: bf08 it eq 8010586: ea20 70d3 biceq.w r0, r0, r3, lsr #31 801058a: bd70 pop {r4, r5, r6, pc} 801058c: f1c4 040c rsb r4, r4, #12 8010590: f1c4 0520 rsb r5, r4, #32 8010594: fa00 f304 lsl.w r3, r0, r4 8010598: fa20 f005 lsr.w r0, r0, r5 801059c: fa01 f204 lsl.w r2, r1, r4 80105a0: ea40 0002 orr.w r0, r0, r2 80105a4: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80105a8: eb10 70d3 adds.w r0, r0, r3, lsr #31 80105ac: f141 0100 adc.w r1, r1, #0 80105b0: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80105b4: bf08 it eq 80105b6: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80105ba: bd70 pop {r4, r5, r6, pc} 80105bc: f1c4 0520 rsb r5, r4, #32 80105c0: fa00 f205 lsl.w r2, r0, r5 80105c4: ea4e 0e02 orr.w lr, lr, r2 80105c8: fa20 f304 lsr.w r3, r0, r4 80105cc: fa01 f205 lsl.w r2, r1, r5 80105d0: ea43 0302 orr.w r3, r3, r2 80105d4: fa21 f004 lsr.w r0, r1, r4 80105d8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 80105dc: fa21 f204 lsr.w r2, r1, r4 80105e0: ea20 0002 bic.w r0, r0, r2 80105e4: eb00 70d3 add.w r0, r0, r3, lsr #31 80105e8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80105ec: bf08 it eq 80105ee: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80105f2: bd70 pop {r4, r5, r6, pc} 80105f4: f094 0f00 teq r4, #0 80105f8: d10f bne.n 801061a <__aeabi_dmul+0x1c2> 80105fa: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 80105fe: 0040 lsls r0, r0, #1 8010600: eb41 0101 adc.w r1, r1, r1 8010604: f411 1f80 tst.w r1, #1048576 @ 0x100000 8010608: bf08 it eq 801060a: 3c01 subeq r4, #1 801060c: d0f7 beq.n 80105fe <__aeabi_dmul+0x1a6> 801060e: ea41 0106 orr.w r1, r1, r6 8010612: f095 0f00 teq r5, #0 8010616: bf18 it ne 8010618: 4770 bxne lr 801061a: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 801061e: 0052 lsls r2, r2, #1 8010620: eb43 0303 adc.w r3, r3, r3 8010624: f413 1f80 tst.w r3, #1048576 @ 0x100000 8010628: bf08 it eq 801062a: 3d01 subeq r5, #1 801062c: d0f7 beq.n 801061e <__aeabi_dmul+0x1c6> 801062e: ea43 0306 orr.w r3, r3, r6 8010632: 4770 bx lr 8010634: ea94 0f0c teq r4, ip 8010638: ea0c 5513 and.w r5, ip, r3, lsr #20 801063c: bf18 it ne 801063e: ea95 0f0c teqne r5, ip 8010642: d00c beq.n 801065e <__aeabi_dmul+0x206> 8010644: ea50 0641 orrs.w r6, r0, r1, lsl #1 8010648: bf18 it ne 801064a: ea52 0643 orrsne.w r6, r2, r3, lsl #1 801064e: d1d1 bne.n 80105f4 <__aeabi_dmul+0x19c> 8010650: ea81 0103 eor.w r1, r1, r3 8010654: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8010658: f04f 0000 mov.w r0, #0 801065c: bd70 pop {r4, r5, r6, pc} 801065e: ea50 0641 orrs.w r6, r0, r1, lsl #1 8010662: bf06 itte eq 8010664: 4610 moveq r0, r2 8010666: 4619 moveq r1, r3 8010668: ea52 0643 orrsne.w r6, r2, r3, lsl #1 801066c: d019 beq.n 80106a2 <__aeabi_dmul+0x24a> 801066e: ea94 0f0c teq r4, ip 8010672: d102 bne.n 801067a <__aeabi_dmul+0x222> 8010674: ea50 3601 orrs.w r6, r0, r1, lsl #12 8010678: d113 bne.n 80106a2 <__aeabi_dmul+0x24a> 801067a: ea95 0f0c teq r5, ip 801067e: d105 bne.n 801068c <__aeabi_dmul+0x234> 8010680: ea52 3603 orrs.w r6, r2, r3, lsl #12 8010684: bf1c itt ne 8010686: 4610 movne r0, r2 8010688: 4619 movne r1, r3 801068a: d10a bne.n 80106a2 <__aeabi_dmul+0x24a> 801068c: ea81 0103 eor.w r1, r1, r3 8010690: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8010694: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8010698: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 801069c: f04f 0000 mov.w r0, #0 80106a0: bd70 pop {r4, r5, r6, pc} 80106a2: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 80106a6: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 80106aa: bd70 pop {r4, r5, r6, pc} 080106ac <__aeabi_ddiv>: 80106ac: b570 push {r4, r5, r6, lr} 80106ae: f04f 0cff mov.w ip, #255 @ 0xff 80106b2: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 80106b6: ea1c 5411 ands.w r4, ip, r1, lsr #20 80106ba: bf1d ittte ne 80106bc: ea1c 5513 andsne.w r5, ip, r3, lsr #20 80106c0: ea94 0f0c teqne r4, ip 80106c4: ea95 0f0c teqne r5, ip 80106c8: f000 f8a7 bleq 801081a <__aeabi_ddiv+0x16e> 80106cc: eba4 0405 sub.w r4, r4, r5 80106d0: ea81 0e03 eor.w lr, r1, r3 80106d4: ea52 3503 orrs.w r5, r2, r3, lsl #12 80106d8: ea4f 3101 mov.w r1, r1, lsl #12 80106dc: f000 8088 beq.w 80107f0 <__aeabi_ddiv+0x144> 80106e0: ea4f 3303 mov.w r3, r3, lsl #12 80106e4: f04f 5580 mov.w r5, #268435456 @ 0x10000000 80106e8: ea45 1313 orr.w r3, r5, r3, lsr #4 80106ec: ea43 6312 orr.w r3, r3, r2, lsr #24 80106f0: ea4f 2202 mov.w r2, r2, lsl #8 80106f4: ea45 1511 orr.w r5, r5, r1, lsr #4 80106f8: ea45 6510 orr.w r5, r5, r0, lsr #24 80106fc: ea4f 2600 mov.w r6, r0, lsl #8 8010700: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 8010704: 429d cmp r5, r3 8010706: bf08 it eq 8010708: 4296 cmpeq r6, r2 801070a: f144 04fd adc.w r4, r4, #253 @ 0xfd 801070e: f504 7440 add.w r4, r4, #768 @ 0x300 8010712: d202 bcs.n 801071a <__aeabi_ddiv+0x6e> 8010714: 085b lsrs r3, r3, #1 8010716: ea4f 0232 mov.w r2, r2, rrx 801071a: 1ab6 subs r6, r6, r2 801071c: eb65 0503 sbc.w r5, r5, r3 8010720: 085b lsrs r3, r3, #1 8010722: ea4f 0232 mov.w r2, r2, rrx 8010726: f44f 1080 mov.w r0, #1048576 @ 0x100000 801072a: f44f 2c00 mov.w ip, #524288 @ 0x80000 801072e: ebb6 0e02 subs.w lr, r6, r2 8010732: eb75 0e03 sbcs.w lr, r5, r3 8010736: bf22 ittt cs 8010738: 1ab6 subcs r6, r6, r2 801073a: 4675 movcs r5, lr 801073c: ea40 000c orrcs.w r0, r0, ip 8010740: 085b lsrs r3, r3, #1 8010742: ea4f 0232 mov.w r2, r2, rrx 8010746: ebb6 0e02 subs.w lr, r6, r2 801074a: eb75 0e03 sbcs.w lr, r5, r3 801074e: bf22 ittt cs 8010750: 1ab6 subcs r6, r6, r2 8010752: 4675 movcs r5, lr 8010754: ea40 005c orrcs.w r0, r0, ip, lsr #1 8010758: 085b lsrs r3, r3, #1 801075a: ea4f 0232 mov.w r2, r2, rrx 801075e: ebb6 0e02 subs.w lr, r6, r2 8010762: eb75 0e03 sbcs.w lr, r5, r3 8010766: bf22 ittt cs 8010768: 1ab6 subcs r6, r6, r2 801076a: 4675 movcs r5, lr 801076c: ea40 009c orrcs.w r0, r0, ip, lsr #2 8010770: 085b lsrs r3, r3, #1 8010772: ea4f 0232 mov.w r2, r2, rrx 8010776: ebb6 0e02 subs.w lr, r6, r2 801077a: eb75 0e03 sbcs.w lr, r5, r3 801077e: bf22 ittt cs 8010780: 1ab6 subcs r6, r6, r2 8010782: 4675 movcs r5, lr 8010784: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8010788: ea55 0e06 orrs.w lr, r5, r6 801078c: d018 beq.n 80107c0 <__aeabi_ddiv+0x114> 801078e: ea4f 1505 mov.w r5, r5, lsl #4 8010792: ea45 7516 orr.w r5, r5, r6, lsr #28 8010796: ea4f 1606 mov.w r6, r6, lsl #4 801079a: ea4f 03c3 mov.w r3, r3, lsl #3 801079e: ea43 7352 orr.w r3, r3, r2, lsr #29 80107a2: ea4f 02c2 mov.w r2, r2, lsl #3 80107a6: ea5f 1c1c movs.w ip, ip, lsr #4 80107aa: d1c0 bne.n 801072e <__aeabi_ddiv+0x82> 80107ac: f411 1f80 tst.w r1, #1048576 @ 0x100000 80107b0: d10b bne.n 80107ca <__aeabi_ddiv+0x11e> 80107b2: ea41 0100 orr.w r1, r1, r0 80107b6: f04f 0000 mov.w r0, #0 80107ba: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 80107be: e7b6 b.n 801072e <__aeabi_ddiv+0x82> 80107c0: f411 1f80 tst.w r1, #1048576 @ 0x100000 80107c4: bf04 itt eq 80107c6: 4301 orreq r1, r0 80107c8: 2000 moveq r0, #0 80107ca: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 80107ce: bf88 it hi 80107d0: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 80107d4: f63f aeaf bhi.w 8010536 <__aeabi_dmul+0xde> 80107d8: ebb5 0c03 subs.w ip, r5, r3 80107dc: bf04 itt eq 80107de: ebb6 0c02 subseq.w ip, r6, r2 80107e2: ea5f 0c50 movseq.w ip, r0, lsr #1 80107e6: f150 0000 adcs.w r0, r0, #0 80107ea: eb41 5104 adc.w r1, r1, r4, lsl #20 80107ee: bd70 pop {r4, r5, r6, pc} 80107f0: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 80107f4: ea4e 3111 orr.w r1, lr, r1, lsr #12 80107f8: eb14 045c adds.w r4, r4, ip, lsr #1 80107fc: bfc2 ittt gt 80107fe: ebd4 050c rsbsgt r5, r4, ip 8010802: ea41 5104 orrgt.w r1, r1, r4, lsl #20 8010806: bd70 popgt {r4, r5, r6, pc} 8010808: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 801080c: f04f 0e00 mov.w lr, #0 8010810: 3c01 subs r4, #1 8010812: e690 b.n 8010536 <__aeabi_dmul+0xde> 8010814: ea45 0e06 orr.w lr, r5, r6 8010818: e68d b.n 8010536 <__aeabi_dmul+0xde> 801081a: ea0c 5513 and.w r5, ip, r3, lsr #20 801081e: ea94 0f0c teq r4, ip 8010822: bf08 it eq 8010824: ea95 0f0c teqeq r5, ip 8010828: f43f af3b beq.w 80106a2 <__aeabi_dmul+0x24a> 801082c: ea94 0f0c teq r4, ip 8010830: d10a bne.n 8010848 <__aeabi_ddiv+0x19c> 8010832: ea50 3401 orrs.w r4, r0, r1, lsl #12 8010836: f47f af34 bne.w 80106a2 <__aeabi_dmul+0x24a> 801083a: ea95 0f0c teq r5, ip 801083e: f47f af25 bne.w 801068c <__aeabi_dmul+0x234> 8010842: 4610 mov r0, r2 8010844: 4619 mov r1, r3 8010846: e72c b.n 80106a2 <__aeabi_dmul+0x24a> 8010848: ea95 0f0c teq r5, ip 801084c: d106 bne.n 801085c <__aeabi_ddiv+0x1b0> 801084e: ea52 3503 orrs.w r5, r2, r3, lsl #12 8010852: f43f aefd beq.w 8010650 <__aeabi_dmul+0x1f8> 8010856: 4610 mov r0, r2 8010858: 4619 mov r1, r3 801085a: e722 b.n 80106a2 <__aeabi_dmul+0x24a> 801085c: ea50 0641 orrs.w r6, r0, r1, lsl #1 8010860: bf18 it ne 8010862: ea52 0643 orrsne.w r6, r2, r3, lsl #1 8010866: f47f aec5 bne.w 80105f4 <__aeabi_dmul+0x19c> 801086a: ea50 0441 orrs.w r4, r0, r1, lsl #1 801086e: f47f af0d bne.w 801068c <__aeabi_dmul+0x234> 8010872: ea52 0543 orrs.w r5, r2, r3, lsl #1 8010876: f47f aeeb bne.w 8010650 <__aeabi_dmul+0x1f8> 801087a: e712 b.n 80106a2 <__aeabi_dmul+0x24a> 0801087c <__gedf2>: 801087c: f04f 3cff mov.w ip, #4294967295 8010880: e006 b.n 8010890 <__cmpdf2+0x4> 8010882: bf00 nop 08010884 <__ledf2>: 8010884: f04f 0c01 mov.w ip, #1 8010888: e002 b.n 8010890 <__cmpdf2+0x4> 801088a: bf00 nop 0801088c <__cmpdf2>: 801088c: f04f 0c01 mov.w ip, #1 8010890: f84d cd04 str.w ip, [sp, #-4]! 8010894: ea4f 0c41 mov.w ip, r1, lsl #1 8010898: ea7f 5c6c mvns.w ip, ip, asr #21 801089c: ea4f 0c43 mov.w ip, r3, lsl #1 80108a0: bf18 it ne 80108a2: ea7f 5c6c mvnsne.w ip, ip, asr #21 80108a6: d01b beq.n 80108e0 <__cmpdf2+0x54> 80108a8: b001 add sp, #4 80108aa: ea50 0c41 orrs.w ip, r0, r1, lsl #1 80108ae: bf0c ite eq 80108b0: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 80108b4: ea91 0f03 teqne r1, r3 80108b8: bf02 ittt eq 80108ba: ea90 0f02 teqeq r0, r2 80108be: 2000 moveq r0, #0 80108c0: 4770 bxeq lr 80108c2: f110 0f00 cmn.w r0, #0 80108c6: ea91 0f03 teq r1, r3 80108ca: bf58 it pl 80108cc: 4299 cmppl r1, r3 80108ce: bf08 it eq 80108d0: 4290 cmpeq r0, r2 80108d2: bf2c ite cs 80108d4: 17d8 asrcs r0, r3, #31 80108d6: ea6f 70e3 mvncc.w r0, r3, asr #31 80108da: f040 0001 orr.w r0, r0, #1 80108de: 4770 bx lr 80108e0: ea4f 0c41 mov.w ip, r1, lsl #1 80108e4: ea7f 5c6c mvns.w ip, ip, asr #21 80108e8: d102 bne.n 80108f0 <__cmpdf2+0x64> 80108ea: ea50 3c01 orrs.w ip, r0, r1, lsl #12 80108ee: d107 bne.n 8010900 <__cmpdf2+0x74> 80108f0: ea4f 0c43 mov.w ip, r3, lsl #1 80108f4: ea7f 5c6c mvns.w ip, ip, asr #21 80108f8: d1d6 bne.n 80108a8 <__cmpdf2+0x1c> 80108fa: ea52 3c03 orrs.w ip, r2, r3, lsl #12 80108fe: d0d3 beq.n 80108a8 <__cmpdf2+0x1c> 8010900: f85d 0b04 ldr.w r0, [sp], #4 8010904: 4770 bx lr 8010906: bf00 nop 08010908 <__aeabi_cdrcmple>: 8010908: 4684 mov ip, r0 801090a: 4610 mov r0, r2 801090c: 4662 mov r2, ip 801090e: 468c mov ip, r1 8010910: 4619 mov r1, r3 8010912: 4663 mov r3, ip 8010914: e000 b.n 8010918 <__aeabi_cdcmpeq> 8010916: bf00 nop 08010918 <__aeabi_cdcmpeq>: 8010918: b501 push {r0, lr} 801091a: f7ff ffb7 bl 801088c <__cmpdf2> 801091e: 2800 cmp r0, #0 8010920: bf48 it mi 8010922: f110 0f00 cmnmi.w r0, #0 8010926: bd01 pop {r0, pc} 08010928 <__aeabi_dcmpeq>: 8010928: f84d ed08 str.w lr, [sp, #-8]! 801092c: f7ff fff4 bl 8010918 <__aeabi_cdcmpeq> 8010930: bf0c ite eq 8010932: 2001 moveq r0, #1 8010934: 2000 movne r0, #0 8010936: f85d fb08 ldr.w pc, [sp], #8 801093a: bf00 nop 0801093c <__aeabi_dcmplt>: 801093c: f84d ed08 str.w lr, [sp, #-8]! 8010940: f7ff ffea bl 8010918 <__aeabi_cdcmpeq> 8010944: bf34 ite cc 8010946: 2001 movcc r0, #1 8010948: 2000 movcs r0, #0 801094a: f85d fb08 ldr.w pc, [sp], #8 801094e: bf00 nop 08010950 <__aeabi_dcmple>: 8010950: f84d ed08 str.w lr, [sp, #-8]! 8010954: f7ff ffe0 bl 8010918 <__aeabi_cdcmpeq> 8010958: bf94 ite ls 801095a: 2001 movls r0, #1 801095c: 2000 movhi r0, #0 801095e: f85d fb08 ldr.w pc, [sp], #8 8010962: bf00 nop 08010964 <__aeabi_dcmpge>: 8010964: f84d ed08 str.w lr, [sp, #-8]! 8010968: f7ff ffce bl 8010908 <__aeabi_cdrcmple> 801096c: bf94 ite ls 801096e: 2001 movls r0, #1 8010970: 2000 movhi r0, #0 8010972: f85d fb08 ldr.w pc, [sp], #8 8010976: bf00 nop 08010978 <__aeabi_dcmpgt>: 8010978: f84d ed08 str.w lr, [sp, #-8]! 801097c: f7ff ffc4 bl 8010908 <__aeabi_cdrcmple> 8010980: bf34 ite cc 8010982: 2001 movcc r0, #1 8010984: 2000 movcs r0, #0 8010986: f85d fb08 ldr.w pc, [sp], #8 801098a: bf00 nop 0801098c <__aeabi_d2f>: 801098c: ea4f 0241 mov.w r2, r1, lsl #1 8010990: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8010994: bf24 itt cs 8010996: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 801099a: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 801099e: d90d bls.n 80109bc <__aeabi_d2f+0x30> 80109a0: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 80109a4: ea4f 02c0 mov.w r2, r0, lsl #3 80109a8: ea4c 7050 orr.w r0, ip, r0, lsr #29 80109ac: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 80109b0: eb40 0083 adc.w r0, r0, r3, lsl #2 80109b4: bf08 it eq 80109b6: f020 0001 biceq.w r0, r0, #1 80109ba: 4770 bx lr 80109bc: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 80109c0: d121 bne.n 8010a06 <__aeabi_d2f+0x7a> 80109c2: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 80109c6: bfbc itt lt 80109c8: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 80109cc: 4770 bxlt lr 80109ce: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80109d2: ea4f 5252 mov.w r2, r2, lsr #21 80109d6: f1c2 0218 rsb r2, r2, #24 80109da: f1c2 0c20 rsb ip, r2, #32 80109de: fa10 f30c lsls.w r3, r0, ip 80109e2: fa20 f002 lsr.w r0, r0, r2 80109e6: bf18 it ne 80109e8: f040 0001 orrne.w r0, r0, #1 80109ec: ea4f 23c1 mov.w r3, r1, lsl #11 80109f0: ea4f 23d3 mov.w r3, r3, lsr #11 80109f4: fa03 fc0c lsl.w ip, r3, ip 80109f8: ea40 000c orr.w r0, r0, ip 80109fc: fa23 f302 lsr.w r3, r3, r2 8010a00: ea4f 0343 mov.w r3, r3, lsl #1 8010a04: e7cc b.n 80109a0 <__aeabi_d2f+0x14> 8010a06: ea7f 5362 mvns.w r3, r2, asr #21 8010a0a: d107 bne.n 8010a1c <__aeabi_d2f+0x90> 8010a0c: ea50 3301 orrs.w r3, r0, r1, lsl #12 8010a10: bf1e ittt ne 8010a12: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8010a16: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8010a1a: 4770 bxne lr 8010a1c: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8010a20: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8010a24: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8010a28: 4770 bx lr 8010a2a: bf00 nop 08010a2c <__aeabi_uldivmod>: 8010a2c: b953 cbnz r3, 8010a44 <__aeabi_uldivmod+0x18> 8010a2e: b94a cbnz r2, 8010a44 <__aeabi_uldivmod+0x18> 8010a30: 2900 cmp r1, #0 8010a32: bf08 it eq 8010a34: 2800 cmpeq r0, #0 8010a36: bf1c itt ne 8010a38: f04f 31ff movne.w r1, #4294967295 8010a3c: f04f 30ff movne.w r0, #4294967295 8010a40: f000 b96a b.w 8010d18 <__aeabi_idiv0> 8010a44: f1ad 0c08 sub.w ip, sp, #8 8010a48: e96d ce04 strd ip, lr, [sp, #-16]! 8010a4c: f000 f806 bl 8010a5c <__udivmoddi4> 8010a50: f8dd e004 ldr.w lr, [sp, #4] 8010a54: e9dd 2302 ldrd r2, r3, [sp, #8] 8010a58: b004 add sp, #16 8010a5a: 4770 bx lr 08010a5c <__udivmoddi4>: 8010a5c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8010a60: 9d08 ldr r5, [sp, #32] 8010a62: 460c mov r4, r1 8010a64: 2b00 cmp r3, #0 8010a66: d14e bne.n 8010b06 <__udivmoddi4+0xaa> 8010a68: 4694 mov ip, r2 8010a6a: 458c cmp ip, r1 8010a6c: 4686 mov lr, r0 8010a6e: fab2 f282 clz r2, r2 8010a72: d962 bls.n 8010b3a <__udivmoddi4+0xde> 8010a74: b14a cbz r2, 8010a8a <__udivmoddi4+0x2e> 8010a76: f1c2 0320 rsb r3, r2, #32 8010a7a: 4091 lsls r1, r2 8010a7c: fa20 f303 lsr.w r3, r0, r3 8010a80: fa0c fc02 lsl.w ip, ip, r2 8010a84: 4319 orrs r1, r3 8010a86: fa00 fe02 lsl.w lr, r0, r2 8010a8a: ea4f 471c mov.w r7, ip, lsr #16 8010a8e: fa1f f68c uxth.w r6, ip 8010a92: fbb1 f4f7 udiv r4, r1, r7 8010a96: ea4f 431e mov.w r3, lr, lsr #16 8010a9a: fb07 1114 mls r1, r7, r4, r1 8010a9e: ea43 4301 orr.w r3, r3, r1, lsl #16 8010aa2: fb04 f106 mul.w r1, r4, r6 8010aa6: 4299 cmp r1, r3 8010aa8: d90a bls.n 8010ac0 <__udivmoddi4+0x64> 8010aaa: eb1c 0303 adds.w r3, ip, r3 8010aae: f104 30ff add.w r0, r4, #4294967295 8010ab2: f080 8112 bcs.w 8010cda <__udivmoddi4+0x27e> 8010ab6: 4299 cmp r1, r3 8010ab8: f240 810f bls.w 8010cda <__udivmoddi4+0x27e> 8010abc: 3c02 subs r4, #2 8010abe: 4463 add r3, ip 8010ac0: 1a59 subs r1, r3, r1 8010ac2: fa1f f38e uxth.w r3, lr 8010ac6: fbb1 f0f7 udiv r0, r1, r7 8010aca: fb07 1110 mls r1, r7, r0, r1 8010ace: ea43 4301 orr.w r3, r3, r1, lsl #16 8010ad2: fb00 f606 mul.w r6, r0, r6 8010ad6: 429e cmp r6, r3 8010ad8: d90a bls.n 8010af0 <__udivmoddi4+0x94> 8010ada: eb1c 0303 adds.w r3, ip, r3 8010ade: f100 31ff add.w r1, r0, #4294967295 8010ae2: f080 80fc bcs.w 8010cde <__udivmoddi4+0x282> 8010ae6: 429e cmp r6, r3 8010ae8: f240 80f9 bls.w 8010cde <__udivmoddi4+0x282> 8010aec: 4463 add r3, ip 8010aee: 3802 subs r0, #2 8010af0: 1b9b subs r3, r3, r6 8010af2: ea40 4004 orr.w r0, r0, r4, lsl #16 8010af6: 2100 movs r1, #0 8010af8: b11d cbz r5, 8010b02 <__udivmoddi4+0xa6> 8010afa: 40d3 lsrs r3, r2 8010afc: 2200 movs r2, #0 8010afe: e9c5 3200 strd r3, r2, [r5] 8010b02: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8010b06: 428b cmp r3, r1 8010b08: d905 bls.n 8010b16 <__udivmoddi4+0xba> 8010b0a: b10d cbz r5, 8010b10 <__udivmoddi4+0xb4> 8010b0c: e9c5 0100 strd r0, r1, [r5] 8010b10: 2100 movs r1, #0 8010b12: 4608 mov r0, r1 8010b14: e7f5 b.n 8010b02 <__udivmoddi4+0xa6> 8010b16: fab3 f183 clz r1, r3 8010b1a: 2900 cmp r1, #0 8010b1c: d146 bne.n 8010bac <__udivmoddi4+0x150> 8010b1e: 42a3 cmp r3, r4 8010b20: d302 bcc.n 8010b28 <__udivmoddi4+0xcc> 8010b22: 4290 cmp r0, r2 8010b24: f0c0 80f0 bcc.w 8010d08 <__udivmoddi4+0x2ac> 8010b28: 1a86 subs r6, r0, r2 8010b2a: eb64 0303 sbc.w r3, r4, r3 8010b2e: 2001 movs r0, #1 8010b30: 2d00 cmp r5, #0 8010b32: d0e6 beq.n 8010b02 <__udivmoddi4+0xa6> 8010b34: e9c5 6300 strd r6, r3, [r5] 8010b38: e7e3 b.n 8010b02 <__udivmoddi4+0xa6> 8010b3a: 2a00 cmp r2, #0 8010b3c: f040 8090 bne.w 8010c60 <__udivmoddi4+0x204> 8010b40: eba1 040c sub.w r4, r1, ip 8010b44: ea4f 481c mov.w r8, ip, lsr #16 8010b48: fa1f f78c uxth.w r7, ip 8010b4c: 2101 movs r1, #1 8010b4e: fbb4 f6f8 udiv r6, r4, r8 8010b52: ea4f 431e mov.w r3, lr, lsr #16 8010b56: fb08 4416 mls r4, r8, r6, r4 8010b5a: ea43 4304 orr.w r3, r3, r4, lsl #16 8010b5e: fb07 f006 mul.w r0, r7, r6 8010b62: 4298 cmp r0, r3 8010b64: d908 bls.n 8010b78 <__udivmoddi4+0x11c> 8010b66: eb1c 0303 adds.w r3, ip, r3 8010b6a: f106 34ff add.w r4, r6, #4294967295 8010b6e: d202 bcs.n 8010b76 <__udivmoddi4+0x11a> 8010b70: 4298 cmp r0, r3 8010b72: f200 80cd bhi.w 8010d10 <__udivmoddi4+0x2b4> 8010b76: 4626 mov r6, r4 8010b78: 1a1c subs r4, r3, r0 8010b7a: fa1f f38e uxth.w r3, lr 8010b7e: fbb4 f0f8 udiv r0, r4, r8 8010b82: fb08 4410 mls r4, r8, r0, r4 8010b86: ea43 4304 orr.w r3, r3, r4, lsl #16 8010b8a: fb00 f707 mul.w r7, r0, r7 8010b8e: 429f cmp r7, r3 8010b90: d908 bls.n 8010ba4 <__udivmoddi4+0x148> 8010b92: eb1c 0303 adds.w r3, ip, r3 8010b96: f100 34ff add.w r4, r0, #4294967295 8010b9a: d202 bcs.n 8010ba2 <__udivmoddi4+0x146> 8010b9c: 429f cmp r7, r3 8010b9e: f200 80b0 bhi.w 8010d02 <__udivmoddi4+0x2a6> 8010ba2: 4620 mov r0, r4 8010ba4: 1bdb subs r3, r3, r7 8010ba6: ea40 4006 orr.w r0, r0, r6, lsl #16 8010baa: e7a5 b.n 8010af8 <__udivmoddi4+0x9c> 8010bac: f1c1 0620 rsb r6, r1, #32 8010bb0: 408b lsls r3, r1 8010bb2: fa22 f706 lsr.w r7, r2, r6 8010bb6: 431f orrs r7, r3 8010bb8: fa20 fc06 lsr.w ip, r0, r6 8010bbc: fa04 f301 lsl.w r3, r4, r1 8010bc0: ea43 030c orr.w r3, r3, ip 8010bc4: 40f4 lsrs r4, r6 8010bc6: fa00 f801 lsl.w r8, r0, r1 8010bca: 0c38 lsrs r0, r7, #16 8010bcc: ea4f 4913 mov.w r9, r3, lsr #16 8010bd0: fbb4 fef0 udiv lr, r4, r0 8010bd4: fa1f fc87 uxth.w ip, r7 8010bd8: fb00 441e mls r4, r0, lr, r4 8010bdc: ea49 4404 orr.w r4, r9, r4, lsl #16 8010be0: fb0e f90c mul.w r9, lr, ip 8010be4: 45a1 cmp r9, r4 8010be6: fa02 f201 lsl.w r2, r2, r1 8010bea: d90a bls.n 8010c02 <__udivmoddi4+0x1a6> 8010bec: 193c adds r4, r7, r4 8010bee: f10e 3aff add.w sl, lr, #4294967295 8010bf2: f080 8084 bcs.w 8010cfe <__udivmoddi4+0x2a2> 8010bf6: 45a1 cmp r9, r4 8010bf8: f240 8081 bls.w 8010cfe <__udivmoddi4+0x2a2> 8010bfc: f1ae 0e02 sub.w lr, lr, #2 8010c00: 443c add r4, r7 8010c02: eba4 0409 sub.w r4, r4, r9 8010c06: fa1f f983 uxth.w r9, r3 8010c0a: fbb4 f3f0 udiv r3, r4, r0 8010c0e: fb00 4413 mls r4, r0, r3, r4 8010c12: ea49 4404 orr.w r4, r9, r4, lsl #16 8010c16: fb03 fc0c mul.w ip, r3, ip 8010c1a: 45a4 cmp ip, r4 8010c1c: d907 bls.n 8010c2e <__udivmoddi4+0x1d2> 8010c1e: 193c adds r4, r7, r4 8010c20: f103 30ff add.w r0, r3, #4294967295 8010c24: d267 bcs.n 8010cf6 <__udivmoddi4+0x29a> 8010c26: 45a4 cmp ip, r4 8010c28: d965 bls.n 8010cf6 <__udivmoddi4+0x29a> 8010c2a: 3b02 subs r3, #2 8010c2c: 443c add r4, r7 8010c2e: ea43 400e orr.w r0, r3, lr, lsl #16 8010c32: fba0 9302 umull r9, r3, r0, r2 8010c36: eba4 040c sub.w r4, r4, ip 8010c3a: 429c cmp r4, r3 8010c3c: 46ce mov lr, r9 8010c3e: 469c mov ip, r3 8010c40: d351 bcc.n 8010ce6 <__udivmoddi4+0x28a> 8010c42: d04e beq.n 8010ce2 <__udivmoddi4+0x286> 8010c44: b155 cbz r5, 8010c5c <__udivmoddi4+0x200> 8010c46: ebb8 030e subs.w r3, r8, lr 8010c4a: eb64 040c sbc.w r4, r4, ip 8010c4e: fa04 f606 lsl.w r6, r4, r6 8010c52: 40cb lsrs r3, r1 8010c54: 431e orrs r6, r3 8010c56: 40cc lsrs r4, r1 8010c58: e9c5 6400 strd r6, r4, [r5] 8010c5c: 2100 movs r1, #0 8010c5e: e750 b.n 8010b02 <__udivmoddi4+0xa6> 8010c60: f1c2 0320 rsb r3, r2, #32 8010c64: fa20 f103 lsr.w r1, r0, r3 8010c68: fa0c fc02 lsl.w ip, ip, r2 8010c6c: fa24 f303 lsr.w r3, r4, r3 8010c70: 4094 lsls r4, r2 8010c72: 430c orrs r4, r1 8010c74: ea4f 481c mov.w r8, ip, lsr #16 8010c78: fa00 fe02 lsl.w lr, r0, r2 8010c7c: fa1f f78c uxth.w r7, ip 8010c80: fbb3 f0f8 udiv r0, r3, r8 8010c84: fb08 3110 mls r1, r8, r0, r3 8010c88: 0c23 lsrs r3, r4, #16 8010c8a: ea43 4301 orr.w r3, r3, r1, lsl #16 8010c8e: fb00 f107 mul.w r1, r0, r7 8010c92: 4299 cmp r1, r3 8010c94: d908 bls.n 8010ca8 <__udivmoddi4+0x24c> 8010c96: eb1c 0303 adds.w r3, ip, r3 8010c9a: f100 36ff add.w r6, r0, #4294967295 8010c9e: d22c bcs.n 8010cfa <__udivmoddi4+0x29e> 8010ca0: 4299 cmp r1, r3 8010ca2: d92a bls.n 8010cfa <__udivmoddi4+0x29e> 8010ca4: 3802 subs r0, #2 8010ca6: 4463 add r3, ip 8010ca8: 1a5b subs r3, r3, r1 8010caa: b2a4 uxth r4, r4 8010cac: fbb3 f1f8 udiv r1, r3, r8 8010cb0: fb08 3311 mls r3, r8, r1, r3 8010cb4: ea44 4403 orr.w r4, r4, r3, lsl #16 8010cb8: fb01 f307 mul.w r3, r1, r7 8010cbc: 42a3 cmp r3, r4 8010cbe: d908 bls.n 8010cd2 <__udivmoddi4+0x276> 8010cc0: eb1c 0404 adds.w r4, ip, r4 8010cc4: f101 36ff add.w r6, r1, #4294967295 8010cc8: d213 bcs.n 8010cf2 <__udivmoddi4+0x296> 8010cca: 42a3 cmp r3, r4 8010ccc: d911 bls.n 8010cf2 <__udivmoddi4+0x296> 8010cce: 3902 subs r1, #2 8010cd0: 4464 add r4, ip 8010cd2: 1ae4 subs r4, r4, r3 8010cd4: ea41 4100 orr.w r1, r1, r0, lsl #16 8010cd8: e739 b.n 8010b4e <__udivmoddi4+0xf2> 8010cda: 4604 mov r4, r0 8010cdc: e6f0 b.n 8010ac0 <__udivmoddi4+0x64> 8010cde: 4608 mov r0, r1 8010ce0: e706 b.n 8010af0 <__udivmoddi4+0x94> 8010ce2: 45c8 cmp r8, r9 8010ce4: d2ae bcs.n 8010c44 <__udivmoddi4+0x1e8> 8010ce6: ebb9 0e02 subs.w lr, r9, r2 8010cea: eb63 0c07 sbc.w ip, r3, r7 8010cee: 3801 subs r0, #1 8010cf0: e7a8 b.n 8010c44 <__udivmoddi4+0x1e8> 8010cf2: 4631 mov r1, r6 8010cf4: e7ed b.n 8010cd2 <__udivmoddi4+0x276> 8010cf6: 4603 mov r3, r0 8010cf8: e799 b.n 8010c2e <__udivmoddi4+0x1d2> 8010cfa: 4630 mov r0, r6 8010cfc: e7d4 b.n 8010ca8 <__udivmoddi4+0x24c> 8010cfe: 46d6 mov lr, sl 8010d00: e77f b.n 8010c02 <__udivmoddi4+0x1a6> 8010d02: 4463 add r3, ip 8010d04: 3802 subs r0, #2 8010d06: e74d b.n 8010ba4 <__udivmoddi4+0x148> 8010d08: 4606 mov r6, r0 8010d0a: 4623 mov r3, r4 8010d0c: 4608 mov r0, r1 8010d0e: e70f b.n 8010b30 <__udivmoddi4+0xd4> 8010d10: 3e02 subs r6, #2 8010d12: 4463 add r3, ip 8010d14: e730 b.n 8010b78 <__udivmoddi4+0x11c> 8010d16: bf00 nop 08010d18 <__aeabi_idiv0>: 8010d18: 4770 bx lr 8010d1a: bf00 nop 08010d1c : WP_DeratingTypeDef WP_Derating={0,}; WP_LEDCtrlTypeDef WP_LEDCtrl = {0,}; //WP_FfScaleTypeDef FfScale={0,}; void Initialize_WESPION(void) { 8010d1c: b580 push {r7, lr} 8010d1e: af00 add r7, sp, #0 // 25.05.05 - 다시 소스코드에서 관리하는 방식으로 변경 -> 이렇게 해야 DFU시에 같이 변경됨! WespionVer.VerMajer = 0x02; 8010d20: 4b15 ldr r3, [pc, #84] @ (8010d78 ) 8010d22: 2202 movs r2, #2 8010d24: 701a strb r2, [r3, #0] WespionVer.VerMiner = 0x00; 8010d26: 4b14 ldr r3, [pc, #80] @ (8010d78 ) 8010d28: 2200 movs r2, #0 8010d2a: 705a strb r2, [r3, #1] WespionVer.VerSub = 0x00; 8010d2c: 4b12 ldr r3, [pc, #72] @ (8010d78 ) 8010d2e: 2200 movs r2, #0 8010d30: 709a strb r2, [r3, #2] WespionVer.VerPre = 0x02; // dev.2 8010d32: 4b11 ldr r3, [pc, #68] @ (8010d78 ) 8010d34: 2202 movs r2, #2 8010d36: 70da strb r2, [r3, #3] WespionVer.VerYear = 2026; 8010d38: 4b0f ldr r3, [pc, #60] @ (8010d78 ) 8010d3a: f240 72ea movw r2, #2026 @ 0x7ea 8010d3e: 809a strh r2, [r3, #4] WespionVer.VerMonth = 07; 8010d40: 4b0d ldr r3, [pc, #52] @ (8010d78 ) 8010d42: 2207 movs r2, #7 8010d44: 719a strb r2, [r3, #6] WespionVer.VerDate = 05; 8010d46: 4b0c ldr r3, [pc, #48] @ (8010d78 ) 8010d48: 2205 movs r2, #5 8010d4a: 71da strb r2, [r3, #7] // // WespionVer.VerYear = RAM_Data.VerYear; ///VER_YEAR // WespionVer.VerMonth = RAM_Data.VerMonth; ///VER_MONTH // WespionVer.VerDate = RAM_Data.VerDate; ///VER_DATE MotorCtrl_Initialize(); 8010d4c: f005 fa00 bl 8016150 Initialize_App(); 8010d50: f000 f816 bl 8010d80 Initialize_Machine(); 8010d54: f000 f83c bl 8010dd0 Initialize_Gym(); 8010d58: f000 f896 bl 8010e88 Initialize_Weight(); 8010d5c: f000 f950 bl 8011000 Initialize_UserSetting(); 8010d60: f000 f9f4 bl 801114c Initialize_RegenR(); 8010d64: f000 fa0e bl 8011184 Initialize_Derating(); 8010d68: f000 fa6c bl 8011244 // LED_Queue_Init(); // Temporary initializations for Test Status_VoltRprt = OFF; 8010d6c: 4b03 ldr r3, [pc, #12] @ (8010d7c ) 8010d6e: 2200 movs r2, #0 8010d70: 601a str r2, [r3, #0] } 8010d72: bf00 nop 8010d74: bd80 pop {r7, pc} 8010d76: bf00 nop 8010d78: 200000b0 .word 0x200000b0 8010d7c: 20000c24 .word 0x20000c24 08010d80 : void Initialize_App(void) { 8010d80: b580 push {r7, lr} 8010d82: af00 add r7, sp, #0 pinMode(56, OUTPUT); // LED1 8010d84: 2101 movs r1, #1 8010d86: 2038 movs r0, #56 @ 0x38 8010d88: f007 fe48 bl 8018a1c pinMode(57, OUTPUT); // LED2 8010d8c: 2101 movs r1, #1 8010d8e: 2039 movs r0, #57 @ 0x39 8010d90: f007 fe44 bl 8018a1c pinMode(87, OUTPUT); // LED3 8010d94: 2101 movs r1, #1 8010d96: 2057 movs r0, #87 @ 0x57 8010d98: f007 fe40 bl 8018a1c pinMode(88, OUTPUT); // LED4 8010d9c: 2101 movs r1, #1 8010d9e: 2058 movs r0, #88 @ 0x58 8010da0: f007 fe3c bl 8018a1c pinMode(89, OUTPUT); // LED5 8010da4: 2101 movs r1, #1 8010da6: 2059 movs r0, #89 @ 0x59 8010da8: f007 fe38 bl 8018a1c pinMode(90, OUTPUT); // LED6 8010dac: 2101 movs r1, #1 8010dae: 205a movs r0, #90 @ 0x5a 8010db0: f007 fe34 bl 8018a1c pinMode(88, OUTPUT); // LED4 pinMode(89, OUTPUT); // LED5 pinMode(90, OUTPUT); // LED6 pinMode(91, OUTPUT); // LED7 #endif digitalWrite(56, 1); 8010db4: 2101 movs r1, #1 8010db6: 2038 movs r0, #56 @ 0x38 8010db8: f007 febc bl 8018b34 digitalWrite(57, 1); 8010dbc: 2101 movs r1, #1 8010dbe: 2039 movs r0, #57 @ 0x39 8010dc0: f007 feb8 bl 8018b34 digitalWrite(87, 1); 8010dc4: 2101 movs r1, #1 8010dc6: 2057 movs r0, #87 @ 0x57 8010dc8: f007 feb4 bl 8018b34 digitalWrite(88, 1); digitalWrite(89, 1); digitalWrite(90, 1); digitalWrite(91, 1); #endif } 8010dcc: bf00 nop 8010dce: bd80 pop {r7, pc} 08010dd0 : void Initialize_Machine(void) { 8010dd0: b480 push {r7} 8010dd2: af00 add r7, sp, #0 // WP_Machine.DefaultWeight = 0.6; // [A] -> 나중엔 [kg]로 바꿔야 함 // WP_Machine.FrictionWeight = 0.45; // [A] -> 0.7kg에 해당 // WP_Machine.FrictionSpeedPlus = -20.0f; // WP_Machine.FrictionSpeedMinus = 90.0f; WP_Machine.SensorGearRatio = RAM_Data.Machine_SensorGearRatio; ///MACHINE_SENSOR_GEAR_RATIO 8010dd4: 4b29 ldr r3, [pc, #164] @ (8010e7c ) 8010dd6: f8d3 30d0 ldr.w r3, [r3, #208] @ 0xd0 8010dda: 4a29 ldr r2, [pc, #164] @ (8010e80 ) 8010ddc: 6013 str r3, [r2, #0] WP_Machine.SensorGearRatioInv = 1.0f / WP_Machine.SensorGearRatio; 8010dde: 4b28 ldr r3, [pc, #160] @ (8010e80 ) 8010de0: ed93 7a00 vldr s14, [r3] 8010de4: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 8010de8: eec6 7a87 vdiv.f32 s15, s13, s14 8010dec: 4b24 ldr r3, [pc, #144] @ (8010e80 ) 8010dee: edc3 7a01 vstr s15, [r3, #4] WP_Machine.SpoolDiameter = RAM_Data.Machine_SpoolDiameter; // [mm] ///MACHINE_SPOOL_DIAMETER 8010df2: 4b22 ldr r3, [pc, #136] @ (8010e7c ) 8010df4: f8d3 30d4 ldr.w r3, [r3, #212] @ 0xd4 8010df8: 4a21 ldr r2, [pc, #132] @ (8010e80 ) 8010dfa: 6093 str r3, [r2, #8] WP_Machine.MaxWeight = RAM_Data.Machine_MaxWeight; // [kg] ///MACHINE_MAX_WEIGHT 8010dfc: 4b1f ldr r3, [pc, #124] @ (8010e7c ) 8010dfe: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8 8010e02: 4a1f ldr r2, [pc, #124] @ (8010e80 ) 8010e04: 6113 str r3, [r2, #16] WP_Machine.CableMaxLength = (uint16_t)RAM_Data.Machine_CableMaxLength; // [mm] ///MACHINE_CABLE_MAX_LENGTH 8010e06: 4b1d ldr r3, [pc, #116] @ (8010e7c ) 8010e08: edd3 7a37 vldr s15, [r3, #220] @ 0xdc 8010e0c: eefc 7ae7 vcvt.u32.f32 s15, s15 8010e10: ee17 3a90 vmov r3, s15 8010e14: b29a uxth r2, r3 8010e16: 4b1a ldr r3, [pc, #104] @ (8010e80 ) 8010e18: 819a strh r2, [r3, #12] WP_Machine.SoftWindingHeight = RAM_Data.Machine_SoftWindingHeight; // [mm] ///MACHINE_SOFT_WINDING_HEIGHT 8010e1a: 4b18 ldr r3, [pc, #96] @ (8010e7c ) 8010e1c: f8d3 30e4 ldr.w r3, [r3, #228] @ 0xe4 8010e20: 4a17 ldr r2, [pc, #92] @ (8010e80 ) 8010e22: 6193 str r3, [r2, #24] WP_Machine.Scale_Weight2Current = RAM_Data.Machine_Scale_Weight2Current; // [kg/A] ///MACHINE_SCALE_WEIGHT2CURRENT 8010e24: 4b15 ldr r3, [pc, #84] @ (8010e7c ) 8010e26: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0 8010e2a: 4a15 ldr r2, [pc, #84] @ (8010e80 ) 8010e2c: 6313 str r3, [r2, #48] @ 0x30 WP_Machine.Scale_Current2Weight = 1.0f / WP_Machine.Scale_Weight2Current; 8010e2e: 4b14 ldr r3, [pc, #80] @ (8010e80 ) 8010e30: ed93 7a0c vldr s14, [r3, #48] @ 0x30 8010e34: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 8010e38: eec6 7a87 vdiv.f32 s15, s13, s14 8010e3c: 4b10 ldr r3, [pc, #64] @ (8010e80 ) 8010e3e: edc3 7a0d vstr s15, [r3, #52] @ 0x34 WP_Machine.DefaultWeight = RAM_Data.Machine_DefaultWeight; // [A] -> 나중엔 [kg]로 바꿔야 함 ///MACHINE_DEFAULT_WEIGHT 8010e42: 4b0e ldr r3, [pc, #56] @ (8010e7c ) 8010e44: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8 8010e48: 4a0d ldr r2, [pc, #52] @ (8010e80 ) 8010e4a: 61d3 str r3, [r2, #28] WP_Machine.FrictionWeight = RAM_Data.Machine_FrictionWeight; // [A] -> 0.7kg에 해당 ///MACHINE_FRICTION_WEIGHT 8010e4c: 4b0b ldr r3, [pc, #44] @ (8010e7c ) 8010e4e: f8d3 30ec ldr.w r3, [r3, #236] @ 0xec 8010e52: 4a0b ldr r2, [pc, #44] @ (8010e80 ) 8010e54: 6213 str r3, [r2, #32] WP_Machine.FrictionSpeedPlus = RAM_Data.Machine_FrictionSpeedPlus; ///MACHINE_FRICTION_SPEED_PLUS 8010e56: 4b09 ldr r3, [pc, #36] @ (8010e7c ) 8010e58: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0 8010e5c: 4a08 ldr r2, [pc, #32] @ (8010e80 ) 8010e5e: 6293 str r3, [r2, #40] @ 0x28 WP_Machine.FrictionSpeedMinus = RAM_Data.Machine_FrictionSpeedMinus; ///MACHINE_FRICTION_SPEED_MINUS 8010e60: 4b06 ldr r3, [pc, #24] @ (8010e7c ) 8010e62: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4 8010e66: 4a06 ldr r2, [pc, #24] @ (8010e80 ) 8010e68: 62d3 str r3, [r2, #44] @ 0x2c WP_Machine.MaxCurrent = 30.0f; 8010e6a: 4b05 ldr r3, [pc, #20] @ (8010e80 ) 8010e6c: 4a05 ldr r2, [pc, #20] @ (8010e84 ) 8010e6e: 615a str r2, [r3, #20] } 8010e70: bf00 nop 8010e72: 46bd mov sp, r7 8010e74: f85d 7b04 ldr.w r7, [sp], #4 8010e78: 4770 bx lr 8010e7a: bf00 nop 8010e7c: 20000a98 .word 0x20000a98 8010e80: 20000110 .word 0x20000110 8010e84: 41f00000 .word 0x41f00000 08010e88 : void Initialize_Gym(void) { 8010e88: b580 push {r7, lr} 8010e8a: af00 add r7, sp, #0 WP_Gym.AutoWeightRatio[L]= 1.0f; 8010e8c: 4b21 ldr r3, [pc, #132] @ (8010f14 ) 8010e8e: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8010e92: f8c3 2088 str.w r2, [r3, #136] @ 0x88 WP_Gym.AutoWeightRatio[R]= 1.0f; 8010e96: 4b1f ldr r3, [pc, #124] @ (8010f14 ) 8010e98: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8010e9c: f8c3 208c str.w r2, [r3, #140] @ 0x8c GymRange_Init(); 8010ea0: f000 f83e bl 8010f20 WP_Gym.F_stop = 0.0f; // 3/19 kg 단위로 업데이트 하긴 했음 8010ea4: 4b1b ldr r3, [pc, #108] @ (8010f14 ) 8010ea6: f04f 0200 mov.w r2, #0 8010eaa: 65da str r2, [r3, #92] @ 0x5c WP_Gym.F_min = 1.1f; // 25.03.14 - 금속 기어마찰 의심돼서 1.1로 올려봄 8010eac: 4b19 ldr r3, [pc, #100] @ (8010f14 ) 8010eae: 4a1a ldr r2, [pc, #104] @ (8010f18 ) 8010eb0: 661a str r2, [r3, #96] @ 0x60 WP_Gym.F_shock = 1.50f; // 25.03.14 - 금속 기어마찰 의심돼서 올려봄 8010eb2: 4b18 ldr r3, [pc, #96] @ (8010f14 ) 8010eb4: f04f 527f mov.w r2, #1069547520 @ 0x3fc00000 8010eb8: 665a str r2, [r3, #100] @ 0x64 WP_Gym.F_idle = 2.0f; // 25.03.24 - 가동범위 인식 떄 너무 가벼워서 올림 8010eba: 4b16 ldr r3, [pc, #88] @ (8010f14 ) 8010ebc: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 8010ec0: 669a str r2, [r3, #104] @ 0x68 WP_Gym.F_EccSet = 0.0f; // 초기값임. 8010ec2: 4b14 ldr r3, [pc, #80] @ (8010f14 ) 8010ec4: f04f 0200 mov.w r2, #0 8010ec8: 66da str r2, [r3, #108] @ 0x6c WP_Gym.F_EccLimit = 0.5f * (WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight); 8010eca: 4b14 ldr r3, [pc, #80] @ (8010f1c ) 8010ecc: ed93 7a05 vldr s14, [r3, #20] 8010ed0: 4b12 ldr r3, [pc, #72] @ (8010f1c ) 8010ed2: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8010ed6: ee67 7a27 vmul.f32 s15, s14, s15 8010eda: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8010ede: ee67 7a87 vmul.f32 s15, s15, s14 8010ee2: 4b0c ldr r3, [pc, #48] @ (8010f14 ) 8010ee4: edc3 7a1e vstr s15, [r3, #120] @ 0x78 WP_Gym.EccSpdUp = 2; 8010ee8: 4b0a ldr r3, [pc, #40] @ (8010f14 ) 8010eea: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 8010eee: f8c3 2080 str.w r2, [r3, #128] @ 0x80 WP_Gym.EccSpdDown = -2; 8010ef2: 4b08 ldr r3, [pc, #32] @ (8010f14 ) 8010ef4: f04f 4240 mov.w r2, #3221225472 @ 0xc0000000 8010ef8: f8c3 2084 str.w r2, [r3, #132] @ 0x84 WP_Gym.AutoWeightRatio[L] = 1.0f; 8010efc: 4b05 ldr r3, [pc, #20] @ (8010f14 ) 8010efe: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8010f02: f8c3 2088 str.w r2, [r3, #136] @ 0x88 WP_Gym.AutoWeightRatio[R] = 1.0f; 8010f06: 4b03 ldr r3, [pc, #12] @ (8010f14 ) 8010f08: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8010f0c: f8c3 208c str.w r2, [r3, #140] @ 0x8c } 8010f10: bf00 nop 8010f12: bd80 pop {r7, pc} 8010f14: 20000148 .word 0x20000148 8010f18: 3f8ccccd .word 0x3f8ccccd 8010f1c: 20000110 .word 0x20000110 08010f20 : // (25.05.05) 가동범위 초기화 커맨드를 위해 따로 분리함. void GymRange_Init(void) { 8010f20: b480 push {r7} 8010f22: af00 add r7, sp, #0 WP_Gym.Region.H_gnd = -2700; 8010f24: 4b35 ldr r3, [pc, #212] @ (8010ffc ) 8010f26: f24f 5274 movw r2, #62836 @ 0xf574 8010f2a: 879a strh r2, [r3, #60] @ 0x3c // [mm] (25.05.01) 케이블 최대 길이 만큼은 무조건 감기도록 함. // (25.05.02) 회전관성과 함께 오버플로우인지 뭔지,계속 회전하는 현상 WP_Gym.Region.H_base = 0; 8010f2c: 4b33 ldr r3, [pc, #204] @ (8010ffc ) 8010f2e: 2200 movs r2, #0 8010f30: 87da strh r2, [r3, #62] @ 0x3e WP_Gym.Region.H_shock = 30; 8010f32: 4b32 ldr r3, [pc, #200] @ (8010ffc ) 8010f34: 221e movs r2, #30 8010f36: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 WP_Gym.Region.L_soft = 30; // 가동범위 설정 시 불편함을 줄이기 위해 값을 줄여야 우리함. 8010f3a: 4b30 ldr r3, [pc, #192] @ (8010ffc ) 8010f3c: 221e movs r2, #30 8010f3e: f8a3 2042 strh.w r2, [r3, #66] @ 0x42 WP_Gym.Region.L_soft_inv = 1.0f / WP_Gym.Region.L_soft; 8010f42: 4b2e ldr r3, [pc, #184] @ (8010ffc ) 8010f44: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8010f48: ee07 3a90 vmov s15, r3 8010f4c: eeb8 7ae7 vcvt.f32.s32 s14, s15 8010f50: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 8010f54: eec6 7a87 vdiv.f32 s15, s13, s14 8010f58: 4b28 ldr r3, [pc, #160] @ (8010ffc ) 8010f5a: edc3 7a11 vstr s15, [r3, #68] @ 0x44 WP_Gym.Region.H_LoSoft[L] = WP_Gym.Region.H_shock; // 초기값임 -> 가동범위 세팅시 갱신 필요! 8010f5e: 4b27 ldr r3, [pc, #156] @ (8010ffc ) 8010f60: f9b3 2040 ldrsh.w r2, [r3, #64] @ 0x40 8010f64: 4b25 ldr r3, [pc, #148] @ (8010ffc ) 8010f66: 859a strh r2, [r3, #44] @ 0x2c WP_Gym.Region.H_LoSoft[R] = WP_Gym.Region.H_shock; 8010f68: 4b24 ldr r3, [pc, #144] @ (8010ffc ) 8010f6a: f9b3 2040 ldrsh.w r2, [r3, #64] @ 0x40 8010f6e: 4b23 ldr r3, [pc, #140] @ (8010ffc ) 8010f70: 85da strh r2, [r3, #46] @ 0x2e WP_Gym.Region.L_RangeMin = 50.0f; 8010f72: 4b22 ldr r3, [pc, #136] @ (8010ffc ) 8010f74: 2232 movs r2, #50 @ 0x32 8010f76: f8a3 2048 strh.w r2, [r3, #72] @ 0x48 WP_Gym.Region.RangeLo[L] = WP_Gym.Region.H_LoSoft[L] + WP_Gym.Region.L_soft; // 초기값임 -> 가동범위 세팅시 갱신 필요! 8010f7a: 4b20 ldr r3, [pc, #128] @ (8010ffc ) 8010f7c: f9b3 302c ldrsh.w r3, [r3, #44] @ 0x2c 8010f80: b29a uxth r2, r3 8010f82: 4b1e ldr r3, [pc, #120] @ (8010ffc ) 8010f84: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8010f88: b29b uxth r3, r3 8010f8a: 4413 add r3, r2 8010f8c: b29b uxth r3, r3 8010f8e: b21a sxth r2, r3 8010f90: 4b1a ldr r3, [pc, #104] @ (8010ffc ) 8010f92: 861a strh r2, [r3, #48] @ 0x30 WP_Gym.Region.RangeLo[R] = WP_Gym.Region.H_LoSoft[L] + WP_Gym.Region.L_soft; // 가동범위 위에서 무게가 가벼워지면, 방심하다가 조금 내려갈 때 무게가 증가하면서 위험해질 수 있으므로 일단 구현 xx 8010f94: 4b19 ldr r3, [pc, #100] @ (8010ffc ) 8010f96: f9b3 302c ldrsh.w r3, [r3, #44] @ 0x2c 8010f9a: b29a uxth r2, r3 8010f9c: 4b17 ldr r3, [pc, #92] @ (8010ffc ) 8010f9e: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8010fa2: b29b uxth r3, r3 8010fa4: 4413 add r3, r2 8010fa6: b29b uxth r3, r3 8010fa8: b21a sxth r2, r3 8010faa: 4b14 ldr r3, [pc, #80] @ (8010ffc ) 8010fac: 865a strh r2, [r3, #50] @ 0x32 WP_Gym.Region.RangeHi[L] = 1800.0f; // 임의의 값임 -> 향후 수정 필요!! 8010fae: 4b13 ldr r3, [pc, #76] @ (8010ffc ) 8010fb0: f44f 62e1 mov.w r2, #1800 @ 0x708 8010fb4: 869a strh r2, [r3, #52] @ 0x34 WP_Gym.Region.RangeHi[R] = 1800.0f; 8010fb6: 4b11 ldr r3, [pc, #68] @ (8010ffc ) 8010fb8: f44f 62e1 mov.w r2, #1800 @ 0x708 8010fbc: 86da strh r2, [r3, #54] @ 0x36 WP_Gym.Region.H_HiSoft[L] = WP_Gym.Region.RangeHi[L] + WP_Gym.Region.L_soft; 8010fbe: 4b0f ldr r3, [pc, #60] @ (8010ffc ) 8010fc0: f9b3 3034 ldrsh.w r3, [r3, #52] @ 0x34 8010fc4: b29a uxth r2, r3 8010fc6: 4b0d ldr r3, [pc, #52] @ (8010ffc ) 8010fc8: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8010fcc: b29b uxth r3, r3 8010fce: 4413 add r3, r2 8010fd0: b29b uxth r3, r3 8010fd2: b21a sxth r2, r3 8010fd4: 4b09 ldr r3, [pc, #36] @ (8010ffc ) 8010fd6: 871a strh r2, [r3, #56] @ 0x38 WP_Gym.Region.H_HiSoft[R] = WP_Gym.Region.RangeHi[R] + WP_Gym.Region.L_soft; 8010fd8: 4b08 ldr r3, [pc, #32] @ (8010ffc ) 8010fda: f9b3 3036 ldrsh.w r3, [r3, #54] @ 0x36 8010fde: b29a uxth r2, r3 8010fe0: 4b06 ldr r3, [pc, #24] @ (8010ffc ) 8010fe2: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8010fe6: b29b uxth r3, r3 8010fe8: 4413 add r3, r2 8010fea: b29b uxth r3, r3 8010fec: b21a sxth r2, r3 8010fee: 4b03 ldr r3, [pc, #12] @ (8010ffc ) 8010ff0: 875a strh r2, [r3, #58] @ 0x3a } 8010ff2: bf00 nop 8010ff4: 46bd mov sp, r7 8010ff6: f85d 7b04 ldr.w r7, [sp], #4 8010ffa: 4770 bx lr 8010ffc: 20000148 .word 0x20000148 08011000 : void Initialize_Weight(void) { 8011000: b480 push {r7} 8011002: af00 add r7, sp, #0 // Common Parameters WP_Weight.RefSpdMove = 10; // mm/s 8011004: 4b41 ldr r3, [pc, #260] @ (801110c ) 8011006: 4a42 ldr r2, [pc, #264] @ (8011110 ) 8011008: 639a str r2, [r3, #56] @ 0x38 WP_Weight.RefSpdStop = 2.5; 801100a: 4b40 ldr r3, [pc, #256] @ (801110c ) 801100c: 4a41 ldr r2, [pc, #260] @ (8011114 ) 801100e: 63da str r2, [r3, #60] @ 0x3c WP_Gym.WeightSet[L] = 0.0f; 8011010: 4b41 ldr r3, [pc, #260] @ (8011118 ) 8011012: f04f 0200 mov.w r2, #0 8011016: 60da str r2, [r3, #12] WP_Gym.WeightSet[R] = 0.0f; 8011018: 4b3f ldr r3, [pc, #252] @ (8011118 ) 801101a: f04f 0200 mov.w r2, #0 801101e: 611a str r2, [r3, #16] WP_Gym.WeightMode[L] = 0; 8011020: 4b3d ldr r3, [pc, #244] @ (8011118 ) 8011022: 2200 movs r2, #0 8011024: 701a strb r2, [r3, #0] WP_Gym.WeightMode[R] = 0; 8011026: 4b3c ldr r3, [pc, #240] @ (8011118 ) 8011028: 2200 movs r2, #0 801102a: 705a strb r2, [r3, #1] WP_Weight.Ecc_Step = 0.0010; // WeightController 주기(16÷2kHz) 당 변화량 -> 주기가 부정확 함. 801102c: 4b37 ldr r3, [pc, #220] @ (801110c ) 801102e: 4a3b ldr r2, [pc, #236] @ (801111c ) 8011030: 649a str r2, [r3, #72] @ 0x48 // Hydraulic Mode 초기값 WP_Weight.Hydro.Vref = 300.0f; // 기준속도 (mm/s) 8011032: 4b36 ldr r3, [pc, #216] @ (801110c ) 8011034: 4a3a ldr r2, [pc, #232] @ (8011120 ) 8011036: 669a str r2, [r3, #104] @ 0x68 WP_Weight.Hydro.Vmax = 600.0f; // 최대속도 cap (mm/s) 8011038: 4b34 ldr r3, [pc, #208] @ (801110c ) 801103a: 4a3a ldr r2, [pc, #232] @ (8011124 ) 801103c: 66da str r2, [r3, #108] @ 0x6c WP_Weight.Hydro.n = 1.0f; // 속도 지수 (1.0=선형) 801103e: 4b33 ldr r3, [pc, #204] @ (801110c ) 8011040: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8011044: 671a str r2, [r3, #112] @ 0x70 WP_Weight.Hydro.minRatio = 0.1f; // 최소 텐션 (정지 시 설정무게의 10%) 8011046: 4b31 ldr r3, [pc, #196] @ (801110c ) 8011048: 4a37 ldr r2, [pc, #220] @ (8011128 ) 801104a: 675a str r2, [r3, #116] @ 0x74 // Isokinetic WP_Weight.Iso.Vtarget = 200.0f; // 목표속도 (mm/s) 801104c: 4b2f ldr r3, [pc, #188] @ (801110c ) 801104e: 4a37 ldr r2, [pc, #220] @ (801112c ) 8011050: 679a str r2, [r3, #120] @ 0x78 WP_Weight.Iso.Kp = 0.10f; // 비례 게인 [kg/(mm/s)] 8011052: 4b2e ldr r3, [pc, #184] @ (801110c ) 8011054: 4a34 ldr r2, [pc, #208] @ (8011128 ) 8011056: 67da str r2, [r3, #124] @ 0x7c WP_Weight.Iso.Ki = 1.0f; // 적분 게인 — P가 즉각 잡고, I는 잔여 오차 처리 8011058: 4b2c ldr r3, [pc, #176] @ (801110c ) 801105a: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 801105e: f8c3 2080 str.w r2, [r3, #128] @ 0x80 WP_Weight.Iso.DecayRate = 20.0f; // 하강 감쇠 속도 (kg/s), 20=50ms에 1kg 8011062: 4b2a ldr r3, [pc, #168] @ (801110c ) 8011064: 4a32 ldr r2, [pc, #200] @ (8011130 ) 8011066: f8c3 2084 str.w r2, [r3, #132] @ 0x84 WP_Weight.Iso.Fmin = 0.0f; // 최소 부하 (kg), 0=F_idle까지 풀림 801106a: 4b28 ldr r3, [pc, #160] @ (801110c ) 801106c: f04f 0200 mov.w r2, #0 8011070: f8c3 2088 str.w r2, [r3, #136] @ 0x88 WP_Weight.Iso.Fmax = 0.0f; // 최대 부하 (kg), 0=TargetWeight 사용 8011074: 4b25 ldr r3, [pc, #148] @ (801110c ) 8011076: f04f 0200 mov.w r2, #0 801107a: f8c3 208c str.w r2, [r3, #140] @ 0x8c // Vibration WP_Weight.Vib.Freq = 20.0f; // 20Hz 801107e: 4b23 ldr r3, [pc, #140] @ (801110c ) 8011080: 4a2b ldr r2, [pc, #172] @ (8011130 ) 8011082: f8c3 2090 str.w r2, [r3, #144] @ 0x90 WP_Weight.Vib.AmplitudeKg = 3.0f; // 진폭 3kg 8011086: 4b21 ldr r3, [pc, #132] @ (801110c ) 8011088: 4a2a ldr r2, [pc, #168] @ (8011134 ) 801108a: f8c3 2094 str.w r2, [r3, #148] @ 0x94 WP_Weight.Vib.MaxRatio = 0.30f; // 기본무게의 30% 상한 801108e: 4b1f ldr r3, [pc, #124] @ (801110c ) 8011090: 4a29 ldr r2, [pc, #164] @ (8011138 ) 8011092: f8c3 2098 str.w r2, [r3, #152] @ 0x98 // 공통 안전장치 WP_Weight.Safety.SlewRate_kgPerSec = 50.0f; // 50kg/s → 0→10kg에 200ms 8011096: 4b1d ldr r3, [pc, #116] @ (801110c ) 8011098: 4a28 ldr r2, [pc, #160] @ (801113c ) 801109a: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0 WP_Weight.Safety.IqLimit = 0.0f; // 비활성 (MaxCurrent가 최종 보호) 801109e: 4b1b ldr r3, [pc, #108] @ (801110c ) 80110a0: f04f 0200 mov.w r2, #0 80110a4: f8c3 209c str.w r2, [r3, #156] @ 0x9c // WP_Weight.DiffLarge = 1.0f; // WP_Weight.ChangeMin = 1.0f; // kg/s인데 현재는 A/s // WP_Weight.ChangeMax = 2.0f; // WeightOnOff WP_Weight.Ctrl.MotionAutoActive = 0; // 초기엔 MotionAutoOn 불가 80110a8: 4b18 ldr r3, [pc, #96] @ (801110c ) 80110aa: 2200 movs r2, #0 80110ac: f883 2028 strb.w r2, [r3, #40] @ 0x28 WP_Weight.Ctrl.MotionAutoStatus = 0; 80110b0: 4b16 ldr r3, [pc, #88] @ (801110c ) 80110b2: 2200 movs r2, #0 80110b4: f883 2029 strb.w r2, [r3, #41] @ 0x29 WP_Weight.Ctrl.OnOffStatus[L] = 0.0f; // 초기값임. 80110b8: 4b14 ldr r3, [pc, #80] @ (801110c ) 80110ba: 2200 movs r2, #0 80110bc: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = 0.0f; 80110c0: 4b12 ldr r3, [pc, #72] @ (801110c ) 80110c2: 2200 movs r2, #0 80110c4: f883 202b strb.w r2, [r3, #43] @ 0x2b WP_Weight.Ctrl.OnOffScale[L] = 0.0f; // 초기값임. 80110c8: 4b10 ldr r3, [pc, #64] @ (801110c ) 80110ca: f04f 0200 mov.w r2, #0 80110ce: 62da str r2, [r3, #44] @ 0x2c WP_Weight.Ctrl.OnOffScale[R] = 0.0f; 80110d0: 4b0e ldr r3, [pc, #56] @ (801110c ) 80110d2: f04f 0200 mov.w r2, #0 80110d6: 631a str r2, [r3, #48] @ 0x30 WP_Weight.Ctrl.OnOffStep = 0.00005; // 적당한지 테스트 필요, 향후 스케쥴러로 변경! 80110d8: 4b0c ldr r3, [pc, #48] @ (801110c ) 80110da: 4a19 ldr r2, [pc, #100] @ (8011140 ) 80110dc: 635a str r2, [r3, #52] @ 0x34 // WeightFeel WP_Weight.FfScale.Temp[L] = 0; 80110de: 4b0b ldr r3, [pc, #44] @ (801110c ) 80110e0: f04f 0200 mov.w r2, #0 80110e4: 661a str r2, [r3, #96] @ 0x60 WP_Weight.FfScale.Temp[R] = 0; 80110e6: 4b09 ldr r3, [pc, #36] @ (801110c ) 80110e8: f04f 0200 mov.w r2, #0 80110ec: 665a str r2, [r3, #100] @ 0x64 WP_Weight.FfScale.Min = 0.1f; // 0.3에서 일단 낮춤 80110ee: 4b07 ldr r3, [pc, #28] @ (801110c ) 80110f0: 4a0d ldr r2, [pc, #52] @ (8011128 ) 80110f2: 655a str r2, [r3, #84] @ 0x54 WP_Weight.FfScale.Max = 1.4f; 80110f4: 4b05 ldr r3, [pc, #20] @ (801110c ) 80110f6: 4a13 ldr r2, [pc, #76] @ (8011144 ) 80110f8: 659a str r2, [r3, #88] @ 0x58 WP_Weight.FfScale.Step = 0.00016; // 무게 단위 후처리 변동으로 2배처리함 (3/19) 80110fa: 4b04 ldr r3, [pc, #16] @ (801110c ) 80110fc: 4a12 ldr r2, [pc, #72] @ (8011148 ) 80110fe: 65da str r2, [r3, #92] @ 0x5c } 8011100: bf00 nop 8011102: 46bd mov sp, r7 8011104: f85d 7b04 ldr.w r7, [sp], #4 8011108: 4770 bx lr 801110a: bf00 nop 801110c: 200001d8 .word 0x200001d8 8011110: 41200000 .word 0x41200000 8011114: 40200000 .word 0x40200000 8011118: 20000148 .word 0x20000148 801111c: 3a83126f .word 0x3a83126f 8011120: 43960000 .word 0x43960000 8011124: 44160000 .word 0x44160000 8011128: 3dcccccd .word 0x3dcccccd 801112c: 43480000 .word 0x43480000 8011130: 41a00000 .word 0x41a00000 8011134: 40400000 .word 0x40400000 8011138: 3e99999a .word 0x3e99999a 801113c: 42480000 .word 0x42480000 8011140: 3851b717 .word 0x3851b717 8011144: 3fb33333 .word 0x3fb33333 8011148: 3927c5ac .word 0x3927c5ac 0801114c : void Initialize_UserSetting(void) { 801114c: b480 push {r7} 801114e: af00 add r7, sp, #0 WP_UserSetting.TimeCali = 200; // [msec] 8011150: 4b0a ldr r3, [pc, #40] @ (801117c ) 8011152: 22c8 movs r2, #200 @ 0xc8 8011154: 801a strh r2, [r3, #0] WP_UserSetting.TimeSafetyOFF = 3000; 8011156: 4b09 ldr r3, [pc, #36] @ (801117c ) 8011158: f640 32b8 movw r2, #3000 @ 0xbb8 801115c: 805a strh r2, [r3, #2] WP_LEDCtrl.R = 8; 801115e: 4b08 ldr r3, [pc, #32] @ (8011180 ) 8011160: 2208 movs r2, #8 8011162: 701a strb r2, [r3, #0] WP_LEDCtrl.G = 4; 8011164: 4b06 ldr r3, [pc, #24] @ (8011180 ) 8011166: 2204 movs r2, #4 8011168: 705a strb r2, [r3, #1] WP_LEDCtrl.B = 80; 801116a: 4b05 ldr r3, [pc, #20] @ (8011180 ) 801116c: 2250 movs r2, #80 @ 0x50 801116e: 709a strb r2, [r3, #2] } 8011170: bf00 nop 8011172: 46bd mov sp, r7 8011174: f85d 7b04 ldr.w r7, [sp], #4 8011178: 4770 bx lr 801117a: bf00 nop 801117c: 2000027c .word 0x2000027c 8011180: 20000328 .word 0x20000328 08011184 : void Initialize_RegenR(void) { 8011184: b480 push {r7} 8011186: af00 add r7, sp, #0 WP_RegenR.Vdc_Limit = 56.0f; // 4/8 과충전(추정) 발생 이후로 타이트하게 수정 (기존 58) 8011188: 4b27 ldr r3, [pc, #156] @ (8011228 ) 801118a: 4a28 ldr r2, [pc, #160] @ (801122c ) 801118c: 605a str r2, [r3, #4] WP_RegenR.Vdc_Off = 55.0f; 801118e: 4b26 ldr r3, [pc, #152] @ (8011228 ) 8011190: 4a27 ldr r2, [pc, #156] @ (8011230 ) 8011192: 609a str r2, [r3, #8] WP_RegenR.Vdc_margin_Inv = 1.0f / (WP_RegenR.Vdc_Limit - WP_RegenR.Vdc_Off); 8011194: 4b24 ldr r3, [pc, #144] @ (8011228 ) 8011196: ed93 7a01 vldr s14, [r3, #4] 801119a: 4b23 ldr r3, [pc, #140] @ (8011228 ) 801119c: edd3 7a02 vldr s15, [r3, #8] 80111a0: ee37 7a67 vsub.f32 s14, s14, s15 80111a4: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 80111a8: eec6 7a87 vdiv.f32 s15, s13, s14 80111ac: 4b1e ldr r3, [pc, #120] @ (8011228 ) 80111ae: edc3 7a03 vstr s15, [r3, #12] WP_RegenR.Idc_Charge_Limit = -10.0f; 80111b2: 4b1d ldr r3, [pc, #116] @ (8011228 ) 80111b4: 4a1f ldr r2, [pc, #124] @ (8011234 ) 80111b6: 611a str r2, [r3, #16] WP_RegenR.Idc_Off = -6.0f; 80111b8: 4b1b ldr r3, [pc, #108] @ (8011228 ) 80111ba: 4a1f ldr r2, [pc, #124] @ (8011238 ) 80111bc: 615a str r2, [r3, #20] WP_RegenR.Idc_margin_Inv = 1.0f / (WP_RegenR.Idc_Charge_Limit - WP_RegenR.Idc_Off); 80111be: 4b1a ldr r3, [pc, #104] @ (8011228 ) 80111c0: ed93 7a04 vldr s14, [r3, #16] 80111c4: 4b18 ldr r3, [pc, #96] @ (8011228 ) 80111c6: edd3 7a05 vldr s15, [r3, #20] 80111ca: ee37 7a67 vsub.f32 s14, s14, s15 80111ce: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 80111d2: eec6 7a87 vdiv.f32 s15, s13, s14 80111d6: 4b14 ldr r3, [pc, #80] @ (8011228 ) 80111d8: edc3 7a06 vstr s15, [r3, #24] WP_RegenR.alpha_Vdc = 0.1f; // 조정 필요!! (현재 임의 값 3/3) 80111dc: 4b12 ldr r3, [pc, #72] @ (8011228 ) 80111de: 4a17 ldr r2, [pc, #92] @ (801123c ) 80111e0: 645a str r2, [r3, #68] @ 0x44 // WP_RegenR.alpha_Idc = 0.00001f; // 25.02.25 최소한의 안정된 값을 갖기 위한 실험적 값 WP_RegenR.alpha_Idc = 0.005f; // 25.03.14 응답이 너무 느려서 키웠음 80111e2: 4b11 ldr r3, [pc, #68] @ (8011228 ) 80111e4: 4a16 ldr r2, [pc, #88] @ (8011240 ) 80111e6: 649a str r2, [r3, #72] @ 0x48 WP_RegenR.RegenScale_Vdc = 1.0f; 80111e8: 4b0f ldr r3, [pc, #60] @ (8011228 ) 80111ea: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 80111ee: 64da str r2, [r3, #76] @ 0x4c WP_RegenR.RegenScale_Idc = 1.0f; 80111f0: 4b0d ldr r3, [pc, #52] @ (8011228 ) 80111f2: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 80111f6: 651a str r2, [r3, #80] @ 0x50 WP_RegenR.PWM_Vdc = 0; 80111f8: 4b0b ldr r3, [pc, #44] @ (8011228 ) 80111fa: 2200 movs r2, #0 80111fc: f8a3 2054 strh.w r2, [r3, #84] @ 0x54 WP_RegenR.PWM_Idc = 0; 8011200: 4b09 ldr r3, [pc, #36] @ (8011228 ) 8011202: 2200 movs r2, #0 8011204: f8a3 2056 strh.w r2, [r3, #86] @ 0x56 WP_RegenR.PWM = 0; 8011208: 4b07 ldr r3, [pc, #28] @ (8011228 ) 801120a: 2200 movs r2, #0 801120c: f8a3 2058 strh.w r2, [r3, #88] @ 0x58 WP_RegenR.DebugStatus = 0; // 1: debug ON 8011210: 4b05 ldr r3, [pc, #20] @ (8011228 ) 8011212: 2200 movs r2, #0 8011214: 701a strb r2, [r3, #0] WP_RegenR.Status = 0; 8011216: 4b04 ldr r3, [pc, #16] @ (8011228 ) 8011218: 2200 movs r2, #0 801121a: 705a strb r2, [r3, #1] } 801121c: bf00 nop 801121e: 46bd mov sp, r7 8011220: f85d 7b04 ldr.w r7, [sp], #4 8011224: 4770 bx lr 8011226: bf00 nop 8011228: 20000280 .word 0x20000280 801122c: 42600000 .word 0x42600000 8011230: 425c0000 .word 0x425c0000 8011234: c1200000 .word 0xc1200000 8011238: c0c00000 .word 0xc0c00000 801123c: 3dcccccd .word 0x3dcccccd 8011240: 3ba3d70a .word 0x3ba3d70a 08011244 : void Initialize_Derating(void) { 8011244: b480 push {r7} 8011246: af00 add r7, sp, #0 WP_Derating.DebugStatus = 1; 8011248: 4b25 ldr r3, [pc, #148] @ (80112e0 ) 801124a: 2201 movs r2, #1 801124c: 701a strb r2, [r3, #0] WP_Derating.Status = 0; 801124e: 4b24 ldr r3, [pc, #144] @ (80112e0 ) 8011250: 2200 movs r2, #0 8011252: 721a strb r2, [r3, #8] WP_Derating.Iq_x10[L] = 0; // 0.1A 단위 - 부동소수점 연산 제거용 8011254: 4b22 ldr r3, [pc, #136] @ (80112e0 ) 8011256: 2200 movs r2, #0 8011258: 81da strh r2, [r3, #14] WP_Derating.Iq_x10[R] = 0; 801125a: 4b21 ldr r3, [pc, #132] @ (80112e0 ) 801125c: 2200 movs r2, #0 801125e: 821a strh r2, [r3, #16] WP_Derating.Iq_x10_Debug[L] = 0; 8011260: 4b1f ldr r3, [pc, #124] @ (80112e0 ) 8011262: 2200 movs r2, #0 8011264: 825a strh r2, [r3, #18] WP_Derating.Iq_x10_Debug[R] = 0; 8011266: 4b1e ldr r3, [pc, #120] @ (80112e0 ) 8011268: 2200 movs r2, #0 801126a: 829a strh r2, [r3, #20] WP_Derating.Iq_x10_cont[L] = 75; // 7.5A 임의의 경험적 초기값 (3/22) 801126c: 4b1c ldr r3, [pc, #112] @ (80112e0 ) 801126e: 224b movs r2, #75 @ 0x4b 8011270: 815a strh r2, [r3, #10] WP_Derating.Iq_x10_cont[R] = WP_Derating.Iq_x10_cont[L]; 8011272: 4b1b ldr r3, [pc, #108] @ (80112e0 ) 8011274: f9b3 200a ldrsh.w r2, [r3, #10] 8011278: 4b19 ldr r3, [pc, #100] @ (80112e0 ) 801127a: 819a strh r2, [r3, #12] WP_Derating.P_diss[L] = WP_Derating.Iq_x10_cont[L] * WP_Derating.Iq_x10_cont[L]; 801127c: 4b18 ldr r3, [pc, #96] @ (80112e0 ) 801127e: f9b3 300a ldrsh.w r3, [r3, #10] 8011282: 461a mov r2, r3 8011284: 4b16 ldr r3, [pc, #88] @ (80112e0 ) 8011286: f9b3 300a ldrsh.w r3, [r3, #10] 801128a: fb02 f303 mul.w r3, r2, r3 801128e: 4a14 ldr r2, [pc, #80] @ (80112e0 ) 8011290: 6253 str r3, [r2, #36] @ 0x24 WP_Derating.P_diss[L] = WP_Derating.P_diss[R]; 8011292: 4b13 ldr r3, [pc, #76] @ (80112e0 ) 8011294: 6a9b ldr r3, [r3, #40] @ 0x28 8011296: 4a12 ldr r2, [pc, #72] @ (80112e0 ) 8011298: 6253 str r3, [r2, #36] @ 0x24 WP_Derating.Iq_x10_Lim_Min = 50; // Derating 최대 적용 전류 : 냉각에 영향 801129a: 4b11 ldr r3, [pc, #68] @ (80112e0 ) 801129c: 2232 movs r2, #50 @ 0x32 801129e: f883 2048 strb.w r2, [r3, #72] @ 0x48 WP_Derating.deltaT[L] = 0; 80112a2: 4b0f ldr r3, [pc, #60] @ (80112e0 ) 80112a4: 2200 movs r2, #0 80112a6: 62da str r2, [r3, #44] @ 0x2c WP_Derating.deltaT[R] = 0; 80112a8: 4b0d ldr r3, [pc, #52] @ (80112e0 ) 80112aa: 2200 movs r2, #0 80112ac: 631a str r2, [r3, #48] @ 0x30 WP_Derating.deltaT_max = 50000000; // 일단 임의값 -> Iq^2과 시간 고려해야 함 80112ae: 4b0c ldr r3, [pc, #48] @ (80112e0 ) 80112b0: 4a0c ldr r2, [pc, #48] @ (80112e4 ) 80112b2: 639a str r2, [r3, #56] @ 0x38 WP_Derating.DeratingScale[L] = 0; 80112b4: 4b0a ldr r3, [pc, #40] @ (80112e0 ) 80112b6: 2200 movs r2, #0 80112b8: f883 203c strb.w r2, [r3, #60] @ 0x3c WP_Derating.DeratingScale[R] = 0; 80112bc: 4b08 ldr r3, [pc, #32] @ (80112e0 ) 80112be: 2200 movs r2, #0 80112c0: f883 203d strb.w r2, [r3, #61] @ 0x3d // 초기값은 머신의 최대치를 따름 -> 초기화 순서 지켜져야 함!! WP_Derating.Iq_Lim[L] = WP_Machine.MaxCurrent; 80112c4: 4b08 ldr r3, [pc, #32] @ (80112e8 ) 80112c6: 695b ldr r3, [r3, #20] 80112c8: 4a05 ldr r2, [pc, #20] @ (80112e0 ) 80112ca: 6413 str r3, [r2, #64] @ 0x40 WP_Derating.Iq_Lim[R] = WP_Machine.MaxCurrent; 80112cc: 4b06 ldr r3, [pc, #24] @ (80112e8 ) 80112ce: 695b ldr r3, [r3, #20] 80112d0: 4a03 ldr r2, [pc, #12] @ (80112e0 ) 80112d2: 6453 str r3, [r2, #68] @ 0x44 } 80112d4: bf00 nop 80112d6: 46bd mov sp, r7 80112d8: f85d 7b04 ldr.w r7, [sp], #4 80112dc: 4770 bx lr 80112de: bf00 nop 80112e0: 200002dc .word 0x200002dc 80112e4: 02faf080 .word 0x02faf080 80112e8: 20000110 .word 0x20000110 080112ec : /* ISR 수행시간 프로파일링 (v1.0.2) * DWT Cycle Counter 사용. 측정 오버헤드 ~2 클럭 (11ns). */ ISR_ProfileTypeDef ISR_Profile = {0}; void ISR_Profile_Init(void) { 80112ec: b480 push {r7} 80112ee: af00 add r7, sp, #0 CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; 80112f0: 4b09 ldr r3, [pc, #36] @ (8011318 ) 80112f2: 68db ldr r3, [r3, #12] 80112f4: 4a08 ldr r2, [pc, #32] @ (8011318 ) 80112f6: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 80112fa: 60d3 str r3, [r2, #12] DWT->CYCCNT = 0; 80112fc: 4b07 ldr r3, [pc, #28] @ (801131c ) 80112fe: 2200 movs r2, #0 8011300: 605a str r2, [r3, #4] DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; 8011302: 4b06 ldr r3, [pc, #24] @ (801131c ) 8011304: 681b ldr r3, [r3, #0] 8011306: 4a05 ldr r2, [pc, #20] @ (801131c ) 8011308: f043 0301 orr.w r3, r3, #1 801130c: 6013 str r3, [r2, #0] } 801130e: bf00 nop 8011310: 46bd mov sp, r7 8011312: f85d 7b04 ldr.w r7, [sp], #4 8011316: 4770 bx lr 8011318: e000edf0 .word 0xe000edf0 801131c: e0001000 .word 0xe0001000 08011320 : * [26] regionR RegionCurr[R] * --- 끝 --- * [27] checksum -(sum of all bytes) & 0xFF * 총 28바이트 */ void Return_Debug_Report(void) { 8011320: b580 push {r7, lr} 8011322: b08e sub sp, #56 @ 0x38 8011324: af00 add r7, sp, #0 if(!Debug_Report_Active) return; 8011326: 4b7a ldr r3, [pc, #488] @ (8011510 ) 8011328: 781b ldrb r3, [r3, #0] 801132a: 2b00 cmp r3, #0 801132c: f000 80ec beq.w 8011508 uint16_t avg_us = (uint16_t)(ISR_Profile.avg / 18); 8011330: 4b78 ldr r3, [pc, #480] @ (8011514 ) 8011332: 689b ldr r3, [r3, #8] 8011334: 4a78 ldr r2, [pc, #480] @ (8011518 ) 8011336: fba2 2303 umull r2, r3, r2, r3 801133a: 089b lsrs r3, r3, #2 801133c: 86bb strh r3, [r7, #52] @ 0x34 uint16_t max_us = (uint16_t)(ISR_Profile.max / 18); 801133e: 4b75 ldr r3, [pc, #468] @ (8011514 ) 8011340: 685b ldr r3, [r3, #4] 8011342: 4a75 ldr r2, [pc, #468] @ (8011518 ) 8011344: fba2 2303 umull r2, r3, r2, r3 8011348: 089b lsrs r3, r3, #2 801134a: 867b strh r3, [r7, #50] @ 0x32 uint8_t usage = (uint8_t)((float)ISR_Profile.max / 36000.0f * 100.0f); 801134c: 4b71 ldr r3, [pc, #452] @ (8011514 ) 801134e: 685b ldr r3, [r3, #4] 8011350: ee07 3a90 vmov s15, r3 8011354: eeb8 7a67 vcvt.f32.u32 s14, s15 8011358: eddf 6a70 vldr s13, [pc, #448] @ 801151c 801135c: eec7 7a26 vdiv.f32 s15, s14, s13 8011360: ed9f 7a6f vldr s14, [pc, #444] @ 8011520 8011364: ee67 7a87 vmul.f32 s15, s15, s14 8011368: eefc 7ae7 vcvt.u32.f32 s15, s15 801136c: edc7 7a01 vstr s15, [r7, #4] 8011370: 793b ldrb r3, [r7, #4] 8011372: f887 3031 strb.w r3, [r7, #49] @ 0x31 int16_t posL = (int16_t)WP_Gym.PositionFine[L]; 8011376: 4b6b ldr r3, [pc, #428] @ (8011524 ) 8011378: 699b ldr r3, [r3, #24] 801137a: 85fb strh r3, [r7, #46] @ 0x2e int16_t posR = (int16_t)WP_Gym.PositionFine[R]; 801137c: 4b69 ldr r3, [pc, #420] @ (8011524 ) 801137e: 69db ldr r3, [r3, #28] 8011380: 85bb strh r3, [r7, #44] @ 0x2c int16_t spdL = (int16_t)WP_Gym.Speed[L]; 8011382: 4b68 ldr r3, [pc, #416] @ (8011524 ) 8011384: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8011388: eefd 7ae7 vcvt.s32.f32 s15, s15 801138c: ee17 3a90 vmov r3, s15 8011390: 857b strh r3, [r7, #42] @ 0x2a int16_t spdR = (int16_t)WP_Gym.Speed[R]; 8011392: 4b64 ldr r3, [pc, #400] @ (8011524 ) 8011394: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8011398: eefd 7ae7 vcvt.s32.f32 s15, s15 801139c: ee17 3a90 vmov r3, s15 80113a0: 853b strh r3, [r7, #40] @ 0x28 int16_t iqL = (int16_t)(TargetIq[L] * 1000); 80113a2: 4b61 ldr r3, [pc, #388] @ (8011528 ) 80113a4: edd3 7a00 vldr s15, [r3] 80113a8: ed9f 7a60 vldr s14, [pc, #384] @ 801152c 80113ac: ee67 7a87 vmul.f32 s15, s15, s14 80113b0: eefd 7ae7 vcvt.s32.f32 s15, s15 80113b4: ee17 3a90 vmov r3, s15 80113b8: 84fb strh r3, [r7, #38] @ 0x26 int16_t iqR = (int16_t)(TargetIq[R] * 1000); 80113ba: 4b5b ldr r3, [pc, #364] @ (8011528 ) 80113bc: edd3 7a01 vldr s15, [r3, #4] 80113c0: ed9f 7a5a vldr s14, [pc, #360] @ 801152c 80113c4: ee67 7a87 vmul.f32 s15, s15, s14 80113c8: eefd 7ae7 vcvt.s32.f32 s15, s15 80113cc: ee17 3a90 vmov r3, s15 80113d0: 84bb strh r3, [r7, #36] @ 0x24 uint8_t data[3+25]; // 28바이트 data[0] = 0xFF; 80113d2: 23ff movs r3, #255 @ 0xff 80113d4: 723b strb r3, [r7, #8] data[1] = 0xFF; 80113d6: 23ff movs r3, #255 @ 0xff 80113d8: 727b strb r3, [r7, #9] data[2] = sizeof(data) - 3; // 25 80113da: 2319 movs r3, #25 80113dc: 72bb strb r3, [r7, #10] data[3] = DEBUG_REPORT; // 0xF5 80113de: 23f5 movs r3, #245 @ 0xf5 80113e0: 72fb strb r3, [r7, #11] // ISR 프로파일링 data[4] = (uint8_t)(avg_us >> 8); 80113e2: 8ebb ldrh r3, [r7, #52] @ 0x34 80113e4: 0a1b lsrs r3, r3, #8 80113e6: b29b uxth r3, r3 80113e8: b2db uxtb r3, r3 80113ea: 733b strb r3, [r7, #12] data[5] = (uint8_t)(avg_us); 80113ec: 8ebb ldrh r3, [r7, #52] @ 0x34 80113ee: b2db uxtb r3, r3 80113f0: 737b strb r3, [r7, #13] data[6] = (uint8_t)(max_us >> 8); 80113f2: 8e7b ldrh r3, [r7, #50] @ 0x32 80113f4: 0a1b lsrs r3, r3, #8 80113f6: b29b uxth r3, r3 80113f8: b2db uxtb r3, r3 80113fa: 73bb strb r3, [r7, #14] data[7] = (uint8_t)(max_us); 80113fc: 8e7b ldrh r3, [r7, #50] @ 0x32 80113fe: b2db uxtb r3, r3 8011400: 73fb strb r3, [r7, #15] data[8] = usage; 8011402: f897 3031 ldrb.w r3, [r7, #49] @ 0x31 8011406: 743b strb r3, [r7, #16] data[9] = Drive_Status; 8011408: 4b49 ldr r3, [pc, #292] @ (8011530 ) 801140a: 781b ldrb r3, [r3, #0] 801140c: 747b strb r3, [r7, #17] data[10] = Debug_SkipEncInit; 801140e: 4b49 ldr r3, [pc, #292] @ (8011534 ) 8011410: 781b ldrb r3, [r3, #0] 8011412: 74bb strb r3, [r7, #18] // HIL 검증 데이터 data[11] = (uint8_t)(posL >> 8); 8011414: f9b7 302e ldrsh.w r3, [r7, #46] @ 0x2e 8011418: 121b asrs r3, r3, #8 801141a: b21b sxth r3, r3 801141c: b2db uxtb r3, r3 801141e: 74fb strb r3, [r7, #19] data[12] = (uint8_t)(posL); 8011420: 8dfb ldrh r3, [r7, #46] @ 0x2e 8011422: b2db uxtb r3, r3 8011424: 753b strb r3, [r7, #20] data[13] = (uint8_t)(posR >> 8); 8011426: f9b7 302c ldrsh.w r3, [r7, #44] @ 0x2c 801142a: 121b asrs r3, r3, #8 801142c: b21b sxth r3, r3 801142e: b2db uxtb r3, r3 8011430: 757b strb r3, [r7, #21] data[14] = (uint8_t)(posR); 8011432: 8dbb ldrh r3, [r7, #44] @ 0x2c 8011434: b2db uxtb r3, r3 8011436: 75bb strb r3, [r7, #22] data[15] = (uint8_t)(spdL >> 8); 8011438: f9b7 302a ldrsh.w r3, [r7, #42] @ 0x2a 801143c: 121b asrs r3, r3, #8 801143e: b21b sxth r3, r3 8011440: b2db uxtb r3, r3 8011442: 75fb strb r3, [r7, #23] data[16] = (uint8_t)(spdL); 8011444: 8d7b ldrh r3, [r7, #42] @ 0x2a 8011446: b2db uxtb r3, r3 8011448: 763b strb r3, [r7, #24] data[17] = (uint8_t)(spdR >> 8); 801144a: f9b7 3028 ldrsh.w r3, [r7, #40] @ 0x28 801144e: 121b asrs r3, r3, #8 8011450: b21b sxth r3, r3 8011452: b2db uxtb r3, r3 8011454: 767b strb r3, [r7, #25] data[18] = (uint8_t)(spdR); 8011456: 8d3b ldrh r3, [r7, #40] @ 0x28 8011458: b2db uxtb r3, r3 801145a: 76bb strb r3, [r7, #26] data[19] = (uint8_t)(iqL >> 8); 801145c: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26 8011460: 121b asrs r3, r3, #8 8011462: b21b sxth r3, r3 8011464: b2db uxtb r3, r3 8011466: 76fb strb r3, [r7, #27] data[20] = (uint8_t)(iqL); 8011468: 8cfb ldrh r3, [r7, #38] @ 0x26 801146a: b2db uxtb r3, r3 801146c: 773b strb r3, [r7, #28] data[21] = (uint8_t)(iqR >> 8); 801146e: f9b7 3024 ldrsh.w r3, [r7, #36] @ 0x24 8011472: 121b asrs r3, r3, #8 8011474: b21b sxth r3, r3 8011476: b2db uxtb r3, r3 8011478: 777b strb r3, [r7, #29] data[22] = (uint8_t)(iqR); 801147a: 8cbb ldrh r3, [r7, #36] @ 0x24 801147c: b2db uxtb r3, r3 801147e: 77bb strb r3, [r7, #30] data[23] = WP_Gym.WeightMode[L]; 8011480: 4b28 ldr r3, [pc, #160] @ (8011524 ) 8011482: 781b ldrb r3, [r3, #0] 8011484: 77fb strb r3, [r7, #31] data[24] = WP_Gym.WeightMode[R]; 8011486: 4b27 ldr r3, [pc, #156] @ (8011524 ) 8011488: 785b ldrb r3, [r3, #1] 801148a: f887 3020 strb.w r3, [r7, #32] data[25] = WP_Gym.RegionCurr[L]; 801148e: 4b25 ldr r3, [pc, #148] @ (8011524 ) 8011490: f993 3028 ldrsb.w r3, [r3, #40] @ 0x28 8011494: b2db uxtb r3, r3 8011496: f887 3021 strb.w r3, [r7, #33] @ 0x21 data[26] = WP_Gym.RegionCurr[R]; 801149a: 4b22 ldr r3, [pc, #136] @ (8011524 ) 801149c: f993 3029 ldrsb.w r3, [r3, #41] @ 0x29 80114a0: b2db uxtb r3, r3 80114a2: f887 3022 strb.w r3, [r7, #34] @ 0x22 // Checksum data[27] = 0; 80114a6: 2300 movs r3, #0 80114a8: f887 3023 strb.w r3, [r7, #35] @ 0x23 for(uint8_t i = 0; i < sizeof(data) - 1; i++) { 80114ac: 2300 movs r3, #0 80114ae: f887 3037 strb.w r3, [r7, #55] @ 0x37 80114b2: e012 b.n 80114da data[27] += data[i]; 80114b4: f897 2023 ldrb.w r2, [r7, #35] @ 0x23 80114b8: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 80114bc: 3330 adds r3, #48 @ 0x30 80114be: f107 0108 add.w r1, r7, #8 80114c2: 440b add r3, r1 80114c4: f813 3c30 ldrb.w r3, [r3, #-48] 80114c8: 4413 add r3, r2 80114ca: b2db uxtb r3, r3 80114cc: f887 3023 strb.w r3, [r7, #35] @ 0x23 for(uint8_t i = 0; i < sizeof(data) - 1; i++) { 80114d0: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 80114d4: 3301 adds r3, #1 80114d6: f887 3037 strb.w r3, [r7, #55] @ 0x37 80114da: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 80114de: 2b1a cmp r3, #26 80114e0: d9e8 bls.n 80114b4 } data[27] = -data[27]; 80114e2: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 80114e6: 425b negs r3, r3 80114e8: b2db uxtb r3, r3 80114ea: f887 3023 strb.w r3, [r7, #35] @ 0x23 UART3_PutData(data, sizeof(data)); 80114ee: f107 0308 add.w r3, r7, #8 80114f2: 221c movs r2, #28 80114f4: 4619 mov r1, r3 80114f6: 4810 ldr r0, [pc, #64] @ (8011538 ) 80114f8: f00e fa16 bl 801f928 Return_LineEnding(); 80114fc: f008 fc00 bl 8019d00 ISR_Profile.max = 0; 8011500: 4b04 ldr r3, [pc, #16] @ (8011514 ) 8011502: 2200 movs r2, #0 8011504: 605a str r2, [r3, #4] 8011506: e000 b.n 801150a if(!Debug_Report_Active) return; 8011508: bf00 nop } 801150a: 3738 adds r7, #56 @ 0x38 801150c: 46bd mov sp, r7 801150e: bd80 pop {r7, pc} 8011510: 20000340 .word 0x20000340 8011514: 20000330 .word 0x20000330 8011518: 38e38e39 .word 0x38e38e39 801151c: 470ca000 .word 0x470ca000 8011520: 42c80000 .word 0x42c80000 8011524: 20000148 .word 0x20000148 8011528: 20000350 .word 0x20000350 801152c: 447a0000 .word 0x447a0000 8011530: 20000018 .word 0x20000018 8011534: 20000c05 .word 0x20000c05 8011538: 200053ec .word 0x200053ec 0801153c : * ISR에서 플래그만 세팅, 여기서 실제 UART/BLE 전송 수행. * 스케줄러 5ms 슬롯에서 호출됨. */ ISR_DeferredTypeDef ISR_Deferred = {0}; void ISR_DeferredNotify(void) { 801153c: b580 push {r7, lr} 801153e: b082 sub sp, #8 8011540: af02 add r7, sp, #8 // 1. WeightOnOff 완료 알림 if (ISR_Deferred.WeightOnOff_Ready) { 8011542: 4b1c ldr r3, [pc, #112] @ (80115b4 ) 8011544: 781b ldrb r3, [r3, #0] 8011546: b2db uxtb r3, r3 8011548: 2b00 cmp r3, #0 801154a: d008 beq.n 801155e Return_1byte(WEIGHTONOFF, ISR_Deferred.WeightOnOff_Status); 801154c: 4b19 ldr r3, [pc, #100] @ (80115b4 ) 801154e: 785b ldrb r3, [r3, #1] 8011550: 4619 mov r1, r3 8011552: 2065 movs r0, #101 @ 0x65 8011554: f008 fc1a bl 8019d8c ISR_Deferred.WeightOnOff_Ready = 0; 8011558: 4b16 ldr r3, [pc, #88] @ (80115b4 ) 801155a: 2200 movs r2, #0 801155c: 701a strb r2, [r3, #0] } // 2. MotionAutoWeight 발동 알림 if (ISR_Deferred.MotionAuto_Ready) { 801155e: 4b15 ldr r3, [pc, #84] @ (80115b4 ) 8011560: 789b ldrb r3, [r3, #2] 8011562: b2db uxtb r3, r3 8011564: 2b00 cmp r3, #0 8011566: d00b beq.n 8011580 Return_2x1byte(AUTOWEIGHT_STATUS, ISR_Deferred.MotionAuto_StatusL, ISR_Deferred.MotionAuto_StatusR); 8011568: 4b12 ldr r3, [pc, #72] @ (80115b4 ) 801156a: 78db ldrb r3, [r3, #3] 801156c: 4619 mov r1, r3 801156e: 4b11 ldr r3, [pc, #68] @ (80115b4 ) 8011570: 791b ldrb r3, [r3, #4] 8011572: 461a mov r2, r3 8011574: 2082 movs r0, #130 @ 0x82 8011576: f008 fcc7 bl 8019f08 ISR_Deferred.MotionAuto_Ready = 0; 801157a: 4b0e ldr r3, [pc, #56] @ (80115b4 ) 801157c: 2200 movs r2, #0 801157e: 709a strb r2, [r3, #2] } // 3. ClampEccWeight 변경 알림 if (ISR_Deferred.EccClamp_Ready) { 8011580: 4b0c ldr r3, [pc, #48] @ (80115b4 ) 8011582: 795b ldrb r3, [r3, #5] 8011584: b2db uxtb r3, r3 8011586: 2b00 cmp r3, #0 8011588: d011 beq.n 80115ae Return_4x1byte(ECC_LEVEL, ISR_Deferred.EccClamp_L, ISR_Deferred.EccClamp_R, ISR_Deferred.EccClamp_Err, 0); 801158a: 4b0a ldr r3, [pc, #40] @ (80115b4 ) 801158c: 799b ldrb r3, [r3, #6] 801158e: 4619 mov r1, r3 8011590: 4b08 ldr r3, [pc, #32] @ (80115b4 ) 8011592: 79db ldrb r3, [r3, #7] 8011594: 461a mov r2, r3 8011596: 4b07 ldr r3, [pc, #28] @ (80115b4 ) 8011598: 7a1b ldrb r3, [r3, #8] 801159a: 4618 mov r0, r3 801159c: 2300 movs r3, #0 801159e: 9300 str r3, [sp, #0] 80115a0: 4603 mov r3, r0 80115a2: 2069 movs r0, #105 @ 0x69 80115a4: f008 fcee bl 8019f84 ISR_Deferred.EccClamp_Ready = 0; 80115a8: 4b02 ldr r3, [pc, #8] @ (80115b4 ) 80115aa: 2200 movs r2, #0 80115ac: 715a strb r2, [r3, #5] } } 80115ae: bf00 nop 80115b0: 46bd mov sp, r7 80115b2: bd80 pop {r7, pc} 80115b4: 20000344 .word 0x20000344 080115b8 : float DevReport_FLoad[2] = {0}; // 계산된 부하 (kg) float DevReport_Accel[2] = {0}; // 가속도 (mm/s²) static float DevReport_PrevSpd[2] = {0}; // 가속도 계산용 이전 속도 uint8_t DevReport_Region[2] = {0}; // 위치 영역 //int Region_L, Region_R; void WeightManager(void) { 80115b8: b580 push {r7, lr} 80115ba: af00 add r7, sp, #0 // cnt_WeightManager++; switch (Debug_DriveMotor) { 80115bc: 4b2e ldr r3, [pc, #184] @ (8011678 ) 80115be: 781b ldrb r3, [r3, #0] 80115c0: 2b03 cmp r3, #3 80115c2: d846 bhi.n 8011652 80115c4: a201 add r2, pc, #4 @ (adr r2, 80115cc ) 80115c6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80115ca: bf00 nop 80115cc: 08011671 .word 0x08011671 80115d0: 0801160b .word 0x0801160b 80115d4: 0801162f .word 0x0801162f 80115d8: 080115dd .word 0x080115dd case 3: WP_Ctrl.Mode = Inv_TorqueCtrl; 80115dc: 4b27 ldr r3, [pc, #156] @ (801167c ) 80115de: 2205 movs r2, #5 80115e0: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = 3; 80115e2: 4b26 ldr r3, [pc, #152] @ (801167c ) 80115e4: 2203 movs r2, #3 80115e6: 705a strb r2, [r3, #1] // DropRelease(); // PullWeightOn(); MotionAutoWeight(); 80115e8: f002 f864 bl 80136b4 WeightController(L); 80115ec: 2000 movs r0, #0 80115ee: f000 f851 bl 8011694 WeightController(R); 80115f2: 2001 movs r0, #1 80115f4: f000 f84e bl 8011694 // 기능 테스트용 안전 모드 Motor1.Cmd.Icmd.q = TargetIq[L]; 80115f8: 4b21 ldr r3, [pc, #132] @ (8011680 ) 80115fa: 681b ldr r3, [r3, #0] 80115fc: 4a21 ldr r2, [pc, #132] @ (8011684 ) 80115fe: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = TargetIq[R]; 8011600: 4b1f ldr r3, [pc, #124] @ (8011680 ) 8011602: 685b ldr r3, [r3, #4] 8011604: 4a20 ldr r2, [pc, #128] @ (8011688 ) 8011606: 6053 str r3, [r2, #4] break; 8011608: e033 b.n 8011672 // WP_Gym.WeightSet[R] = 0; // Motor1.Cmd.Icmd.q = WP_Gym.F_stop; // Motor2.Cmd.Icmd.q = WP_Gym.F_stop; break; case 1: WP_Ctrl.Mode = Inv_TorqueCtrl; 801160a: 4b1c ldr r3, [pc, #112] @ (801167c ) 801160c: 2205 movs r2, #5 801160e: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = 1; 8011610: 4b1a ldr r3, [pc, #104] @ (801167c ) 8011612: 2201 movs r2, #1 8011614: 705a strb r2, [r3, #1] WP_Gym.WeightSet[R] = 0; 8011616: 4b1d ldr r3, [pc, #116] @ (801168c ) 8011618: f04f 0200 mov.w r2, #0 801161c: 611a str r2, [r3, #16] WeightController(L); 801161e: 2000 movs r0, #0 8011620: f000 f838 bl 8011694 Motor1.Cmd.Icmd.q = TargetIq[L]; 8011624: 4b16 ldr r3, [pc, #88] @ (8011680 ) 8011626: 681b ldr r3, [r3, #0] 8011628: 4a16 ldr r2, [pc, #88] @ (8011684 ) 801162a: 6053 str r3, [r2, #4] // Motor2.Cmd.Icmd.q = WP_Gym.F_min; break; 801162c: e021 b.n 8011672 case 2: WP_Ctrl.Mode = Inv_TorqueCtrl; 801162e: 4b13 ldr r3, [pc, #76] @ (801167c ) 8011630: 2205 movs r2, #5 8011632: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = 2; 8011634: 4b11 ldr r3, [pc, #68] @ (801167c ) 8011636: 2202 movs r2, #2 8011638: 705a strb r2, [r3, #1] WP_Gym.WeightSet[L] = 0; 801163a: 4b14 ldr r3, [pc, #80] @ (801168c ) 801163c: f04f 0200 mov.w r2, #0 8011640: 60da str r2, [r3, #12] WeightController(R); 8011642: 2001 movs r0, #1 8011644: f000 f826 bl 8011694 // Motor1.Cmd.Icmd.q = WP_Gym.F_min; Motor2.Cmd.Icmd.q = TargetIq[R]; 8011648: 4b0d ldr r3, [pc, #52] @ (8011680 ) 801164a: 685b ldr r3, [r3, #4] 801164c: 4a0e ldr r2, [pc, #56] @ (8011688 ) 801164e: 6053 str r3, [r2, #4] break; 8011650: e00f b.n 8011672 default: WP_Ctrl.Mode = Inv_Off; 8011652: 4b0a ldr r3, [pc, #40] @ (801167c ) 8011654: 2200 movs r2, #0 8011656: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = 0; 8011658: 4b08 ldr r3, [pc, #32] @ (801167c ) 801165a: 2200 movs r2, #0 801165c: 705a strb r2, [r3, #1] WP_Weight.Ctrl.Target[L] = 0; 801165e: 4b0c ldr r3, [pc, #48] @ (8011690 ) 8011660: f04f 0200 mov.w r2, #0 8011664: 609a str r2, [r3, #8] WP_Weight.Ctrl.Target[R] = 0; 8011666: 4b0a ldr r3, [pc, #40] @ (8011690 ) 8011668: f04f 0200 mov.w r2, #0 801166c: 60da str r2, [r3, #12] // Motor1.Cmd.Icmd.q = 0; // Motor2.Cmd.Icmd.q = 0; break; 801166e: e000 b.n 8011672 break; 8011670: bf00 nop } } 8011672: bf00 nop 8011674: bd80 pop {r7, pc} 8011676: bf00 nop 8011678: 20000c04 .word 0x20000c04 801167c: 200003ac .word 0x200003ac 8011680: 20000350 .word 0x20000350 8011684: 20000574 .word 0x20000574 8011688: 20000704 .word 0x20000704 801168c: 20000148 .word 0x20000148 8011690: 200001d8 .word 0x200001d8 08011694 : //int cnt_WeightController; void WeightController (int side) { // ScaleWeight2Current가 반영 안된 상태임!! 8011694: b580 push {r7, lr} 8011696: b0ae sub sp, #184 @ 0xb8 8011698: af00 add r7, sp, #0 801169a: 6078 str r0, [r7, #4] // cnt_WeightController++; WeightOnOff(side); 801169c: 6878 ldr r0, [r7, #4] 801169e: f001 fa53 bl 8012b48 ClampEccWeight(side); 80116a2: 687b ldr r3, [r7, #4] 80116a4: b2db uxtb r3, r3 80116a6: 4618 mov r0, r3 80116a8: f002 f980 bl 80139ac static float F_Load_prev[2] = {0}; // Slew Rate Limit용 static float F_Load_iso[2] = {0}; // 등속성 적분 상태 변수 float F_Load, SettingWeight, TargetWeight, Iq_Temp, Spd; float FeccTemp = 0; 80116ac: f04f 0300 mov.w r3, #0 80116b0: f8c7 30ac str.w r3, [r7, #172] @ 0xac uint8_t Mode, Region; int16_t Pos, H_LoSoft, RangeLo, RangeHi, H_HiSoft; // 굳이 좌우 변수를 지역변수에 할당해야만 하는 건 아니지만, 로직 부분 함수 가독성 개선을 위해 짧게 수정하려고 살려둠 SettingWeight = WP_Gym.WeightSet[side]; 80116b4: 4ad2 ldr r2, [pc, #840] @ (8011a00 ) 80116b6: 687b ldr r3, [r7, #4] 80116b8: 3302 adds r3, #2 80116ba: 009b lsls r3, r3, #2 80116bc: 4413 add r3, r2 80116be: 3304 adds r3, #4 80116c0: 681b ldr r3, [r3, #0] 80116c2: f8c7 308c str.w r3, [r7, #140] @ 0x8c TargetWeight = SettingWeight * WP_Gym.AutoWeightRatio[side]; 80116c6: 4ace ldr r2, [pc, #824] @ (8011a00 ) 80116c8: 687b ldr r3, [r7, #4] 80116ca: 3322 adds r3, #34 @ 0x22 80116cc: 009b lsls r3, r3, #2 80116ce: 4413 add r3, r2 80116d0: edd3 7a00 vldr s15, [r3] 80116d4: ed97 7a23 vldr s14, [r7, #140] @ 0x8c 80116d8: ee67 7a27 vmul.f32 s15, s14, s15 80116dc: edc7 7a22 vstr s15, [r7, #136] @ 0x88 FeccTemp = WP_Weight.Ctrl.Ecc[side]; 80116e0: 4ac8 ldr r2, [pc, #800] @ (8011a04 ) 80116e2: 687b ldr r3, [r7, #4] 80116e4: 3308 adds r3, #8 80116e6: 009b lsls r3, r3, #2 80116e8: 4413 add r3, r2 80116ea: 681b ldr r3, [r3, #0] 80116ec: f8c7 30ac str.w r3, [r7, #172] @ 0xac Mode = WP_Gym.WeightMode[side]; 80116f0: 4ac3 ldr r2, [pc, #780] @ (8011a00 ) 80116f2: 687b ldr r3, [r7, #4] 80116f4: 4413 add r3, r2 80116f6: 781b ldrb r3, [r3, #0] 80116f8: f887 3087 strb.w r3, [r7, #135] @ 0x87 // Pos = WP_Gym.Position[side]; Pos = WP_Gym.PositionFine2[side]; // 0.1cm 단위 80116fc: 4ac0 ldr r2, [pc, #768] @ (8011a00 ) 80116fe: 687b ldr r3, [r7, #4] 8011700: 3308 adds r3, #8 8011702: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8011706: f8a7 3084 strh.w r3, [r7, #132] @ 0x84 Spd = WP_Gym.Speed[side]; 801170a: 4abd ldr r2, [pc, #756] @ (8011a00 ) 801170c: 687b ldr r3, [r7, #4] 801170e: 3314 adds r3, #20 8011710: 009b lsls r3, r3, #2 8011712: 4413 add r3, r2 8011714: 3304 adds r3, #4 8011716: 681b ldr r3, [r3, #0] 8011718: f8c7 3080 str.w r3, [r7, #128] @ 0x80 H_LoSoft = WP_Gym.Region.H_LoSoft[side]; // 모두 1cm 단위 801171c: 4ab8 ldr r2, [pc, #736] @ (8011a00 ) 801171e: 687b ldr r3, [r7, #4] 8011720: 3314 adds r3, #20 8011722: 005b lsls r3, r3, #1 8011724: 4413 add r3, r2 8011726: 889b ldrh r3, [r3, #4] 8011728: f8a7 307e strh.w r3, [r7, #126] @ 0x7e RangeLo = WP_Gym.Region.RangeLo[side]; 801172c: 4ab4 ldr r2, [pc, #720] @ (8011a00 ) 801172e: 687b ldr r3, [r7, #4] 8011730: 3314 adds r3, #20 8011732: 005b lsls r3, r3, #1 8011734: 4413 add r3, r2 8011736: 891b ldrh r3, [r3, #8] 8011738: f8a7 307c strh.w r3, [r7, #124] @ 0x7c RangeHi = WP_Gym.Region.RangeHi[side]; 801173c: 4ab0 ldr r2, [pc, #704] @ (8011a00 ) 801173e: 687b ldr r3, [r7, #4] 8011740: 3318 adds r3, #24 8011742: 005b lsls r3, r3, #1 8011744: 4413 add r3, r2 8011746: 889b ldrh r3, [r3, #4] 8011748: f8a7 307a strh.w r3, [r7, #122] @ 0x7a H_HiSoft = WP_Gym.Region.H_HiSoft[side]; 801174c: 4aac ldr r2, [pc, #688] @ (8011a00 ) 801174e: 687b ldr r3, [r7, #4] 8011750: 3318 adds r3, #24 8011752: 005b lsls r3, r3, #1 8011754: 4413 add r3, r2 8011756: 891b ldrh r3, [r3, #8] 8011758: f8a7 3078 strh.w r3, [r7, #120] @ 0x78 // 0.1mm 단위로 역(10배) 환산 if (-32768 <= Pos && Pos < WP_Gym.Region.H_gnd *10) { 801175c: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011760: 4ba7 ldr r3, [pc, #668] @ (8011a00 ) 8011762: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c 8011766: 4619 mov r1, r3 8011768: 460b mov r3, r1 801176a: 009b lsls r3, r3, #2 801176c: 440b add r3, r1 801176e: 005b lsls r3, r3, #1 8011770: 429a cmp r2, r3 8011772: da0e bge.n 8011792 Iq_Temp = WP_Gym.F_stop * WP_Machine.Scale_Weight2Current; 8011774: 4ba2 ldr r3, [pc, #648] @ (8011a00 ) 8011776: ed93 7a17 vldr s14, [r3, #92] @ 0x5c 801177a: 4ba3 ldr r3, [pc, #652] @ (8011a08 ) 801177c: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8011780: ee67 7a27 vmul.f32 s15, s14, s15 8011784: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = Block; 8011788: 23ff movs r3, #255 @ 0xff 801178a: f887 30ab strb.w r3, [r7, #171] @ 0xab 801178e: f001 b875 b.w 801287c } else if(WP_Gym.Region.H_gnd*10 <= Pos && Pos < WP_Gym.Region.H_base*10) { 8011792: 4b9b ldr r3, [pc, #620] @ (8011a00 ) 8011794: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c 8011798: 461a mov r2, r3 801179a: 4613 mov r3, r2 801179c: 009b lsls r3, r3, #2 801179e: 4413 add r3, r2 80117a0: 005b lsls r3, r3, #1 80117a2: 461a mov r2, r3 80117a4: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80117a8: 429a cmp r2, r3 80117aa: dc1a bgt.n 80117e2 80117ac: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 80117b0: 4b93 ldr r3, [pc, #588] @ (8011a00 ) 80117b2: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e 80117b6: 4619 mov r1, r3 80117b8: 460b mov r3, r1 80117ba: 009b lsls r3, r3, #2 80117bc: 440b add r3, r1 80117be: 005b lsls r3, r3, #1 80117c0: 429a cmp r2, r3 80117c2: da0e bge.n 80117e2 Iq_Temp = WP_Gym.F_min * WP_Machine.Scale_Weight2Current; 80117c4: 4b8e ldr r3, [pc, #568] @ (8011a00 ) 80117c6: ed93 7a18 vldr s14, [r3, #96] @ 0x60 80117ca: 4b8f ldr r3, [pc, #572] @ (8011a08 ) 80117cc: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80117d0: ee67 7a27 vmul.f32 s15, s14, s15 80117d4: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = Ground; 80117d8: 2300 movs r3, #0 80117da: f887 30ab strb.w r3, [r7, #171] @ 0xab 80117de: f001 b84d b.w 801287c } else if(WP_Gym.Region.H_base*10 <= Pos && Pos < WP_Gym.Region.H_shock*10) { 80117e2: 4b87 ldr r3, [pc, #540] @ (8011a00 ) 80117e4: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e 80117e8: 461a mov r2, r3 80117ea: 4613 mov r3, r2 80117ec: 009b lsls r3, r3, #2 80117ee: 4413 add r3, r2 80117f0: 005b lsls r3, r3, #1 80117f2: 461a mov r2, r3 80117f4: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80117f8: 429a cmp r2, r3 80117fa: dc47 bgt.n 801188c 80117fc: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011800: 4b7f ldr r3, [pc, #508] @ (8011a00 ) 8011802: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 8011806: 4619 mov r1, r3 8011808: 460b mov r3, r1 801180a: 009b lsls r3, r3, #2 801180c: 440b add r3, r1 801180e: 005b lsls r3, r3, #1 8011810: 429a cmp r2, r3 8011812: da3b bge.n 801188c // Iq_Temp = WP_Gym.F_shock; Iq_Temp = LINEAR_INTERPOLATION(Pos, WP_Gym.Region.H_base*10, WP_Gym.Region.H_shock*10, WP_Gym.F_min, WP_Gym.F_idle) * WP_Machine.Scale_Weight2Current; 8011814: 4b7a ldr r3, [pc, #488] @ (8011a00 ) 8011816: ed93 7a18 vldr s14, [r3, #96] @ 0x60 801181a: 4b79 ldr r3, [pc, #484] @ (8011a00 ) 801181c: edd3 6a1a vldr s13, [r3, #104] @ 0x68 8011820: 4b77 ldr r3, [pc, #476] @ (8011a00 ) 8011822: edd3 7a18 vldr s15, [r3, #96] @ 0x60 8011826: ee36 6ae7 vsub.f32 s12, s13, s15 801182a: 4b75 ldr r3, [pc, #468] @ (8011a00 ) 801182c: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 8011830: 461a mov r2, r3 8011832: 4b73 ldr r3, [pc, #460] @ (8011a00 ) 8011834: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e 8011838: 1ad2 subs r2, r2, r3 801183a: 4613 mov r3, r2 801183c: 009b lsls r3, r3, #2 801183e: 4413 add r3, r2 8011840: 005b lsls r3, r3, #1 8011842: ee07 3a90 vmov s15, r3 8011846: eef8 7ae7 vcvt.f32.s32 s15, s15 801184a: eec6 6a27 vdiv.f32 s13, s12, s15 801184e: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011852: 4b6b ldr r3, [pc, #428] @ (8011a00 ) 8011854: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e 8011858: 4619 mov r1, r3 801185a: f06f 0309 mvn.w r3, #9 801185e: fb01 f303 mul.w r3, r1, r3 8011862: 4413 add r3, r2 8011864: ee07 3a90 vmov s15, r3 8011868: eef8 7ae7 vcvt.f32.s32 s15, s15 801186c: ee66 7aa7 vmul.f32 s15, s13, s15 8011870: ee37 7a27 vadd.f32 s14, s14, s15 8011874: 4b64 ldr r3, [pc, #400] @ (8011a08 ) 8011876: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801187a: ee67 7a27 vmul.f32 s15, s14, s15 801187e: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = Base; 8011882: 2301 movs r3, #1 8011884: f887 30ab strb.w r3, [r7, #171] @ 0xab 8011888: f000 bff8 b.w 801287c } else if(WP_Gym.Region.H_shock*10 <= Pos && Pos < H_LoSoft*10) { 801188c: 4b5c ldr r3, [pc, #368] @ (8011a00 ) 801188e: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 8011892: 461a mov r2, r3 8011894: 4613 mov r3, r2 8011896: 009b lsls r3, r3, #2 8011898: 4413 add r3, r2 801189a: 005b lsls r3, r3, #1 801189c: 461a mov r2, r3 801189e: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80118a2: 429a cmp r2, r3 80118a4: dc18 bgt.n 80118d8 80118a6: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 80118aa: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 80118ae: 4613 mov r3, r2 80118b0: 009b lsls r3, r3, #2 80118b2: 4413 add r3, r2 80118b4: 005b lsls r3, r3, #1 80118b6: 4299 cmp r1, r3 80118b8: da0e bge.n 80118d8 Iq_Temp = WP_Gym.F_idle * WP_Machine.Scale_Weight2Current; 80118ba: 4b51 ldr r3, [pc, #324] @ (8011a00 ) 80118bc: ed93 7a1a vldr s14, [r3, #104] @ 0x68 80118c0: 4b51 ldr r3, [pc, #324] @ (8011a08 ) 80118c2: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80118c6: ee67 7a27 vmul.f32 s15, s14, s15 80118ca: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = Idle; 80118ce: 2302 movs r3, #2 80118d0: f887 30ab strb.w r3, [r7, #171] @ 0xab 80118d4: f000 bfd2 b.w 801287c } else if(H_LoSoft*10 <= Pos && Pos < 32767){ 80118d8: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 80118dc: 4613 mov r3, r2 80118de: 009b lsls r3, r3, #2 80118e0: 4413 add r3, r2 80118e2: 005b lsls r3, r3, #1 80118e4: 461a mov r2, r3 80118e6: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80118ea: 429a cmp r2, r3 80118ec: f300 87c6 bgt.w 801287c 80118f0: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80118f4: f647 72ff movw r2, #32767 @ 0x7fff 80118f8: 4293 cmp r3, r2 80118fa: f000 87bf beq.w 801287c switch(Mode){ 80118fe: f897 3087 ldrb.w r3, [r7, #135] @ 0x87 8011902: 2b05 cmp r3, #5 8011904: f200 87aa bhi.w 801285c 8011908: a201 add r2, pc, #4 @ (adr r2, 8011910 ) 801190a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801190e: bf00 nop 8011910: 08011929 .word 0x08011929 8011914: 08011a41 .word 0x08011a41 8011918: 08011bef .word 0x08011bef 801191c: 08011de3 .word 0x08011de3 8011920: 080123c7 .word 0x080123c7 8011924: 08012627 .word 0x08012627 case 0: // 모드 0: 일반 부하 // 노미널 부하 계산 FeccTemp = 0; 8011928: f04f 0300 mov.w r3, #0 801192c: f8c7 30ac str.w r3, [r7, #172] @ 0xac F_Load = TargetWeight * WP_Weight.Ctrl.OnOffScale[side]; 8011930: 4a34 ldr r2, [pc, #208] @ (8011a04 ) 8011932: 687b ldr r3, [r7, #4] 8011934: 330a adds r3, #10 8011936: 009b lsls r3, r3, #2 8011938: 4413 add r3, r2 801193a: 3304 adds r3, #4 801193c: edd3 7a00 vldr s15, [r3] 8011940: ed97 7a22 vldr s14, [r7, #136] @ 0x88 8011944: ee67 7a27 vmul.f32 s15, s14, s15 8011948: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 if(F_Load <= WP_Gym.F_idle) F_Load = WP_Gym.F_idle; 801194c: 4b2c ldr r3, [pc, #176] @ (8011a00 ) 801194e: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8011952: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8011956: eeb4 7ae7 vcmpe.f32 s14, s15 801195a: eef1 fa10 vmrs APSR_nzcv, fpscr 801195e: d803 bhi.n 8011968 8011960: 4b27 ldr r3, [pc, #156] @ (8011a00 ) 8011962: 6e9b ldr r3, [r3, #104] @ 0x68 8011964: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 if(H_LoSoft*10 <= Pos && Pos < RangeLo*10) { 8011968: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 801196c: 4613 mov r3, r2 801196e: 009b lsls r3, r3, #2 8011970: 4413 add r3, r2 8011972: 005b lsls r3, r3, #1 8011974: 461a mov r2, r3 8011976: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 801197a: 429a cmp r2, r3 801197c: dc46 bgt.n 8011a0c 801197e: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 8011982: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8011986: 4613 mov r3, r2 8011988: 009b lsls r3, r3, #2 801198a: 4413 add r3, r2 801198c: 005b lsls r3, r3, #1 801198e: 4299 cmp r1, r3 8011990: da3c bge.n 8011a0c Iq_Temp = (WP_Gym.F_idle + (F_Load - WP_Gym.F_idle) * (Pos - H_LoSoft*10) / (RangeLo*10 - H_LoSoft*10)) * WP_Machine.Scale_Weight2Current; 8011992: 4b1b ldr r3, [pc, #108] @ (8011a00 ) 8011994: ed93 7a1a vldr s14, [r3, #104] @ 0x68 8011998: 4b19 ldr r3, [pc, #100] @ (8011a00 ) 801199a: edd3 7a1a vldr s15, [r3, #104] @ 0x68 801199e: edd7 6a2d vldr s13, [r7, #180] @ 0xb4 80119a2: ee76 6ae7 vsub.f32 s13, s13, s15 80119a6: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 80119aa: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 80119ae: f06f 0109 mvn.w r1, #9 80119b2: fb01 f303 mul.w r3, r1, r3 80119b6: 4413 add r3, r2 80119b8: ee07 3a90 vmov s15, r3 80119bc: eef8 7ae7 vcvt.f32.s32 s15, s15 80119c0: ee26 6aa7 vmul.f32 s12, s13, s15 80119c4: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 80119c8: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 80119cc: 1ad2 subs r2, r2, r3 80119ce: 4613 mov r3, r2 80119d0: 009b lsls r3, r3, #2 80119d2: 4413 add r3, r2 80119d4: 005b lsls r3, r3, #1 80119d6: ee07 3a90 vmov s15, r3 80119da: eef8 6ae7 vcvt.f32.s32 s13, s15 80119de: eec6 7a26 vdiv.f32 s15, s12, s13 80119e2: ee37 7a27 vadd.f32 s14, s14, s15 80119e6: 4b08 ldr r3, [pc, #32] @ (8011a08 ) 80119e8: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80119ec: ee67 7a27 vmul.f32 s15, s14, s15 80119f0: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = LoSoft; 80119f4: 2303 movs r3, #3 80119f6: f887 30ab strb.w r3, [r7, #171] @ 0xab } else if(RangeLo*10 <= Pos){ Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; Region = RoM; } // 이후 구간은 안전문제 판단이 미흡해서 미구현 break; 80119fa: f000 bf34 b.w 8012866 80119fe: bf00 nop 8011a00: 20000148 .word 0x20000148 8011a04: 200001d8 .word 0x200001d8 8011a08: 20000110 .word 0x20000110 } else if(RangeLo*10 <= Pos){ 8011a0c: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8011a10: 4613 mov r3, r2 8011a12: 009b lsls r3, r3, #2 8011a14: 4413 add r3, r2 8011a16: 005b lsls r3, r3, #1 8011a18: 461a mov r2, r3 8011a1a: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8011a1e: 429a cmp r2, r3 8011a20: f300 8721 bgt.w 8012866 Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; 8011a24: 4bda ldr r3, [pc, #872] @ (8011d90 ) 8011a26: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8011a2a: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8011a2e: ee67 7a27 vmul.f32 s15, s14, s15 8011a32: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = RoM; 8011a36: 2304 movs r3, #4 8011a38: f887 30ab strb.w r3, [r7, #171] @ 0xab break; 8011a3c: f000 bf13 b.w 8012866 case 1: // 모드 1: 신장성 모드 // 노미널 부하 계산 if (WP_Gym.EccSpdUp < Spd) { // 속도가 상한 이상인 경우 = 올라감 -> 기본 무게 (올라가는 방향이 +) 8011a40: 4bd4 ldr r3, [pc, #848] @ (8011d94 ) 8011a42: edd3 7a20 vldr s15, [r3, #128] @ 0x80 8011a46: ed97 7a20 vldr s14, [r7, #128] @ 0x80 8011a4a: eeb4 7ae7 vcmpe.f32 s14, s15 8011a4e: eef1 fa10 vmrs APSR_nzcv, fpscr 8011a52: dd1d ble.n 8011a90 FeccTemp = FeccTemp - WP_Weight.Ecc_Step; 8011a54: 4bd0 ldr r3, [pc, #832] @ (8011d98 ) 8011a56: edd3 7a12 vldr s15, [r3, #72] @ 0x48 8011a5a: ed97 7a2b vldr s14, [r7, #172] @ 0xac 8011a5e: ee77 7a67 vsub.f32 s15, s14, s15 8011a62: edc7 7a2b vstr s15, [r7, #172] @ 0xac WP_LEDCtrl.R = 20; 8011a66: 4bcd ldr r3, [pc, #820] @ (8011d9c ) 8011a68: 2214 movs r2, #20 8011a6a: 701a strb r2, [r3, #0] WP_LEDCtrl.G = 4; 8011a6c: 4bcb ldr r3, [pc, #812] @ (8011d9c ) 8011a6e: 2204 movs r2, #4 8011a70: 705a strb r2, [r3, #1] WP_LEDCtrl.B = 80; 8011a72: 4bca ldr r3, [pc, #808] @ (8011d9c ) 8011a74: 2250 movs r2, #80 @ 0x50 8011a76: 709a strb r2, [r3, #2] if(FeccTemp <= 0){ 8011a78: edd7 7a2b vldr s15, [r7, #172] @ 0xac 8011a7c: eef5 7ac0 vcmpe.f32 s15, #0.0 8011a80: eef1 fa10 vmrs APSR_nzcv, fpscr 8011a84: d82e bhi.n 8011ae4 FeccTemp = 0; 8011a86: f04f 0300 mov.w r3, #0 8011a8a: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8011a8e: e029 b.n 8011ae4 } } else if (Spd <= WP_Gym.EccSpdDown) { // 속도가 하한 이하인 경우 = 내려감 -> 더해진 무게 8011a90: 4bc0 ldr r3, [pc, #768] @ (8011d94 ) 8011a92: edd3 7a21 vldr s15, [r3, #132] @ 0x84 8011a96: ed97 7a20 vldr s14, [r7, #128] @ 0x80 8011a9a: eeb4 7ae7 vcmpe.f32 s14, s15 8011a9e: eef1 fa10 vmrs APSR_nzcv, fpscr 8011aa2: d81f bhi.n 8011ae4 FeccTemp = FeccTemp + WP_Weight.Ecc_Step; 8011aa4: 4bbc ldr r3, [pc, #752] @ (8011d98 ) 8011aa6: edd3 7a12 vldr s15, [r3, #72] @ 0x48 8011aaa: ed97 7a2b vldr s14, [r7, #172] @ 0xac 8011aae: ee77 7a27 vadd.f32 s15, s14, s15 8011ab2: edc7 7a2b vstr s15, [r7, #172] @ 0xac WP_LEDCtrl.R = 40; 8011ab6: 4bb9 ldr r3, [pc, #740] @ (8011d9c ) 8011ab8: 2228 movs r2, #40 @ 0x28 8011aba: 701a strb r2, [r3, #0] WP_LEDCtrl.G = 4; 8011abc: 4bb7 ldr r3, [pc, #732] @ (8011d9c ) 8011abe: 2204 movs r2, #4 8011ac0: 705a strb r2, [r3, #1] WP_LEDCtrl.B = 60; 8011ac2: 4bb6 ldr r3, [pc, #728] @ (8011d9c ) 8011ac4: 223c movs r2, #60 @ 0x3c 8011ac6: 709a strb r2, [r3, #2] if(FeccTemp >= WP_Gym.F_EccSet){ 8011ac8: 4bb2 ldr r3, [pc, #712] @ (8011d94 ) 8011aca: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 8011ace: ed97 7a2b vldr s14, [r7, #172] @ 0xac 8011ad2: eeb4 7ae7 vcmpe.f32 s14, s15 8011ad6: eef1 fa10 vmrs APSR_nzcv, fpscr 8011ada: db03 blt.n 8011ae4 FeccTemp = WP_Gym.F_EccSet; 8011adc: 4bad ldr r3, [pc, #692] @ (8011d94 ) 8011ade: 6edb ldr r3, [r3, #108] @ 0x6c 8011ae0: f8c7 30ac str.w r3, [r7, #172] @ 0xac } } F_Load = (TargetWeight + FeccTemp) * WP_Weight.Ctrl.OnOffScale[side]; 8011ae4: ed97 7a22 vldr s14, [r7, #136] @ 0x88 8011ae8: edd7 7a2b vldr s15, [r7, #172] @ 0xac 8011aec: ee37 7a27 vadd.f32 s14, s14, s15 8011af0: 4aa9 ldr r2, [pc, #676] @ (8011d98 ) 8011af2: 687b ldr r3, [r7, #4] 8011af4: 330a adds r3, #10 8011af6: 009b lsls r3, r3, #2 8011af8: 4413 add r3, r2 8011afa: 3304 adds r3, #4 8011afc: edd3 7a00 vldr s15, [r3] 8011b00: ee67 7a27 vmul.f32 s15, s14, s15 8011b04: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 if(F_Load <= WP_Gym.F_idle) F_Load = WP_Gym.F_idle; 8011b08: 4ba2 ldr r3, [pc, #648] @ (8011d94 ) 8011b0a: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8011b0e: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8011b12: eeb4 7ae7 vcmpe.f32 s14, s15 8011b16: eef1 fa10 vmrs APSR_nzcv, fpscr 8011b1a: d803 bhi.n 8011b24 8011b1c: 4b9d ldr r3, [pc, #628] @ (8011d94 ) 8011b1e: 6e9b ldr r3, [r3, #104] @ 0x68 8011b20: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 if(H_LoSoft*10 <= Pos && Pos < RangeLo*10) { 8011b24: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 8011b28: 4613 mov r3, r2 8011b2a: 009b lsls r3, r3, #2 8011b2c: 4413 add r3, r2 8011b2e: 005b lsls r3, r3, #1 8011b30: 461a mov r2, r3 8011b32: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8011b36: 429a cmp r2, r3 8011b38: dc3f bgt.n 8011bba 8011b3a: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 8011b3e: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8011b42: 4613 mov r3, r2 8011b44: 009b lsls r3, r3, #2 8011b46: 4413 add r3, r2 8011b48: 005b lsls r3, r3, #1 8011b4a: 4299 cmp r1, r3 8011b4c: da35 bge.n 8011bba Iq_Temp = (WP_Gym.F_idle + (F_Load - WP_Gym.F_idle) * (Pos - H_LoSoft*10) / (RangeLo*10 - H_LoSoft*10)) * WP_Machine.Scale_Weight2Current; 8011b4e: 4b91 ldr r3, [pc, #580] @ (8011d94 ) 8011b50: ed93 7a1a vldr s14, [r3, #104] @ 0x68 8011b54: 4b8f ldr r3, [pc, #572] @ (8011d94 ) 8011b56: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8011b5a: edd7 6a2d vldr s13, [r7, #180] @ 0xb4 8011b5e: ee76 6ae7 vsub.f32 s13, s13, s15 8011b62: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011b66: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011b6a: f06f 0109 mvn.w r1, #9 8011b6e: fb01 f303 mul.w r3, r1, r3 8011b72: 4413 add r3, r2 8011b74: ee07 3a90 vmov s15, r3 8011b78: eef8 7ae7 vcvt.f32.s32 s15, s15 8011b7c: ee26 6aa7 vmul.f32 s12, s13, s15 8011b80: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8011b84: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011b88: 1ad2 subs r2, r2, r3 8011b8a: 4613 mov r3, r2 8011b8c: 009b lsls r3, r3, #2 8011b8e: 4413 add r3, r2 8011b90: 005b lsls r3, r3, #1 8011b92: ee07 3a90 vmov s15, r3 8011b96: eef8 6ae7 vcvt.f32.s32 s13, s15 8011b9a: eec6 7a26 vdiv.f32 s15, s12, s13 8011b9e: ee37 7a27 vadd.f32 s14, s14, s15 8011ba2: 4b7b ldr r3, [pc, #492] @ (8011d90 ) 8011ba4: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8011ba8: ee67 7a27 vmul.f32 s15, s14, s15 8011bac: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = LoSoft; 8011bb0: 2303 movs r3, #3 8011bb2: f887 30ab strb.w r3, [r7, #171] @ 0xab } else if(RangeLo*10 <= Pos){ Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; Region = RoM; } // 이후 구간은 안전문제 판단이 미흡해서 미구현 break; 8011bb6: f000 be58 b.w 801286a } else if(RangeLo*10 <= Pos){ 8011bba: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8011bbe: 4613 mov r3, r2 8011bc0: 009b lsls r3, r3, #2 8011bc2: 4413 add r3, r2 8011bc4: 005b lsls r3, r3, #1 8011bc6: 461a mov r2, r3 8011bc8: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8011bcc: 429a cmp r2, r3 8011bce: f300 864c bgt.w 801286a Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; 8011bd2: 4b6f ldr r3, [pc, #444] @ (8011d90 ) 8011bd4: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8011bd8: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8011bdc: ee67 7a27 vmul.f32 s15, s14, s15 8011be0: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = RoM; 8011be4: 2304 movs r3, #4 8011be6: f887 30ab strb.w r3, [r7, #171] @ 0xab break; 8011bea: f000 be3e b.w 801286a // break; case 2: // 모드 2: 밴드 모드 // 노미널 부하 계산 FeccTemp = 0; 8011bee: f04f 0300 mov.w r3, #0 8011bf2: f8c7 30ac str.w r3, [r7, #172] @ 0xac F_Load = TargetWeight * WP_Weight.Ctrl.OnOffScale[side]; 8011bf6: 4a68 ldr r2, [pc, #416] @ (8011d98 ) 8011bf8: 687b ldr r3, [r7, #4] 8011bfa: 330a adds r3, #10 8011bfc: 009b lsls r3, r3, #2 8011bfe: 4413 add r3, r2 8011c00: 3304 adds r3, #4 8011c02: edd3 7a00 vldr s15, [r3] 8011c06: ed97 7a22 vldr s14, [r7, #136] @ 0x88 8011c0a: ee67 7a27 vmul.f32 s15, s14, s15 8011c0e: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 if(F_Load <= WP_Gym.F_idle) F_Load = WP_Gym.F_idle; 8011c12: 4b60 ldr r3, [pc, #384] @ (8011d94 ) 8011c14: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8011c18: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8011c1c: eeb4 7ae7 vcmpe.f32 s14, s15 8011c20: eef1 fa10 vmrs APSR_nzcv, fpscr 8011c24: d803 bhi.n 8011c2e 8011c26: 4b5b ldr r3, [pc, #364] @ (8011d94 ) 8011c28: 6e9b ldr r3, [r3, #104] @ 0x68 8011c2a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 if(H_LoSoft*10 <= Pos && Pos < RangeHi*10){ 8011c2e: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 8011c32: 4613 mov r3, r2 8011c34: 009b lsls r3, r3, #2 8011c36: 4413 add r3, r2 8011c38: 005b lsls r3, r3, #1 8011c3a: 461a mov r2, r3 8011c3c: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8011c40: 429a cmp r2, r3 8011c42: f300 80ad bgt.w 8011da0 8011c46: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 8011c4a: f9b7 207a ldrsh.w r2, [r7, #122] @ 0x7a 8011c4e: 4613 mov r3, r2 8011c50: 009b lsls r3, r3, #2 8011c52: 4413 add r3, r2 8011c54: 005b lsls r3, r3, #1 8011c56: 4299 cmp r1, r3 8011c58: f280 80a2 bge.w 8011da0 Iq_Temp = (WP_Gym.F_idle + (F_Load - WP_Gym.F_idle) * (Pos - H_LoSoft*10) / (RangeHi*10 - H_LoSoft*10)) * WP_Machine.Scale_Weight2Current; 8011c5c: 4b4d ldr r3, [pc, #308] @ (8011d94 ) 8011c5e: ed93 7a1a vldr s14, [r3, #104] @ 0x68 8011c62: 4b4c ldr r3, [pc, #304] @ (8011d94 ) 8011c64: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8011c68: edd7 6a2d vldr s13, [r7, #180] @ 0xb4 8011c6c: ee76 6ae7 vsub.f32 s13, s13, s15 8011c70: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011c74: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011c78: f06f 0109 mvn.w r1, #9 8011c7c: fb01 f303 mul.w r3, r1, r3 8011c80: 4413 add r3, r2 8011c82: ee07 3a90 vmov s15, r3 8011c86: eef8 7ae7 vcvt.f32.s32 s15, s15 8011c8a: ee26 6aa7 vmul.f32 s12, s13, s15 8011c8e: f9b7 207a ldrsh.w r2, [r7, #122] @ 0x7a 8011c92: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011c96: 1ad2 subs r2, r2, r3 8011c98: 4613 mov r3, r2 8011c9a: 009b lsls r3, r3, #2 8011c9c: 4413 add r3, r2 8011c9e: 005b lsls r3, r3, #1 8011ca0: ee07 3a90 vmov s15, r3 8011ca4: eef8 6ae7 vcvt.f32.s32 s13, s15 8011ca8: eec6 7a26 vdiv.f32 s15, s12, s13 8011cac: ee37 7a27 vadd.f32 s14, s14, s15 8011cb0: 4b37 ldr r3, [pc, #220] @ (8011d90 ) 8011cb2: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8011cb6: ee67 7a27 vmul.f32 s15, s14, s15 8011cba: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 WP_LEDCtrl.R = 10 + 240 * (Pos - H_LoSoft*10) / (RangeHi*10 - H_LoSoft*10); 8011cbe: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011cc2: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011cc6: f06f 0109 mvn.w r1, #9 8011cca: fb01 f303 mul.w r3, r1, r3 8011cce: 441a add r2, r3 8011cd0: 4613 mov r3, r2 8011cd2: 011b lsls r3, r3, #4 8011cd4: 1a9b subs r3, r3, r2 8011cd6: 011b lsls r3, r3, #4 8011cd8: 4619 mov r1, r3 8011cda: f9b7 207a ldrsh.w r2, [r7, #122] @ 0x7a 8011cde: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011ce2: 1ad2 subs r2, r2, r3 8011ce4: 4613 mov r3, r2 8011ce6: 009b lsls r3, r3, #2 8011ce8: 4413 add r3, r2 8011cea: 005b lsls r3, r3, #1 8011cec: fb91 f3f3 sdiv r3, r1, r3 8011cf0: b2db uxtb r3, r3 8011cf2: 330a adds r3, #10 8011cf4: b2da uxtb r2, r3 8011cf6: 4b29 ldr r3, [pc, #164] @ (8011d9c ) 8011cf8: 701a strb r2, [r3, #0] if(WP_LEDCtrl.R >= 255) WP_LEDCtrl.R = 255; 8011cfa: 4b28 ldr r3, [pc, #160] @ (8011d9c ) 8011cfc: 781b ldrb r3, [r3, #0] 8011cfe: 2bff cmp r3, #255 @ 0xff 8011d00: d102 bne.n 8011d08 8011d02: 4b26 ldr r3, [pc, #152] @ (8011d9c ) 8011d04: 22ff movs r2, #255 @ 0xff 8011d06: 701a strb r2, [r3, #0] // if (Pos >= 600) { // LED_Weight_G = 120 - 120 * (Pos - H_LoSoft - 600) / (RangeHi - H_LoSoft - 600); // } WP_LEDCtrl.G = 40 - 35 * (Pos - H_LoSoft*10) / (RangeHi*10 - H_LoSoft*10); 8011d08: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011d0c: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011d10: f06f 0109 mvn.w r1, #9 8011d14: fb01 f303 mul.w r3, r1, r3 8011d18: 441a add r2, r3 8011d1a: 4613 mov r3, r2 8011d1c: 009b lsls r3, r3, #2 8011d1e: 4413 add r3, r2 8011d20: 00da lsls r2, r3, #3 8011d22: 1ad1 subs r1, r2, r3 8011d24: f9b7 207a ldrsh.w r2, [r7, #122] @ 0x7a 8011d28: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011d2c: 1ad2 subs r2, r2, r3 8011d2e: 4613 mov r3, r2 8011d30: 009b lsls r3, r3, #2 8011d32: 4413 add r3, r2 8011d34: 005b lsls r3, r3, #1 8011d36: fb91 f3f3 sdiv r3, r1, r3 8011d3a: b2db uxtb r3, r3 8011d3c: f1c3 0328 rsb r3, r3, #40 @ 0x28 8011d40: b2da uxtb r2, r3 8011d42: 4b16 ldr r3, [pc, #88] @ (8011d9c ) 8011d44: 705a strb r2, [r3, #1] // if(LED_Weight_G <= 10) LED_Weight_G = 10; WP_LEDCtrl.B = 40 - 40 * (Pos - H_LoSoft*10) / (RangeHi*10 - H_LoSoft*10); 8011d46: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8011d4a: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011d4e: f06f 0109 mvn.w r1, #9 8011d52: fb01 f303 mul.w r3, r1, r3 8011d56: 441a add r2, r3 8011d58: 4613 mov r3, r2 8011d5a: 009b lsls r3, r3, #2 8011d5c: 4413 add r3, r2 8011d5e: 00db lsls r3, r3, #3 8011d60: 4619 mov r1, r3 8011d62: f9b7 207a ldrsh.w r2, [r7, #122] @ 0x7a 8011d66: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8011d6a: 1ad2 subs r2, r2, r3 8011d6c: 4613 mov r3, r2 8011d6e: 009b lsls r3, r3, #2 8011d70: 4413 add r3, r2 8011d72: 005b lsls r3, r3, #1 8011d74: fb91 f3f3 sdiv r3, r1, r3 8011d78: b2db uxtb r3, r3 8011d7a: f1c3 0328 rsb r3, r3, #40 @ 0x28 8011d7e: b2da uxtb r2, r3 8011d80: 4b06 ldr r3, [pc, #24] @ (8011d9c ) 8011d82: 709a strb r2, [r3, #2] // if(LED_Weight_B <= 10) LED_Weight_B = 10; Region = RoM; // 밴드모드는 3이 따로 없고 4로 통합임 8011d84: 2304 movs r3, #4 8011d86: f887 30ab strb.w r3, [r7, #171] @ 0xab } else if(RangeHi*10 <= Pos && Pos < 32767){ Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; Region = Over; } break; 8011d8a: f000 bd70 b.w 801286e 8011d8e: bf00 nop 8011d90: 20000110 .word 0x20000110 8011d94: 20000148 .word 0x20000148 8011d98: 200001d8 .word 0x200001d8 8011d9c: 20000328 .word 0x20000328 } else if(RangeHi*10 <= Pos && Pos < 32767){ 8011da0: f9b7 207a ldrsh.w r2, [r7, #122] @ 0x7a 8011da4: 4613 mov r3, r2 8011da6: 009b lsls r3, r3, #2 8011da8: 4413 add r3, r2 8011daa: 005b lsls r3, r3, #1 8011dac: 461a mov r2, r3 8011dae: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8011db2: 429a cmp r2, r3 8011db4: f300 855b bgt.w 801286e 8011db8: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8011dbc: f647 72ff movw r2, #32767 @ 0x7fff 8011dc0: 4293 cmp r3, r2 8011dc2: f000 8554 beq.w 801286e Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; 8011dc6: 4bc2 ldr r3, [pc, #776] @ (80120d0 ) 8011dc8: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8011dcc: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8011dd0: ee67 7a27 vmul.f32 s15, s14, s15 8011dd4: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = Over; 8011dd8: 2306 movs r3, #6 8011dda: f887 30ab strb.w r3, [r7, #171] @ 0xab break; 8011dde: f000 bd46 b.w 801286e case 3: // 모드 3: 등속성 모드 (Isokinetic) — PI 피드백 제어 // P항: 속도 오차에 즉각 반응 (빠른 응답) // I항: 잔여 오차 누적 제거 (정밀 유지) FeccTemp = 0; 8011de2: f04f 0300 mov.w r3, #0 8011de6: f8c7 30ac str.w r3, [r7, #172] @ 0xac { float v_target = WP_Weight.Iso.Vtarget; 8011dea: 4bba ldr r3, [pc, #744] @ (80120d4 ) 8011dec: 6f9b ldr r3, [r3, #120] @ 0x78 8011dee: 643b str r3, [r7, #64] @ 0x40 float kp = WP_Weight.Iso.Kp; 8011df0: 4bb8 ldr r3, [pc, #736] @ (80120d4 ) 8011df2: 6fdb ldr r3, [r3, #124] @ 0x7c 8011df4: 63fb str r3, [r7, #60] @ 0x3c float ki = WP_Weight.Iso.Ki; 8011df6: 4bb7 ldr r3, [pc, #732] @ (80120d4 ) 8011df8: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80 8011dfc: 63bb str r3, [r7, #56] @ 0x38 float dt = 0.0001f; // ISR 10kHz = 0.1ms 8011dfe: 4bb6 ldr r3, [pc, #728] @ (80120d8 ) 8011e00: 637b str r3, [r7, #52] @ 0x34 float deadband = 35.0f; // mm/s — 방향 전환 구간 데드밴드 8011e02: 4bb6 ldr r3, [pc, #728] @ (80120dc ) 8011e04: 633b str r3, [r7, #48] @ 0x30 float fmin = WP_Weight.Iso.Fmin > WP_Gym.F_idle ? WP_Weight.Iso.Fmin : WP_Gym.F_idle; 8011e06: 4bb3 ldr r3, [pc, #716] @ (80120d4 ) 8011e08: ed93 7a22 vldr s14, [r3, #136] @ 0x88 8011e0c: 4bb4 ldr r3, [pc, #720] @ (80120e0 ) 8011e0e: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8011e12: eeb4 7ae7 vcmpe.f32 s14, s15 8011e16: eef1 fa10 vmrs APSR_nzcv, fpscr 8011e1a: dd03 ble.n 8011e24 8011e1c: 4bad ldr r3, [pc, #692] @ (80120d4 ) 8011e1e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8011e22: e001 b.n 8011e28 8011e24: 4bae ldr r3, [pc, #696] @ (80120e0 ) 8011e26: 6e9b ldr r3, [r3, #104] @ 0x68 8011e28: 62fb str r3, [r7, #44] @ 0x2c float neutral = fmin; // 최소 텐션 (Fmin or F_idle 중 큰 쪽) 8011e2a: 6afb ldr r3, [r7, #44] @ 0x2c 8011e2c: 62bb str r3, [r7, #40] @ 0x28 if (Spd > deadband) { 8011e2e: ed97 7a20 vldr s14, [r7, #128] @ 0x80 8011e32: edd7 7a0c vldr s15, [r7, #48] @ 0x30 8011e36: eeb4 7ae7 vcmpe.f32 s14, s15 8011e3a: eef1 fa10 vmrs APSR_nzcv, fpscr 8011e3e: f340 80be ble.w 8011fbe // ── 상승: PI 제어 활성 ── float error = Spd - v_target; // +: 빠름, -: 느림 8011e42: ed97 7a20 vldr s14, [r7, #128] @ 0x80 8011e46: edd7 7a10 vldr s15, [r7, #64] @ 0x40 8011e4a: ee77 7a67 vsub.f32 s15, s14, s15 8011e4e: edc7 7a07 vstr s15, [r7, #28] float vtol = v_target * 0.05f; 8011e52: edd7 7a10 vldr s15, [r7, #64] @ 0x40 8011e56: ed9f 7aa3 vldr s14, [pc, #652] @ 80120e4 8011e5a: ee67 7a87 vmul.f32 s15, s15, s14 8011e5e: edc7 7a06 vstr s15, [r7, #24] if (error > vtol || error < -vtol) { 8011e62: ed97 7a07 vldr s14, [r7, #28] 8011e66: edd7 7a06 vldr s15, [r7, #24] 8011e6a: eeb4 7ae7 vcmpe.f32 s14, s15 8011e6e: eef1 fa10 vmrs APSR_nzcv, fpscr 8011e72: dc0a bgt.n 8011e8a 8011e74: edd7 7a06 vldr s15, [r7, #24] 8011e78: eef1 7a67 vneg.f32 s15, s15 8011e7c: ed97 7a07 vldr s14, [r7, #28] 8011e80: eeb4 7ae7 vcmpe.f32 s14, s15 8011e84: eef1 fa10 vmrs APSR_nzcv, fpscr 8011e88: d53b bpl.n 8011f02 if (error > 0) { 8011e8a: edd7 7a07 vldr s15, [r7, #28] 8011e8e: eef5 7ac0 vcmpe.f32 s15, #0.0 8011e92: eef1 fa10 vmrs APSR_nzcv, fpscr 8011e96: dd1c ble.n 8011ed2 F_Load_iso[side] += ki * 3.0f * error * dt; // 브레이킹 3배 8011e98: 4a93 ldr r2, [pc, #588] @ (80120e8 ) 8011e9a: 687b ldr r3, [r7, #4] 8011e9c: 009b lsls r3, r3, #2 8011e9e: 4413 add r3, r2 8011ea0: ed93 7a00 vldr s14, [r3] 8011ea4: edd7 7a0e vldr s15, [r7, #56] @ 0x38 8011ea8: eef0 6a08 vmov.f32 s13, #8 @ 0x40400000 3.0 8011eac: ee67 6aa6 vmul.f32 s13, s15, s13 8011eb0: edd7 7a07 vldr s15, [r7, #28] 8011eb4: ee66 6aa7 vmul.f32 s13, s13, s15 8011eb8: edd7 7a0d vldr s15, [r7, #52] @ 0x34 8011ebc: ee66 7aa7 vmul.f32 s15, s13, s15 8011ec0: ee77 7a27 vadd.f32 s15, s14, s15 8011ec4: 4a88 ldr r2, [pc, #544] @ (80120e8 ) 8011ec6: 687b ldr r3, [r7, #4] 8011ec8: 009b lsls r3, r3, #2 8011eca: 4413 add r3, r2 8011ecc: edc3 7a00 vstr s15, [r3] 8011ed0: e017 b.n 8011f02 } else { F_Load_iso[side] += ki * error * dt; // 풀기 1배 8011ed2: 4a85 ldr r2, [pc, #532] @ (80120e8 ) 8011ed4: 687b ldr r3, [r7, #4] 8011ed6: 009b lsls r3, r3, #2 8011ed8: 4413 add r3, r2 8011eda: ed93 7a00 vldr s14, [r3] 8011ede: edd7 6a0e vldr s13, [r7, #56] @ 0x38 8011ee2: edd7 7a07 vldr s15, [r7, #28] 8011ee6: ee66 6aa7 vmul.f32 s13, s13, s15 8011eea: edd7 7a0d vldr s15, [r7, #52] @ 0x34 8011eee: ee66 7aa7 vmul.f32 s15, s13, s15 8011ef2: ee77 7a27 vadd.f32 s15, s14, s15 8011ef6: 4a7c ldr r2, [pc, #496] @ (80120e8 ) 8011ef8: 687b ldr r3, [r7, #4] 8011efa: 009b lsls r3, r3, #2 8011efc: 4413 add r3, r2 8011efe: edc3 7a00 vstr s15, [r3] } } // P항 float F_p; if (error > 0) { 8011f02: edd7 7a07 vldr s15, [r7, #28] 8011f06: eef5 7ac0 vcmpe.f32 s15, #0.0 8011f0a: eef1 fa10 vmrs APSR_nzcv, fpscr 8011f0e: dd0c ble.n 8011f2a F_p = kp * 3.0f * error; 8011f10: edd7 7a0f vldr s15, [r7, #60] @ 0x3c 8011f14: eeb0 7a08 vmov.f32 s14, #8 @ 0x40400000 3.0 8011f18: ee67 7a87 vmul.f32 s15, s15, s14 8011f1c: ed97 7a07 vldr s14, [r7, #28] 8011f20: ee67 7a27 vmul.f32 s15, s14, s15 8011f24: edc7 7a29 vstr s15, [r7, #164] @ 0xa4 8011f28: e007 b.n 8011f3a } else { F_p = kp * error; 8011f2a: ed97 7a0f vldr s14, [r7, #60] @ 0x3c 8011f2e: edd7 7a07 vldr s15, [r7, #28] 8011f32: ee67 7a27 vmul.f32 s15, s14, s15 8011f36: edc7 7a29 vstr s15, [r7, #164] @ 0xa4 } float fmax = (WP_Weight.Iso.Fmax > 0) ? WP_Weight.Iso.Fmax : TargetWeight; 8011f3a: 4b66 ldr r3, [pc, #408] @ (80120d4 ) 8011f3c: edd3 7a23 vldr s15, [r3, #140] @ 0x8c 8011f40: eef5 7ac0 vcmpe.f32 s15, #0.0 8011f44: eef1 fa10 vmrs APSR_nzcv, fpscr 8011f48: dd03 ble.n 8011f52 8011f4a: 4b62 ldr r3, [pc, #392] @ (80120d4 ) 8011f4c: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8011f50: e001 b.n 8011f56 8011f52: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 8011f56: 617b str r3, [r7, #20] float F_pi = F_Load_iso[side] + F_p; 8011f58: 4a63 ldr r2, [pc, #396] @ (80120e8 ) 8011f5a: 687b ldr r3, [r7, #4] 8011f5c: 009b lsls r3, r3, #2 8011f5e: 4413 add r3, r2 8011f60: edd3 7a00 vldr s15, [r3] 8011f64: ed97 7a29 vldr s14, [r7, #164] @ 0xa4 8011f68: ee77 7a27 vadd.f32 s15, s14, s15 8011f6c: edc7 7a28 vstr s15, [r7, #160] @ 0xa0 if (F_pi > fmax) F_pi = fmax; 8011f70: ed97 7a28 vldr s14, [r7, #160] @ 0xa0 8011f74: edd7 7a05 vldr s15, [r7, #20] 8011f78: eeb4 7ae7 vcmpe.f32 s14, s15 8011f7c: eef1 fa10 vmrs APSR_nzcv, fpscr 8011f80: dd02 ble.n 8011f88 8011f82: 697b ldr r3, [r7, #20] 8011f84: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 if (F_pi < fmin) F_pi = fmin; 8011f88: ed97 7a28 vldr s14, [r7, #160] @ 0xa0 8011f8c: edd7 7a0b vldr s15, [r7, #44] @ 0x2c 8011f90: eeb4 7ae7 vcmpe.f32 s14, s15 8011f94: eef1 fa10 vmrs APSR_nzcv, fpscr 8011f98: d502 bpl.n 8011fa0 8011f9a: 6afb ldr r3, [r7, #44] @ 0x2c 8011f9c: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 F_Load = F_pi * WP_Weight.Ctrl.OnOffScale[side]; 8011fa0: 4a4c ldr r2, [pc, #304] @ (80120d4 ) 8011fa2: 687b ldr r3, [r7, #4] 8011fa4: 330a adds r3, #10 8011fa6: 009b lsls r3, r3, #2 8011fa8: 4413 add r3, r2 8011faa: 3304 adds r3, #4 8011fac: edd3 7a00 vldr s15, [r3] 8011fb0: ed97 7a28 vldr s14, [r7, #160] @ 0xa0 8011fb4: ee67 7a27 vmul.f32 s15, s14, s15 8011fb8: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 8011fbc: e116 b.n 80121ec } else if (Spd < -deadband) { 8011fbe: edd7 7a0c vldr s15, [r7, #48] @ 0x30 8011fc2: eef1 7a67 vneg.f32 s15, s15 8011fc6: ed97 7a20 vldr s14, [r7, #128] @ 0x80 8011fca: eeb4 7ae7 vcmpe.f32 s14, s15 8011fce: eef1 fa10 vmrs APSR_nzcv, fpscr 8011fd2: f140 808b bpl.w 80120ec // ── 하강: 제어 없음, I항 중립으로 빠르게 감쇠 ── float decayRate = WP_Weight.Iso.DecayRate * dt; 8011fd6: 4b3f ldr r3, [pc, #252] @ (80120d4 ) 8011fd8: edd3 7a21 vldr s15, [r3, #132] @ 0x84 8011fdc: ed97 7a0d vldr s14, [r7, #52] @ 0x34 8011fe0: ee67 7a27 vmul.f32 s15, s14, s15 8011fe4: edc7 7a08 vstr s15, [r7, #32] if (F_Load_iso[side] > neutral) { 8011fe8: 4a3f ldr r2, [pc, #252] @ (80120e8 ) 8011fea: 687b ldr r3, [r7, #4] 8011fec: 009b lsls r3, r3, #2 8011fee: 4413 add r3, r2 8011ff0: edd3 7a00 vldr s15, [r3] 8011ff4: ed97 7a0a vldr s14, [r7, #40] @ 0x28 8011ff8: eeb4 7ae7 vcmpe.f32 s14, s15 8011ffc: eef1 fa10 vmrs APSR_nzcv, fpscr 8012000: d523 bpl.n 801204a F_Load_iso[side] -= decayRate; 8012002: 4a39 ldr r2, [pc, #228] @ (80120e8 ) 8012004: 687b ldr r3, [r7, #4] 8012006: 009b lsls r3, r3, #2 8012008: 4413 add r3, r2 801200a: ed93 7a00 vldr s14, [r3] 801200e: edd7 7a08 vldr s15, [r7, #32] 8012012: ee77 7a67 vsub.f32 s15, s14, s15 8012016: 4a34 ldr r2, [pc, #208] @ (80120e8 ) 8012018: 687b ldr r3, [r7, #4] 801201a: 009b lsls r3, r3, #2 801201c: 4413 add r3, r2 801201e: edc3 7a00 vstr s15, [r3] if (F_Load_iso[side] < neutral) F_Load_iso[side] = neutral; 8012022: 4a31 ldr r2, [pc, #196] @ (80120e8 ) 8012024: 687b ldr r3, [r7, #4] 8012026: 009b lsls r3, r3, #2 8012028: 4413 add r3, r2 801202a: edd3 7a00 vldr s15, [r3] 801202e: ed97 7a0a vldr s14, [r7, #40] @ 0x28 8012032: eeb4 7ae7 vcmpe.f32 s14, s15 8012036: eef1 fa10 vmrs APSR_nzcv, fpscr 801203a: dd36 ble.n 80120aa 801203c: 4a2a ldr r2, [pc, #168] @ (80120e8 ) 801203e: 687b ldr r3, [r7, #4] 8012040: 009b lsls r3, r3, #2 8012042: 4413 add r3, r2 8012044: 6aba ldr r2, [r7, #40] @ 0x28 8012046: 601a str r2, [r3, #0] 8012048: e02f b.n 80120aa } else if (F_Load_iso[side] < neutral) { 801204a: 4a27 ldr r2, [pc, #156] @ (80120e8 ) 801204c: 687b ldr r3, [r7, #4] 801204e: 009b lsls r3, r3, #2 8012050: 4413 add r3, r2 8012052: edd3 7a00 vldr s15, [r3] 8012056: ed97 7a0a vldr s14, [r7, #40] @ 0x28 801205a: eeb4 7ae7 vcmpe.f32 s14, s15 801205e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012062: dd22 ble.n 80120aa F_Load_iso[side] += decayRate; 8012064: 4a20 ldr r2, [pc, #128] @ (80120e8 ) 8012066: 687b ldr r3, [r7, #4] 8012068: 009b lsls r3, r3, #2 801206a: 4413 add r3, r2 801206c: ed93 7a00 vldr s14, [r3] 8012070: edd7 7a08 vldr s15, [r7, #32] 8012074: ee77 7a27 vadd.f32 s15, s14, s15 8012078: 4a1b ldr r2, [pc, #108] @ (80120e8 ) 801207a: 687b ldr r3, [r7, #4] 801207c: 009b lsls r3, r3, #2 801207e: 4413 add r3, r2 8012080: edc3 7a00 vstr s15, [r3] if (F_Load_iso[side] > neutral) F_Load_iso[side] = neutral; 8012084: 4a18 ldr r2, [pc, #96] @ (80120e8 ) 8012086: 687b ldr r3, [r7, #4] 8012088: 009b lsls r3, r3, #2 801208a: 4413 add r3, r2 801208c: edd3 7a00 vldr s15, [r3] 8012090: ed97 7a0a vldr s14, [r7, #40] @ 0x28 8012094: eeb4 7ae7 vcmpe.f32 s14, s15 8012098: eef1 fa10 vmrs APSR_nzcv, fpscr 801209c: d505 bpl.n 80120aa 801209e: 4a12 ldr r2, [pc, #72] @ (80120e8 ) 80120a0: 687b ldr r3, [r7, #4] 80120a2: 009b lsls r3, r3, #2 80120a4: 4413 add r3, r2 80120a6: 6aba ldr r2, [r7, #40] @ 0x28 80120a8: 601a str r2, [r3, #0] } F_Load = F_Load_iso[side] * WP_Weight.Ctrl.OnOffScale[side]; 80120aa: 4a0f ldr r2, [pc, #60] @ (80120e8 ) 80120ac: 687b ldr r3, [r7, #4] 80120ae: 009b lsls r3, r3, #2 80120b0: 4413 add r3, r2 80120b2: ed93 7a00 vldr s14, [r3] 80120b6: 4a07 ldr r2, [pc, #28] @ (80120d4 ) 80120b8: 687b ldr r3, [r7, #4] 80120ba: 330a adds r3, #10 80120bc: 009b lsls r3, r3, #2 80120be: 4413 add r3, r2 80120c0: 3304 adds r3, #4 80120c2: edd3 7a00 vldr s15, [r3] 80120c6: ee67 7a27 vmul.f32 s15, s14, s15 80120ca: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 80120ce: e08d b.n 80121ec 80120d0: 20000110 .word 0x20000110 80120d4: 200001d8 .word 0x200001d8 80120d8: 38d1b717 .word 0x38d1b717 80120dc: 420c0000 .word 0x420c0000 80120e0: 20000148 .word 0x20000148 80120e4: 3d4ccccd .word 0x3d4ccccd 80120e8: 2000039c .word 0x2000039c } else { // ── 정지: I항 중립으로 감쇠 ── float decayRate = (WP_Weight.Iso.DecayRate * 0.5f) * dt; // 하강의 절반 속도 80120ec: 4bbd ldr r3, [pc, #756] @ (80123e4 ) 80120ee: edd3 7a21 vldr s15, [r3, #132] @ 0x84 80120f2: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 80120f6: ee67 7a87 vmul.f32 s15, s15, s14 80120fa: ed97 7a0d vldr s14, [r7, #52] @ 0x34 80120fe: ee67 7a27 vmul.f32 s15, s14, s15 8012102: edc7 7a09 vstr s15, [r7, #36] @ 0x24 if (F_Load_iso[side] > neutral) { 8012106: 4ab8 ldr r2, [pc, #736] @ (80123e8 ) 8012108: 687b ldr r3, [r7, #4] 801210a: 009b lsls r3, r3, #2 801210c: 4413 add r3, r2 801210e: edd3 7a00 vldr s15, [r3] 8012112: ed97 7a0a vldr s14, [r7, #40] @ 0x28 8012116: eeb4 7ae7 vcmpe.f32 s14, s15 801211a: eef1 fa10 vmrs APSR_nzcv, fpscr 801211e: d523 bpl.n 8012168 F_Load_iso[side] -= decayRate; 8012120: 4ab1 ldr r2, [pc, #708] @ (80123e8 ) 8012122: 687b ldr r3, [r7, #4] 8012124: 009b lsls r3, r3, #2 8012126: 4413 add r3, r2 8012128: ed93 7a00 vldr s14, [r3] 801212c: edd7 7a09 vldr s15, [r7, #36] @ 0x24 8012130: ee77 7a67 vsub.f32 s15, s14, s15 8012134: 4aac ldr r2, [pc, #688] @ (80123e8 ) 8012136: 687b ldr r3, [r7, #4] 8012138: 009b lsls r3, r3, #2 801213a: 4413 add r3, r2 801213c: edc3 7a00 vstr s15, [r3] if (F_Load_iso[side] < neutral) F_Load_iso[side] = neutral; 8012140: 4aa9 ldr r2, [pc, #676] @ (80123e8 ) 8012142: 687b ldr r3, [r7, #4] 8012144: 009b lsls r3, r3, #2 8012146: 4413 add r3, r2 8012148: edd3 7a00 vldr s15, [r3] 801214c: ed97 7a0a vldr s14, [r7, #40] @ 0x28 8012150: eeb4 7ae7 vcmpe.f32 s14, s15 8012154: eef1 fa10 vmrs APSR_nzcv, fpscr 8012158: dd36 ble.n 80121c8 801215a: 4aa3 ldr r2, [pc, #652] @ (80123e8 ) 801215c: 687b ldr r3, [r7, #4] 801215e: 009b lsls r3, r3, #2 8012160: 4413 add r3, r2 8012162: 6aba ldr r2, [r7, #40] @ 0x28 8012164: 601a str r2, [r3, #0] 8012166: e02f b.n 80121c8 } else if (F_Load_iso[side] < neutral) { 8012168: 4a9f ldr r2, [pc, #636] @ (80123e8 ) 801216a: 687b ldr r3, [r7, #4] 801216c: 009b lsls r3, r3, #2 801216e: 4413 add r3, r2 8012170: edd3 7a00 vldr s15, [r3] 8012174: ed97 7a0a vldr s14, [r7, #40] @ 0x28 8012178: eeb4 7ae7 vcmpe.f32 s14, s15 801217c: eef1 fa10 vmrs APSR_nzcv, fpscr 8012180: dd22 ble.n 80121c8 F_Load_iso[side] += decayRate; 8012182: 4a99 ldr r2, [pc, #612] @ (80123e8 ) 8012184: 687b ldr r3, [r7, #4] 8012186: 009b lsls r3, r3, #2 8012188: 4413 add r3, r2 801218a: ed93 7a00 vldr s14, [r3] 801218e: edd7 7a09 vldr s15, [r7, #36] @ 0x24 8012192: ee77 7a27 vadd.f32 s15, s14, s15 8012196: 4a94 ldr r2, [pc, #592] @ (80123e8 ) 8012198: 687b ldr r3, [r7, #4] 801219a: 009b lsls r3, r3, #2 801219c: 4413 add r3, r2 801219e: edc3 7a00 vstr s15, [r3] if (F_Load_iso[side] > neutral) F_Load_iso[side] = neutral; 80121a2: 4a91 ldr r2, [pc, #580] @ (80123e8 ) 80121a4: 687b ldr r3, [r7, #4] 80121a6: 009b lsls r3, r3, #2 80121a8: 4413 add r3, r2 80121aa: edd3 7a00 vldr s15, [r3] 80121ae: ed97 7a0a vldr s14, [r7, #40] @ 0x28 80121b2: eeb4 7ae7 vcmpe.f32 s14, s15 80121b6: eef1 fa10 vmrs APSR_nzcv, fpscr 80121ba: d505 bpl.n 80121c8 80121bc: 4a8a ldr r2, [pc, #552] @ (80123e8 ) 80121be: 687b ldr r3, [r7, #4] 80121c0: 009b lsls r3, r3, #2 80121c2: 4413 add r3, r2 80121c4: 6aba ldr r2, [r7, #40] @ 0x28 80121c6: 601a str r2, [r3, #0] } F_Load = F_Load_iso[side] * WP_Weight.Ctrl.OnOffScale[side]; 80121c8: 4a87 ldr r2, [pc, #540] @ (80123e8 ) 80121ca: 687b ldr r3, [r7, #4] 80121cc: 009b lsls r3, r3, #2 80121ce: 4413 add r3, r2 80121d0: ed93 7a00 vldr s14, [r3] 80121d4: 4a83 ldr r2, [pc, #524] @ (80123e4 ) 80121d6: 687b ldr r3, [r7, #4] 80121d8: 330a adds r3, #10 80121da: 009b lsls r3, r3, #2 80121dc: 4413 add r3, r2 80121de: 3304 adds r3, #4 80121e0: edd3 7a00 vldr s15, [r3] 80121e4: ee67 7a27 vmul.f32 s15, s14, s15 80121e8: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 } // I항 자체도 클램프 (와인드업 방지) { float fmax_clamp = (WP_Weight.Iso.Fmax > 0) ? WP_Weight.Iso.Fmax : TargetWeight; 80121ec: 4b7d ldr r3, [pc, #500] @ (80123e4 ) 80121ee: edd3 7a23 vldr s15, [r3, #140] @ 0x8c 80121f2: eef5 7ac0 vcmpe.f32 s15, #0.0 80121f6: eef1 fa10 vmrs APSR_nzcv, fpscr 80121fa: dd03 ble.n 8012204 80121fc: 4b79 ldr r3, [pc, #484] @ (80123e4 ) 80121fe: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8012202: e001 b.n 8012208 8012204: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 8012208: 613b str r3, [r7, #16] if (F_Load_iso[side] > fmax_clamp) F_Load_iso[side] = fmax_clamp; 801220a: 4a77 ldr r2, [pc, #476] @ (80123e8 ) 801220c: 687b ldr r3, [r7, #4] 801220e: 009b lsls r3, r3, #2 8012210: 4413 add r3, r2 8012212: edd3 7a00 vldr s15, [r3] 8012216: ed97 7a04 vldr s14, [r7, #16] 801221a: eeb4 7ae7 vcmpe.f32 s14, s15 801221e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012222: d505 bpl.n 8012230 8012224: 4a70 ldr r2, [pc, #448] @ (80123e8 ) 8012226: 687b ldr r3, [r7, #4] 8012228: 009b lsls r3, r3, #2 801222a: 4413 add r3, r2 801222c: 693a ldr r2, [r7, #16] 801222e: 601a str r2, [r3, #0] } if (F_Load_iso[side] < fmin) F_Load_iso[side] = fmin; 8012230: 4a6d ldr r2, [pc, #436] @ (80123e8 ) 8012232: 687b ldr r3, [r7, #4] 8012234: 009b lsls r3, r3, #2 8012236: 4413 add r3, r2 8012238: edd3 7a00 vldr s15, [r3] 801223c: ed97 7a0b vldr s14, [r7, #44] @ 0x2c 8012240: eeb4 7ae7 vcmpe.f32 s14, s15 8012244: eef1 fa10 vmrs APSR_nzcv, fpscr 8012248: dd05 ble.n 8012256 801224a: 4a67 ldr r2, [pc, #412] @ (80123e8 ) 801224c: 687b ldr r3, [r7, #4] 801224e: 009b lsls r3, r3, #2 8012250: 4413 add r3, r2 8012252: 6afa ldr r2, [r7, #44] @ 0x2c 8012254: 601a str r2, [r3, #0] if (F_Load < fmin) F_Load = fmin; 8012256: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 801225a: edd7 7a0b vldr s15, [r7, #44] @ 0x2c 801225e: eeb4 7ae7 vcmpe.f32 s14, s15 8012262: eef1 fa10 vmrs APSR_nzcv, fpscr 8012266: d502 bpl.n 801226e 8012268: 6afb ldr r3, [r7, #44] @ 0x2c 801226a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 // Slew Rate Limit float maxDelta = WP_Weight.Safety.SlewRate_kgPerSec * dt; 801226e: 4b5d ldr r3, [pc, #372] @ (80123e4 ) 8012270: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 8012274: ed97 7a0d vldr s14, [r7, #52] @ 0x34 8012278: ee67 7a27 vmul.f32 s15, s14, s15 801227c: edc7 7a03 vstr s15, [r7, #12] float delta = F_Load - F_Load_prev[side]; 8012280: 4a5a ldr r2, [pc, #360] @ (80123ec ) 8012282: 687b ldr r3, [r7, #4] 8012284: 009b lsls r3, r3, #2 8012286: 4413 add r3, r2 8012288: edd3 7a00 vldr s15, [r3] 801228c: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8012290: ee77 7a67 vsub.f32 s15, s14, s15 8012294: edc7 7a02 vstr s15, [r7, #8] if (delta > maxDelta) F_Load = F_Load_prev[side] + maxDelta; 8012298: ed97 7a02 vldr s14, [r7, #8] 801229c: edd7 7a03 vldr s15, [r7, #12] 80122a0: eeb4 7ae7 vcmpe.f32 s14, s15 80122a4: eef1 fa10 vmrs APSR_nzcv, fpscr 80122a8: dd0c ble.n 80122c4 80122aa: 4a50 ldr r2, [pc, #320] @ (80123ec ) 80122ac: 687b ldr r3, [r7, #4] 80122ae: 009b lsls r3, r3, #2 80122b0: 4413 add r3, r2 80122b2: edd3 7a00 vldr s15, [r3] 80122b6: ed97 7a03 vldr s14, [r7, #12] 80122ba: ee77 7a27 vadd.f32 s15, s14, s15 80122be: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 80122c2: e016 b.n 80122f2 else if (delta < -maxDelta) F_Load = F_Load_prev[side] - maxDelta; 80122c4: edd7 7a03 vldr s15, [r7, #12] 80122c8: eef1 7a67 vneg.f32 s15, s15 80122cc: ed97 7a02 vldr s14, [r7, #8] 80122d0: eeb4 7ae7 vcmpe.f32 s14, s15 80122d4: eef1 fa10 vmrs APSR_nzcv, fpscr 80122d8: d50b bpl.n 80122f2 80122da: 4a44 ldr r2, [pc, #272] @ (80123ec ) 80122dc: 687b ldr r3, [r7, #4] 80122de: 009b lsls r3, r3, #2 80122e0: 4413 add r3, r2 80122e2: ed93 7a00 vldr s14, [r3] 80122e6: edd7 7a03 vldr s15, [r7, #12] 80122ea: ee77 7a67 vsub.f32 s15, s14, s15 80122ee: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 F_Load_prev[side] = F_Load; 80122f2: 4a3e ldr r2, [pc, #248] @ (80123ec ) 80122f4: 687b ldr r3, [r7, #4] 80122f6: 009b lsls r3, r3, #2 80122f8: 4413 add r3, r2 80122fa: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 80122fe: 601a str r2, [r3, #0] } if (H_LoSoft*10 <= Pos && Pos < RangeLo*10) { 8012300: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 8012304: 4613 mov r3, r2 8012306: 009b lsls r3, r3, #2 8012308: 4413 add r3, r2 801230a: 005b lsls r3, r3, #1 801230c: 461a mov r2, r3 801230e: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8012312: 429a cmp r2, r3 8012314: dc3e bgt.n 8012394 8012316: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 801231a: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 801231e: 4613 mov r3, r2 8012320: 009b lsls r3, r3, #2 8012322: 4413 add r3, r2 8012324: 005b lsls r3, r3, #1 8012326: 4299 cmp r1, r3 8012328: da34 bge.n 8012394 Iq_Temp = (WP_Gym.F_idle + (F_Load - WP_Gym.F_idle) * (Pos - H_LoSoft*10) / (RangeLo*10 - H_LoSoft*10)) * WP_Machine.Scale_Weight2Current; 801232a: 4b31 ldr r3, [pc, #196] @ (80123f0 ) 801232c: ed93 7a1a vldr s14, [r3, #104] @ 0x68 8012330: 4b2f ldr r3, [pc, #188] @ (80123f0 ) 8012332: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8012336: edd7 6a2d vldr s13, [r7, #180] @ 0xb4 801233a: ee76 6ae7 vsub.f32 s13, s13, s15 801233e: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 8012342: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8012346: f06f 0109 mvn.w r1, #9 801234a: fb01 f303 mul.w r3, r1, r3 801234e: 4413 add r3, r2 8012350: ee07 3a90 vmov s15, r3 8012354: eef8 7ae7 vcvt.f32.s32 s15, s15 8012358: ee26 6aa7 vmul.f32 s12, s13, s15 801235c: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8012360: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 8012364: 1ad2 subs r2, r2, r3 8012366: 4613 mov r3, r2 8012368: 009b lsls r3, r3, #2 801236a: 4413 add r3, r2 801236c: 005b lsls r3, r3, #1 801236e: ee07 3a90 vmov s15, r3 8012372: eef8 6ae7 vcvt.f32.s32 s13, s15 8012376: eec6 7a26 vdiv.f32 s15, s12, s13 801237a: ee37 7a27 vadd.f32 s14, s14, s15 801237e: 4b1d ldr r3, [pc, #116] @ (80123f4 ) 8012380: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8012384: ee67 7a27 vmul.f32 s15, s14, s15 8012388: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = LoSoft; 801238c: 2303 movs r3, #3 801238e: f887 30ab strb.w r3, [r7, #171] @ 0xab } else if (RangeLo*10 <= Pos) { Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; Region = RoM; } break; 8012392: e26e b.n 8012872 } else if (RangeLo*10 <= Pos) { 8012394: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8012398: 4613 mov r3, r2 801239a: 009b lsls r3, r3, #2 801239c: 4413 add r3, r2 801239e: 005b lsls r3, r3, #1 80123a0: 461a mov r2, r3 80123a2: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80123a6: 429a cmp r2, r3 80123a8: f300 8263 bgt.w 8012872 Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; 80123ac: 4b11 ldr r3, [pc, #68] @ (80123f4 ) 80123ae: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80123b2: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 80123b6: ee67 7a27 vmul.f32 s15, s14, s15 80123ba: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = RoM; 80123be: 2304 movs r3, #4 80123c0: f887 30ab strb.w r3, [r7, #171] @ 0xab break; 80123c4: e255 b.n 8012872 case 4: // 모드 4: 유체저항 모드 (Hydraulic) // F = Fmin + (W - Fmin) × (v / Vmax)^n — Vmax에서 W 도달 FeccTemp = 0; 80123c6: f04f 0300 mov.w r3, #0 80123ca: f8c7 30ac str.w r3, [r7, #172] @ 0xac { // 하강(Spd < 0) 시 부하 감소: spdRatio=0 → minRatio만 적용 float upSpd = (Spd > 0) ? Spd : 0; 80123ce: edd7 7a20 vldr s15, [r7, #128] @ 0x80 80123d2: eef5 7ac0 vcmpe.f32 s15, #0.0 80123d6: eef1 fa10 vmrs APSR_nzcv, fpscr 80123da: dd0d ble.n 80123f8 80123dc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 80123e0: e00c b.n 80123fc 80123e2: bf00 nop 80123e4: 200001d8 .word 0x200001d8 80123e8: 2000039c .word 0x2000039c 80123ec: 200003a4 .word 0x200003a4 80123f0: 20000148 .word 0x20000148 80123f4: 20000110 .word 0x20000110 80123f8: f04f 0300 mov.w r3, #0 80123fc: 65fb str r3, [r7, #92] @ 0x5c float cappedSpd = upSpd; 80123fe: 6dfb ldr r3, [r7, #92] @ 0x5c 8012400: f8c7 309c str.w r3, [r7, #156] @ 0x9c if (cappedSpd > WP_Weight.Hydro.Vmax) cappedSpd = WP_Weight.Hydro.Vmax; 8012404: 4bce ldr r3, [pc, #824] @ (8012740 ) 8012406: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 801240a: ed97 7a27 vldr s14, [r7, #156] @ 0x9c 801240e: eeb4 7ae7 vcmpe.f32 s14, s15 8012412: eef1 fa10 vmrs APSR_nzcv, fpscr 8012416: dd03 ble.n 8012420 8012418: 4bc9 ldr r3, [pc, #804] @ (8012740 ) 801241a: 6edb ldr r3, [r3, #108] @ 0x6c 801241c: f8c7 309c str.w r3, [r7, #156] @ 0x9c float vmax = WP_Weight.Hydro.Vmax; 8012420: 4bc7 ldr r3, [pc, #796] @ (8012740 ) 8012422: 6edb ldr r3, [r3, #108] @ 0x6c 8012424: 65bb str r3, [r7, #88] @ 0x58 float n = WP_Weight.Hydro.n; 8012426: 4bc6 ldr r3, [pc, #792] @ (8012740 ) 8012428: 6f1b ldr r3, [r3, #112] @ 0x70 801242a: 657b str r3, [r7, #84] @ 0x54 float minR = WP_Weight.Hydro.minRatio; 801242c: 4bc4 ldr r3, [pc, #784] @ (8012740 ) 801242e: 6f5b ldr r3, [r3, #116] @ 0x74 8012430: 653b str r3, [r7, #80] @ 0x50 // powf 회피: n=1.0이면 선형, 아니면 powf float spdRatio; if (n == 1.0f) { 8012432: edd7 7a15 vldr s15, [r7, #84] @ 0x54 8012436: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 801243a: eef4 7a47 vcmp.f32 s15, s14 801243e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012442: d108 bne.n 8012456 spdRatio = cappedSpd / vmax; 8012444: edd7 6a27 vldr s13, [r7, #156] @ 0x9c 8012448: ed97 7a16 vldr s14, [r7, #88] @ 0x58 801244c: eec6 7a87 vdiv.f32 s15, s13, s14 8012450: edc7 7a26 vstr s15, [r7, #152] @ 0x98 8012454: e00d b.n 8012472 } else { spdRatio = powf(cappedSpd / vmax, n); 8012456: ed97 7a27 vldr s14, [r7, #156] @ 0x9c 801245a: edd7 7a16 vldr s15, [r7, #88] @ 0x58 801245e: eec7 6a27 vdiv.f32 s13, s14, s15 8012462: edd7 0a15 vldr s1, [r7, #84] @ 0x54 8012466: eeb0 0a66 vmov.f32 s0, s13 801246a: f016 fc63 bl 8028d34 801246e: ed87 0a26 vstr s0, [r7, #152] @ 0x98 } F_Load = TargetWeight * (minR + (1.0f - minR) * spdRatio) * WP_Weight.Ctrl.OnOffScale[side]; 8012472: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 8012476: edd7 7a14 vldr s15, [r7, #80] @ 0x50 801247a: ee37 7a67 vsub.f32 s14, s14, s15 801247e: edd7 7a26 vldr s15, [r7, #152] @ 0x98 8012482: ee27 7a27 vmul.f32 s14, s14, s15 8012486: edd7 7a14 vldr s15, [r7, #80] @ 0x50 801248a: ee37 7a27 vadd.f32 s14, s14, s15 801248e: edd7 7a22 vldr s15, [r7, #136] @ 0x88 8012492: ee27 7a27 vmul.f32 s14, s14, s15 8012496: 4aaa ldr r2, [pc, #680] @ (8012740 ) 8012498: 687b ldr r3, [r7, #4] 801249a: 330a adds r3, #10 801249c: 009b lsls r3, r3, #2 801249e: 4413 add r3, r2 80124a0: 3304 adds r3, #4 80124a2: edd3 7a00 vldr s15, [r3] 80124a6: ee67 7a27 vmul.f32 s15, s14, s15 80124aa: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 if (F_Load <= WP_Gym.F_idle) F_Load = WP_Gym.F_idle; 80124ae: 4ba5 ldr r3, [pc, #660] @ (8012744 ) 80124b0: edd3 7a1a vldr s15, [r3, #104] @ 0x68 80124b4: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 80124b8: eeb4 7ae7 vcmpe.f32 s14, s15 80124bc: eef1 fa10 vmrs APSR_nzcv, fpscr 80124c0: d803 bhi.n 80124ca 80124c2: 4ba0 ldr r3, [pc, #640] @ (8012744 ) 80124c4: 6e9b ldr r3, [r3, #104] @ 0x68 80124c6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 // Slew Rate Limit float dt = 0.0002f; 80124ca: 4b9f ldr r3, [pc, #636] @ (8012748 ) 80124cc: 64fb str r3, [r7, #76] @ 0x4c float maxDelta = WP_Weight.Safety.SlewRate_kgPerSec * dt; 80124ce: 4b9c ldr r3, [pc, #624] @ (8012740 ) 80124d0: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 80124d4: ed97 7a13 vldr s14, [r7, #76] @ 0x4c 80124d8: ee67 7a27 vmul.f32 s15, s14, s15 80124dc: edc7 7a12 vstr s15, [r7, #72] @ 0x48 float delta = F_Load - F_Load_prev[side]; 80124e0: 4a9a ldr r2, [pc, #616] @ (801274c ) 80124e2: 687b ldr r3, [r7, #4] 80124e4: 009b lsls r3, r3, #2 80124e6: 4413 add r3, r2 80124e8: edd3 7a00 vldr s15, [r3] 80124ec: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 80124f0: ee77 7a67 vsub.f32 s15, s14, s15 80124f4: edc7 7a11 vstr s15, [r7, #68] @ 0x44 if (delta > maxDelta) F_Load = F_Load_prev[side] + maxDelta; 80124f8: ed97 7a11 vldr s14, [r7, #68] @ 0x44 80124fc: edd7 7a12 vldr s15, [r7, #72] @ 0x48 8012500: eeb4 7ae7 vcmpe.f32 s14, s15 8012504: eef1 fa10 vmrs APSR_nzcv, fpscr 8012508: dd0c ble.n 8012524 801250a: 4a90 ldr r2, [pc, #576] @ (801274c ) 801250c: 687b ldr r3, [r7, #4] 801250e: 009b lsls r3, r3, #2 8012510: 4413 add r3, r2 8012512: edd3 7a00 vldr s15, [r3] 8012516: ed97 7a12 vldr s14, [r7, #72] @ 0x48 801251a: ee77 7a27 vadd.f32 s15, s14, s15 801251e: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 8012522: e016 b.n 8012552 else if (delta < -maxDelta) F_Load = F_Load_prev[side] - maxDelta; 8012524: edd7 7a12 vldr s15, [r7, #72] @ 0x48 8012528: eef1 7a67 vneg.f32 s15, s15 801252c: ed97 7a11 vldr s14, [r7, #68] @ 0x44 8012530: eeb4 7ae7 vcmpe.f32 s14, s15 8012534: eef1 fa10 vmrs APSR_nzcv, fpscr 8012538: d50b bpl.n 8012552 801253a: 4a84 ldr r2, [pc, #528] @ (801274c ) 801253c: 687b ldr r3, [r7, #4] 801253e: 009b lsls r3, r3, #2 8012540: 4413 add r3, r2 8012542: ed93 7a00 vldr s14, [r3] 8012546: edd7 7a12 vldr s15, [r7, #72] @ 0x48 801254a: ee77 7a67 vsub.f32 s15, s14, s15 801254e: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 F_Load_prev[side] = F_Load; 8012552: 4a7e ldr r2, [pc, #504] @ (801274c ) 8012554: 687b ldr r3, [r7, #4] 8012556: 009b lsls r3, r3, #2 8012558: 4413 add r3, r2 801255a: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 801255e: 601a str r2, [r3, #0] } if (H_LoSoft*10 <= Pos && Pos < RangeLo*10) { 8012560: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 8012564: 4613 mov r3, r2 8012566: 009b lsls r3, r3, #2 8012568: 4413 add r3, r2 801256a: 005b lsls r3, r3, #1 801256c: 461a mov r2, r3 801256e: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8012572: 429a cmp r2, r3 8012574: dc3e bgt.n 80125f4 8012576: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 801257a: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 801257e: 4613 mov r3, r2 8012580: 009b lsls r3, r3, #2 8012582: 4413 add r3, r2 8012584: 005b lsls r3, r3, #1 8012586: 4299 cmp r1, r3 8012588: da34 bge.n 80125f4 Iq_Temp = (WP_Gym.F_idle + (F_Load - WP_Gym.F_idle) * (Pos - H_LoSoft*10) / (RangeLo*10 - H_LoSoft*10)) * WP_Machine.Scale_Weight2Current; 801258a: 4b6e ldr r3, [pc, #440] @ (8012744 ) 801258c: ed93 7a1a vldr s14, [r3, #104] @ 0x68 8012590: 4b6c ldr r3, [pc, #432] @ (8012744 ) 8012592: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8012596: edd7 6a2d vldr s13, [r7, #180] @ 0xb4 801259a: ee76 6ae7 vsub.f32 s13, s13, s15 801259e: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 80125a2: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 80125a6: f06f 0109 mvn.w r1, #9 80125aa: fb01 f303 mul.w r3, r1, r3 80125ae: 4413 add r3, r2 80125b0: ee07 3a90 vmov s15, r3 80125b4: eef8 7ae7 vcvt.f32.s32 s15, s15 80125b8: ee26 6aa7 vmul.f32 s12, s13, s15 80125bc: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 80125c0: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 80125c4: 1ad2 subs r2, r2, r3 80125c6: 4613 mov r3, r2 80125c8: 009b lsls r3, r3, #2 80125ca: 4413 add r3, r2 80125cc: 005b lsls r3, r3, #1 80125ce: ee07 3a90 vmov s15, r3 80125d2: eef8 6ae7 vcvt.f32.s32 s13, s15 80125d6: eec6 7a26 vdiv.f32 s15, s12, s13 80125da: ee37 7a27 vadd.f32 s14, s14, s15 80125de: 4b5c ldr r3, [pc, #368] @ (8012750 ) 80125e0: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80125e4: ee67 7a27 vmul.f32 s15, s14, s15 80125e8: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = LoSoft; 80125ec: 2303 movs r3, #3 80125ee: f887 30ab strb.w r3, [r7, #171] @ 0xab } else if (RangeLo*10 <= Pos) { Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; Region = RoM; } break; 80125f2: e140 b.n 8012876 } else if (RangeLo*10 <= Pos) { 80125f4: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 80125f8: 4613 mov r3, r2 80125fa: 009b lsls r3, r3, #2 80125fc: 4413 add r3, r2 80125fe: 005b lsls r3, r3, #1 8012600: 461a mov r2, r3 8012602: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8012606: 429a cmp r2, r3 8012608: f300 8135 bgt.w 8012876 Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; 801260c: 4b50 ldr r3, [pc, #320] @ (8012750 ) 801260e: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8012612: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 8012616: ee67 7a27 vmul.f32 s15, s14, s15 801261a: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = RoM; 801261e: 2304 movs r3, #4 8012620: f887 30ab strb.w r3, [r7, #171] @ 0xab break; 8012624: e127 b.n 8012876 case 5: // 모드 5: 진동 모드 (Vibration) — 재활/근활성화 // F = TargetWeight + clamp(vibKg, absMax) × sin(2π × freq × t) FeccTemp = 0; 8012626: f04f 0300 mov.w r3, #0 801262a: f8c7 30ac str.w r3, [r7, #172] @ 0xac { float t_sec = (float)Get_Time() / 1000.0f; 801262e: f00d fdfb bl 8020228 8012632: ee07 0a90 vmov s15, r0 8012636: eeb8 7a67 vcvt.f32.u32 s14, s15 801263a: eddf 6a46 vldr s13, [pc, #280] @ 8012754 801263e: eec7 7a26 vdiv.f32 s15, s14, s13 8012642: edc7 7a1d vstr s15, [r7, #116] @ 0x74 float osc = sinf(2.0f * 3.14159265f * WP_Weight.Vib.Freq * t_sec); 8012646: 4b3e ldr r3, [pc, #248] @ (8012740 ) 8012648: edd3 7a24 vldr s15, [r3, #144] @ 0x90 801264c: ed9f 7a42 vldr s14, [pc, #264] @ 8012758 8012650: ee27 7a87 vmul.f32 s14, s15, s14 8012654: edd7 7a1d vldr s15, [r7, #116] @ 0x74 8012658: ee67 7a27 vmul.f32 s15, s14, s15 801265c: eeb0 0a67 vmov.f32 s0, s15 8012660: f016 fbde bl 8028e20 8012664: ed87 0a1c vstr s0, [r7, #112] @ 0x70 // 진폭 계산: kg 직접 + 비율 안전 클램프 float vibKg = WP_Weight.Vib.AmplitudeKg; 8012668: 4b35 ldr r3, [pc, #212] @ (8012740 ) 801266a: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 801266e: f8c7 3094 str.w r3, [r7, #148] @ 0x94 float maxByRatio = TargetWeight * WP_Weight.Vib.MaxRatio; 8012672: 4b33 ldr r3, [pc, #204] @ (8012740 ) 8012674: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8012678: ed97 7a22 vldr s14, [r7, #136] @ 0x88 801267c: ee67 7a27 vmul.f32 s15, s14, s15 8012680: edc7 7a1b vstr s15, [r7, #108] @ 0x6c if (vibKg > maxByRatio) vibKg = maxByRatio; 8012684: ed97 7a25 vldr s14, [r7, #148] @ 0x94 8012688: edd7 7a1b vldr s15, [r7, #108] @ 0x6c 801268c: eeb4 7ae7 vcmpe.f32 s14, s15 8012690: eef1 fa10 vmrs APSR_nzcv, fpscr 8012694: dd02 ble.n 801269c 8012696: 6efb ldr r3, [r7, #108] @ 0x6c 8012698: f8c7 3094 str.w r3, [r7, #148] @ 0x94 F_Load = (TargetWeight + vibKg * osc) * WP_Weight.Ctrl.OnOffScale[side]; 801269c: ed97 7a25 vldr s14, [r7, #148] @ 0x94 80126a0: edd7 7a1c vldr s15, [r7, #112] @ 0x70 80126a4: ee27 7a27 vmul.f32 s14, s14, s15 80126a8: edd7 7a22 vldr s15, [r7, #136] @ 0x88 80126ac: ee37 7a27 vadd.f32 s14, s14, s15 80126b0: 4a23 ldr r2, [pc, #140] @ (8012740 ) 80126b2: 687b ldr r3, [r7, #4] 80126b4: 330a adds r3, #10 80126b6: 009b lsls r3, r3, #2 80126b8: 4413 add r3, r2 80126ba: 3304 adds r3, #4 80126bc: edd3 7a00 vldr s15, [r3] 80126c0: ee67 7a27 vmul.f32 s15, s14, s15 80126c4: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 if (F_Load <= WP_Gym.F_idle) F_Load = WP_Gym.F_idle; 80126c8: 4b1e ldr r3, [pc, #120] @ (8012744 ) 80126ca: edd3 7a1a vldr s15, [r3, #104] @ 0x68 80126ce: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 80126d2: eeb4 7ae7 vcmpe.f32 s14, s15 80126d6: eef1 fa10 vmrs APSR_nzcv, fpscr 80126da: d803 bhi.n 80126e4 80126dc: 4b19 ldr r3, [pc, #100] @ (8012744 ) 80126de: 6e9b ldr r3, [r3, #104] @ 0x68 80126e0: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 // Slew Rate Limit float dt = 0.0002f; 80126e4: 4b18 ldr r3, [pc, #96] @ (8012748 ) 80126e6: 66bb str r3, [r7, #104] @ 0x68 float maxDelta = WP_Weight.Safety.SlewRate_kgPerSec * dt; 80126e8: 4b15 ldr r3, [pc, #84] @ (8012740 ) 80126ea: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 80126ee: ed97 7a1a vldr s14, [r7, #104] @ 0x68 80126f2: ee67 7a27 vmul.f32 s15, s14, s15 80126f6: edc7 7a19 vstr s15, [r7, #100] @ 0x64 float delta = F_Load - F_Load_prev[side]; 80126fa: 4a14 ldr r2, [pc, #80] @ (801274c ) 80126fc: 687b ldr r3, [r7, #4] 80126fe: 009b lsls r3, r3, #2 8012700: 4413 add r3, r2 8012702: edd3 7a00 vldr s15, [r3] 8012706: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 801270a: ee77 7a67 vsub.f32 s15, s14, s15 801270e: edc7 7a18 vstr s15, [r7, #96] @ 0x60 if (delta > maxDelta) F_Load = F_Load_prev[side] + maxDelta; 8012712: ed97 7a18 vldr s14, [r7, #96] @ 0x60 8012716: edd7 7a19 vldr s15, [r7, #100] @ 0x64 801271a: eeb4 7ae7 vcmpe.f32 s14, s15 801271e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012722: dd1b ble.n 801275c 8012724: 4a09 ldr r2, [pc, #36] @ (801274c ) 8012726: 687b ldr r3, [r7, #4] 8012728: 009b lsls r3, r3, #2 801272a: 4413 add r3, r2 801272c: edd3 7a00 vldr s15, [r3] 8012730: ed97 7a19 vldr s14, [r7, #100] @ 0x64 8012734: ee77 7a27 vadd.f32 s15, s14, s15 8012738: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 801273c: e025 b.n 801278a 801273e: bf00 nop 8012740: 200001d8 .word 0x200001d8 8012744: 20000148 .word 0x20000148 8012748: 3951b717 .word 0x3951b717 801274c: 200003a4 .word 0x200003a4 8012750: 20000110 .word 0x20000110 8012754: 447a0000 .word 0x447a0000 8012758: 40c90fdb .word 0x40c90fdb else if (delta < -maxDelta) F_Load = F_Load_prev[side] - maxDelta; 801275c: edd7 7a19 vldr s15, [r7, #100] @ 0x64 8012760: eef1 7a67 vneg.f32 s15, s15 8012764: ed97 7a18 vldr s14, [r7, #96] @ 0x60 8012768: eeb4 7ae7 vcmpe.f32 s14, s15 801276c: eef1 fa10 vmrs APSR_nzcv, fpscr 8012770: d50b bpl.n 801278a 8012772: 4aaf ldr r2, [pc, #700] @ (8012a30 ) 8012774: 687b ldr r3, [r7, #4] 8012776: 009b lsls r3, r3, #2 8012778: 4413 add r3, r2 801277a: ed93 7a00 vldr s14, [r3] 801277e: edd7 7a19 vldr s15, [r7, #100] @ 0x64 8012782: ee77 7a67 vsub.f32 s15, s14, s15 8012786: edc7 7a2d vstr s15, [r7, #180] @ 0xb4 F_Load_prev[side] = F_Load; 801278a: 4aa9 ldr r2, [pc, #676] @ (8012a30 ) 801278c: 687b ldr r3, [r7, #4] 801278e: 009b lsls r3, r3, #2 8012790: 4413 add r3, r2 8012792: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8012796: 601a str r2, [r3, #0] } if (H_LoSoft*10 <= Pos && Pos < RangeLo*10) { 8012798: f9b7 207e ldrsh.w r2, [r7, #126] @ 0x7e 801279c: 4613 mov r3, r2 801279e: 009b lsls r3, r3, #2 80127a0: 4413 add r3, r2 80127a2: 005b lsls r3, r3, #1 80127a4: 461a mov r2, r3 80127a6: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 80127aa: 429a cmp r2, r3 80127ac: dc3e bgt.n 801282c 80127ae: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 80127b2: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 80127b6: 4613 mov r3, r2 80127b8: 009b lsls r3, r3, #2 80127ba: 4413 add r3, r2 80127bc: 005b lsls r3, r3, #1 80127be: 4299 cmp r1, r3 80127c0: da34 bge.n 801282c Iq_Temp = (WP_Gym.F_idle + (F_Load - WP_Gym.F_idle) * (Pos - H_LoSoft*10) / (RangeLo*10 - H_LoSoft*10)) * WP_Machine.Scale_Weight2Current; 80127c2: 4b9c ldr r3, [pc, #624] @ (8012a34 ) 80127c4: ed93 7a1a vldr s14, [r3, #104] @ 0x68 80127c8: 4b9a ldr r3, [pc, #616] @ (8012a34 ) 80127ca: edd3 7a1a vldr s15, [r3, #104] @ 0x68 80127ce: edd7 6a2d vldr s13, [r7, #180] @ 0xb4 80127d2: ee76 6ae7 vsub.f32 s13, s13, s15 80127d6: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 80127da: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 80127de: f06f 0109 mvn.w r1, #9 80127e2: fb01 f303 mul.w r3, r1, r3 80127e6: 4413 add r3, r2 80127e8: ee07 3a90 vmov s15, r3 80127ec: eef8 7ae7 vcvt.f32.s32 s15, s15 80127f0: ee26 6aa7 vmul.f32 s12, s13, s15 80127f4: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 80127f8: f9b7 307e ldrsh.w r3, [r7, #126] @ 0x7e 80127fc: 1ad2 subs r2, r2, r3 80127fe: 4613 mov r3, r2 8012800: 009b lsls r3, r3, #2 8012802: 4413 add r3, r2 8012804: 005b lsls r3, r3, #1 8012806: ee07 3a90 vmov s15, r3 801280a: eef8 6ae7 vcvt.f32.s32 s13, s15 801280e: eec6 7a26 vdiv.f32 s15, s12, s13 8012812: ee37 7a27 vadd.f32 s14, s14, s15 8012816: 4b88 ldr r3, [pc, #544] @ (8012a38 ) 8012818: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801281c: ee67 7a27 vmul.f32 s15, s14, s15 8012820: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = LoSoft; 8012824: 2303 movs r3, #3 8012826: f887 30ab strb.w r3, [r7, #171] @ 0xab } else if (RangeLo*10 <= Pos) { Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; Region = RoM; } break; 801282a: e026 b.n 801287a } else if (RangeLo*10 <= Pos) { 801282c: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8012830: 4613 mov r3, r2 8012832: 009b lsls r3, r3, #2 8012834: 4413 add r3, r2 8012836: 005b lsls r3, r3, #1 8012838: 461a mov r2, r3 801283a: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 801283e: 429a cmp r2, r3 8012840: dc1b bgt.n 801287a Iq_Temp = F_Load * WP_Machine.Scale_Weight2Current; 8012842: 4b7d ldr r3, [pc, #500] @ (8012a38 ) 8012844: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8012848: ed97 7a2d vldr s14, [r7, #180] @ 0xb4 801284c: ee67 7a27 vmul.f32 s15, s14, s15 8012850: edc7 7a2c vstr s15, [r7, #176] @ 0xb0 Region = RoM; 8012854: 2304 movs r3, #4 8012856: f887 30ab strb.w r3, [r7, #171] @ 0xab break; 801285a: e00e b.n 801287a default: F_Load = WP_Gym.F_idle; 801285c: 4b75 ldr r3, [pc, #468] @ (8012a34 ) 801285e: 6e9b ldr r3, [r3, #104] @ 0x68 8012860: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 break; 8012864: e00a b.n 801287c break; 8012866: bf00 nop 8012868: e008 b.n 801287c break; 801286a: bf00 nop 801286c: e006 b.n 801287c break; 801286e: bf00 nop 8012870: e004 b.n 801287c break; 8012872: bf00 nop 8012874: e002 b.n 801287c break; 8012876: bf00 nop 8012878: e000 b.n 801287c break; 801287a: bf00 nop } } // 부하 조건에 따라서 피드포워드 스케일 타겟 계산 float Ff_Scale = 0; 801287c: f04f 0300 mov.w r3, #0 8012880: f8c7 3090 str.w r3, [r7, #144] @ 0x90 Ff_Scale = 0.0f; break; } #endif #if 1 // R2 if(Pos >= RangeLo*10) { 8012884: f9b7 1084 ldrsh.w r1, [r7, #132] @ 0x84 8012888: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 801288c: 4613 mov r3, r2 801288e: 009b lsls r3, r3, #2 8012890: 4413 add r3, r2 8012892: 005b lsls r3, r3, #1 8012894: 4299 cmp r1, r3 8012896: db3c blt.n 8012912 if (F_Load <= 1.5) { 8012898: edd7 7a2d vldr s15, [r7, #180] @ 0xb4 801289c: eeb7 7a08 vmov.f32 s14, #120 @ 0x3fc00000 1.5 80128a0: eef4 7ac7 vcmpe.f32 s15, s14 80128a4: eef1 fa10 vmrs APSR_nzcv, fpscr 80128a8: d804 bhi.n 80128b4 Ff_Scale = WP_Weight.FfScale.Max; 80128aa: 4b64 ldr r3, [pc, #400] @ (8012a3c ) 80128ac: 6d9b ldr r3, [r3, #88] @ 0x58 80128ae: f8c7 3090 str.w r3, [r7, #144] @ 0x90 80128b2: e065 b.n 8012980 // debug_FF_Region[side] = 1; } else if (1.5 < F_Load && F_Load <= 2.5) { 80128b4: edd7 7a2d vldr s15, [r7, #180] @ 0xb4 80128b8: eeb7 7a08 vmov.f32 s14, #120 @ 0x3fc00000 1.5 80128bc: eef4 7ac7 vcmpe.f32 s15, s14 80128c0: eef1 fa10 vmrs APSR_nzcv, fpscr 80128c4: dd17 ble.n 80128f6 80128c6: edd7 7a2d vldr s15, [r7, #180] @ 0xb4 80128ca: eeb0 7a04 vmov.f32 s14, #4 @ 0x40200000 2.5 80128ce: eef4 7ac7 vcmpe.f32 s15, s14 80128d2: eef1 fa10 vmrs APSR_nzcv, fpscr 80128d6: d80e bhi.n 80128f6 // Ff_Scale = -LINEAR_INTERPOLATION(F_Load, 1.5, 2.5, WP_Weight.FfScale.Max, WP_Weight.FfScale.Min); // 왠지 모르게 힘이 튁 튕김 // Ff_Scale = 0.8f; Ff_Scale = (WP_Weight.FfScale.Max + WP_Weight.FfScale.Min)*0.5; 80128d8: 4b58 ldr r3, [pc, #352] @ (8012a3c ) 80128da: ed93 7a16 vldr s14, [r3, #88] @ 0x58 80128de: 4b57 ldr r3, [pc, #348] @ (8012a3c ) 80128e0: edd3 7a15 vldr s15, [r3, #84] @ 0x54 80128e4: ee77 7a27 vadd.f32 s15, s14, s15 80128e8: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 80128ec: ee67 7a87 vmul.f32 s15, s15, s14 80128f0: edc7 7a24 vstr s15, [r7, #144] @ 0x90 80128f4: e044 b.n 8012980 // debug_FF_Region[side] = 2; } else if(2.5 < F_Load) { 80128f6: edd7 7a2d vldr s15, [r7, #180] @ 0xb4 80128fa: eeb0 7a04 vmov.f32 s14, #4 @ 0x40200000 2.5 80128fe: eef4 7ac7 vcmpe.f32 s15, s14 8012902: eef1 fa10 vmrs APSR_nzcv, fpscr 8012906: dd3b ble.n 8012980 Ff_Scale = WP_Weight.FfScale.Min; 8012908: 4b4c ldr r3, [pc, #304] @ (8012a3c ) 801290a: 6d5b ldr r3, [r3, #84] @ 0x54 801290c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8012910: e036 b.n 8012980 // debug_FF_Region[side] = 3; } } else if(RangeLo*10 > Pos && Pos > WP_Gym.Region.H_shock*10) { 8012912: f9b7 207c ldrsh.w r2, [r7, #124] @ 0x7c 8012916: 4613 mov r3, r2 8012918: 009b lsls r3, r3, #2 801291a: 4413 add r3, r2 801291c: 005b lsls r3, r3, #1 801291e: 461a mov r2, r3 8012920: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8012924: 429a cmp r2, r3 8012926: dd1a ble.n 801295e 8012928: f9b7 2084 ldrsh.w r2, [r7, #132] @ 0x84 801292c: 4b41 ldr r3, [pc, #260] @ (8012a34 ) 801292e: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 8012932: 4619 mov r1, r3 8012934: 460b mov r3, r1 8012936: 009b lsls r3, r3, #2 8012938: 440b add r3, r1 801293a: 005b lsls r3, r3, #1 801293c: 429a cmp r2, r3 801293e: dd0e ble.n 801295e Ff_Scale = (WP_Weight.FfScale.Max + WP_Weight.FfScale.Min)*0.5; 8012940: 4b3e ldr r3, [pc, #248] @ (8012a3c ) 8012942: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8012946: 4b3d ldr r3, [pc, #244] @ (8012a3c ) 8012948: edd3 7a15 vldr s15, [r3, #84] @ 0x54 801294c: ee77 7a27 vadd.f32 s15, s14, s15 8012950: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8012954: ee67 7a87 vmul.f32 s15, s15, s14 8012958: edc7 7a24 vstr s15, [r7, #144] @ 0x90 801295c: e010 b.n 8012980 // 여기에 속도 기반 결정 로직을 추가 // 빠르면 강하게, 느리면 약하게 } else if(WP_Gym.Region.H_shock*10 > Pos){ 801295e: 4b35 ldr r3, [pc, #212] @ (8012a34 ) 8012960: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 8012964: 461a mov r2, r3 8012966: 4613 mov r3, r2 8012968: 009b lsls r3, r3, #2 801296a: 4413 add r3, r2 801296c: 005b lsls r3, r3, #1 801296e: 461a mov r2, r3 8012970: f9b7 3084 ldrsh.w r3, [r7, #132] @ 0x84 8012974: 429a cmp r2, r3 8012976: dd03 ble.n 8012980 Ff_Scale = 0.0f; 8012978: f04f 0300 mov.w r3, #0 801297c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 Ff_Scale = 0.0f; // Ff_Scale = WP_Weight.FfScale.Min; // debug_FF_Region[side] = 4; } #endif FfScaleChanger(side, Ff_Scale); 8012980: ed97 0a24 vldr s0, [r7, #144] @ 0x90 8012984: 6878 ldr r0, [r7, #4] 8012986: f000 f861 bl 8012a4c // 실제 전류 지령에 반영, 파라미터 갱신 // 부하 상한 (kg 기준) — 어떤 모드든 이 무게 이상 부하 불가 // 소프트 Iq 상한 (앱에서 설정, 0이면 비활성) if(WP_Weight.Safety.IqLimit > 0 && Iq_Temp > WP_Weight.Safety.IqLimit) 801298a: 4b2c ldr r3, [pc, #176] @ (8012a3c ) 801298c: edd3 7a27 vldr s15, [r3, #156] @ 0x9c 8012990: eef5 7ac0 vcmpe.f32 s15, #0.0 8012994: eef1 fa10 vmrs APSR_nzcv, fpscr 8012998: dd0e ble.n 80129b8 801299a: 4b28 ldr r3, [pc, #160] @ (8012a3c ) 801299c: edd3 7a27 vldr s15, [r3, #156] @ 0x9c 80129a0: ed97 7a2c vldr s14, [r7, #176] @ 0xb0 80129a4: eeb4 7ae7 vcmpe.f32 s14, s15 80129a8: eef1 fa10 vmrs APSR_nzcv, fpscr 80129ac: dd04 ble.n 80129b8 Iq_Temp = WP_Weight.Safety.IqLimit; 80129ae: 4b23 ldr r3, [pc, #140] @ (8012a3c ) 80129b0: f8d3 309c ldr.w r3, [r3, #156] @ 0x9c 80129b4: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 if(Iq_Temp >= WP_Machine.MaxCurrent) Iq_Temp = WP_Machine.MaxCurrent; 80129b8: 4b1f ldr r3, [pc, #124] @ (8012a38 ) 80129ba: edd3 7a05 vldr s15, [r3, #20] 80129be: ed97 7a2c vldr s14, [r7, #176] @ 0xb0 80129c2: eeb4 7ae7 vcmpe.f32 s14, s15 80129c6: eef1 fa10 vmrs APSR_nzcv, fpscr 80129ca: db03 blt.n 80129d4 80129cc: 4b1a ldr r3, [pc, #104] @ (8012a38 ) 80129ce: 695b ldr r3, [r3, #20] 80129d0: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 TargetIq[side] = Iq_Temp; 80129d4: 4a1a ldr r2, [pc, #104] @ (8012a40 ) 80129d6: 687b ldr r3, [r7, #4] 80129d8: 009b lsls r3, r3, #2 80129da: 4413 add r3, r2 80129dc: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 80129e0: 601a str r2, [r3, #0] WP_Gym.RegionCurr[side] = Region; 80129e2: f997 10ab ldrsb.w r1, [r7, #171] @ 0xab 80129e6: 4a13 ldr r2, [pc, #76] @ (8012a34 ) 80129e8: 687b ldr r3, [r7, #4] 80129ea: 4413 add r3, r2 80129ec: 3328 adds r3, #40 @ 0x28 80129ee: 460a mov r2, r1 80129f0: 701a strb r2, [r3, #0] WP_Weight.Ctrl.Ecc[side] = FeccTemp; 80129f2: 4a12 ldr r2, [pc, #72] @ (8012a3c ) 80129f4: 687b ldr r3, [r7, #4] 80129f6: 3308 adds r3, #8 80129f8: 009b lsls r3, r3, #2 80129fa: 4413 add r3, r2 80129fc: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac 8012a00: 601a str r2, [r3, #0] // Dev Report용 전역 저장 DevReport_FLoad[side] = Iq_Temp / WP_Machine.Scale_Weight2Current; // Iq→kg 역변환 8012a02: 4b0d ldr r3, [pc, #52] @ (8012a38 ) 8012a04: ed93 7a0c vldr s14, [r3, #48] @ 0x30 8012a08: edd7 6a2c vldr s13, [r7, #176] @ 0xb0 8012a0c: eec6 7a87 vdiv.f32 s15, s13, s14 8012a10: 4a0c ldr r2, [pc, #48] @ (8012a44 ) 8012a12: 687b ldr r3, [r7, #4] 8012a14: 009b lsls r3, r3, #2 8012a16: 4413 add r3, r2 8012a18: edc3 7a00 vstr s15, [r3] DevReport_Region[side] = Region; 8012a1c: 4a0a ldr r2, [pc, #40] @ (8012a48 ) 8012a1e: 687b ldr r3, [r7, #4] 8012a20: 4413 add r3, r2 8012a22: f897 20ab ldrb.w r2, [r7, #171] @ 0xab 8012a26: 701a strb r2, [r3, #0] } 8012a28: bf00 nop 8012a2a: 37b8 adds r7, #184 @ 0xb8 8012a2c: 46bd mov sp, r7 8012a2e: bd80 pop {r7, pc} 8012a30: 200003a4 .word 0x200003a4 8012a34: 20000148 .word 0x20000148 8012a38: 20000110 .word 0x20000110 8012a3c: 200001d8 .word 0x200001d8 8012a40: 20000350 .word 0x20000350 8012a44: 20000358 .word 0x20000358 8012a48: 20000370 .word 0x20000370 08012a4c : // // WP_Weight.Dir.Status[side] = Status; //} //int cnt_Ff_LimitHi, cnt_Ff_LimitLo; void FfScaleChanger (int side, float FfScale_Target) { 8012a4c: b480 push {r7} 8012a4e: b087 sub sp, #28 8012a50: af00 add r7, sp, #0 8012a52: 6078 str r0, [r7, #4] 8012a54: ed87 0a00 vstr s0, [r7] float FfScale_new, FfScale_old, FfScaleDiff; FfScale_old = WP_Weight.FfScale.Temp[side]; 8012a58: 4a3a ldr r2, [pc, #232] @ (8012b44 ) 8012a5a: 687b ldr r3, [r7, #4] 8012a5c: 3316 adds r3, #22 8012a5e: 009b lsls r3, r3, #2 8012a60: 4413 add r3, r2 8012a62: 3308 adds r3, #8 8012a64: 681b ldr r3, [r3, #0] 8012a66: 613b str r3, [r7, #16] // 절대값으로 변경 -> 액티브하지 않지만 확실 if (FfScale_old > FfScale_Target) { 8012a68: ed97 7a04 vldr s14, [r7, #16] 8012a6c: edd7 7a00 vldr s15, [r7] 8012a70: eeb4 7ae7 vcmpe.f32 s14, s15 8012a74: eef1 fa10 vmrs APSR_nzcv, fpscr 8012a78: dd16 ble.n 8012aa8 FfScale_new = FfScale_old - WP_Weight.FfScale.Step; 8012a7a: 4b32 ldr r3, [pc, #200] @ (8012b44 ) 8012a7c: edd3 7a17 vldr s15, [r3, #92] @ 0x5c 8012a80: ed97 7a04 vldr s14, [r7, #16] 8012a84: ee77 7a67 vsub.f32 s15, s14, s15 8012a88: edc7 7a05 vstr s15, [r7, #20] if(FfScale_new >= WP_Weight.FfScale.Max) { 8012a8c: 4b2d ldr r3, [pc, #180] @ (8012b44 ) 8012a8e: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8012a92: ed97 7a05 vldr s14, [r7, #20] 8012a96: eeb4 7ae7 vcmpe.f32 s14, s15 8012a9a: eef1 fa10 vmrs APSR_nzcv, fpscr 8012a9e: db22 blt.n 8012ae6 // cnt_Ff_LimitHi++; FfScale_new = WP_Weight.FfScale.Max; 8012aa0: 4b28 ldr r3, [pc, #160] @ (8012b44 ) 8012aa2: 6d9b ldr r3, [r3, #88] @ 0x58 8012aa4: 617b str r3, [r7, #20] 8012aa6: e01e b.n 8012ae6 } } else if (FfScale_old < FfScale_Target) { 8012aa8: ed97 7a04 vldr s14, [r7, #16] 8012aac: edd7 7a00 vldr s15, [r7] 8012ab0: eeb4 7ae7 vcmpe.f32 s14, s15 8012ab4: eef1 fa10 vmrs APSR_nzcv, fpscr 8012ab8: d513 bpl.n 8012ae2 FfScale_new = FfScale_old + WP_Weight.FfScale.Step; 8012aba: 4b22 ldr r3, [pc, #136] @ (8012b44 ) 8012abc: edd3 7a17 vldr s15, [r3, #92] @ 0x5c 8012ac0: ed97 7a04 vldr s14, [r7, #16] 8012ac4: ee77 7a27 vadd.f32 s15, s14, s15 8012ac8: edc7 7a05 vstr s15, [r7, #20] // if(FfScale_new >= WP_Weight.FfScale_Max) FfScale_new = WP_Weight.FfScale_Max; if(FfScale_new <= 0) { 8012acc: edd7 7a05 vldr s15, [r7, #20] 8012ad0: eef5 7ac0 vcmpe.f32 s15, #0.0 8012ad4: eef1 fa10 vmrs APSR_nzcv, fpscr 8012ad8: d805 bhi.n 8012ae6 // cnt_Ff_LimitLo++; FfScale_new = 0; 8012ada: f04f 0300 mov.w r3, #0 8012ade: 617b str r3, [r7, #20] 8012ae0: e001 b.n 8012ae6 } } else { FfScale_new = FfScale_old; 8012ae2: 693b ldr r3, [r7, #16] 8012ae4: 617b str r3, [r7, #20] } FfScaleDiff = FfScale_new - FfScale_Target; 8012ae6: ed97 7a05 vldr s14, [r7, #20] 8012aea: edd7 7a00 vldr s15, [r7] 8012aee: ee77 7a67 vsub.f32 s15, s14, s15 8012af2: edc7 7a03 vstr s15, [r7, #12] if(-WP_Weight.FfScale.Step < FfScaleDiff && FfScaleDiff < WP_Weight.FfScale.Step) { 8012af6: 4b13 ldr r3, [pc, #76] @ (8012b44 ) 8012af8: edd3 7a17 vldr s15, [r3, #92] @ 0x5c 8012afc: eef1 7a67 vneg.f32 s15, s15 8012b00: ed97 7a03 vldr s14, [r7, #12] 8012b04: eeb4 7ae7 vcmpe.f32 s14, s15 8012b08: eef1 fa10 vmrs APSR_nzcv, fpscr 8012b0c: dd0b ble.n 8012b26 8012b0e: 4b0d ldr r3, [pc, #52] @ (8012b44 ) 8012b10: edd3 7a17 vldr s15, [r3, #92] @ 0x5c 8012b14: ed97 7a03 vldr s14, [r7, #12] 8012b18: eeb4 7ae7 vcmpe.f32 s14, s15 8012b1c: eef1 fa10 vmrs APSR_nzcv, fpscr 8012b20: d501 bpl.n 8012b26 FfScale_new = FfScale_Target; 8012b22: 683b ldr r3, [r7, #0] 8012b24: 617b str r3, [r7, #20] } WP_Weight.FfScale.Temp[side] = FfScale_new; 8012b26: 4a07 ldr r2, [pc, #28] @ (8012b44 ) 8012b28: 687b ldr r3, [r7, #4] 8012b2a: 3316 adds r3, #22 8012b2c: 009b lsls r3, r3, #2 8012b2e: 4413 add r3, r2 8012b30: 3308 adds r3, #8 8012b32: 697a ldr r2, [r7, #20] 8012b34: 601a str r2, [r3, #0] } 8012b36: bf00 nop 8012b38: 371c adds r7, #28 8012b3a: 46bd mov sp, r7 8012b3c: f85d 7b04 ldr.w r7, [sp], #4 8012b40: 4770 bx lr 8012b42: bf00 nop 8012b44: 200001d8 .word 0x200001d8 08012b48 : int count_WeightToggle[L]; void WeightOnOff(int side){ 8012b48: b480 push {r7} 8012b4a: b083 sub sp, #12 8012b4c: af00 add r7, sp, #0 8012b4e: 6078 str r0, [r7, #4] // HIL 모드: OnOffScale 고정, 속도 기반 점진 변화 스킵 if(Debug_HilMode) return; 8012b50: 4b73 ldr r3, [pc, #460] @ (8012d20 ) 8012b52: 781b ldrb r3, [r3, #0] 8012b54: 2b00 cmp r3, #0 8012b56: f040 80dc bne.w 8012d12 switch(WP_Weight.Ctrl.OnOffStatus[side]){ 8012b5a: 4a72 ldr r2, [pc, #456] @ (8012d24 ) 8012b5c: 687b ldr r3, [r7, #4] 8012b5e: 4413 add r3, r2 8012b60: 332a adds r3, #42 @ 0x2a 8012b62: 781b ldrb r3, [r3, #0] 8012b64: 2b00 cmp r3, #0 8012b66: d070 beq.n 8012c4a 8012b68: 2b01 cmp r3, #1 8012b6a: f040 80d3 bne.w 8012d14 case ON: if(WP_Weight.Ctrl.OnOffScale[side] < 1.0f) { 8012b6e: 4a6d ldr r2, [pc, #436] @ (8012d24 ) 8012b70: 687b ldr r3, [r7, #4] 8012b72: 330a adds r3, #10 8012b74: 009b lsls r3, r3, #2 8012b76: 4413 add r3, r2 8012b78: 3304 adds r3, #4 8012b7a: edd3 7a00 vldr s15, [r3] 8012b7e: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 8012b82: eef4 7ac7 vcmpe.f32 s15, s14 8012b86: eef1 fa10 vmrs APSR_nzcv, fpscr 8012b8a: d400 bmi.n 8012b8e ISR_Deferred.WeightOnOff_Status = WP_Weight.Ctrl.OnOffStatus[side]; ISR_Deferred.WeightOnOff_Ready = 1; } } } break; 8012b8c: e0c2 b.n 8012d14 if(WP_Gym.Speed[L] > -WP_Weight.RefSpdStop && WP_Gym.Speed[R] > -WP_Weight.RefSpdStop) { // 정지 판단 속도 이상으로 내려가지 않는 경우 8012b8e: 4b66 ldr r3, [pc, #408] @ (8012d28 ) 8012b90: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8012b94: 4b63 ldr r3, [pc, #396] @ (8012d24 ) 8012b96: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012b9a: eef1 7a67 vneg.f32 s15, s15 8012b9e: eeb4 7ae7 vcmpe.f32 s14, s15 8012ba2: eef1 fa10 vmrs APSR_nzcv, fpscr 8012ba6: dc00 bgt.n 8012baa break; 8012ba8: e0b4 b.n 8012d14 if(WP_Gym.Speed[L] > -WP_Weight.RefSpdStop && WP_Gym.Speed[R] > -WP_Weight.RefSpdStop) { // 정지 판단 속도 이상으로 내려가지 않는 경우 8012baa: 4b5f ldr r3, [pc, #380] @ (8012d28 ) 8012bac: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8012bb0: 4b5c ldr r3, [pc, #368] @ (8012d24 ) 8012bb2: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012bb6: eef1 7a67 vneg.f32 s15, s15 8012bba: eeb4 7ae7 vcmpe.f32 s14, s15 8012bbe: eef1 fa10 vmrs APSR_nzcv, fpscr 8012bc2: dc00 bgt.n 8012bc6 break; 8012bc4: e0a6 b.n 8012d14 WP_Weight.Ctrl.OnOffScale[L] = WP_Weight.Ctrl.OnOffScale[L] + WP_Weight.Ctrl.OnOffStep; 8012bc6: 4b57 ldr r3, [pc, #348] @ (8012d24 ) 8012bc8: ed93 7a0b vldr s14, [r3, #44] @ 0x2c 8012bcc: 4b55 ldr r3, [pc, #340] @ (8012d24 ) 8012bce: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8012bd2: ee77 7a27 vadd.f32 s15, s14, s15 8012bd6: 4b53 ldr r3, [pc, #332] @ (8012d24 ) 8012bd8: edc3 7a0b vstr s15, [r3, #44] @ 0x2c if(WP_Weight.Ctrl.OnOffScale[L] >= 1.0f) { 8012bdc: 4b51 ldr r3, [pc, #324] @ (8012d24 ) 8012bde: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 8012be2: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 8012be6: eef4 7ac7 vcmpe.f32 s15, s14 8012bea: eef1 fa10 vmrs APSR_nzcv, fpscr 8012bee: db03 blt.n 8012bf8 WP_Weight.Ctrl.OnOffScale[L] = 1.0f; 8012bf0: 4b4c ldr r3, [pc, #304] @ (8012d24 ) 8012bf2: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8012bf6: 62da str r2, [r3, #44] @ 0x2c WP_Weight.Ctrl.OnOffScale[R] = WP_Weight.Ctrl.OnOffScale[R] + WP_Weight.Ctrl.OnOffStep; 8012bf8: 4b4a ldr r3, [pc, #296] @ (8012d24 ) 8012bfa: ed93 7a0c vldr s14, [r3, #48] @ 0x30 8012bfe: 4b49 ldr r3, [pc, #292] @ (8012d24 ) 8012c00: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8012c04: ee77 7a27 vadd.f32 s15, s14, s15 8012c08: 4b46 ldr r3, [pc, #280] @ (8012d24 ) 8012c0a: edc3 7a0c vstr s15, [r3, #48] @ 0x30 if(WP_Weight.Ctrl.OnOffScale[R] >= 1.0f) { 8012c0e: 4b45 ldr r3, [pc, #276] @ (8012d24 ) 8012c10: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8012c14: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 8012c18: eef4 7ac7 vcmpe.f32 s15, s14 8012c1c: eef1 fa10 vmrs APSR_nzcv, fpscr 8012c20: da00 bge.n 8012c24 break; 8012c22: e077 b.n 8012d14 WP_Weight.Ctrl.OnOffScale[R] = 1.0f; 8012c24: 4b3f ldr r3, [pc, #252] @ (8012d24 ) 8012c26: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 8012c2a: 631a str r2, [r3, #48] @ 0x30 WP_Weight.Ctrl.MotionAutoStatus = STOP; // 앱과 통신하는 변수 업데이트 8012c2c: 4b3d ldr r3, [pc, #244] @ (8012d24 ) 8012c2e: 2200 movs r2, #0 8012c30: f883 2029 strb.w r2, [r3, #41] @ 0x29 ISR_Deferred.WeightOnOff_Status = WP_Weight.Ctrl.OnOffStatus[side]; 8012c34: 4a3b ldr r2, [pc, #236] @ (8012d24 ) 8012c36: 687b ldr r3, [r7, #4] 8012c38: 4413 add r3, r2 8012c3a: 332a adds r3, #42 @ 0x2a 8012c3c: 781a ldrb r2, [r3, #0] 8012c3e: 4b3b ldr r3, [pc, #236] @ (8012d2c ) 8012c40: 705a strb r2, [r3, #1] ISR_Deferred.WeightOnOff_Ready = 1; 8012c42: 4b3a ldr r3, [pc, #232] @ (8012d2c ) 8012c44: 2201 movs r2, #1 8012c46: 701a strb r2, [r3, #0] break; 8012c48: e064 b.n 8012d14 case OFF: if(WP_Weight.Ctrl.OnOffScale[side] > 0.0f) { 8012c4a: 4a36 ldr r2, [pc, #216] @ (8012d24 ) 8012c4c: 687b ldr r3, [r7, #4] 8012c4e: 330a adds r3, #10 8012c50: 009b lsls r3, r3, #2 8012c52: 4413 add r3, r2 8012c54: 3304 adds r3, #4 8012c56: edd3 7a00 vldr s15, [r3] 8012c5a: eef5 7ac0 vcmpe.f32 s15, #0.0 8012c5e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012c62: dc00 bgt.n 8012c66 ISR_Deferred.WeightOnOff_Status = WP_Weight.Ctrl.OnOffStatus[side]; ISR_Deferred.WeightOnOff_Ready = 1; } } } break; 8012c64: e056 b.n 8012d14 if(WP_Gym.Speed[L] < WP_Weight.RefSpdStop && WP_Gym.Speed[R] < WP_Weight.RefSpdStop) { // 정지 판단 속도 이상으로 올라가지 않는 경우 8012c66: 4b30 ldr r3, [pc, #192] @ (8012d28 ) 8012c68: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8012c6c: 4b2d ldr r3, [pc, #180] @ (8012d24 ) 8012c6e: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012c72: eeb4 7ae7 vcmpe.f32 s14, s15 8012c76: eef1 fa10 vmrs APSR_nzcv, fpscr 8012c7a: d400 bmi.n 8012c7e break; 8012c7c: e04a b.n 8012d14 if(WP_Gym.Speed[L] < WP_Weight.RefSpdStop && WP_Gym.Speed[R] < WP_Weight.RefSpdStop) { // 정지 판단 속도 이상으로 올라가지 않는 경우 8012c7e: 4b2a ldr r3, [pc, #168] @ (8012d28 ) 8012c80: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8012c84: 4b27 ldr r3, [pc, #156] @ (8012d24 ) 8012c86: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012c8a: eeb4 7ae7 vcmpe.f32 s14, s15 8012c8e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012c92: d400 bmi.n 8012c96 break; 8012c94: e03e b.n 8012d14 WP_Weight.Ctrl.OnOffScale[L] = WP_Weight.Ctrl.OnOffScale[L] - WP_Weight.Ctrl.OnOffStep; 8012c96: 4b23 ldr r3, [pc, #140] @ (8012d24 ) 8012c98: ed93 7a0b vldr s14, [r3, #44] @ 0x2c 8012c9c: 4b21 ldr r3, [pc, #132] @ (8012d24 ) 8012c9e: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8012ca2: ee77 7a67 vsub.f32 s15, s14, s15 8012ca6: 4b1f ldr r3, [pc, #124] @ (8012d24 ) 8012ca8: edc3 7a0b vstr s15, [r3, #44] @ 0x2c if(WP_Weight.Ctrl.OnOffScale[L] <= 0.0f) { 8012cac: 4b1d ldr r3, [pc, #116] @ (8012d24 ) 8012cae: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 8012cb2: eef5 7ac0 vcmpe.f32 s15, #0.0 8012cb6: eef1 fa10 vmrs APSR_nzcv, fpscr 8012cba: d803 bhi.n 8012cc4 WP_Weight.Ctrl.OnOffScale[L] = 0.0f; 8012cbc: 4b19 ldr r3, [pc, #100] @ (8012d24 ) 8012cbe: f04f 0200 mov.w r2, #0 8012cc2: 62da str r2, [r3, #44] @ 0x2c WP_Weight.Ctrl.OnOffScale[R] = WP_Weight.Ctrl.OnOffScale[R] - WP_Weight.Ctrl.OnOffStep; 8012cc4: 4b17 ldr r3, [pc, #92] @ (8012d24 ) 8012cc6: ed93 7a0c vldr s14, [r3, #48] @ 0x30 8012cca: 4b16 ldr r3, [pc, #88] @ (8012d24 ) 8012ccc: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8012cd0: ee77 7a67 vsub.f32 s15, s14, s15 8012cd4: 4b13 ldr r3, [pc, #76] @ (8012d24 ) 8012cd6: edc3 7a0c vstr s15, [r3, #48] @ 0x30 if(WP_Weight.Ctrl.OnOffScale[R] <= 0.0f) { 8012cda: 4b12 ldr r3, [pc, #72] @ (8012d24 ) 8012cdc: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8012ce0: eef5 7ac0 vcmpe.f32 s15, #0.0 8012ce4: eef1 fa10 vmrs APSR_nzcv, fpscr 8012ce8: d900 bls.n 8012cec break; 8012cea: e013 b.n 8012d14 WP_Weight.Ctrl.OnOffScale[R] = 0.0f; 8012cec: 4b0d ldr r3, [pc, #52] @ (8012d24 ) 8012cee: f04f 0200 mov.w r2, #0 8012cf2: 631a str r2, [r3, #48] @ 0x30 WP_Weight.Ctrl.MotionAutoStatus = STOP; // 앱과 통신하는 변수 업데이트 8012cf4: 4b0b ldr r3, [pc, #44] @ (8012d24 ) 8012cf6: 2200 movs r2, #0 8012cf8: f883 2029 strb.w r2, [r3, #41] @ 0x29 ISR_Deferred.WeightOnOff_Status = WP_Weight.Ctrl.OnOffStatus[side]; 8012cfc: 4a09 ldr r2, [pc, #36] @ (8012d24 ) 8012cfe: 687b ldr r3, [r7, #4] 8012d00: 4413 add r3, r2 8012d02: 332a adds r3, #42 @ 0x2a 8012d04: 781a ldrb r2, [r3, #0] 8012d06: 4b09 ldr r3, [pc, #36] @ (8012d2c ) 8012d08: 705a strb r2, [r3, #1] ISR_Deferred.WeightOnOff_Ready = 1; 8012d0a: 4b08 ldr r3, [pc, #32] @ (8012d2c ) 8012d0c: 2201 movs r2, #1 8012d0e: 701a strb r2, [r3, #0] break; 8012d10: e000 b.n 8012d14 if(Debug_HilMode) return; 8012d12: bf00 nop } } 8012d14: 370c adds r7, #12 8012d16: 46bd mov sp, r7 8012d18: f85d 7b04 ldr.w r7, [sp], #4 8012d1c: 4770 bx lr 8012d1e: bf00 nop 8012d20: 20000372 .word 0x20000372 8012d24: 200001d8 .word 0x200001d8 8012d28: 20000148 .word 0x20000148 8012d2c: 20000344 .word 0x20000344 08012d30 : // Task10ms_1에서 구동중 void WeightBLEtoSetTask(float step) { 8012d30: b580 push {r7, lr} 8012d32: b084 sub sp, #16 8012d34: af02 add r7, sp, #8 8012d36: ed87 0a01 vstr s0, [r7, #4] if(step >= 0.5) step = 0.5; 8012d3a: edd7 7a01 vldr s15, [r7, #4] 8012d3e: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8012d42: eef4 7ac7 vcmpe.f32 s15, s14 8012d46: eef1 fa10 vmrs APSR_nzcv, fpscr 8012d4a: db02 blt.n 8012d52 8012d4c: f04f 537c mov.w r3, #1056964608 @ 0x3f000000 8012d50: 607b str r3, [r7, #4] // 무게 올려야 하는 경우 if(WP_Gym.WeightSet[L] < WP_Gym.WeightBLE[L]){ 8012d52: 4ba3 ldr r3, [pc, #652] @ (8012fe0 ) 8012d54: ed93 7a03 vldr s14, [r3, #12] 8012d58: 4ba1 ldr r3, [pc, #644] @ (8012fe0 ) 8012d5a: edd3 7a01 vldr s15, [r3, #4] 8012d5e: eeb4 7ae7 vcmpe.f32 s14, s15 8012d62: eef1 fa10 vmrs APSR_nzcv, fpscr 8012d66: d552 bpl.n 8012e0e // 유저가 잘 버티고 있다면 if(WP_Gym.Speed[L] > -WP_Weight.RefSpdStop && WP_Gym.Speed[R] > -WP_Weight.RefSpdStop) { // 정지 판단 속도 이상으로 내려가지 않는 경우 8012d68: 4b9d ldr r3, [pc, #628] @ (8012fe0 ) 8012d6a: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8012d6e: 4b9d ldr r3, [pc, #628] @ (8012fe4 ) 8012d70: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012d74: eef1 7a67 vneg.f32 s15, s15 8012d78: eeb4 7ae7 vcmpe.f32 s14, s15 8012d7c: eef1 fa10 vmrs APSR_nzcv, fpscr 8012d80: dd3f ble.n 8012e02 8012d82: 4b97 ldr r3, [pc, #604] @ (8012fe0 ) 8012d84: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8012d88: 4b96 ldr r3, [pc, #600] @ (8012fe4 ) 8012d8a: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012d8e: eef1 7a67 vneg.f32 s15, s15 8012d92: eeb4 7ae7 vcmpe.f32 s14, s15 8012d96: eef1 fa10 vmrs APSR_nzcv, fpscr 8012d9a: dd32 ble.n 8012e02 WP_Gym.WeightSet[L] = WP_Gym.WeightSet[L] + step; 8012d9c: 4b90 ldr r3, [pc, #576] @ (8012fe0 ) 8012d9e: ed93 7a03 vldr s14, [r3, #12] 8012da2: edd7 7a01 vldr s15, [r7, #4] 8012da6: ee77 7a27 vadd.f32 s15, s14, s15 8012daa: 4b8d ldr r3, [pc, #564] @ (8012fe0 ) 8012dac: edc3 7a03 vstr s15, [r3, #12] WP_Gym.WeightSet[R] = WP_Gym.WeightSet[R] + step; 8012db0: 4b8b ldr r3, [pc, #556] @ (8012fe0 ) 8012db2: ed93 7a04 vldr s14, [r3, #16] 8012db6: edd7 7a01 vldr s15, [r7, #4] 8012dba: ee77 7a27 vadd.f32 s15, s14, s15 8012dbe: 4b88 ldr r3, [pc, #544] @ (8012fe0 ) 8012dc0: edc3 7a04 vstr s15, [r3, #16] Return_4x1byte(WEIGHTPLUS, WP_Gym.WeightSet[L]*2, WP_Gym.WeightMode[L], WP_Gym.WeightSet[R]*2, WP_Gym.WeightMode[R]); 8012dc4: 4b86 ldr r3, [pc, #536] @ (8012fe0 ) 8012dc6: edd3 7a03 vldr s15, [r3, #12] 8012dca: ee77 7aa7 vadd.f32 s15, s15, s15 8012dce: eefc 7ae7 vcvt.u32.f32 s15, s15 8012dd2: ee17 3a90 vmov r3, s15 8012dd6: b299 uxth r1, r3 8012dd8: 4b81 ldr r3, [pc, #516] @ (8012fe0 ) 8012dda: 781b ldrb r3, [r3, #0] 8012ddc: 4618 mov r0, r3 8012dde: 4b80 ldr r3, [pc, #512] @ (8012fe0 ) 8012de0: edd3 7a04 vldr s15, [r3, #16] 8012de4: ee77 7aa7 vadd.f32 s15, s15, s15 8012de8: eefc 7ae7 vcvt.u32.f32 s15, s15 8012dec: ee17 3a90 vmov r3, s15 8012df0: b29b uxth r3, r3 8012df2: 4a7b ldr r2, [pc, #492] @ (8012fe0 ) 8012df4: 7852 ldrb r2, [r2, #1] 8012df6: 9200 str r2, [sp, #0] 8012df8: 4602 mov r2, r0 8012dfa: 2066 movs r0, #102 @ 0x66 8012dfc: f007 f8c2 bl 8019f84 8012e00: e066 b.n 8012ed0 } else { // 유저가 당겨지고 있다면 UART3_Puts("User is not stable\r\n"); 8012e02: 2200 movs r2, #0 8012e04: 4978 ldr r1, [pc, #480] @ (8012fe8 ) 8012e06: 4879 ldr r0, [pc, #484] @ (8012fec ) 8012e08: f00c fd8e bl 801f928 8012e0c: e060 b.n 8012ed0 } } // 무게 내려야 하는 경우 else if(WP_Gym.WeightSet[L] > WP_Gym.WeightBLE[L]){ 8012e0e: 4b74 ldr r3, [pc, #464] @ (8012fe0 ) 8012e10: ed93 7a03 vldr s14, [r3, #12] 8012e14: 4b72 ldr r3, [pc, #456] @ (8012fe0 ) 8012e16: edd3 7a01 vldr s15, [r3, #4] 8012e1a: eeb4 7ae7 vcmpe.f32 s14, s15 8012e1e: eef1 fa10 vmrs APSR_nzcv, fpscr 8012e22: dd55 ble.n 8012ed0 // 유저가 안 튀어오르고 있다면 if(WP_Gym.Speed[L] < WP_Weight.RefSpdStop && WP_Gym.Speed[R] < WP_Weight.RefSpdStop) { // 정지 판단 속도 이상으로 올라가지 않는 경우 8012e24: 4b6e ldr r3, [pc, #440] @ (8012fe0 ) 8012e26: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8012e2a: 4b6e ldr r3, [pc, #440] @ (8012fe4 ) 8012e2c: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012e30: eeb4 7ae7 vcmpe.f32 s14, s15 8012e34: eef1 fa10 vmrs APSR_nzcv, fpscr 8012e38: d545 bpl.n 8012ec6 8012e3a: 4b69 ldr r3, [pc, #420] @ (8012fe0 ) 8012e3c: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8012e40: 4b68 ldr r3, [pc, #416] @ (8012fe4 ) 8012e42: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8012e46: eeb4 7ae7 vcmpe.f32 s14, s15 8012e4a: eef1 fa10 vmrs APSR_nzcv, fpscr 8012e4e: d53a bpl.n 8012ec6 WP_Gym.WeightSet[L] = WP_Gym.WeightSet[L] - 3.0f*step; // 빠지는 속도는 2에서 3으로 올림 -> 계속 개선 필요(25.05.05) 8012e50: 4b63 ldr r3, [pc, #396] @ (8012fe0 ) 8012e52: ed93 7a03 vldr s14, [r3, #12] 8012e56: edd7 7a01 vldr s15, [r7, #4] 8012e5a: eef0 6a08 vmov.f32 s13, #8 @ 0x40400000 3.0 8012e5e: ee67 7aa6 vmul.f32 s15, s15, s13 8012e62: ee77 7a67 vsub.f32 s15, s14, s15 8012e66: 4b5e ldr r3, [pc, #376] @ (8012fe0 ) 8012e68: edc3 7a03 vstr s15, [r3, #12] WP_Gym.WeightSet[R] = WP_Gym.WeightSet[R] - 3.0f*step; 8012e6c: 4b5c ldr r3, [pc, #368] @ (8012fe0 ) 8012e6e: ed93 7a04 vldr s14, [r3, #16] 8012e72: edd7 7a01 vldr s15, [r7, #4] 8012e76: eef0 6a08 vmov.f32 s13, #8 @ 0x40400000 3.0 8012e7a: ee67 7aa6 vmul.f32 s15, s15, s13 8012e7e: ee77 7a67 vsub.f32 s15, s14, s15 8012e82: 4b57 ldr r3, [pc, #348] @ (8012fe0 ) 8012e84: edc3 7a04 vstr s15, [r3, #16] Return_4x1byte(WEIGHTPLUS, WP_Gym.WeightSet[L]*2, WP_Gym.WeightMode[L], WP_Gym.WeightSet[R]*2, WP_Gym.WeightMode[R]); 8012e88: 4b55 ldr r3, [pc, #340] @ (8012fe0 ) 8012e8a: edd3 7a03 vldr s15, [r3, #12] 8012e8e: ee77 7aa7 vadd.f32 s15, s15, s15 8012e92: eefc 7ae7 vcvt.u32.f32 s15, s15 8012e96: ee17 3a90 vmov r3, s15 8012e9a: b299 uxth r1, r3 8012e9c: 4b50 ldr r3, [pc, #320] @ (8012fe0 ) 8012e9e: 781b ldrb r3, [r3, #0] 8012ea0: 4618 mov r0, r3 8012ea2: 4b4f ldr r3, [pc, #316] @ (8012fe0 ) 8012ea4: edd3 7a04 vldr s15, [r3, #16] 8012ea8: ee77 7aa7 vadd.f32 s15, s15, s15 8012eac: eefc 7ae7 vcvt.u32.f32 s15, s15 8012eb0: ee17 3a90 vmov r3, s15 8012eb4: b29b uxth r3, r3 8012eb6: 4a4a ldr r2, [pc, #296] @ (8012fe0 ) 8012eb8: 7852 ldrb r2, [r2, #1] 8012eba: 9200 str r2, [sp, #0] 8012ebc: 4602 mov r2, r0 8012ebe: 2066 movs r0, #102 @ 0x66 8012ec0: f007 f860 bl 8019f84 8012ec4: e004 b.n 8012ed0 } else { // 유저가 튀어오르고 있다면 UART3_Puts("User is not stable\r\n"); 8012ec6: 2200 movs r2, #0 8012ec8: 4947 ldr r1, [pc, #284] @ (8012fe8 ) 8012eca: 4848 ldr r0, [pc, #288] @ (8012fec ) 8012ecc: f00c fd2c bl 801f928 } } // 거의 근접한 경우 그냥 보내버림 if(-step <= WP_Gym.WeightSet[L] - WP_Gym.WeightBLE[L] && WP_Gym.WeightSet[L] - WP_Gym.WeightBLE[L] <= step){ 8012ed0: edd7 7a01 vldr s15, [r7, #4] 8012ed4: eeb1 7a67 vneg.f32 s14, s15 8012ed8: 4b41 ldr r3, [pc, #260] @ (8012fe0 ) 8012eda: edd3 6a03 vldr s13, [r3, #12] 8012ede: 4b40 ldr r3, [pc, #256] @ (8012fe0 ) 8012ee0: edd3 7a01 vldr s15, [r3, #4] 8012ee4: ee76 7ae7 vsub.f32 s15, s13, s15 8012ee8: eeb4 7ae7 vcmpe.f32 s14, s15 8012eec: eef1 fa10 vmrs APSR_nzcv, fpscr 8012ef0: d900 bls.n 8012ef4 Return_4x1byte(WEIGHTPLUS, WP_Gym.WeightSet[L]*2, WP_Gym.WeightMode[L], WP_Gym.WeightSet[R]*2, WP_Gym.WeightMode[R]); } } // (3/19) Eccen 설정을 현재 무게에 대한 %로 변경했으므로, 서로 상호 업데이트 연동이 필요함 } 8012ef2: e071 b.n 8012fd8 if(-step <= WP_Gym.WeightSet[L] - WP_Gym.WeightBLE[L] && WP_Gym.WeightSet[L] - WP_Gym.WeightBLE[L] <= step){ 8012ef4: 4b3a ldr r3, [pc, #232] @ (8012fe0 ) 8012ef6: ed93 7a03 vldr s14, [r3, #12] 8012efa: 4b39 ldr r3, [pc, #228] @ (8012fe0 ) 8012efc: edd3 7a01 vldr s15, [r3, #4] 8012f00: ee77 7a67 vsub.f32 s15, s14, s15 8012f04: ed97 7a01 vldr s14, [r7, #4] 8012f08: eeb4 7ae7 vcmpe.f32 s14, s15 8012f0c: eef1 fa10 vmrs APSR_nzcv, fpscr 8012f10: da00 bge.n 8012f14 } 8012f12: e061 b.n 8012fd8 WP_Gym.WeightSet[L] = WP_Gym.WeightBLE[L]; 8012f14: 4b32 ldr r3, [pc, #200] @ (8012fe0 ) 8012f16: 685b ldr r3, [r3, #4] 8012f18: 4a31 ldr r2, [pc, #196] @ (8012fe0 ) 8012f1a: 60d3 str r3, [r2, #12] if(-step <= WP_Gym.WeightSet[R] - WP_Gym.WeightBLE[R] && WP_Gym.WeightSet[R] - WP_Gym.WeightBLE[R] <= step){ 8012f1c: edd7 7a01 vldr s15, [r7, #4] 8012f20: eeb1 7a67 vneg.f32 s14, s15 8012f24: 4b2e ldr r3, [pc, #184] @ (8012fe0 ) 8012f26: edd3 6a04 vldr s13, [r3, #16] 8012f2a: 4b2d ldr r3, [pc, #180] @ (8012fe0 ) 8012f2c: edd3 7a02 vldr s15, [r3, #8] 8012f30: ee76 7ae7 vsub.f32 s15, s13, s15 8012f34: eeb4 7ae7 vcmpe.f32 s14, s15 8012f38: eef1 fa10 vmrs APSR_nzcv, fpscr 8012f3c: d900 bls.n 8012f40 } 8012f3e: e04b b.n 8012fd8 if(-step <= WP_Gym.WeightSet[R] - WP_Gym.WeightBLE[R] && WP_Gym.WeightSet[R] - WP_Gym.WeightBLE[R] <= step){ 8012f40: 4b27 ldr r3, [pc, #156] @ (8012fe0 ) 8012f42: ed93 7a04 vldr s14, [r3, #16] 8012f46: 4b26 ldr r3, [pc, #152] @ (8012fe0 ) 8012f48: edd3 7a02 vldr s15, [r3, #8] 8012f4c: ee77 7a67 vsub.f32 s15, s14, s15 8012f50: ed97 7a01 vldr s14, [r7, #4] 8012f54: eeb4 7ae7 vcmpe.f32 s14, s15 8012f58: eef1 fa10 vmrs APSR_nzcv, fpscr 8012f5c: da00 bge.n 8012f60 } 8012f5e: e03b b.n 8012fd8 WP_Gym.WeightSet[R] = WP_Gym.WeightBLE[R]; 8012f60: 4b1f ldr r3, [pc, #124] @ (8012fe0 ) 8012f62: 689b ldr r3, [r3, #8] 8012f64: 4a1e ldr r2, [pc, #120] @ (8012fe0 ) 8012f66: 6113 str r3, [r2, #16] Task_Stop_10ms_1(); 8012f68: f00a ff8e bl 801de88 UART3_Puts("Weight: "); 8012f6c: 2200 movs r2, #0 8012f6e: 4920 ldr r1, [pc, #128] @ (8012ff0 ) 8012f70: 481e ldr r0, [pc, #120] @ (8012fec ) 8012f72: f00c fcd9 bl 801f928 UART3_Puts(Float2String(WP_Gym.WeightSet[L],2)); 8012f76: 4b1a ldr r3, [pc, #104] @ (8012fe0 ) 8012f78: edd3 7a03 vldr s15, [r3, #12] 8012f7c: 2002 movs r0, #2 8012f7e: eeb0 0a67 vmov.f32 s0, s15 8012f82: f00d f811 bl 801ffa8 8012f86: 4603 mov r3, r0 8012f88: 2200 movs r2, #0 8012f8a: 4619 mov r1, r3 8012f8c: 4817 ldr r0, [pc, #92] @ (8012fec ) 8012f8e: f00c fccb bl 801f928 UART3_Puts(" [kg]\r\n"); 8012f92: 2200 movs r2, #0 8012f94: 4917 ldr r1, [pc, #92] @ (8012ff4 ) 8012f96: 4815 ldr r0, [pc, #84] @ (8012fec ) 8012f98: f00c fcc6 bl 801f928 Return_4x1byte(WEIGHTPLUS, WP_Gym.WeightSet[L]*2, WP_Gym.WeightMode[L], WP_Gym.WeightSet[R]*2, WP_Gym.WeightMode[R]); 8012f9c: 4b10 ldr r3, [pc, #64] @ (8012fe0 ) 8012f9e: edd3 7a03 vldr s15, [r3, #12] 8012fa2: ee77 7aa7 vadd.f32 s15, s15, s15 8012fa6: eefc 7ae7 vcvt.u32.f32 s15, s15 8012faa: ee17 3a90 vmov r3, s15 8012fae: b299 uxth r1, r3 8012fb0: 4b0b ldr r3, [pc, #44] @ (8012fe0 ) 8012fb2: 781b ldrb r3, [r3, #0] 8012fb4: 4618 mov r0, r3 8012fb6: 4b0a ldr r3, [pc, #40] @ (8012fe0 ) 8012fb8: edd3 7a04 vldr s15, [r3, #16] 8012fbc: ee77 7aa7 vadd.f32 s15, s15, s15 8012fc0: eefc 7ae7 vcvt.u32.f32 s15, s15 8012fc4: ee17 3a90 vmov r3, s15 8012fc8: b29b uxth r3, r3 8012fca: 4a05 ldr r2, [pc, #20] @ (8012fe0 ) 8012fcc: 7852 ldrb r2, [r2, #1] 8012fce: 9200 str r2, [sp, #0] 8012fd0: 4602 mov r2, r0 8012fd2: 2066 movs r0, #102 @ 0x66 8012fd4: f006 ffd6 bl 8019f84 } 8012fd8: bf00 nop 8012fda: 3708 adds r7, #8 8012fdc: 46bd mov sp, r7 8012fde: bd80 pop {r7, pc} 8012fe0: 20000148 .word 0x20000148 8012fe4: 200001d8 .word 0x200001d8 8012fe8: 08029eb4 .word 0x08029eb4 8012fec: 200053ec .word 0x200053ec 8012ff0: 08029ecc .word 0x08029ecc 8012ff4: 08029ed8 .word 0x08029ed8 08012ff8 : int cnt_ConvAng2Pos; uint8_t Debug_HilMode = 0; // [v1.0.4] HIL 모드: 0=실측, 1=position 주입 void ConvAng2Pos (void) { 8012ff8: b480 push {r7} 8012ffa: b085 sub sp, #20 8012ffc: af00 add r7, sp, #0 // cnt_ConvAng2Pos++; // 실측 모드: 엔코더 → Position/Speed 변환 // 단위 : Position [1mm], PositionFine [0.05mm], PositionFine2 [0.1mm] WP_Gym.Position[L] = -WP_Machine.SpoolDiameter *0.5f *(Motor1_Ang.AngleMechAll - WP_Gym.CalibDeg[L]) * TR_ANG2RAD * WP_Machine.SensorGearRatioInv; 8012ffe: 4bb5 ldr r3, [pc, #724] @ (80132d4 ) 8013000: edd3 7a02 vldr s15, [r3, #8] 8013004: eef1 7a67 vneg.f32 s15, s15 8013008: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801300c: ee27 7a87 vmul.f32 s14, s15, s14 8013010: 4bb1 ldr r3, [pc, #708] @ (80132d8 ) 8013012: edd3 6a0c vldr s13, [r3, #48] @ 0x30 8013016: 4bb1 ldr r3, [pc, #708] @ (80132dc ) 8013018: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 801301c: ee76 7ae7 vsub.f32 s15, s13, s15 8013020: ee67 7a27 vmul.f32 s15, s14, s15 8013024: ed9f 7aae vldr s14, [pc, #696] @ 80132e0 8013028: ee27 7a87 vmul.f32 s14, s15, s14 801302c: 4ba9 ldr r3, [pc, #676] @ (80132d4 ) 801302e: edd3 7a01 vldr s15, [r3, #4] 8013032: ee67 7a27 vmul.f32 s15, s14, s15 8013036: eefd 7ae7 vcvt.s32.f32 s15, s15 801303a: ee17 3a90 vmov r3, s15 801303e: b21a sxth r2, r3 8013040: 4ba6 ldr r3, [pc, #664] @ (80132dc ) 8013042: 829a strh r2, [r3, #20] WP_Gym.PositionFine[L] = -20 * WP_Machine.SpoolDiameter *0.5f *(Motor1_Ang.AngleMechAll - WP_Gym.CalibDeg[L]) * TR_ANG2RAD * WP_Machine.SensorGearRatioInv; 8013044: 4ba3 ldr r3, [pc, #652] @ (80132d4 ) 8013046: edd3 7a02 vldr s15, [r3, #8] 801304a: eebb 7a04 vmov.f32 s14, #180 @ 0xc1a00000 -20.0 801304e: ee67 7a87 vmul.f32 s15, s15, s14 8013052: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8013056: ee27 7a87 vmul.f32 s14, s15, s14 801305a: 4b9f ldr r3, [pc, #636] @ (80132d8 ) 801305c: edd3 6a0c vldr s13, [r3, #48] @ 0x30 8013060: 4b9e ldr r3, [pc, #632] @ (80132dc ) 8013062: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 8013066: ee76 7ae7 vsub.f32 s15, s13, s15 801306a: ee67 7a27 vmul.f32 s15, s14, s15 801306e: ed9f 7a9c vldr s14, [pc, #624] @ 80132e0 8013072: ee27 7a87 vmul.f32 s14, s15, s14 8013076: 4b97 ldr r3, [pc, #604] @ (80132d4 ) 8013078: edd3 7a01 vldr s15, [r3, #4] 801307c: ee67 7a27 vmul.f32 s15, s14, s15 8013080: eefd 7ae7 vcvt.s32.f32 s15, s15 8013084: ee17 2a90 vmov r2, s15 8013088: 4b94 ldr r3, [pc, #592] @ (80132dc ) 801308a: 619a str r2, [r3, #24] if(WP_Gym.PositionFine[L] <= 0) WP_Gym.PositionFine[L] = 0; 801308c: 4b93 ldr r3, [pc, #588] @ (80132dc ) 801308e: 699b ldr r3, [r3, #24] 8013090: 2b00 cmp r3, #0 8013092: dc02 bgt.n 801309a 8013094: 4b91 ldr r3, [pc, #580] @ (80132dc ) 8013096: 2200 movs r2, #0 8013098: 619a str r2, [r3, #24] WP_Gym.PositionFine2[L] = -10 * WP_Machine.SpoolDiameter *0.5f *(Motor1_Ang.AngleMechAll - WP_Gym.CalibDeg[L]) * TR_ANG2RAD * WP_Machine.SensorGearRatioInv; 801309a: 4b8e ldr r3, [pc, #568] @ (80132d4 ) 801309c: edd3 7a02 vldr s15, [r3, #8] 80130a0: eeba 7a04 vmov.f32 s14, #164 @ 0xc1200000 -10.0 80130a4: ee67 7a87 vmul.f32 s15, s15, s14 80130a8: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 80130ac: ee27 7a87 vmul.f32 s14, s15, s14 80130b0: 4b89 ldr r3, [pc, #548] @ (80132d8 ) 80130b2: edd3 6a0c vldr s13, [r3, #48] @ 0x30 80130b6: 4b89 ldr r3, [pc, #548] @ (80132dc ) 80130b8: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 80130bc: ee76 7ae7 vsub.f32 s15, s13, s15 80130c0: ee67 7a27 vmul.f32 s15, s14, s15 80130c4: ed9f 7a86 vldr s14, [pc, #536] @ 80132e0 80130c8: ee27 7a87 vmul.f32 s14, s15, s14 80130cc: 4b81 ldr r3, [pc, #516] @ (80132d4 ) 80130ce: edd3 7a01 vldr s15, [r3, #4] 80130d2: ee67 7a27 vmul.f32 s15, s14, s15 80130d6: eefd 7ae7 vcvt.s32.f32 s15, s15 80130da: ee17 2a90 vmov r2, s15 80130de: 4b7f ldr r3, [pc, #508] @ (80132dc ) 80130e0: 621a str r2, [r3, #32] WP_Gym.Position[R] = -WP_Machine.SpoolDiameter *0.5f *(Motor2_Ang.AngleMechAll - WP_Gym.CalibDeg[R]) * TR_ANG2RAD * WP_Machine.SensorGearRatioInv; 80130e2: 4b7c ldr r3, [pc, #496] @ (80132d4 ) 80130e4: edd3 7a02 vldr s15, [r3, #8] 80130e8: eef1 7a67 vneg.f32 s15, s15 80130ec: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 80130f0: ee27 7a87 vmul.f32 s14, s15, s14 80130f4: 4b7b ldr r3, [pc, #492] @ (80132e4 ) 80130f6: edd3 6a0c vldr s13, [r3, #48] @ 0x30 80130fa: 4b78 ldr r3, [pc, #480] @ (80132dc ) 80130fc: edd3 7a14 vldr s15, [r3, #80] @ 0x50 8013100: ee76 7ae7 vsub.f32 s15, s13, s15 8013104: ee67 7a27 vmul.f32 s15, s14, s15 8013108: ed9f 7a75 vldr s14, [pc, #468] @ 80132e0 801310c: ee27 7a87 vmul.f32 s14, s15, s14 8013110: 4b70 ldr r3, [pc, #448] @ (80132d4 ) 8013112: edd3 7a01 vldr s15, [r3, #4] 8013116: ee67 7a27 vmul.f32 s15, s14, s15 801311a: eefd 7ae7 vcvt.s32.f32 s15, s15 801311e: ee17 3a90 vmov r3, s15 8013122: b21a sxth r2, r3 8013124: 4b6d ldr r3, [pc, #436] @ (80132dc ) 8013126: 82da strh r2, [r3, #22] WP_Gym.PositionFine[R] = -20 * WP_Machine.SpoolDiameter *0.5f *(Motor2_Ang.AngleMechAll - WP_Gym.CalibDeg[R]) * TR_ANG2RAD * WP_Machine.SensorGearRatioInv; 8013128: 4b6a ldr r3, [pc, #424] @ (80132d4 ) 801312a: edd3 7a02 vldr s15, [r3, #8] 801312e: eebb 7a04 vmov.f32 s14, #180 @ 0xc1a00000 -20.0 8013132: ee67 7a87 vmul.f32 s15, s15, s14 8013136: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801313a: ee27 7a87 vmul.f32 s14, s15, s14 801313e: 4b69 ldr r3, [pc, #420] @ (80132e4 ) 8013140: edd3 6a0c vldr s13, [r3, #48] @ 0x30 8013144: 4b65 ldr r3, [pc, #404] @ (80132dc ) 8013146: edd3 7a14 vldr s15, [r3, #80] @ 0x50 801314a: ee76 7ae7 vsub.f32 s15, s13, s15 801314e: ee67 7a27 vmul.f32 s15, s14, s15 8013152: ed9f 7a63 vldr s14, [pc, #396] @ 80132e0 8013156: ee27 7a87 vmul.f32 s14, s15, s14 801315a: 4b5e ldr r3, [pc, #376] @ (80132d4 ) 801315c: edd3 7a01 vldr s15, [r3, #4] 8013160: ee67 7a27 vmul.f32 s15, s14, s15 8013164: eefd 7ae7 vcvt.s32.f32 s15, s15 8013168: ee17 2a90 vmov r2, s15 801316c: 4b5b ldr r3, [pc, #364] @ (80132dc ) 801316e: 61da str r2, [r3, #28] if(WP_Gym.PositionFine[R] <= 0) WP_Gym.PositionFine[R] = 0; 8013170: 4b5a ldr r3, [pc, #360] @ (80132dc ) 8013172: 69db ldr r3, [r3, #28] 8013174: 2b00 cmp r3, #0 8013176: dc02 bgt.n 801317e 8013178: 4b58 ldr r3, [pc, #352] @ (80132dc ) 801317a: 2200 movs r2, #0 801317c: 61da str r2, [r3, #28] WP_Gym.PositionFine2[R] = -10 * WP_Machine.SpoolDiameter *0.5f *(Motor2_Ang.AngleMechAll - WP_Gym.CalibDeg[R]) * TR_ANG2RAD * WP_Machine.SensorGearRatioInv; 801317e: 4b55 ldr r3, [pc, #340] @ (80132d4 ) 8013180: edd3 7a02 vldr s15, [r3, #8] 8013184: eeba 7a04 vmov.f32 s14, #164 @ 0xc1200000 -10.0 8013188: ee67 7a87 vmul.f32 s15, s15, s14 801318c: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8013190: ee27 7a87 vmul.f32 s14, s15, s14 8013194: 4b53 ldr r3, [pc, #332] @ (80132e4 ) 8013196: edd3 6a0c vldr s13, [r3, #48] @ 0x30 801319a: 4b50 ldr r3, [pc, #320] @ (80132dc ) 801319c: edd3 7a14 vldr s15, [r3, #80] @ 0x50 80131a0: ee76 7ae7 vsub.f32 s15, s13, s15 80131a4: ee67 7a27 vmul.f32 s15, s14, s15 80131a8: ed9f 7a4d vldr s14, [pc, #308] @ 80132e0 80131ac: ee27 7a87 vmul.f32 s14, s15, s14 80131b0: 4b48 ldr r3, [pc, #288] @ (80132d4 ) 80131b2: edd3 7a01 vldr s15, [r3, #4] 80131b6: ee67 7a27 vmul.f32 s15, s14, s15 80131ba: eefd 7ae7 vcvt.s32.f32 s15, s15 80131be: ee17 2a90 vmov r2, s15 80131c2: 4b46 ldr r3, [pc, #280] @ (80132dc ) 80131c4: 625a str r2, [r3, #36] @ 0x24 WP_Gym.Speed[L] = -WP_Machine.SpoolDiameter *0.5f * (Motor1_Ang.RpmFil *TR_RPM2RAD) * WP_Machine.SensorGearRatioInv; 80131c6: 4b43 ldr r3, [pc, #268] @ (80132d4 ) 80131c8: edd3 7a02 vldr s15, [r3, #8] 80131cc: eef1 7a67 vneg.f32 s15, s15 80131d0: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 80131d4: ee27 7a87 vmul.f32 s14, s15, s14 80131d8: 4b3f ldr r3, [pc, #252] @ (80132d8 ) 80131da: edd3 7a11 vldr s15, [r3, #68] @ 0x44 80131de: eddf 6a42 vldr s13, [pc, #264] @ 80132e8 80131e2: ee67 7aa6 vmul.f32 s15, s15, s13 80131e6: ee27 7a27 vmul.f32 s14, s14, s15 80131ea: 4b3a ldr r3, [pc, #232] @ (80132d4 ) 80131ec: edd3 7a01 vldr s15, [r3, #4] 80131f0: ee67 7a27 vmul.f32 s15, s14, s15 80131f4: 4b39 ldr r3, [pc, #228] @ (80132dc ) 80131f6: edc3 7a15 vstr s15, [r3, #84] @ 0x54 WP_Gym.Speed[R] = -WP_Machine.SpoolDiameter *0.5f * (Motor2_Ang.RpmFil *TR_RPM2RAD) * WP_Machine.SensorGearRatioInv; 80131fa: 4b36 ldr r3, [pc, #216] @ (80132d4 ) 80131fc: edd3 7a02 vldr s15, [r3, #8] 8013200: eef1 7a67 vneg.f32 s15, s15 8013204: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8013208: ee27 7a87 vmul.f32 s14, s15, s14 801320c: 4b35 ldr r3, [pc, #212] @ (80132e4 ) 801320e: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8013212: eddf 6a35 vldr s13, [pc, #212] @ 80132e8 8013216: ee67 7aa6 vmul.f32 s15, s15, s13 801321a: ee27 7a27 vmul.f32 s14, s14, s15 801321e: 4b2d ldr r3, [pc, #180] @ (80132d4 ) 8013220: edd3 7a01 vldr s15, [r3, #4] 8013224: ee67 7a27 vmul.f32 s15, s14, s15 8013228: 4b2c ldr r3, [pc, #176] @ (80132dc ) 801322a: edc3 7a16 vstr s15, [r3, #88] @ 0x58 // 가속도 계산 (10kHz, LPF 적용된 Speed 미분) float dt_inv = 10000.0f; // 1/dt = 1/0.0001 801322e: 4b2f ldr r3, [pc, #188] @ (80132ec ) 8013230: 60bb str r3, [r7, #8] float alpha = 0.02f; // LPF α (fc≈32Hz @10kHz) 8013232: 4b2f ldr r3, [pc, #188] @ (80132f0 ) 8013234: 607b str r3, [r7, #4] for (int s = 0; s < 2; s++) { 8013236: 2300 movs r3, #0 8013238: 60fb str r3, [r7, #12] 801323a: e040 b.n 80132be float rawAcc = (WP_Gym.Speed[s] - DevReport_PrevSpd[s]) * dt_inv; 801323c: 4a27 ldr r2, [pc, #156] @ (80132dc ) 801323e: 68fb ldr r3, [r7, #12] 8013240: 3314 adds r3, #20 8013242: 009b lsls r3, r3, #2 8013244: 4413 add r3, r2 8013246: 3304 adds r3, #4 8013248: ed93 7a00 vldr s14, [r3] 801324c: 4a29 ldr r2, [pc, #164] @ (80132f4 ) 801324e: 68fb ldr r3, [r7, #12] 8013250: 009b lsls r3, r3, #2 8013252: 4413 add r3, r2 8013254: edd3 7a00 vldr s15, [r3] 8013258: ee77 7a67 vsub.f32 s15, s14, s15 801325c: ed97 7a02 vldr s14, [r7, #8] 8013260: ee67 7a27 vmul.f32 s15, s14, s15 8013264: edc7 7a00 vstr s15, [r7] DevReport_Accel[s] += alpha * (rawAcc - DevReport_Accel[s]); // 1차 LPF 8013268: 4a23 ldr r2, [pc, #140] @ (80132f8 ) 801326a: 68fb ldr r3, [r7, #12] 801326c: 009b lsls r3, r3, #2 801326e: 4413 add r3, r2 8013270: ed93 7a00 vldr s14, [r3] 8013274: 4a20 ldr r2, [pc, #128] @ (80132f8 ) 8013276: 68fb ldr r3, [r7, #12] 8013278: 009b lsls r3, r3, #2 801327a: 4413 add r3, r2 801327c: edd3 7a00 vldr s15, [r3] 8013280: edd7 6a00 vldr s13, [r7] 8013284: ee76 6ae7 vsub.f32 s13, s13, s15 8013288: edd7 7a01 vldr s15, [r7, #4] 801328c: ee66 7aa7 vmul.f32 s15, s13, s15 8013290: ee77 7a27 vadd.f32 s15, s14, s15 8013294: 4a18 ldr r2, [pc, #96] @ (80132f8 ) 8013296: 68fb ldr r3, [r7, #12] 8013298: 009b lsls r3, r3, #2 801329a: 4413 add r3, r2 801329c: edc3 7a00 vstr s15, [r3] DevReport_PrevSpd[s] = WP_Gym.Speed[s]; 80132a0: 4a0e ldr r2, [pc, #56] @ (80132dc ) 80132a2: 68fb ldr r3, [r7, #12] 80132a4: 3314 adds r3, #20 80132a6: 009b lsls r3, r3, #2 80132a8: 4413 add r3, r2 80132aa: 3304 adds r3, #4 80132ac: 681a ldr r2, [r3, #0] 80132ae: 4911 ldr r1, [pc, #68] @ (80132f4 ) 80132b0: 68fb ldr r3, [r7, #12] 80132b2: 009b lsls r3, r3, #2 80132b4: 440b add r3, r1 80132b6: 601a str r2, [r3, #0] for (int s = 0; s < 2; s++) { 80132b8: 68fb ldr r3, [r7, #12] 80132ba: 3301 adds r3, #1 80132bc: 60fb str r3, [r7, #12] 80132be: 68fb ldr r3, [r7, #12] 80132c0: 2b01 cmp r3, #1 80132c2: ddbb ble.n 801323c } } 80132c4: bf00 nop 80132c6: bf00 nop 80132c8: 3714 adds r7, #20 80132ca: 46bd mov sp, r7 80132cc: f85d 7b04 ldr.w r7, [sp], #4 80132d0: 4770 bx lr 80132d2: bf00 nop 80132d4: 20000110 .word 0x20000110 80132d8: 2000047c .word 0x2000047c 80132dc: 20000148 .word 0x20000148 80132e0: 3c8efa35 .word 0x3c8efa35 80132e4: 200004f8 .word 0x200004f8 80132e8: 3dd6773b .word 0x3dd6773b 80132ec: 461c4000 .word 0x461c4000 80132f0: 3ca3d70a .word 0x3ca3d70a 80132f4: 20000368 .word 0x20000368 80132f8: 20000360 .word 0x20000360 080132fc : void ConvAng2Pos_HIL(void) { 80132fc: b480 push {r7} 80132fe: af00 add r7, sp, #0 // HIL 모드: PositionFine은 0xF5 03 핸들러에서 주입됨 (0.05mm) // 나머지 단위만 동기화 WP_Gym.Position[L] = WP_Gym.PositionFine[L] / 20; // 1mm 8013300: 4b15 ldr r3, [pc, #84] @ (8013358 ) 8013302: 699b ldr r3, [r3, #24] 8013304: 4a15 ldr r2, [pc, #84] @ (801335c ) 8013306: fb82 1203 smull r1, r2, r2, r3 801330a: 10d2 asrs r2, r2, #3 801330c: 17db asrs r3, r3, #31 801330e: 1ad3 subs r3, r2, r3 8013310: b21a sxth r2, r3 8013312: 4b11 ldr r3, [pc, #68] @ (8013358 ) 8013314: 829a strh r2, [r3, #20] WP_Gym.PositionFine2[L] = WP_Gym.PositionFine[L] / 2; // 0.1mm 8013316: 4b10 ldr r3, [pc, #64] @ (8013358 ) 8013318: 699b ldr r3, [r3, #24] 801331a: 0fda lsrs r2, r3, #31 801331c: 4413 add r3, r2 801331e: 105b asrs r3, r3, #1 8013320: 461a mov r2, r3 8013322: 4b0d ldr r3, [pc, #52] @ (8013358 ) 8013324: 621a str r2, [r3, #32] WP_Gym.Position[R] = WP_Gym.PositionFine[R] / 20; 8013326: 4b0c ldr r3, [pc, #48] @ (8013358 ) 8013328: 69db ldr r3, [r3, #28] 801332a: 4a0c ldr r2, [pc, #48] @ (801335c ) 801332c: fb82 1203 smull r1, r2, r2, r3 8013330: 10d2 asrs r2, r2, #3 8013332: 17db asrs r3, r3, #31 8013334: 1ad3 subs r3, r2, r3 8013336: b21a sxth r2, r3 8013338: 4b07 ldr r3, [pc, #28] @ (8013358 ) 801333a: 82da strh r2, [r3, #22] WP_Gym.PositionFine2[R] = WP_Gym.PositionFine[R] / 2; 801333c: 4b06 ldr r3, [pc, #24] @ (8013358 ) 801333e: 69db ldr r3, [r3, #28] 8013340: 0fda lsrs r2, r3, #31 8013342: 4413 add r3, r2 8013344: 105b asrs r3, r3, #1 8013346: 461a mov r2, r3 8013348: 4b03 ldr r3, [pc, #12] @ (8013358 ) 801334a: 625a str r2, [r3, #36] @ 0x24 // Speed는 0xF5 03 핸들러에서 직접 주입 — 여기선 건드리지 않음 } 801334c: bf00 nop 801334e: 46bd mov sp, r7 8013350: f85d 7b04 ldr.w r7, [sp], #4 8013354: 4770 bx lr 8013356: bf00 nop 8013358: 20000148 .word 0x20000148 801335c: 66666667 .word 0x66666667 08013360 : void PositionCalibrate (uint8_t side) // 가동범위 세팅 완료 후 '바닥면' 캘리브레이션 기능으로 변경해야 함!! (23.11.22) { 8013360: b580 push {r7, lr} 8013362: b082 sub sp, #8 8013364: af00 add r7, sp, #0 8013366: 4603 mov r3, r0 8013368: 71fb strb r3, [r7, #7] switch (side){ 801336a: 79fb ldrb r3, [r7, #7] 801336c: 2b02 cmp r3, #2 801336e: d024 beq.n 80133ba 8013370: 2b02 cmp r3, #2 8013372: dc35 bgt.n 80133e0 8013374: 2b00 cmp r3, #0 8013376: d002 beq.n 801337e 8013378: 2b01 cmp r3, #1 801337a: d00f beq.n 801339c delay_msec(WP_UserSetting.TimeCali); WP_Gym.CalibDeg[L] = Motor1_Ang.AngleMechAll; WP_Gym.CalibDeg[R] = Motor2_Ang.AngleMechAll; break; } } 801337c: e030 b.n 80133e0 delay_msec(WP_UserSetting.TimeCali); 801337e: 4b1a ldr r3, [pc, #104] @ (80133e8 ) 8013380: 881b ldrh r3, [r3, #0] 8013382: 461a mov r2, r3 8013384: f243 43bc movw r3, #13500 @ 0x34bc 8013388: fb02 f303 mul.w r3, r2, r3 801338c: 4618 mov r0, r3 801338e: f00a fbc3 bl 801db18 <_delay> WP_Gym.CalibDeg[L] = Motor1_Ang.AngleMechAll; 8013392: 4b16 ldr r3, [pc, #88] @ (80133ec ) 8013394: 6b1b ldr r3, [r3, #48] @ 0x30 8013396: 4a16 ldr r2, [pc, #88] @ (80133f0 ) 8013398: 64d3 str r3, [r2, #76] @ 0x4c break; 801339a: e021 b.n 80133e0 delay_msec(WP_UserSetting.TimeCali); 801339c: 4b12 ldr r3, [pc, #72] @ (80133e8 ) 801339e: 881b ldrh r3, [r3, #0] 80133a0: 461a mov r2, r3 80133a2: f243 43bc movw r3, #13500 @ 0x34bc 80133a6: fb02 f303 mul.w r3, r2, r3 80133aa: 4618 mov r0, r3 80133ac: f00a fbb4 bl 801db18 <_delay> WP_Gym.CalibDeg[R] = Motor2_Ang.AngleMechAll; 80133b0: 4b10 ldr r3, [pc, #64] @ (80133f4 ) 80133b2: 6b1b ldr r3, [r3, #48] @ 0x30 80133b4: 4a0e ldr r2, [pc, #56] @ (80133f0 ) 80133b6: 6513 str r3, [r2, #80] @ 0x50 break; 80133b8: e012 b.n 80133e0 delay_msec(WP_UserSetting.TimeCali); 80133ba: 4b0b ldr r3, [pc, #44] @ (80133e8 ) 80133bc: 881b ldrh r3, [r3, #0] 80133be: 461a mov r2, r3 80133c0: f243 43bc movw r3, #13500 @ 0x34bc 80133c4: fb02 f303 mul.w r3, r2, r3 80133c8: 4618 mov r0, r3 80133ca: f00a fba5 bl 801db18 <_delay> WP_Gym.CalibDeg[L] = Motor1_Ang.AngleMechAll; 80133ce: 4b07 ldr r3, [pc, #28] @ (80133ec ) 80133d0: 6b1b ldr r3, [r3, #48] @ 0x30 80133d2: 4a07 ldr r2, [pc, #28] @ (80133f0 ) 80133d4: 64d3 str r3, [r2, #76] @ 0x4c WP_Gym.CalibDeg[R] = Motor2_Ang.AngleMechAll; 80133d6: 4b07 ldr r3, [pc, #28] @ (80133f4 ) 80133d8: 6b1b ldr r3, [r3, #48] @ 0x30 80133da: 4a05 ldr r2, [pc, #20] @ (80133f0 ) 80133dc: 6513 str r3, [r2, #80] @ 0x50 break; 80133de: bf00 nop } 80133e0: bf00 nop 80133e2: 3708 adds r7, #8 80133e4: 46bd mov sp, r7 80133e6: bd80 pop {r7, pc} 80133e8: 2000027c .word 0x2000027c 80133ec: 2000047c .word 0x2000047c 80133f0: 20000148 .word 0x20000148 80133f4: 200004f8 .word 0x200004f8 080133f8 : void SetRange(uint8_t side, uint8_t Point) { 80133f8: b580 push {r7, lr} 80133fa: b082 sub sp, #8 80133fc: af00 add r7, sp, #0 80133fe: 4603 mov r3, r0 8013400: 460a mov r2, r1 8013402: 71fb strb r3, [r7, #7] 8013404: 4613 mov r3, r2 8013406: 71bb strb r3, [r7, #6] switch (Point) { 8013408: 79bb ldrb r3, [r7, #6] 801340a: 2b00 cmp r3, #0 801340c: d002 beq.n 8013414 801340e: 2b01 cmp r3, #1 8013410: d061 beq.n 80134d6 } else{ UART3_Puts("Err: Too Close to RangeLo (Left)\r\n"); } break; } } 8013412: e0a2 b.n 801355a if (WP_Gym.Position[side] > WP_Gym.Region.H_shock + WP_Gym.Region.L_soft) { 8013414: 79fb ldrb r3, [r7, #7] 8013416: 4a53 ldr r2, [pc, #332] @ (8013564 ) 8013418: 3308 adds r3, #8 801341a: 005b lsls r3, r3, #1 801341c: 4413 add r3, r2 801341e: f9b3 3004 ldrsh.w r3, [r3, #4] 8013422: 461a mov r2, r3 8013424: 4b4f ldr r3, [pc, #316] @ (8013564 ) 8013426: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 801342a: 4619 mov r1, r3 801342c: 4b4d ldr r3, [pc, #308] @ (8013564 ) 801342e: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8013432: 440b add r3, r1 8013434: 429a cmp r2, r3 8013436: dd2c ble.n 8013492 WP_Gym.Region.RangeLo[side] = WP_Gym.Position[side] + WP_Gym.Region.L_soft; 8013438: 79fb ldrb r3, [r7, #7] 801343a: 4a4a ldr r2, [pc, #296] @ (8013564 ) 801343c: 3308 adds r3, #8 801343e: 005b lsls r3, r3, #1 8013440: 4413 add r3, r2 8013442: f9b3 3004 ldrsh.w r3, [r3, #4] 8013446: b29a uxth r2, r3 8013448: 4b46 ldr r3, [pc, #280] @ (8013564 ) 801344a: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 801344e: b29b uxth r3, r3 8013450: 4413 add r3, r2 8013452: b29a uxth r2, r3 8013454: 79fb ldrb r3, [r7, #7] 8013456: b211 sxth r1, r2 8013458: 4a42 ldr r2, [pc, #264] @ (8013564 ) 801345a: 3314 adds r3, #20 801345c: 005b lsls r3, r3, #1 801345e: 4413 add r3, r2 8013460: 460a mov r2, r1 8013462: 811a strh r2, [r3, #8] WP_Gym.Region.H_LoSoft[side] = WP_Gym.Region.RangeLo[side] - WP_Gym.Region.L_soft; 8013464: 79fb ldrb r3, [r7, #7] 8013466: 4a3f ldr r2, [pc, #252] @ (8013564 ) 8013468: 3314 adds r3, #20 801346a: 005b lsls r3, r3, #1 801346c: 4413 add r3, r2 801346e: f9b3 3008 ldrsh.w r3, [r3, #8] 8013472: b29a uxth r2, r3 8013474: 4b3b ldr r3, [pc, #236] @ (8013564 ) 8013476: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 801347a: b29b uxth r3, r3 801347c: 1ad3 subs r3, r2, r3 801347e: b29a uxth r2, r3 8013480: 79fb ldrb r3, [r7, #7] 8013482: b211 sxth r1, r2 8013484: 4a37 ldr r2, [pc, #220] @ (8013564 ) 8013486: 3314 adds r3, #20 8013488: 005b lsls r3, r3, #1 801348a: 4413 add r3, r2 801348c: 460a mov r2, r1 801348e: 809a strh r2, [r3, #4] break; 8013490: e063 b.n 801355a UART3_Puts("Err: Too Close to Base (Left)\r\n"); 8013492: 2200 movs r2, #0 8013494: 4934 ldr r1, [pc, #208] @ (8013568 ) 8013496: 4835 ldr r0, [pc, #212] @ (801356c ) 8013498: f00c fa46 bl 801f928 WP_Gym.Region.RangeLo[side] = WP_Gym.Region.H_shock + WP_Gym.Region.L_soft; 801349c: 4b31 ldr r3, [pc, #196] @ (8013564 ) 801349e: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 80134a2: b29a uxth r2, r3 80134a4: 4b2f ldr r3, [pc, #188] @ (8013564 ) 80134a6: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 80134aa: b29b uxth r3, r3 80134ac: 4413 add r3, r2 80134ae: b29a uxth r2, r3 80134b0: 79fb ldrb r3, [r7, #7] 80134b2: b211 sxth r1, r2 80134b4: 4a2b ldr r2, [pc, #172] @ (8013564 ) 80134b6: 3314 adds r3, #20 80134b8: 005b lsls r3, r3, #1 80134ba: 4413 add r3, r2 80134bc: 460a mov r2, r1 80134be: 811a strh r2, [r3, #8] WP_Gym.Region.H_LoSoft[side] = WP_Gym.Region.H_shock; 80134c0: 79fb ldrb r3, [r7, #7] 80134c2: 4a28 ldr r2, [pc, #160] @ (8013564 ) 80134c4: f9b2 1040 ldrsh.w r1, [r2, #64] @ 0x40 80134c8: 4a26 ldr r2, [pc, #152] @ (8013564 ) 80134ca: 3314 adds r3, #20 80134cc: 005b lsls r3, r3, #1 80134ce: 4413 add r3, r2 80134d0: 460a mov r2, r1 80134d2: 809a strh r2, [r3, #4] break; 80134d4: e041 b.n 801355a if (WP_Gym.Position[side] > WP_Gym.Region.RangeLo[side] + WP_Gym.Region.L_RangeMin) { 80134d6: 79fb ldrb r3, [r7, #7] 80134d8: 4a22 ldr r2, [pc, #136] @ (8013564 ) 80134da: 3308 adds r3, #8 80134dc: 005b lsls r3, r3, #1 80134de: 4413 add r3, r2 80134e0: f9b3 3004 ldrsh.w r3, [r3, #4] 80134e4: 4619 mov r1, r3 80134e6: 79fb ldrb r3, [r7, #7] 80134e8: 4a1e ldr r2, [pc, #120] @ (8013564 ) 80134ea: 3314 adds r3, #20 80134ec: 005b lsls r3, r3, #1 80134ee: 4413 add r3, r2 80134f0: f9b3 3008 ldrsh.w r3, [r3, #8] 80134f4: 461a mov r2, r3 80134f6: 4b1b ldr r3, [pc, #108] @ (8013564 ) 80134f8: f9b3 3048 ldrsh.w r3, [r3, #72] @ 0x48 80134fc: 4413 add r3, r2 80134fe: 4299 cmp r1, r3 8013500: dd25 ble.n 801354e WP_Gym.Region.RangeHi[side] = WP_Gym.Position[side]; 8013502: 79fb ldrb r3, [r7, #7] 8013504: 79fa ldrb r2, [r7, #7] 8013506: 4917 ldr r1, [pc, #92] @ (8013564 ) 8013508: 3308 adds r3, #8 801350a: 005b lsls r3, r3, #1 801350c: 440b add r3, r1 801350e: f9b3 0004 ldrsh.w r0, [r3, #4] 8013512: 4914 ldr r1, [pc, #80] @ (8013564 ) 8013514: f102 0318 add.w r3, r2, #24 8013518: 005b lsls r3, r3, #1 801351a: 440b add r3, r1 801351c: 4602 mov r2, r0 801351e: 809a strh r2, [r3, #4] WP_Gym.Region.H_HiSoft[side] = WP_Gym.Region.RangeHi[side] + WP_Gym.Region.L_soft; 8013520: 79fb ldrb r3, [r7, #7] 8013522: 4a10 ldr r2, [pc, #64] @ (8013564 ) 8013524: 3318 adds r3, #24 8013526: 005b lsls r3, r3, #1 8013528: 4413 add r3, r2 801352a: f9b3 3004 ldrsh.w r3, [r3, #4] 801352e: b29a uxth r2, r3 8013530: 4b0c ldr r3, [pc, #48] @ (8013564 ) 8013532: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8013536: b29b uxth r3, r3 8013538: 4413 add r3, r2 801353a: b29a uxth r2, r3 801353c: 79fb ldrb r3, [r7, #7] 801353e: b211 sxth r1, r2 8013540: 4a08 ldr r2, [pc, #32] @ (8013564 ) 8013542: 3318 adds r3, #24 8013544: 005b lsls r3, r3, #1 8013546: 4413 add r3, r2 8013548: 460a mov r2, r1 801354a: 811a strh r2, [r3, #8] break; 801354c: e004 b.n 8013558 UART3_Puts("Err: Too Close to RangeLo (Left)\r\n"); 801354e: 2200 movs r2, #0 8013550: 4907 ldr r1, [pc, #28] @ (8013570 ) 8013552: 4806 ldr r0, [pc, #24] @ (801356c ) 8013554: f00c f9e8 bl 801f928 break; 8013558: bf00 nop } 801355a: bf00 nop 801355c: 3708 adds r7, #8 801355e: 46bd mov sp, r7 8013560: bd80 pop {r7, pc} 8013562: bf00 nop 8013564: 20000148 .word 0x20000148 8013568: 08029ee0 .word 0x08029ee0 801356c: 200053ec .word 0x200053ec 8013570: 08029f00 .word 0x08029f00 08013574 : //uint32_t SetRangeTemp[3], cnt_SetRangeDigit; void SetRangeDigit(uint8_t side, uint8_t Point, uint16_t Position){ 8013574: b580 push {r7, lr} 8013576: b082 sub sp, #8 8013578: af00 add r7, sp, #0 801357a: 4603 mov r3, r0 801357c: 71fb strb r3, [r7, #7] 801357e: 460b mov r3, r1 8013580: 71bb strb r3, [r7, #6] 8013582: 4613 mov r3, r2 8013584: 80bb strh r3, [r7, #4] // SetRangeTemp[0] = side; // SetRangeTemp[1] = Point; // SetRangeTemp[2] = Position; switch (Point) { 8013586: 79bb ldrb r3, [r7, #6] 8013588: 2b00 cmp r3, #0 801358a: d002 beq.n 8013592 801358c: 2b01 cmp r3, #1 801358e: d048 beq.n 8013622 WP_Gym.Region.RangeError = 2; } break; } // cnt_SetRangeDigit++; } 8013590: e084 b.n 801369c if (WP_Gym.Region.H_shock + WP_Gym.Region.L_soft < Position && Position < WP_Gym.Region.RangeHi[side] - WP_Gym.Region.L_RangeMin) { 8013592: 4b44 ldr r3, [pc, #272] @ (80136a4 ) 8013594: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40 8013598: 461a mov r2, r3 801359a: 4b42 ldr r3, [pc, #264] @ (80136a4 ) 801359c: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 80135a0: 441a add r2, r3 80135a2: 88bb ldrh r3, [r7, #4] 80135a4: 429a cmp r2, r3 80135a6: da32 bge.n 801360e 80135a8: 88ba ldrh r2, [r7, #4] 80135aa: 79fb ldrb r3, [r7, #7] 80135ac: 493d ldr r1, [pc, #244] @ (80136a4 ) 80135ae: 3318 adds r3, #24 80135b0: 005b lsls r3, r3, #1 80135b2: 440b add r3, r1 80135b4: f9b3 3004 ldrsh.w r3, [r3, #4] 80135b8: 4619 mov r1, r3 80135ba: 4b3a ldr r3, [pc, #232] @ (80136a4 ) 80135bc: f9b3 3048 ldrsh.w r3, [r3, #72] @ 0x48 80135c0: 1acb subs r3, r1, r3 80135c2: 429a cmp r2, r3 80135c4: da23 bge.n 801360e WP_Gym.Region.RangeLo[side] = Position; 80135c6: 79fb ldrb r3, [r7, #7] 80135c8: f9b7 1004 ldrsh.w r1, [r7, #4] 80135cc: 4a35 ldr r2, [pc, #212] @ (80136a4 ) 80135ce: 3314 adds r3, #20 80135d0: 005b lsls r3, r3, #1 80135d2: 4413 add r3, r2 80135d4: 460a mov r2, r1 80135d6: 811a strh r2, [r3, #8] WP_Gym.Region.H_LoSoft[side] = WP_Gym.Region.RangeLo[side] - WP_Gym.Region.L_soft; 80135d8: 79fb ldrb r3, [r7, #7] 80135da: 4a32 ldr r2, [pc, #200] @ (80136a4 ) 80135dc: 3314 adds r3, #20 80135de: 005b lsls r3, r3, #1 80135e0: 4413 add r3, r2 80135e2: f9b3 3008 ldrsh.w r3, [r3, #8] 80135e6: b29a uxth r2, r3 80135e8: 4b2e ldr r3, [pc, #184] @ (80136a4 ) 80135ea: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 80135ee: b29b uxth r3, r3 80135f0: 1ad3 subs r3, r2, r3 80135f2: b29a uxth r2, r3 80135f4: 79fb ldrb r3, [r7, #7] 80135f6: b211 sxth r1, r2 80135f8: 4a2a ldr r2, [pc, #168] @ (80136a4 ) 80135fa: 3314 adds r3, #20 80135fc: 005b lsls r3, r3, #1 80135fe: 4413 add r3, r2 8013600: 460a mov r2, r1 8013602: 809a strh r2, [r3, #4] WP_Gym.Region.RangeError = 0; 8013604: 4b27 ldr r3, [pc, #156] @ (80136a4 ) 8013606: 2200 movs r2, #0 8013608: f883 204a strb.w r2, [r3, #74] @ 0x4a break; 801360c: e046 b.n 801369c UART3_Puts("Err: Too Close to Base or High\r\n"); 801360e: 2200 movs r2, #0 8013610: 4925 ldr r1, [pc, #148] @ (80136a8 ) 8013612: 4826 ldr r0, [pc, #152] @ (80136ac ) 8013614: f00c f988 bl 801f928 WP_Gym.Region.RangeError = 2; 8013618: 4b22 ldr r3, [pc, #136] @ (80136a4 ) 801361a: 2202 movs r2, #2 801361c: f883 204a strb.w r2, [r3, #74] @ 0x4a break; 8013620: e03c b.n 801369c if (Position > WP_Gym.Region.RangeLo[side] + WP_Gym.Region.L_RangeMin) { 8013622: 88ba ldrh r2, [r7, #4] 8013624: 79fb ldrb r3, [r7, #7] 8013626: 491f ldr r1, [pc, #124] @ (80136a4 ) 8013628: 3314 adds r3, #20 801362a: 005b lsls r3, r3, #1 801362c: 440b add r3, r1 801362e: f9b3 3008 ldrsh.w r3, [r3, #8] 8013632: 4619 mov r1, r3 8013634: 4b1b ldr r3, [pc, #108] @ (80136a4 ) 8013636: f9b3 3048 ldrsh.w r3, [r3, #72] @ 0x48 801363a: 440b add r3, r1 801363c: 429a cmp r2, r3 801363e: dd23 ble.n 8013688 WP_Gym.Region.RangeHi[side] = Position; 8013640: 79fb ldrb r3, [r7, #7] 8013642: f9b7 1004 ldrsh.w r1, [r7, #4] 8013646: 4a17 ldr r2, [pc, #92] @ (80136a4 ) 8013648: 3318 adds r3, #24 801364a: 005b lsls r3, r3, #1 801364c: 4413 add r3, r2 801364e: 460a mov r2, r1 8013650: 809a strh r2, [r3, #4] WP_Gym.Region.H_HiSoft[side] = WP_Gym.Region.RangeHi[side] + WP_Gym.Region.L_soft; 8013652: 79fb ldrb r3, [r7, #7] 8013654: 4a13 ldr r2, [pc, #76] @ (80136a4 ) 8013656: 3318 adds r3, #24 8013658: 005b lsls r3, r3, #1 801365a: 4413 add r3, r2 801365c: f9b3 3004 ldrsh.w r3, [r3, #4] 8013660: b29a uxth r2, r3 8013662: 4b10 ldr r3, [pc, #64] @ (80136a4 ) 8013664: f9b3 3042 ldrsh.w r3, [r3, #66] @ 0x42 8013668: b29b uxth r3, r3 801366a: 4413 add r3, r2 801366c: b29a uxth r2, r3 801366e: 79fb ldrb r3, [r7, #7] 8013670: b211 sxth r1, r2 8013672: 4a0c ldr r2, [pc, #48] @ (80136a4 ) 8013674: 3318 adds r3, #24 8013676: 005b lsls r3, r3, #1 8013678: 4413 add r3, r2 801367a: 460a mov r2, r1 801367c: 811a strh r2, [r3, #8] WP_Gym.Region.RangeError = 0; 801367e: 4b09 ldr r3, [pc, #36] @ (80136a4 ) 8013680: 2200 movs r2, #0 8013682: f883 204a strb.w r2, [r3, #74] @ 0x4a break; 8013686: e008 b.n 801369a UART3_Puts("Err: Too Close to RangeLo (Left)\r\n"); 8013688: 2200 movs r2, #0 801368a: 4909 ldr r1, [pc, #36] @ (80136b0 ) 801368c: 4807 ldr r0, [pc, #28] @ (80136ac ) 801368e: f00c f94b bl 801f928 WP_Gym.Region.RangeError = 2; 8013692: 4b04 ldr r3, [pc, #16] @ (80136a4 ) 8013694: 2202 movs r2, #2 8013696: f883 204a strb.w r2, [r3, #74] @ 0x4a break; 801369a: bf00 nop } 801369c: bf00 nop 801369e: 3708 adds r7, #8 80136a0: 46bd mov sp, r7 80136a2: bd80 pop {r7, pc} 80136a4: 20000148 .word 0x20000148 80136a8: 08029f24 .word 0x08029f24 80136ac: 200053ec .word 0x200053ec 80136b0: 08029f00 .word 0x08029f00 080136b4 : int Time_StopAutoOff = 50000; int Temp_OnOffStatus = 0; // 테스트용 대체 OnOffStatus int check_MotionAutoWeight; void MotionAutoWeight (void) { 80136b4: b480 push {r7} 80136b6: af00 add r7, sp, #0 if(Debug_HilMode) return; // HIL: 자동 ON/OFF 비활성 80136b8: 4baa ldr r3, [pc, #680] @ (8013964 ) 80136ba: 781b ldrb r3, [r3, #0] 80136bc: 2b00 cmp r3, #0 80136be: f040 814a bne.w 8013956 check_MotionAutoWeight++; 80136c2: 4ba9 ldr r3, [pc, #676] @ (8013968 ) 80136c4: 681b ldr r3, [r3, #0] 80136c6: 3301 adds r3, #1 80136c8: 4aa7 ldr r2, [pc, #668] @ (8013968 ) 80136ca: 6013 str r3, [r2, #0] // OnOffStatus와 동기화: 수동 설정에 따른 변경을 반영 if(WP_Weight.Ctrl.OnOffStatus[L] == ON || WP_Weight.Ctrl.OnOffStatus[R] == ON) { 80136cc: 4ba7 ldr r3, [pc, #668] @ (801396c ) 80136ce: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 80136d2: 2b01 cmp r3, #1 80136d4: d004 beq.n 80136e0 80136d6: 4ba5 ldr r3, [pc, #660] @ (801396c ) 80136d8: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 80136dc: 2b01 cmp r3, #1 80136de: d103 bne.n 80136e8 // Status_MotionAutoWeight = 1; Temp_OnOffStatus = ON; 80136e0: 4ba3 ldr r3, [pc, #652] @ (8013970 ) 80136e2: 2201 movs r2, #1 80136e4: 601a str r2, [r3, #0] 80136e6: e00c b.n 8013702 } else if(WP_Weight.Ctrl.OnOffStatus[L] == OFF || WP_Weight.Ctrl.OnOffStatus[R] == OFF) { 80136e8: 4ba0 ldr r3, [pc, #640] @ (801396c ) 80136ea: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 80136ee: 2b00 cmp r3, #0 80136f0: d004 beq.n 80136fc 80136f2: 4b9e ldr r3, [pc, #632] @ (801396c ) 80136f4: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 80136f8: 2b00 cmp r3, #0 80136fa: d102 bne.n 8013702 // Status_MotionAutoWeight = 0; Temp_OnOffStatus = OFF; 80136fc: 4b9c ldr r3, [pc, #624] @ (8013970 ) 80136fe: 2200 movs r2, #0 8013700: 601a str r2, [r3, #0] } // 속도 분석을 통해 상황 판정 // 1. FastPullOn : 양쪽 다 빠르게 당기고 있을 경우, if(WP_Weight.Ctrl.MotionAutoActive == 1 && WP_Gym.Speed[L] > Spd_PullAutoOn && WP_Gym.Speed[R] > Spd_PullAutoOn) { 8013702: 4b9a ldr r3, [pc, #616] @ (801396c ) 8013704: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 8013708: 2b01 cmp r3, #1 801370a: d14f bne.n 80137ac 801370c: 4b99 ldr r3, [pc, #612] @ (8013974 ) 801370e: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8013712: 4b99 ldr r3, [pc, #612] @ (8013978 ) 8013714: edd3 7a00 vldr s15, [r3] 8013718: eeb4 7ae7 vcmpe.f32 s14, s15 801371c: eef1 fa10 vmrs APSR_nzcv, fpscr 8013720: dd44 ble.n 80137ac 8013722: 4b94 ldr r3, [pc, #592] @ (8013974 ) 8013724: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8013728: 4b93 ldr r3, [pc, #588] @ (8013978 ) 801372a: edd3 7a00 vldr s15, [r3] 801372e: eeb4 7ae7 vcmpe.f32 s14, s15 8013732: eef1 fa10 vmrs APSR_nzcv, fpscr 8013736: dd39 ble.n 80137ac Status_MotionAutoWeight = 1; // 순시적 AutoOn 조건 부합 8013738: 4b90 ldr r3, [pc, #576] @ (801397c ) 801373a: 2201 movs r2, #1 801373c: 601a str r2, [r3, #0] Cnt_MotionAutoWeight++; 801373e: 4b90 ldr r3, [pc, #576] @ (8013980 ) 8013740: 681b ldr r3, [r3, #0] 8013742: 3301 adds r3, #1 8013744: 4a8e ldr r2, [pc, #568] @ (8013980 ) 8013746: 6013 str r3, [r2, #0] // 충분한 시간동안 유지되면 발동 -> 동작이 안정화된 경우 발동하도록 추가 단계 필요!! if(Cnt_MotionAutoWeight > Time_PullAutoOn) { 8013748: 4b8d ldr r3, [pc, #564] @ (8013980 ) 801374a: 681a ldr r2, [r3, #0] 801374c: 4b8d ldr r3, [pc, #564] @ (8013984 ) 801374e: 681b ldr r3, [r3, #0] 8013750: 429a cmp r2, r3 8013752: f340 8102 ble.w 801395a if(WP_Weight.Ctrl.OnOffStatus[L] == OFF || WP_Weight.Ctrl.OnOffStatus[R] == OFF) { 8013756: 4b85 ldr r3, [pc, #532] @ (801396c ) 8013758: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801375c: 2b00 cmp r3, #0 801375e: d005 beq.n 801376c 8013760: 4b82 ldr r3, [pc, #520] @ (801396c ) 8013762: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 8013766: 2b00 cmp r3, #0 8013768: f040 80f7 bne.w 801395a Temp_OnOffStatus = ON; 801376c: 4b80 ldr r3, [pc, #512] @ (8013970 ) 801376e: 2201 movs r2, #1 8013770: 601a str r2, [r3, #0] WP_Weight.Ctrl.OnOffStatus[L] = ON; 8013772: 4b7e ldr r3, [pc, #504] @ (801396c ) 8013774: 2201 movs r2, #1 8013776: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = ON; 801377a: 4b7c ldr r3, [pc, #496] @ (801396c ) 801377c: 2201 movs r2, #1 801377e: f883 202b strb.w r2, [r3, #43] @ 0x2b WP_Weight.Ctrl.MotionAutoStatus = UP; // 앱에 알려주기 위함 8013782: 4b7a ldr r3, [pc, #488] @ (801396c ) 8013784: 2201 movs r2, #1 8013786: f883 2029 strb.w r2, [r3, #41] @ 0x29 // [v1.0.2] ISR에서 직접 전송 → 플래그로 지연 ISR_Deferred.MotionAuto_StatusL = WP_Weight.Ctrl.MotionAutoStatus; 801378a: 4b78 ldr r3, [pc, #480] @ (801396c ) 801378c: f893 2029 ldrb.w r2, [r3, #41] @ 0x29 8013790: 4b7d ldr r3, [pc, #500] @ (8013988 ) 8013792: 70da strb r2, [r3, #3] ISR_Deferred.MotionAuto_StatusR = WP_Weight.Ctrl.MotionAutoStatus; 8013794: 4b75 ldr r3, [pc, #468] @ (801396c ) 8013796: f893 2029 ldrb.w r2, [r3, #41] @ 0x29 801379a: 4b7b ldr r3, [pc, #492] @ (8013988 ) 801379c: 711a strb r2, [r3, #4] ISR_Deferred.MotionAuto_Ready = 1; 801379e: 4b7a ldr r3, [pc, #488] @ (8013988 ) 80137a0: 2201 movs r2, #1 80137a2: 709a strb r2, [r3, #2] WP_LEDCtrl.MotionAutoWeight = 3; // 이 숫자 만큼 깜빡임 80137a4: 4b79 ldr r3, [pc, #484] @ (801398c ) 80137a6: 2203 movs r2, #3 80137a8: 70da strb r2, [r3, #3] if(Cnt_MotionAutoWeight > Time_PullAutoOn) { 80137aa: e0d6 b.n 801395a } } } // 2A. DropRelease : 양쪽 중 하나라도 빠르게 내려지고 있을 경우, else if(WP_Gym.Speed[L] < Spd_DropAutoOff || WP_Gym.Speed[R] < Spd_DropAutoOff) { 80137ac: 4b71 ldr r3, [pc, #452] @ (8013974 ) 80137ae: ed93 7a15 vldr s14, [r3, #84] @ 0x54 80137b2: 4b77 ldr r3, [pc, #476] @ (8013990 ) 80137b4: edd3 7a00 vldr s15, [r3] 80137b8: eeb4 7ae7 vcmpe.f32 s14, s15 80137bc: eef1 fa10 vmrs APSR_nzcv, fpscr 80137c0: d40a bmi.n 80137d8 80137c2: 4b6c ldr r3, [pc, #432] @ (8013974 ) 80137c4: ed93 7a16 vldr s14, [r3, #88] @ 0x58 80137c8: 4b71 ldr r3, [pc, #452] @ (8013990 ) 80137ca: edd3 7a00 vldr s15, [r3] 80137ce: eeb4 7ae7 vcmpe.f32 s14, s15 80137d2: eef1 fa10 vmrs APSR_nzcv, fpscr 80137d6: d53b bpl.n 8013850 Status_MotionAutoWeight = -1; // 순시적 AutoOff 조건 부합 80137d8: 4b68 ldr r3, [pc, #416] @ (801397c ) 80137da: f04f 32ff mov.w r2, #4294967295 80137de: 601a str r2, [r3, #0] Cnt_MotionAutoWeight--; 80137e0: 4b67 ldr r3, [pc, #412] @ (8013980 ) 80137e2: 681b ldr r3, [r3, #0] 80137e4: 3b01 subs r3, #1 80137e6: 4a66 ldr r2, [pc, #408] @ (8013980 ) 80137e8: 6013 str r3, [r2, #0] // 충분한 시간동안 유지되면 발동 if(Cnt_MotionAutoWeight < -Time_DropAutoOff) { // 디버깅 시 구분감을 위해 부호를 반대로 처리함 80137ea: 4b6a ldr r3, [pc, #424] @ (8013994 ) 80137ec: 681b ldr r3, [r3, #0] 80137ee: 425a negs r2, r3 80137f0: 4b63 ldr r3, [pc, #396] @ (8013980 ) 80137f2: 681b ldr r3, [r3, #0] 80137f4: 429a cmp r2, r3 80137f6: f340 80b2 ble.w 801395e if(WP_Weight.Ctrl.OnOffStatus[L] == ON || WP_Weight.Ctrl.OnOffStatus[R] == ON) { 80137fa: 4b5c ldr r3, [pc, #368] @ (801396c ) 80137fc: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 8013800: 2b01 cmp r3, #1 8013802: d005 beq.n 8013810 8013804: 4b59 ldr r3, [pc, #356] @ (801396c ) 8013806: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 801380a: 2b01 cmp r3, #1 801380c: f040 80a7 bne.w 801395e Temp_OnOffStatus = OFF; 8013810: 4b57 ldr r3, [pc, #348] @ (8013970 ) 8013812: 2200 movs r2, #0 8013814: 601a str r2, [r3, #0] WP_Weight.Ctrl.OnOffStatus[L] = OFF; 8013816: 4b55 ldr r3, [pc, #340] @ (801396c ) 8013818: 2200 movs r2, #0 801381a: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = OFF; 801381e: 4b53 ldr r3, [pc, #332] @ (801396c ) 8013820: 2200 movs r2, #0 8013822: f883 202b strb.w r2, [r3, #43] @ 0x2b WP_Weight.Ctrl.MotionAutoStatus = DOWN; // 앱에 알려주기 위함 (나중엔 좌우 구분할 예정) 8013826: 4b51 ldr r3, [pc, #324] @ (801396c ) 8013828: 2202 movs r2, #2 801382a: f883 2029 strb.w r2, [r3, #41] @ 0x29 // [v1.0.2] ISR에서 직접 전송 → 플래그로 지연 ISR_Deferred.MotionAuto_StatusL = WP_Weight.Ctrl.MotionAutoStatus; 801382e: 4b4f ldr r3, [pc, #316] @ (801396c ) 8013830: f893 2029 ldrb.w r2, [r3, #41] @ 0x29 8013834: 4b54 ldr r3, [pc, #336] @ (8013988 ) 8013836: 70da strb r2, [r3, #3] ISR_Deferred.MotionAuto_StatusR = WP_Weight.Ctrl.MotionAutoStatus; 8013838: 4b4c ldr r3, [pc, #304] @ (801396c ) 801383a: f893 2029 ldrb.w r2, [r3, #41] @ 0x29 801383e: 4b52 ldr r3, [pc, #328] @ (8013988 ) 8013840: 711a strb r2, [r3, #4] ISR_Deferred.MotionAuto_Ready = 1; 8013842: 4b51 ldr r3, [pc, #324] @ (8013988 ) 8013844: 2201 movs r2, #1 8013846: 709a strb r2, [r3, #2] WP_LEDCtrl.MotionAutoWeight = -3; // 이 숫자 만큼 깜빡임 8013848: 4b50 ldr r3, [pc, #320] @ (801398c ) 801384a: 22fd movs r2, #253 @ 0xfd 801384c: 70da strb r2, [r3, #3] if(Cnt_MotionAutoWeight < -Time_DropAutoOff) { // 디버깅 시 구분감을 위해 부호를 반대로 처리함 801384e: e086 b.n 801395e } } // 2B. AutoRest : 양쪽 다 충분히 정지할 경우, } else if ((WP_Gym.Speed[L] < Spd_StopAutoOff && WP_Gym.Speed[L] > -Spd_StopAutoOff ) && (WP_Gym.Speed[R] < Spd_StopAutoOff && WP_Gym.Speed[R] > -Spd_StopAutoOff)) { 8013850: 4b48 ldr r3, [pc, #288] @ (8013974 ) 8013852: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8013856: 4b50 ldr r3, [pc, #320] @ (8013998 ) 8013858: edd3 7a00 vldr s15, [r3] 801385c: eeb4 7ae7 vcmpe.f32 s14, s15 8013860: eef1 fa10 vmrs APSR_nzcv, fpscr 8013864: d570 bpl.n 8013948 8013866: 4b43 ldr r3, [pc, #268] @ (8013974 ) 8013868: ed93 7a15 vldr s14, [r3, #84] @ 0x54 801386c: 4b4a ldr r3, [pc, #296] @ (8013998 ) 801386e: edd3 7a00 vldr s15, [r3] 8013872: eef1 7a67 vneg.f32 s15, s15 8013876: eeb4 7ae7 vcmpe.f32 s14, s15 801387a: eef1 fa10 vmrs APSR_nzcv, fpscr 801387e: dd63 ble.n 8013948 8013880: 4b3c ldr r3, [pc, #240] @ (8013974 ) 8013882: ed93 7a16 vldr s14, [r3, #88] @ 0x58 8013886: 4b44 ldr r3, [pc, #272] @ (8013998 ) 8013888: edd3 7a00 vldr s15, [r3] 801388c: eeb4 7ae7 vcmpe.f32 s14, s15 8013890: eef1 fa10 vmrs APSR_nzcv, fpscr 8013894: d558 bpl.n 8013948 8013896: 4b37 ldr r3, [pc, #220] @ (8013974 ) 8013898: ed93 7a16 vldr s14, [r3, #88] @ 0x58 801389c: 4b3e ldr r3, [pc, #248] @ (8013998 ) 801389e: edd3 7a00 vldr s15, [r3] 80138a2: eef1 7a67 vneg.f32 s15, s15 80138a6: eeb4 7ae7 vcmpe.f32 s14, s15 80138aa: eef1 fa10 vmrs APSR_nzcv, fpscr 80138ae: dd4b ble.n 8013948 if(WP_Weight.Ctrl.OnOffStatus[L] == ON || WP_Weight.Ctrl.OnOffStatus[R] == ON) { 80138b0: 4b2e ldr r3, [pc, #184] @ (801396c ) 80138b2: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 80138b6: 2b01 cmp r3, #1 80138b8: d004 beq.n 80138c4 80138ba: 4b2c ldr r3, [pc, #176] @ (801396c ) 80138bc: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 80138c0: 2b01 cmp r3, #1 80138c2: d132 bne.n 801392a Status_MotionAutoWeight = -1; // 순시적 AutoOff 조건 부합 80138c4: 4b2d ldr r3, [pc, #180] @ (801397c ) 80138c6: f04f 32ff mov.w r2, #4294967295 80138ca: 601a str r2, [r3, #0] Cnt_MotionAutoWeight--; 80138cc: 4b2c ldr r3, [pc, #176] @ (8013980 ) 80138ce: 681b ldr r3, [r3, #0] 80138d0: 3b01 subs r3, #1 80138d2: 4a2b ldr r2, [pc, #172] @ (8013980 ) 80138d4: 6013 str r3, [r2, #0] // 충분한 시간동안 유지되면 발동 if(Cnt_MotionAutoWeight < -Time_StopAutoOff) { // 디버깅 시 구분감을 위해 부호를 반대로 처리함 80138d6: 4b31 ldr r3, [pc, #196] @ (801399c ) 80138d8: 681b ldr r3, [r3, #0] 80138da: 425a negs r2, r3 80138dc: 4b28 ldr r3, [pc, #160] @ (8013980 ) 80138de: 681b ldr r3, [r3, #0] 80138e0: 429a cmp r2, r3 80138e2: dd30 ble.n 8013946 Temp_OnOffStatus = OFF; 80138e4: 4b22 ldr r3, [pc, #136] @ (8013970 ) 80138e6: 2200 movs r2, #0 80138e8: 601a str r2, [r3, #0] WP_Weight.Ctrl.OnOffStatus[L] = OFF; 80138ea: 4b20 ldr r3, [pc, #128] @ (801396c ) 80138ec: 2200 movs r2, #0 80138ee: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = OFF; 80138f2: 4b1e ldr r3, [pc, #120] @ (801396c ) 80138f4: 2200 movs r2, #0 80138f6: f883 202b strb.w r2, [r3, #43] @ 0x2b WP_Weight.Ctrl.MotionAutoStatus = DOWN; // 앱에 알려주기 위함 80138fa: 4b1c ldr r3, [pc, #112] @ (801396c ) 80138fc: 2202 movs r2, #2 80138fe: f883 2029 strb.w r2, [r3, #41] @ 0x29 // [v1.0.2] ISR에서 직접 전송 → 플래그로 지연 ISR_Deferred.MotionAuto_StatusL = WP_Weight.Ctrl.MotionAutoStatus; 8013902: 4b1a ldr r3, [pc, #104] @ (801396c ) 8013904: f893 2029 ldrb.w r2, [r3, #41] @ 0x29 8013908: 4b1f ldr r3, [pc, #124] @ (8013988 ) 801390a: 70da strb r2, [r3, #3] ISR_Deferred.MotionAuto_StatusR = WP_Weight.Ctrl.MotionAutoStatus; 801390c: 4b17 ldr r3, [pc, #92] @ (801396c ) 801390e: f893 2029 ldrb.w r2, [r3, #41] @ 0x29 8013912: 4b1d ldr r3, [pc, #116] @ (8013988 ) 8013914: 711a strb r2, [r3, #4] ISR_Deferred.MotionAuto_Ready = 1; 8013916: 4b1c ldr r3, [pc, #112] @ (8013988 ) 8013918: 2201 movs r2, #1 801391a: 709a strb r2, [r3, #2] WP_LEDCtrl.MotionAutoWeight = -3; // 이 숫자 만큼 깜빡임 801391c: 4b1b ldr r3, [pc, #108] @ (801398c ) 801391e: 22fd movs r2, #253 @ 0xfd 8013920: 70da strb r2, [r3, #3] Cnt_MotionAutoWeight = 0; // 초기화 8013922: 4b17 ldr r3, [pc, #92] @ (8013980 ) 8013924: 2200 movs r2, #0 8013926: 601a str r2, [r3, #0] if(Cnt_MotionAutoWeight < -Time_StopAutoOff) { // 디버깅 시 구분감을 위해 부호를 반대로 처리함 8013928: e00d b.n 8013946 } } else if (WP_Weight.Ctrl.OnOffStatus[L] == OFF || WP_Weight.Ctrl.OnOffStatus[R] == OFF) { 801392a: 4b10 ldr r3, [pc, #64] @ (801396c ) 801392c: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 8013930: 2b00 cmp r3, #0 8013932: d004 beq.n 801393e 8013934: 4b0d ldr r3, [pc, #52] @ (801396c ) 8013936: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 801393a: 2b00 cmp r3, #0 801393c: d130 bne.n 80139a0 Cnt_MotionAutoWeight = 0; 801393e: 4b10 ldr r3, [pc, #64] @ (8013980 ) 8013940: 2200 movs r2, #0 8013942: 601a str r2, [r3, #0] if(WP_Weight.Ctrl.OnOffStatus[L] == ON || WP_Weight.Ctrl.OnOffStatus[R] == ON) { 8013944: e02c b.n 80139a0 8013946: e02b b.n 80139a0 } } else { // 2B가 생기면서 이 구간의 역할이 꼬여서 파악 필요 Status_MotionAutoWeight = 0; 8013948: 4b0c ldr r3, [pc, #48] @ (801397c ) 801394a: 2200 movs r2, #0 801394c: 601a str r2, [r3, #0] Cnt_MotionAutoWeight = 0; 801394e: 4b0c ldr r3, [pc, #48] @ (8013980 ) 8013950: 2200 movs r2, #0 8013952: 601a str r2, [r3, #0] 8013954: e025 b.n 80139a2 if(Debug_HilMode) return; // HIL: 자동 ON/OFF 비활성 8013956: bf00 nop 8013958: e023 b.n 80139a2 if(Cnt_MotionAutoWeight > Time_PullAutoOn) { 801395a: bf00 nop 801395c: e021 b.n 80139a2 if(Cnt_MotionAutoWeight < -Time_DropAutoOff) { // 디버깅 시 구분감을 위해 부호를 반대로 처리함 801395e: bf00 nop 8013960: e01f b.n 80139a2 8013962: bf00 nop 8013964: 20000372 .word 0x20000372 8013968: 20000380 .word 0x20000380 801396c: 200001d8 .word 0x200001d8 8013970: 2000037c .word 0x2000037c 8013974: 20000148 .word 0x20000148 8013978: 20000000 .word 0x20000000 801397c: 20000374 .word 0x20000374 8013980: 20000378 .word 0x20000378 8013984: 2000000c .word 0x2000000c 8013988: 20000344 .word 0x20000344 801398c: 20000328 .word 0x20000328 8013990: 20000004 .word 0x20000004 8013994: 20000010 .word 0x20000010 8013998: 20000008 .word 0x20000008 801399c: 20000014 .word 0x20000014 if(WP_Weight.Ctrl.OnOffStatus[L] == ON || WP_Weight.Ctrl.OnOffStatus[R] == ON) { 80139a0: bf00 nop } } 80139a2: 46bd mov sp, r7 80139a4: f85d 7b04 ldr.w r7, [sp], #4 80139a8: 4770 bx lr 80139aa: bf00 nop 080139ac : // WeightBLEtoSetTask() 에다가 집어 넣으면 될 듯? (3/26) // WeightController에 있는 게 맞다! (5/5) void ClampEccWeight (uint8_t side) { 80139ac: b480 push {r7} 80139ae: b083 sub sp, #12 80139b0: af00 add r7, sp, #0 80139b2: 4603 mov r3, r0 80139b4: 71fb strb r3, [r7, #7] if(WP_Gym.F_EccSet > 0.5f * WP_Gym.WeightSet[side]) { 80139b6: 4b2a ldr r3, [pc, #168] @ (8013a60 ) 80139b8: ed93 7a1b vldr s14, [r3, #108] @ 0x6c 80139bc: 79fb ldrb r3, [r7, #7] 80139be: 4a28 ldr r2, [pc, #160] @ (8013a60 ) 80139c0: 3302 adds r3, #2 80139c2: 009b lsls r3, r3, #2 80139c4: 4413 add r3, r2 80139c6: 3304 adds r3, #4 80139c8: edd3 7a00 vldr s15, [r3] 80139cc: eef6 6a00 vmov.f32 s13, #96 @ 0x3f000000 0.5 80139d0: ee67 7aa6 vmul.f32 s15, s15, s13 80139d4: eeb4 7ae7 vcmpe.f32 s14, s15 80139d8: eef1 fa10 vmrs APSR_nzcv, fpscr 80139dc: dc00 bgt.n 80139e0 ISR_Deferred.EccClamp_L = WP_Gym.F_EccSet_Temp[L] * 2; ISR_Deferred.EccClamp_R = WP_Gym.F_EccSet_Temp[R] * 2; ISR_Deferred.EccClamp_Err = WP_Gym.F_Ecc_ErrorCode; ISR_Deferred.EccClamp_Ready = 1; } } 80139de: e038 b.n 8013a52 WP_Gym.F_EccSet = WP_Gym.WeightSet[side] * 0.5f; // 실제 적용되는 변수 80139e0: 79fb ldrb r3, [r7, #7] 80139e2: 4a1f ldr r2, [pc, #124] @ (8013a60 ) 80139e4: 3302 adds r3, #2 80139e6: 009b lsls r3, r3, #2 80139e8: 4413 add r3, r2 80139ea: 3304 adds r3, #4 80139ec: edd3 7a00 vldr s15, [r3] 80139f0: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 80139f4: ee67 7a87 vmul.f32 s15, s15, s14 80139f8: 4b19 ldr r3, [pc, #100] @ (8013a60 ) 80139fa: edc3 7a1b vstr s15, [r3, #108] @ 0x6c WP_Gym.F_EccSet_Temp[L] = WP_Gym.F_EccSet; // 구조가 꼬여서 각각 바꿔줘야 함.. 80139fe: 4b18 ldr r3, [pc, #96] @ (8013a60 ) 8013a00: 6edb ldr r3, [r3, #108] @ 0x6c 8013a02: 4a17 ldr r2, [pc, #92] @ (8013a60 ) 8013a04: 6713 str r3, [r2, #112] @ 0x70 WP_Gym.F_EccSet_Temp[R] = WP_Gym.F_EccSet; 8013a06: 4b16 ldr r3, [pc, #88] @ (8013a60 ) 8013a08: 6edb ldr r3, [r3, #108] @ 0x6c 8013a0a: 4a15 ldr r2, [pc, #84] @ (8013a60 ) 8013a0c: 6753 str r3, [r2, #116] @ 0x74 ISR_Deferred.EccClamp_L = WP_Gym.F_EccSet_Temp[L] * 2; 8013a0e: 4b14 ldr r3, [pc, #80] @ (8013a60 ) 8013a10: edd3 7a1c vldr s15, [r3, #112] @ 0x70 8013a14: ee77 7aa7 vadd.f32 s15, s15, s15 8013a18: eefc 7ae7 vcvt.u32.f32 s15, s15 8013a1c: edc7 7a00 vstr s15, [r7] 8013a20: 783b ldrb r3, [r7, #0] 8013a22: b2da uxtb r2, r3 8013a24: 4b0f ldr r3, [pc, #60] @ (8013a64 ) 8013a26: 719a strb r2, [r3, #6] ISR_Deferred.EccClamp_R = WP_Gym.F_EccSet_Temp[R] * 2; 8013a28: 4b0d ldr r3, [pc, #52] @ (8013a60 ) 8013a2a: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8013a2e: ee77 7aa7 vadd.f32 s15, s15, s15 8013a32: eefc 7ae7 vcvt.u32.f32 s15, s15 8013a36: edc7 7a00 vstr s15, [r7] 8013a3a: 783b ldrb r3, [r7, #0] 8013a3c: b2da uxtb r2, r3 8013a3e: 4b09 ldr r3, [pc, #36] @ (8013a64 ) 8013a40: 71da strb r2, [r3, #7] ISR_Deferred.EccClamp_Err = WP_Gym.F_Ecc_ErrorCode; 8013a42: 4b07 ldr r3, [pc, #28] @ (8013a60 ) 8013a44: f893 207c ldrb.w r2, [r3, #124] @ 0x7c 8013a48: 4b06 ldr r3, [pc, #24] @ (8013a64 ) 8013a4a: 721a strb r2, [r3, #8] ISR_Deferred.EccClamp_Ready = 1; 8013a4c: 4b05 ldr r3, [pc, #20] @ (8013a64 ) 8013a4e: 2201 movs r2, #1 8013a50: 715a strb r2, [r3, #5] } 8013a52: bf00 nop 8013a54: 370c adds r7, #12 8013a56: 46bd mov sp, r7 8013a58: f85d 7b04 ldr.w r7, [sp], #4 8013a5c: 4770 bx lr 8013a5e: bf00 nop 8013a60: 20000148 .word 0x20000148 8013a64: 20000344 .word 0x20000344 08013a68 : //} /* Init_Encoder_v3 */ void Init_Encoder_v3(void) { 8013a68: b5b0 push {r4, r5, r7, lr} 8013a6a: b094 sub sp, #80 @ 0x50 8013a6c: af00 add r7, sp, #0 const float RefSpd_Moving = 2.0f; // 회전 감지 기준 속도 8013a6e: f04f 4380 mov.w r3, #1073741824 @ 0x40000000 8013a72: 647b str r3, [r7, #68] @ 0x44 // 시간 설정 (유지보수 용이성) const uint32_t ROTATION_WAIT_TIME = 1000; // 회전 대기 시간 8013a74: f44f 737a mov.w r3, #1000 @ 0x3e8 8013a78: 643b str r3, [r7, #64] @ 0x40 const uint32_t ZPULSE_WAIT_TIME = 5000; // Z펄스 대기 시간 8013a7a: f241 3388 movw r3, #5000 @ 0x1388 8013a7e: 63fb str r3, [r7, #60] @ 0x3c // AngleSequence 배열과 CurrentSequence 배열을 함수 전체에서 사용 //const float AngleSequence[10] = {0.0f, 30.0f, 60.0f, 90.0f, 120.0f, 150.0f, 180.0f, 210.0f, 240.0f, 270.0f}; // 옵션 1: 대칭 우선 //const float AngleSequence[10] = {0.0f, 180.0f, 90.0f, 270.0f, 45.0f, 225.0f, 135.0f, 315.0f, 30.0f, 210.0f}; // 옵션 2: 90도 간격 우선 (기계적으로 가장 다른 위치) const float AngleSequence[10] = {0.0f, 90.0f, 180.0f, 270.0f, 45.0f, 135.0f, 225.0f, 315.0f, 30.0f, 60.0f}; 8013a80: 4ba7 ldr r3, [pc, #668] @ (8013d20 ) 8013a82: f107 040c add.w r4, r7, #12 8013a86: 461d mov r5, r3 8013a88: cd0f ldmia r5!, {r0, r1, r2, r3} 8013a8a: c40f stmia r4!, {r0, r1, r2, r3} 8013a8c: cd0f ldmia r5!, {r0, r1, r2, r3} 8013a8e: c40f stmia r4!, {r0, r1, r2, r3} 8013a90: e895 0003 ldmia.w r5, {r0, r1} 8013a94: e884 0003 stmia.w r4, {r0, r1} const float CurrentSequence[2] = {0.75f, 1.0f}; 8013a98: 4aa2 ldr r2, [pc, #648] @ (8013d24 ) 8013a9a: 1d3b adds r3, r7, #4 8013a9c: e892 0003 ldmia.w r2, {r0, r1} 8013aa0: e883 0003 stmia.w r3, {r0, r1} uint8_t num_Ang = sizeof(AngleSequence) / sizeof(AngleSequence[0]); 8013aa4: 230a movs r3, #10 8013aa6: f887 303b strb.w r3, [r7, #59] @ 0x3b uint8_t num_Curr = sizeof(CurrentSequence) / sizeof(CurrentSequence[0]); 8013aaa: 2302 movs r3, #2 8013aac: f887 303a strb.w r3, [r7, #58] @ 0x3a uint32_t currentTime = Get_Time(); 8013ab0: f00c fbba bl 8020228 8013ab4: 6378 str r0, [r7, #52] @ 0x34 // 에러 상태에서는 함수 진입 중단 if (WP_EncInit.Status[L] == Error || WP_EncInit.Status[R] == Error) { 8013ab6: 4b9c ldr r3, [pc, #624] @ (8013d28 ) 8013ab8: 785b ldrb r3, [r3, #1] 8013aba: 2b09 cmp r3, #9 8013abc: d003 beq.n 8013ac6 8013abe: 4b9a ldr r3, [pc, #616] @ (8013d28 ) 8013ac0: 789b ldrb r3, [r3, #2] 8013ac2: 2b09 cmp r3, #9 8013ac4: d11d bne.n 8013b02 // WP_Ctrl.Mode = Inv_Off; // Debug_DriveMotor = Drv_NoMotor; // WP_Ctrl.ActiveMotor = Drv_NoMotor; WP_Ctrl.Mode = Inv_Off; 8013ac6: 4b99 ldr r3, [pc, #612] @ (8013d2c ) 8013ac8: 2200 movs r2, #0 8013aca: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_NoMotor; 8013acc: 4b97 ldr r3, [pc, #604] @ (8013d2c ) 8013ace: 2200 movs r2, #0 8013ad0: 705a strb r2, [r3, #1] Motor1.Cmd.Icmd.q = Motor2.Cmd.Icmd.q = 0.0f; 8013ad2: 4b97 ldr r3, [pc, #604] @ (8013d30 ) 8013ad4: f04f 0200 mov.w r2, #0 8013ad8: 605a str r2, [r3, #4] 8013ada: 4b95 ldr r3, [pc, #596] @ (8013d30 ) 8013adc: 685b ldr r3, [r3, #4] 8013ade: 4a95 ldr r2, [pc, #596] @ (8013d34 ) 8013ae0: 6053 str r3, [r2, #4] Motor1.Cmd.Icmd.d = Motor2.Cmd.Icmd.d = 0.0f; 8013ae2: 4b93 ldr r3, [pc, #588] @ (8013d30 ) 8013ae4: f04f 0200 mov.w r2, #0 8013ae8: 601a str r2, [r3, #0] 8013aea: 4b91 ldr r3, [pc, #580] @ (8013d30 ) 8013aec: 681b ldr r3, [r3, #0] 8013aee: 4a91 ldr r2, [pc, #580] @ (8013d34 ) 8013af0: 6013 str r3, [r2, #0] Debug_DriveMotor = Drv_NoMotor; 8013af2: 4b91 ldr r3, [pc, #580] @ (8013d38 ) 8013af4: 2200 movs r2, #0 8013af6: 701a strb r2, [r3, #0] WP_EncInit.Flag = Error; 8013af8: 4b8b ldr r3, [pc, #556] @ (8013d28 ) 8013afa: 2209 movs r2, #9 8013afc: 701a strb r2, [r3, #0] return; 8013afe: f000 bc1d b.w 801433c } // 양쪽 모두 초기화 성공 시 if (WP_EncInit.Status[L] == Done && WP_EncInit.Status[R] == Done) { 8013b02: 4b89 ldr r3, [pc, #548] @ (8013d28 ) 8013b04: 785b ldrb r3, [r3, #1] 8013b06: 2b01 cmp r3, #1 8013b08: d13d bne.n 8013b86 8013b0a: 4b87 ldr r3, [pc, #540] @ (8013d28 ) 8013b0c: 789b ldrb r3, [r3, #2] 8013b0e: 2b01 cmp r3, #1 8013b10: d139 bne.n 8013b86 UART3_Puts("Encoder Init Success\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013b12: 2200 movs r2, #0 8013b14: 4989 ldr r1, [pc, #548] @ (8013d3c ) 8013b16: 488a ldr r0, [pc, #552] @ (8013d40 ) 8013b18: f00b ff06 bl 801f928 WP_EncInit.Flag = Done; 8013b1c: 4b82 ldr r3, [pc, #520] @ (8013d28 ) 8013b1e: 2201 movs r2, #1 8013b20: 701a strb r2, [r3, #0] // AngleElecOffset 원래값으로 복구 Motor1_Ang.AngleElecOffset = RAM_Data.Motor1_Ang_AngleElecOffset; 8013b22: 4b88 ldr r3, [pc, #544] @ (8013d44 ) 8013b24: 6d1b ldr r3, [r3, #80] @ 0x50 8013b26: 4a88 ldr r2, [pc, #544] @ (8013d48 ) 8013b28: 6013 str r3, [r2, #0] Motor2_Ang.AngleElecOffset = RAM_Data.Motor2_Ang_AngleElecOffset; 8013b2a: 4b86 ldr r3, [pc, #536] @ (8013d44 ) 8013b2c: 6d5b ldr r3, [r3, #84] @ 0x54 8013b2e: 4a87 ldr r2, [pc, #540] @ (8013d4c ) 8013b30: 6013 str r3, [r2, #0] // 모터 제어 변수 초기화 Motor1.Cmd.Icmd.q = Motor2.Cmd.Icmd.q = 0.0f; 8013b32: 4b7f ldr r3, [pc, #508] @ (8013d30 ) 8013b34: f04f 0200 mov.w r2, #0 8013b38: 605a str r2, [r3, #4] 8013b3a: 4b7d ldr r3, [pc, #500] @ (8013d30 ) 8013b3c: 685b ldr r3, [r3, #4] 8013b3e: 4a7d ldr r2, [pc, #500] @ (8013d34 ) 8013b40: 6053 str r3, [r2, #4] Motor1.Cmd.Icmd.d = Motor2.Cmd.Icmd.d = 0.0f; 8013b42: 4b7b ldr r3, [pc, #492] @ (8013d30 ) 8013b44: f04f 0200 mov.w r2, #0 8013b48: 601a str r2, [r3, #0] 8013b4a: 4b79 ldr r3, [pc, #484] @ (8013d30 ) 8013b4c: 681b ldr r3, [r3, #0] 8013b4e: 4a79 ldr r2, [pc, #484] @ (8013d34 ) 8013b50: 6013 str r3, [r2, #0] WP_Ctrl.Mode = Inv_Off; 8013b52: 4b76 ldr r3, [pc, #472] @ (8013d2c ) 8013b54: 2200 movs r2, #0 8013b56: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_NoMotor; 8013b58: 4b77 ldr r3, [pc, #476] @ (8013d38 ) 8013b5a: 2200 movs r2, #0 8013b5c: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_NoMotor; 8013b5e: 4b73 ldr r3, [pc, #460] @ (8013d2c ) 8013b60: 2200 movs r2, #0 8013b62: 705a strb r2, [r3, #1] WP_EncInit.Step[L] = WP_EncInit.Step[R] = 0; // NOTE: 구조체에서 Step[2] 제거됨 - AngleStep[2]로 대체 8013b64: 4b70 ldr r3, [pc, #448] @ (8013d28 ) 8013b66: 2200 movs r2, #0 8013b68: 609a str r2, [r3, #8] 8013b6a: 4b6f ldr r3, [pc, #444] @ (8013d28 ) 8013b6c: 689b ldr r3, [r3, #8] 8013b6e: 4a6e ldr r2, [pc, #440] @ (8013d28 ) 8013b70: 6053 str r3, [r2, #4] // WP_EncInit.AngleStep[L] = WP_EncInit.AngleStep[R] = 0; // 구조체 초기화 시 자동으로 0 // Drive_Status = Calibration; WP_ForcedCali.Flag = Done; 8013b72: 4b77 ldr r3, [pc, #476] @ (8013d50 ) 8013b74: 2201 movs r2, #1 8013b76: 701a strb r2, [r3, #0] Drive_Status = RunGym; 8013b78: 4b76 ldr r3, [pc, #472] @ (8013d54 ) 8013b7a: 2203 movs r2, #3 8013b7c: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_BothMotor; 8013b7e: 4b6e ldr r3, [pc, #440] @ (8013d38 ) 8013b80: 2203 movs r2, #3 8013b82: 701a strb r2, [r3, #0] return; 8013b84: e3da b.n 801433c } // 첫 진입 시 초기화 if (WP_EncInit.Step[L] == 0 && WP_EncInit.Step[R] == 0) { // NOTE: 구조체에서 Step[2] 제거 예정 - AngleStep 사용 고려 8013b86: 4b68 ldr r3, [pc, #416] @ (8013d28 ) 8013b88: 685b ldr r3, [r3, #4] 8013b8a: 2b00 cmp r3, #0 8013b8c: d142 bne.n 8013c14 8013b8e: 4b66 ldr r3, [pc, #408] @ (8013d28 ) 8013b90: 689b ldr r3, [r3, #8] 8013b92: 2b00 cmp r3, #0 8013b94: d13e bne.n 8013c14 WP_Ctrl.Mode = Inv_TorqueCtrl; // TorqueCtrl 사용 8013b96: 4b65 ldr r3, [pc, #404] @ (8013d2c ) 8013b98: 2205 movs r2, #5 8013b9a: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_BothMotor; 8013b9c: 4b66 ldr r3, [pc, #408] @ (8013d38 ) 8013b9e: 2203 movs r2, #3 8013ba0: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_BothMotor; 8013ba2: 4b62 ldr r3, [pc, #392] @ (8013d2c ) 8013ba4: 2203 movs r2, #3 8013ba6: 705a strb r2, [r3, #1] // 배열을 이용한 초기 설정 Motor1.Cmd.Icmd.q = CurrentSequence[0]; // 0.8A 8013ba8: 687b ldr r3, [r7, #4] 8013baa: 4a62 ldr r2, [pc, #392] @ (8013d34 ) 8013bac: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = CurrentSequence[0]; // 0.8A 8013bae: 687b ldr r3, [r7, #4] 8013bb0: 4a5f ldr r2, [pc, #380] @ (8013d30 ) 8013bb2: 6053 str r3, [r2, #4] // 시작 시간 기록 WP_EncInit.StartTime[L] = WP_EncInit.StartTime[R] = currentTime; 8013bb4: 4a5c ldr r2, [pc, #368] @ (8013d28 ) 8013bb6: 6b7b ldr r3, [r7, #52] @ 0x34 8013bb8: 6153 str r3, [r2, #20] 8013bba: 4b5b ldr r3, [pc, #364] @ (8013d28 ) 8013bbc: 695b ldr r3, [r3, #20] 8013bbe: 4a5a ldr r2, [pc, #360] @ (8013d28 ) 8013bc0: 6113 str r3, [r2, #16] // 배열을 이용한 초기 AngleElecOffset 설정 Motor1_Ang.AngleElecOffset = RAM_Data.Motor1_Ang_AngleElecOffset + AngleSequence[0]; // +0도 8013bc2: 4b60 ldr r3, [pc, #384] @ (8013d44 ) 8013bc4: ed93 7a14 vldr s14, [r3, #80] @ 0x50 8013bc8: edd7 7a03 vldr s15, [r7, #12] 8013bcc: ee77 7a27 vadd.f32 s15, s14, s15 8013bd0: 4b5d ldr r3, [pc, #372] @ (8013d48 ) 8013bd2: edc3 7a00 vstr s15, [r3] Motor2_Ang.AngleElecOffset = RAM_Data.Motor2_Ang_AngleElecOffset + AngleSequence[0]; // +0도 8013bd6: 4b5b ldr r3, [pc, #364] @ (8013d44 ) 8013bd8: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8013bdc: edd7 7a03 vldr s15, [r7, #12] 8013be0: ee77 7a27 vadd.f32 s15, s14, s15 8013be4: 4b59 ldr r3, [pc, #356] @ (8013d4c ) 8013be6: edc3 7a00 vstr s15, [r3] // 안전 회전량 체크를 위한 시작 각도 저장 WP_EncInit.StartAngle[L] = Motor1_Ang.AngleElec; 8013bea: 4b57 ldr r3, [pc, #348] @ (8013d48 ) 8013bec: 6b5b ldr r3, [r3, #52] @ 0x34 8013bee: 4a4e ldr r2, [pc, #312] @ (8013d28 ) 8013bf0: 6213 str r3, [r2, #32] WP_EncInit.StartAngle[R] = Motor2_Ang.AngleElec; 8013bf2: 4b56 ldr r3, [pc, #344] @ (8013d4c ) 8013bf4: 6b5b ldr r3, [r3, #52] @ 0x34 8013bf6: 4a4c ldr r2, [pc, #304] @ (8013d28 ) 8013bf8: 6253 str r3, [r2, #36] @ 0x24 WP_EncInit.Step[L] = WP_EncInit.Step[R] = 1; // NOTE: 구조체에서 Step[2] 제거 예정 8013bfa: 4b4b ldr r3, [pc, #300] @ (8013d28 ) 8013bfc: 2201 movs r2, #1 8013bfe: 609a str r2, [r3, #8] 8013c00: 4b49 ldr r3, [pc, #292] @ (8013d28 ) 8013c02: 689b ldr r3, [r3, #8] 8013c04: 4a48 ldr r2, [pc, #288] @ (8013d28 ) 8013c06: 6053 str r3, [r2, #4] UART3_Puts("Encoder Init Started (TorqueCtrl)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013c08: 2200 movs r2, #0 8013c0a: 4953 ldr r1, [pc, #332] @ (8013d58 ) 8013c0c: 484c ldr r0, [pc, #304] @ (8013d40 ) 8013c0e: f00b fe8b bl 801f928 return; 8013c12: e393 b.n 801433c // 재진입 시 else { // 좌우 독립 진행을 위한 변수들 (WP_EncInit 구조체 사용) // 좌측 모터 관리 if (WP_EncInit.Status[L] == NotDone) { 8013c14: 4b44 ldr r3, [pc, #272] @ (8013d28 ) 8013c16: 785b ldrb r3, [r3, #1] 8013c18: 2b00 cmp r3, #0 8013c1a: f040 81b9 bne.w 8013f90 WP_EncInit.StepTime[L] = currentTime - WP_EncInit.StartTime[L]; 8013c1e: 4b42 ldr r3, [pc, #264] @ (8013d28 ) 8013c20: 691b ldr r3, [r3, #16] 8013c22: 6b7a ldr r2, [r7, #52] @ 0x34 8013c24: 1ad3 subs r3, r2, r3 8013c26: 4a40 ldr r2, [pc, #256] @ (8013d28 ) 8013c28: 6193 str r3, [r2, #24] // 역방향 회전 시 안전 회전량 체크 (360도 제한) if (Motor1_Ang.RpmFil < -RefSpd_Moving) { 8013c2a: 4b47 ldr r3, [pc, #284] @ (8013d48 ) 8013c2c: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8013c30: edd7 7a11 vldr s15, [r7, #68] @ 0x44 8013c34: eef1 7a67 vneg.f32 s15, s15 8013c38: eeb4 7ae7 vcmpe.f32 s14, s15 8013c3c: eef1 fa10 vmrs APSR_nzcv, fpscr 8013c40: f140 80bf bpl.w 8013dc2 float rotationAmount = Abs(Motor1_Ang.AngleElec - WP_EncInit.StartAngle[L]); 8013c44: 4b40 ldr r3, [pc, #256] @ (8013d48 ) 8013c46: ed93 7a0d vldr s14, [r3, #52] @ 0x34 8013c4a: 4b37 ldr r3, [pc, #220] @ (8013d28 ) 8013c4c: edd3 7a08 vldr s15, [r3, #32] 8013c50: ee77 7a67 vsub.f32 s15, s14, s15 8013c54: eef5 7ac0 vcmpe.f32 s15, #0.0 8013c58: eef1 fa10 vmrs APSR_nzcv, fpscr 8013c5c: dd08 ble.n 8013c70 8013c5e: 4b3a ldr r3, [pc, #232] @ (8013d48 ) 8013c60: ed93 7a0d vldr s14, [r3, #52] @ 0x34 8013c64: 4b30 ldr r3, [pc, #192] @ (8013d28 ) 8013c66: edd3 7a08 vldr s15, [r3, #32] 8013c6a: ee77 7a67 vsub.f32 s15, s14, s15 8013c6e: e009 b.n 8013c84 8013c70: 4b35 ldr r3, [pc, #212] @ (8013d48 ) 8013c72: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8013c76: eeb1 7a67 vneg.f32 s14, s15 8013c7a: 4b2b ldr r3, [pc, #172] @ (8013d28 ) 8013c7c: edd3 7a08 vldr s15, [r3, #32] 8013c80: ee77 7a67 vsub.f32 s15, s14, s15 8013c84: edc7 7a13 vstr s15, [r7, #76] @ 0x4c if (rotationAmount > 180.0f) rotationAmount = 360.0f - rotationAmount; // 최단 경로로 계산 8013c88: edd7 7a13 vldr s15, [r7, #76] @ 0x4c 8013c8c: ed9f 7a33 vldr s14, [pc, #204] @ 8013d5c 8013c90: eef4 7ac7 vcmpe.f32 s15, s14 8013c94: eef1 fa10 vmrs APSR_nzcv, fpscr 8013c98: dd07 ble.n 8013caa 8013c9a: ed9f 7a31 vldr s14, [pc, #196] @ 8013d60 8013c9e: edd7 7a13 vldr s15, [r7, #76] @ 0x4c 8013ca2: ee77 7a67 vsub.f32 s15, s14, s15 8013ca6: edc7 7a13 vstr s15, [r7, #76] @ 0x4c if (rotationAmount > 360.0f) { 8013caa: edd7 7a13 vldr s15, [r7, #76] @ 0x4c 8013cae: ed9f 7a2c vldr s14, [pc, #176] @ 8013d60 8013cb2: eef4 7ac7 vcmpe.f32 s15, s14 8013cb6: eef1 fa10 vmrs APSR_nzcv, fpscr 8013cba: f340 8082 ble.w 8013dc2 Debug_UART3_printf("좌측 풀림 제한: 360도 초과 회전 감지 - 다음 시도\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013cbe: 4829 ldr r0, [pc, #164] @ (8013d64 ) 8013cc0: f00c f878 bl 801fdb4 WP_EncInit.AngleStep[L]++; 8013cc4: 4b18 ldr r3, [pc, #96] @ (8013d28 ) 8013cc6: 7b9b ldrb r3, [r3, #14] 8013cc8: 3301 adds r3, #1 8013cca: b2da uxtb r2, r3 8013ccc: 4b16 ldr r3, [pc, #88] @ (8013d28 ) 8013cce: 739a strb r2, [r3, #14] WP_EncInit.StartTime[L] = currentTime; 8013cd0: 4a15 ldr r2, [pc, #84] @ (8013d28 ) 8013cd2: 6b7b ldr r3, [r7, #52] @ 0x34 8013cd4: 6113 str r3, [r2, #16] WP_EncInit.StartAngle[L] = Motor1_Ang.AngleElec; // 새 시작 각도 저장 8013cd6: 4b1c ldr r3, [pc, #112] @ (8013d48 ) 8013cd8: 6b5b ldr r3, [r3, #52] @ 0x34 8013cda: 4a13 ldr r2, [pc, #76] @ (8013d28 ) 8013cdc: 6213 str r3, [r2, #32] if (WP_EncInit.AngleStep[L] >= num_Ang) { 8013cde: 4b12 ldr r3, [pc, #72] @ (8013d28 ) 8013ce0: 7b9b ldrb r3, [r3, #14] 8013ce2: f897 203b ldrb.w r2, [r7, #59] @ 0x3b 8013ce6: 429a cmp r2, r3 8013ce8: d852 bhi.n 8013d90 WP_EncInit.AngleStep[L] = 0; 8013cea: 4b0f ldr r3, [pc, #60] @ (8013d28 ) 8013cec: 2200 movs r2, #0 8013cee: 739a strb r2, [r3, #14] WP_EncInit.CurrentLevel[L]++; 8013cf0: 4b0d ldr r3, [pc, #52] @ (8013d28 ) 8013cf2: 7b1b ldrb r3, [r3, #12] 8013cf4: 3301 adds r3, #1 8013cf6: b2da uxtb r2, r3 8013cf8: 4b0b ldr r3, [pc, #44] @ (8013d28 ) 8013cfa: 731a strb r2, [r3, #12] if (WP_EncInit.CurrentLevel[L] >= num_Curr) { 8013cfc: 4b0a ldr r3, [pc, #40] @ (8013d28 ) 8013cfe: 7b1b ldrb r3, [r3, #12] 8013d00: f897 203a ldrb.w r2, [r7, #58] @ 0x3a 8013d04: 429a cmp r2, r3 8013d06: d831 bhi.n 8013d6c Debug_UART3_printf("좌측 초기화 실패 (모든 시도 완료 - 회전 제한)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013d08: 4817 ldr r0, [pc, #92] @ (8013d68 ) 8013d0a: f00c f853 bl 801fdb4 WP_EncInit.Status[L] = Error; 8013d0e: 4b06 ldr r3, [pc, #24] @ (8013d28 ) 8013d10: 2209 movs r2, #9 8013d12: 705a strb r2, [r3, #1] Motor1.Cmd.Icmd.q = 0.0f; 8013d14: 4b07 ldr r3, [pc, #28] @ (8013d34 ) 8013d16: f04f 0200 mov.w r2, #0 8013d1a: 605a str r2, [r3, #4] return; // SAFETY: 한쪽 모터라도 에러 시 전체 중단 (안전상 필요) 8013d1c: e30e b.n 801433c 8013d1e: bf00 nop 8013d20: 0802a2e4 .word 0x0802a2e4 8013d24: 0802a30c .word 0x0802a30c 8013d28: 200000b8 .word 0x200000b8 8013d2c: 200003ac .word 0x200003ac 8013d30: 20000704 .word 0x20000704 8013d34: 20000574 .word 0x20000574 8013d38: 20000c04 .word 0x20000c04 8013d3c: 08029f48 .word 0x08029f48 8013d40: 200053ec .word 0x200053ec 8013d44: 20000a98 .word 0x20000a98 8013d48: 2000047c .word 0x2000047c 8013d4c: 200004f8 .word 0x200004f8 8013d50: 200000e0 .word 0x200000e0 8013d54: 20000018 .word 0x20000018 8013d58: 08029f60 .word 0x08029f60 8013d5c: 43340000 .word 0x43340000 8013d60: 43b40000 .word 0x43b40000 8013d64: 08029f84 .word 0x08029f84 8013d68: 08029fc8 .word 0x08029fc8 } else { Debug_UART3_printf("좌측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) Float2String(CurrentSequence[WP_EncInit.CurrentLevel[L]], 1)); 8013d6c: 4ba3 ldr r3, [pc, #652] @ (8013ffc ) 8013d6e: 7b1b ldrb r3, [r3, #12] 8013d70: 009b lsls r3, r3, #2 8013d72: 3350 adds r3, #80 @ 0x50 8013d74: 443b add r3, r7 8013d76: 3b4c subs r3, #76 @ 0x4c 8013d78: edd3 7a00 vldr s15, [r3] Debug_UART3_printf("좌측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013d7c: 2001 movs r0, #1 8013d7e: eeb0 0a67 vmov.f32 s0, s15 8013d82: f00c f911 bl 801ffa8 8013d86: 4603 mov r3, r0 8013d88: 4619 mov r1, r3 8013d8a: 489d ldr r0, [pc, #628] @ (8014000 ) 8013d8c: f00c f812 bl 801fdb4 } } Motor1_Ang.AngleElecOffset = RAM_Data.Motor1_Ang_AngleElecOffset + AngleSequence[WP_EncInit.AngleStep[L]]; 8013d90: 4b9c ldr r3, [pc, #624] @ (8014004 ) 8013d92: ed93 7a14 vldr s14, [r3, #80] @ 0x50 8013d96: 4b99 ldr r3, [pc, #612] @ (8013ffc ) 8013d98: 7b9b ldrb r3, [r3, #14] 8013d9a: 009b lsls r3, r3, #2 8013d9c: 3350 adds r3, #80 @ 0x50 8013d9e: 443b add r3, r7 8013da0: 3b44 subs r3, #68 @ 0x44 8013da2: edd3 7a00 vldr s15, [r3] 8013da6: ee77 7a27 vadd.f32 s15, s14, s15 8013daa: 4b97 ldr r3, [pc, #604] @ (8014008 ) 8013dac: edc3 7a00 vstr s15, [r3] Motor1.Cmd.Icmd.q = CurrentSequence[WP_EncInit.CurrentLevel[L]]; 8013db0: 4b92 ldr r3, [pc, #584] @ (8013ffc ) 8013db2: 7b1b ldrb r3, [r3, #12] 8013db4: 009b lsls r3, r3, #2 8013db6: 3350 adds r3, #80 @ 0x50 8013db8: 443b add r3, r7 8013dba: 3b4c subs r3, #76 @ 0x4c 8013dbc: 681b ldr r3, [r3, #0] 8013dbe: 4a93 ldr r2, [pc, #588] @ (801400c ) 8013dc0: 6053 str r3, [r2, #4] } } // 회전 감지 및 Z펄스 대기 / 타임아웃 체크 if (Abs(Motor1_Ang.RpmFil) > RefSpd_Moving) { 8013dc2: 4b91 ldr r3, [pc, #580] @ (8014008 ) 8013dc4: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8013dc8: eef5 7ac0 vcmpe.f32 s15, #0.0 8013dcc: eef1 fa10 vmrs APSR_nzcv, fpscr 8013dd0: dd03 ble.n 8013dda 8013dd2: 4b8d ldr r3, [pc, #564] @ (8014008 ) 8013dd4: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8013dd8: e004 b.n 8013de4 8013dda: 4b8b ldr r3, [pc, #556] @ (8014008 ) 8013ddc: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8013de0: eef1 7a67 vneg.f32 s15, s15 8013de4: ed97 7a11 vldr s14, [r7, #68] @ 0x44 8013de8: eef4 7ac7 vcmpe.f32 s15, s14 8013dec: eef1 fa10 vmrs APSR_nzcv, fpscr 8013df0: dd67 ble.n 8013ec2 // 회전 중 - Z펄스 대기 if (WP_EncInit.StepTime[L] > ZPULSE_WAIT_TIME) { 8013df2: 4b82 ldr r3, [pc, #520] @ (8013ffc ) 8013df4: 699b ldr r3, [r3, #24] 8013df6: 6bfa ldr r2, [r7, #60] @ 0x3c 8013df8: 429a cmp r2, r3 8013dfa: f080 80d1 bcs.w 8013fa0 // Z펄스가 오지 않으면 다음 각도로 Debug_UART3_printf("좌측 Z펄스 대기 타임아웃 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) WP_EncInit.AngleStep[L], WP_EncInit.CurrentLevel[L]); 8013dfe: 4b7f ldr r3, [pc, #508] @ (8013ffc ) 8013e00: 7b9b ldrb r3, [r3, #14] Debug_UART3_printf("좌측 Z펄스 대기 타임아웃 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013e02: 4619 mov r1, r3 WP_EncInit.AngleStep[L], WP_EncInit.CurrentLevel[L]); 8013e04: 4b7d ldr r3, [pc, #500] @ (8013ffc ) 8013e06: 7b1b ldrb r3, [r3, #12] Debug_UART3_printf("좌측 Z펄스 대기 타임아웃 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013e08: 461a mov r2, r3 8013e0a: 4881 ldr r0, [pc, #516] @ (8014010 ) 8013e0c: f00b ffd2 bl 801fdb4 WP_EncInit.AngleStep[L]++; 8013e10: 4b7a ldr r3, [pc, #488] @ (8013ffc ) 8013e12: 7b9b ldrb r3, [r3, #14] 8013e14: 3301 adds r3, #1 8013e16: b2da uxtb r2, r3 8013e18: 4b78 ldr r3, [pc, #480] @ (8013ffc ) 8013e1a: 739a strb r2, [r3, #14] WP_EncInit.StartTime[L] = currentTime; 8013e1c: 4a77 ldr r2, [pc, #476] @ (8013ffc ) 8013e1e: 6b7b ldr r3, [r7, #52] @ 0x34 8013e20: 6113 str r3, [r2, #16] WP_EncInit.StartAngle[L] = Motor1_Ang.AngleElec; // 새 시작 각도 저장 8013e22: 4b79 ldr r3, [pc, #484] @ (8014008 ) 8013e24: 6b5b ldr r3, [r3, #52] @ 0x34 8013e26: 4a75 ldr r2, [pc, #468] @ (8013ffc ) 8013e28: 6213 str r3, [r2, #32] if (WP_EncInit.AngleStep[L] >= num_Ang) { 8013e2a: 4b74 ldr r3, [pc, #464] @ (8013ffc ) 8013e2c: 7b9b ldrb r3, [r3, #14] 8013e2e: f897 203b ldrb.w r2, [r7, #59] @ 0x3b 8013e32: 429a cmp r2, r3 8013e34: d82b bhi.n 8013e8e // 모든 각도 시도 완료 WP_EncInit.AngleStep[L] = 0; 8013e36: 4b71 ldr r3, [pc, #452] @ (8013ffc ) 8013e38: 2200 movs r2, #0 8013e3a: 739a strb r2, [r3, #14] WP_EncInit.CurrentLevel[L]++; 8013e3c: 4b6f ldr r3, [pc, #444] @ (8013ffc ) 8013e3e: 7b1b ldrb r3, [r3, #12] 8013e40: 3301 adds r3, #1 8013e42: b2da uxtb r2, r3 8013e44: 4b6d ldr r3, [pc, #436] @ (8013ffc ) 8013e46: 731a strb r2, [r3, #12] if (WP_EncInit.CurrentLevel[L] >= num_Curr) { 8013e48: 4b6c ldr r3, [pc, #432] @ (8013ffc ) 8013e4a: 7b1b ldrb r3, [r3, #12] 8013e4c: f897 203a ldrb.w r2, [r7, #58] @ 0x3a 8013e50: 429a cmp r2, r3 8013e52: d80a bhi.n 8013e6a // 모든 전류 레벨 시도 완료 - 에러 Debug_UART3_printf("좌측 초기화 실패 (모든 시도 완료 - 타임아웃)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013e54: 486f ldr r0, [pc, #444] @ (8014014 ) 8013e56: f00b ffad bl 801fdb4 WP_EncInit.Status[L] = Error; 8013e5a: 4b68 ldr r3, [pc, #416] @ (8013ffc ) 8013e5c: 2209 movs r2, #9 8013e5e: 705a strb r2, [r3, #1] Motor1.Cmd.Icmd.q = 0.0f; 8013e60: 4b6a ldr r3, [pc, #424] @ (801400c ) 8013e62: f04f 0200 mov.w r2, #0 8013e66: 605a str r2, [r3, #4] return; // SAFETY: 한쪽 모터라도 에러 시 전체 중단 (안전상 필요) 8013e68: e268 b.n 801433c } else { Debug_UART3_printf("좌측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) Float2String(CurrentSequence[WP_EncInit.CurrentLevel[L]], 1)); 8013e6a: 4b64 ldr r3, [pc, #400] @ (8013ffc ) 8013e6c: 7b1b ldrb r3, [r3, #12] 8013e6e: 009b lsls r3, r3, #2 8013e70: 3350 adds r3, #80 @ 0x50 8013e72: 443b add r3, r7 8013e74: 3b4c subs r3, #76 @ 0x4c 8013e76: edd3 7a00 vldr s15, [r3] Debug_UART3_printf("좌측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013e7a: 2001 movs r0, #1 8013e7c: eeb0 0a67 vmov.f32 s0, s15 8013e80: f00c f892 bl 801ffa8 8013e84: 4603 mov r3, r0 8013e86: 4619 mov r1, r3 8013e88: 485d ldr r0, [pc, #372] @ (8014000 ) 8013e8a: f00b ff93 bl 801fdb4 } } // 새로운 각도와 전류 설정 Motor1_Ang.AngleElecOffset = RAM_Data.Motor1_Ang_AngleElecOffset + AngleSequence[WP_EncInit.AngleStep[L]]; 8013e8e: 4b5d ldr r3, [pc, #372] @ (8014004 ) 8013e90: ed93 7a14 vldr s14, [r3, #80] @ 0x50 8013e94: 4b59 ldr r3, [pc, #356] @ (8013ffc ) 8013e96: 7b9b ldrb r3, [r3, #14] 8013e98: 009b lsls r3, r3, #2 8013e9a: 3350 adds r3, #80 @ 0x50 8013e9c: 443b add r3, r7 8013e9e: 3b44 subs r3, #68 @ 0x44 8013ea0: edd3 7a00 vldr s15, [r3] 8013ea4: ee77 7a27 vadd.f32 s15, s14, s15 8013ea8: 4b57 ldr r3, [pc, #348] @ (8014008 ) 8013eaa: edc3 7a00 vstr s15, [r3] Motor1.Cmd.Icmd.q = CurrentSequence[WP_EncInit.CurrentLevel[L]]; 8013eae: 4b53 ldr r3, [pc, #332] @ (8013ffc ) 8013eb0: 7b1b ldrb r3, [r3, #12] 8013eb2: 009b lsls r3, r3, #2 8013eb4: 3350 adds r3, #80 @ 0x50 8013eb6: 443b add r3, r7 8013eb8: 3b4c subs r3, #76 @ 0x4c 8013eba: 681b ldr r3, [r3, #0] 8013ebc: 4a53 ldr r2, [pc, #332] @ (801400c ) 8013ebe: 6053 str r3, [r2, #4] 8013ec0: e06e b.n 8013fa0 } } else if (WP_EncInit.StepTime[L] > ROTATION_WAIT_TIME) { 8013ec2: 4b4e ldr r3, [pc, #312] @ (8013ffc ) 8013ec4: 699b ldr r3, [r3, #24] 8013ec6: 6c3a ldr r2, [r7, #64] @ 0x40 8013ec8: 429a cmp r2, r3 8013eca: d269 bcs.n 8013fa0 // 회전 안 됨 - 다음 각도로 Debug_UART3_printf("좌측 회전 안됨 - 다음 각도 시도 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) WP_EncInit.AngleStep[L], WP_EncInit.CurrentLevel[L]); 8013ecc: 4b4b ldr r3, [pc, #300] @ (8013ffc ) 8013ece: 7b9b ldrb r3, [r3, #14] Debug_UART3_printf("좌측 회전 안됨 - 다음 각도 시도 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013ed0: 4619 mov r1, r3 WP_EncInit.AngleStep[L], WP_EncInit.CurrentLevel[L]); 8013ed2: 4b4a ldr r3, [pc, #296] @ (8013ffc ) 8013ed4: 7b1b ldrb r3, [r3, #12] Debug_UART3_printf("좌측 회전 안됨 - 다음 각도 시도 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013ed6: 461a mov r2, r3 8013ed8: 484f ldr r0, [pc, #316] @ (8014018 ) 8013eda: f00b ff6b bl 801fdb4 WP_EncInit.AngleStep[L]++; 8013ede: 4b47 ldr r3, [pc, #284] @ (8013ffc ) 8013ee0: 7b9b ldrb r3, [r3, #14] 8013ee2: 3301 adds r3, #1 8013ee4: b2da uxtb r2, r3 8013ee6: 4b45 ldr r3, [pc, #276] @ (8013ffc ) 8013ee8: 739a strb r2, [r3, #14] WP_EncInit.StartTime[L] = currentTime; 8013eea: 4a44 ldr r2, [pc, #272] @ (8013ffc ) 8013eec: 6b7b ldr r3, [r7, #52] @ 0x34 8013eee: 6113 str r3, [r2, #16] WP_EncInit.StartAngle[L] = Motor1_Ang.AngleElec; // 새 시작 각도 저장 8013ef0: 4b45 ldr r3, [pc, #276] @ (8014008 ) 8013ef2: 6b5b ldr r3, [r3, #52] @ 0x34 8013ef4: 4a41 ldr r2, [pc, #260] @ (8013ffc ) 8013ef6: 6213 str r3, [r2, #32] if (WP_EncInit.AngleStep[L] >= num_Ang) { 8013ef8: 4b40 ldr r3, [pc, #256] @ (8013ffc ) 8013efa: 7b9b ldrb r3, [r3, #14] 8013efc: f897 203b ldrb.w r2, [r7, #59] @ 0x3b 8013f00: 429a cmp r2, r3 8013f02: d82b bhi.n 8013f5c // 모든 각도 시도 완료 WP_EncInit.AngleStep[L] = 0; 8013f04: 4b3d ldr r3, [pc, #244] @ (8013ffc ) 8013f06: 2200 movs r2, #0 8013f08: 739a strb r2, [r3, #14] WP_EncInit.CurrentLevel[L]++; 8013f0a: 4b3c ldr r3, [pc, #240] @ (8013ffc ) 8013f0c: 7b1b ldrb r3, [r3, #12] 8013f0e: 3301 adds r3, #1 8013f10: b2da uxtb r2, r3 8013f12: 4b3a ldr r3, [pc, #232] @ (8013ffc ) 8013f14: 731a strb r2, [r3, #12] if (WP_EncInit.CurrentLevel[L] >= num_Curr) { 8013f16: 4b39 ldr r3, [pc, #228] @ (8013ffc ) 8013f18: 7b1b ldrb r3, [r3, #12] 8013f1a: f897 203a ldrb.w r2, [r7, #58] @ 0x3a 8013f1e: 429a cmp r2, r3 8013f20: d80a bhi.n 8013f38 // 모든 전류 레벨 시도 완료 - 에러 Debug_UART3_printf("좌측 초기화 실패 (모든 시도 완료 - 회전 없음)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013f22: 483e ldr r0, [pc, #248] @ (801401c ) 8013f24: f00b ff46 bl 801fdb4 WP_EncInit.Status[L] = Error; 8013f28: 4b34 ldr r3, [pc, #208] @ (8013ffc ) 8013f2a: 2209 movs r2, #9 8013f2c: 705a strb r2, [r3, #1] Motor1.Cmd.Icmd.q = 0.0f; 8013f2e: 4b37 ldr r3, [pc, #220] @ (801400c ) 8013f30: f04f 0200 mov.w r2, #0 8013f34: 605a str r2, [r3, #4] return; // SAFETY: 한쪽 모터라도 에러 시 전체 중단 (안전상 필요) 8013f36: e201 b.n 801433c } else { Debug_UART3_printf("좌측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) Float2String(CurrentSequence[WP_EncInit.CurrentLevel[L]], 1)); 8013f38: 4b30 ldr r3, [pc, #192] @ (8013ffc ) 8013f3a: 7b1b ldrb r3, [r3, #12] 8013f3c: 009b lsls r3, r3, #2 8013f3e: 3350 adds r3, #80 @ 0x50 8013f40: 443b add r3, r7 8013f42: 3b4c subs r3, #76 @ 0x4c 8013f44: edd3 7a00 vldr s15, [r3] Debug_UART3_printf("좌측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8013f48: 2001 movs r0, #1 8013f4a: eeb0 0a67 vmov.f32 s0, s15 8013f4e: f00c f82b bl 801ffa8 8013f52: 4603 mov r3, r0 8013f54: 4619 mov r1, r3 8013f56: 482a ldr r0, [pc, #168] @ (8014000 ) 8013f58: f00b ff2c bl 801fdb4 } } // 새로운 각도와 전류 설정 Motor1_Ang.AngleElecOffset = RAM_Data.Motor1_Ang_AngleElecOffset + AngleSequence[WP_EncInit.AngleStep[L]]; 8013f5c: 4b29 ldr r3, [pc, #164] @ (8014004 ) 8013f5e: ed93 7a14 vldr s14, [r3, #80] @ 0x50 8013f62: 4b26 ldr r3, [pc, #152] @ (8013ffc ) 8013f64: 7b9b ldrb r3, [r3, #14] 8013f66: 009b lsls r3, r3, #2 8013f68: 3350 adds r3, #80 @ 0x50 8013f6a: 443b add r3, r7 8013f6c: 3b44 subs r3, #68 @ 0x44 8013f6e: edd3 7a00 vldr s15, [r3] 8013f72: ee77 7a27 vadd.f32 s15, s14, s15 8013f76: 4b24 ldr r3, [pc, #144] @ (8014008 ) 8013f78: edc3 7a00 vstr s15, [r3] Motor1.Cmd.Icmd.q = CurrentSequence[WP_EncInit.CurrentLevel[L]]; 8013f7c: 4b1f ldr r3, [pc, #124] @ (8013ffc ) 8013f7e: 7b1b ldrb r3, [r3, #12] 8013f80: 009b lsls r3, r3, #2 8013f82: 3350 adds r3, #80 @ 0x50 8013f84: 443b add r3, r7 8013f86: 3b4c subs r3, #76 @ 0x4c 8013f88: 681b ldr r3, [r3, #0] 8013f8a: 4a20 ldr r2, [pc, #128] @ (801400c ) 8013f8c: 6053 str r3, [r2, #4] 8013f8e: e007 b.n 8013fa0 } } // Done 또는 Error에서는 모터 정지 else { Motor1.Cmd.Icmd.q = 0.0f; 8013f90: 4b1e ldr r3, [pc, #120] @ (801400c ) 8013f92: f04f 0200 mov.w r2, #0 8013f96: 605a str r2, [r3, #4] Motor1.Cmd.Icmd.d = 0.0f; 8013f98: 4b1c ldr r3, [pc, #112] @ (801400c ) 8013f9a: f04f 0200 mov.w r2, #0 8013f9e: 601a str r2, [r3, #0] } // 우측 모터 관리 (좌측과 독립적으로 진행) if (WP_EncInit.Status[R] == NotDone) { 8013fa0: 4b16 ldr r3, [pc, #88] @ (8013ffc ) 8013fa2: 789b ldrb r3, [r3, #2] 8013fa4: 2b00 cmp r3, #0 8013fa6: f040 81c1 bne.w 801432c WP_EncInit.StepTime[R] = currentTime - WP_EncInit.StartTime[R]; 8013faa: 4b14 ldr r3, [pc, #80] @ (8013ffc ) 8013fac: 695b ldr r3, [r3, #20] 8013fae: 6b7a ldr r2, [r7, #52] @ 0x34 8013fb0: 1ad3 subs r3, r2, r3 8013fb2: 4a12 ldr r2, [pc, #72] @ (8013ffc ) 8013fb4: 61d3 str r3, [r2, #28] // 안전 회전량 체크 (360도 제한) if (Motor2_Ang.RpmFil < -RefSpd_Moving) { 8013fb6: 4b1a ldr r3, [pc, #104] @ (8014020 ) 8013fb8: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8013fbc: edd7 7a11 vldr s15, [r7, #68] @ 0x44 8013fc0: eef1 7a67 vneg.f32 s15, s15 8013fc4: eeb4 7ae7 vcmpe.f32 s14, s15 8013fc8: eef1 fa10 vmrs APSR_nzcv, fpscr 8013fcc: f140 80ab bpl.w 8014126 float rotationAmount = Abs(Motor2_Ang.AngleElec - WP_EncInit.StartAngle[R]); 8013fd0: 4b13 ldr r3, [pc, #76] @ (8014020 ) 8013fd2: ed93 7a0d vldr s14, [r3, #52] @ 0x34 8013fd6: 4b09 ldr r3, [pc, #36] @ (8013ffc ) 8013fd8: edd3 7a09 vldr s15, [r3, #36] @ 0x24 8013fdc: ee77 7a67 vsub.f32 s15, s14, s15 8013fe0: eef5 7ac0 vcmpe.f32 s15, #0.0 8013fe4: eef1 fa10 vmrs APSR_nzcv, fpscr 8013fe8: dd1c ble.n 8014024 8013fea: 4b0d ldr r3, [pc, #52] @ (8014020 ) 8013fec: ed93 7a0d vldr s14, [r3, #52] @ 0x34 8013ff0: 4b02 ldr r3, [pc, #8] @ (8013ffc ) 8013ff2: edd3 7a09 vldr s15, [r3, #36] @ 0x24 8013ff6: ee77 7a67 vsub.f32 s15, s14, s15 8013ffa: e01d b.n 8014038 8013ffc: 200000b8 .word 0x200000b8 8014000: 0802a00c .word 0x0802a00c 8014004: 20000a98 .word 0x20000a98 8014008: 2000047c .word 0x2000047c 801400c: 20000574 .word 0x20000574 8014010: 0802a02c .word 0x0802a02c 8014014: 0802a068 .word 0x0802a068 8014018: 0802a0a8 .word 0x0802a0a8 801401c: 0802a0f0 .word 0x0802a0f0 8014020: 200004f8 .word 0x200004f8 8014024: 4b9e ldr r3, [pc, #632] @ (80142a0 ) 8014026: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801402a: eeb1 7a67 vneg.f32 s14, s15 801402e: 4b9d ldr r3, [pc, #628] @ (80142a4 ) 8014030: edd3 7a09 vldr s15, [r3, #36] @ 0x24 8014034: ee77 7a67 vsub.f32 s15, s14, s15 8014038: edc7 7a12 vstr s15, [r7, #72] @ 0x48 if (rotationAmount > 180.0f) rotationAmount = 360.0f - rotationAmount; // 최단 경로로 계산 801403c: edd7 7a12 vldr s15, [r7, #72] @ 0x48 8014040: ed9f 7a99 vldr s14, [pc, #612] @ 80142a8 8014044: eef4 7ac7 vcmpe.f32 s15, s14 8014048: eef1 fa10 vmrs APSR_nzcv, fpscr 801404c: dd07 ble.n 801405e 801404e: ed9f 7a97 vldr s14, [pc, #604] @ 80142ac 8014052: edd7 7a12 vldr s15, [r7, #72] @ 0x48 8014056: ee77 7a67 vsub.f32 s15, s14, s15 801405a: edc7 7a12 vstr s15, [r7, #72] @ 0x48 if (rotationAmount > 360.0f) { 801405e: edd7 7a12 vldr s15, [r7, #72] @ 0x48 8014062: ed9f 7a92 vldr s14, [pc, #584] @ 80142ac 8014066: eef4 7ac7 vcmpe.f32 s15, s14 801406a: eef1 fa10 vmrs APSR_nzcv, fpscr 801406e: dd5a ble.n 8014126 Debug_UART3_printf("우측 안전 제한: 360도 초과 회전 감지 - 다음 시도\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8014070: 488f ldr r0, [pc, #572] @ (80142b0 ) 8014072: f00b fe9f bl 801fdb4 WP_EncInit.AngleStep[R]++; 8014076: 4b8b ldr r3, [pc, #556] @ (80142a4 ) 8014078: 7bdb ldrb r3, [r3, #15] 801407a: 3301 adds r3, #1 801407c: b2da uxtb r2, r3 801407e: 4b89 ldr r3, [pc, #548] @ (80142a4 ) 8014080: 73da strb r2, [r3, #15] WP_EncInit.StartTime[R] = currentTime; 8014082: 4a88 ldr r2, [pc, #544] @ (80142a4 ) 8014084: 6b7b ldr r3, [r7, #52] @ 0x34 8014086: 6153 str r3, [r2, #20] WP_EncInit.StartAngle[R] = Motor2_Ang.AngleElec; // 새 시작 각도 저장 8014088: 4b85 ldr r3, [pc, #532] @ (80142a0 ) 801408a: 6b5b ldr r3, [r3, #52] @ 0x34 801408c: 4a85 ldr r2, [pc, #532] @ (80142a4 ) 801408e: 6253 str r3, [r2, #36] @ 0x24 if (WP_EncInit.AngleStep[R] >= num_Ang) { 8014090: 4b84 ldr r3, [pc, #528] @ (80142a4 ) 8014092: 7bdb ldrb r3, [r3, #15] 8014094: f897 203b ldrb.w r2, [r7, #59] @ 0x3b 8014098: 429a cmp r2, r3 801409a: d82b bhi.n 80140f4 WP_EncInit.AngleStep[R] = 0; 801409c: 4b81 ldr r3, [pc, #516] @ (80142a4 ) 801409e: 2200 movs r2, #0 80140a0: 73da strb r2, [r3, #15] WP_EncInit.CurrentLevel[R]++; 80140a2: 4b80 ldr r3, [pc, #512] @ (80142a4 ) 80140a4: 7b5b ldrb r3, [r3, #13] 80140a6: 3301 adds r3, #1 80140a8: b2da uxtb r2, r3 80140aa: 4b7e ldr r3, [pc, #504] @ (80142a4 ) 80140ac: 735a strb r2, [r3, #13] if (WP_EncInit.CurrentLevel[R] >= num_Curr) { 80140ae: 4b7d ldr r3, [pc, #500] @ (80142a4 ) 80140b0: 7b5b ldrb r3, [r3, #13] 80140b2: f897 203a ldrb.w r2, [r7, #58] @ 0x3a 80140b6: 429a cmp r2, r3 80140b8: d80a bhi.n 80140d0 Debug_UART3_printf("우측 초기화 실패 (모든 시도 완료 - 회전 제한)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 80140ba: 487e ldr r0, [pc, #504] @ (80142b4 ) 80140bc: f00b fe7a bl 801fdb4 WP_EncInit.Status[R] = Error; 80140c0: 4b78 ldr r3, [pc, #480] @ (80142a4 ) 80140c2: 2209 movs r2, #9 80140c4: 709a strb r2, [r3, #2] Motor2.Cmd.Icmd.q = 0.0f; 80140c6: 4b7c ldr r3, [pc, #496] @ (80142b8 ) 80140c8: f04f 0200 mov.w r2, #0 80140cc: 605a str r2, [r3, #4] return; // SAFETY: 한쪽 모터라도 에러 시 전체 중단 (안전상 필요) 80140ce: e135 b.n 801433c } else { Debug_UART3_printf("우측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) Float2String(CurrentSequence[WP_EncInit.CurrentLevel[R]], 1)); 80140d0: 4b74 ldr r3, [pc, #464] @ (80142a4 ) 80140d2: 7b5b ldrb r3, [r3, #13] 80140d4: 009b lsls r3, r3, #2 80140d6: 3350 adds r3, #80 @ 0x50 80140d8: 443b add r3, r7 80140da: 3b4c subs r3, #76 @ 0x4c 80140dc: edd3 7a00 vldr s15, [r3] Debug_UART3_printf("우측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 80140e0: 2001 movs r0, #1 80140e2: eeb0 0a67 vmov.f32 s0, s15 80140e6: f00b ff5f bl 801ffa8 80140ea: 4603 mov r3, r0 80140ec: 4619 mov r1, r3 80140ee: 4873 ldr r0, [pc, #460] @ (80142bc ) 80140f0: f00b fe60 bl 801fdb4 } } Motor2_Ang.AngleElecOffset = RAM_Data.Motor2_Ang_AngleElecOffset + AngleSequence[WP_EncInit.AngleStep[R]]; 80140f4: 4b72 ldr r3, [pc, #456] @ (80142c0 ) 80140f6: ed93 7a15 vldr s14, [r3, #84] @ 0x54 80140fa: 4b6a ldr r3, [pc, #424] @ (80142a4 ) 80140fc: 7bdb ldrb r3, [r3, #15] 80140fe: 009b lsls r3, r3, #2 8014100: 3350 adds r3, #80 @ 0x50 8014102: 443b add r3, r7 8014104: 3b44 subs r3, #68 @ 0x44 8014106: edd3 7a00 vldr s15, [r3] 801410a: ee77 7a27 vadd.f32 s15, s14, s15 801410e: 4b64 ldr r3, [pc, #400] @ (80142a0 ) 8014110: edc3 7a00 vstr s15, [r3] Motor2.Cmd.Icmd.q = CurrentSequence[WP_EncInit.CurrentLevel[R]]; 8014114: 4b63 ldr r3, [pc, #396] @ (80142a4 ) 8014116: 7b5b ldrb r3, [r3, #13] 8014118: 009b lsls r3, r3, #2 801411a: 3350 adds r3, #80 @ 0x50 801411c: 443b add r3, r7 801411e: 3b4c subs r3, #76 @ 0x4c 8014120: 681b ldr r3, [r3, #0] 8014122: 4a65 ldr r2, [pc, #404] @ (80142b8 ) 8014124: 6053 str r3, [r2, #4] } } // 회전 감지 및 Z펄스 대기 / 타임아웃 체크 if (Abs(Motor2_Ang.RpmFil) > RefSpd_Moving) { 8014126: 4b5e ldr r3, [pc, #376] @ (80142a0 ) 8014128: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801412c: eef5 7ac0 vcmpe.f32 s15, #0.0 8014130: eef1 fa10 vmrs APSR_nzcv, fpscr 8014134: dd03 ble.n 801413e 8014136: 4b5a ldr r3, [pc, #360] @ (80142a0 ) 8014138: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801413c: e004 b.n 8014148 801413e: 4b58 ldr r3, [pc, #352] @ (80142a0 ) 8014140: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8014144: eef1 7a67 vneg.f32 s15, s15 8014148: ed97 7a11 vldr s14, [r7, #68] @ 0x44 801414c: eef4 7ac7 vcmpe.f32 s15, s14 8014150: eef1 fa10 vmrs APSR_nzcv, fpscr 8014154: dd67 ble.n 8014226 // 회전 중 - Z펄스 대기 if (WP_EncInit.StepTime[R] > ZPULSE_WAIT_TIME) { 8014156: 4b53 ldr r3, [pc, #332] @ (80142a4 ) 8014158: 69db ldr r3, [r3, #28] 801415a: 6bfa ldr r2, [r7, #60] @ 0x3c 801415c: 429a cmp r2, r3 801415e: f080 80ed bcs.w 801433c // Z펄스가 오지 않으면 다음 각도로 Debug_UART3_printf("우측 Z펄스 대기 타임아웃 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) WP_EncInit.AngleStep[R], WP_EncInit.CurrentLevel[R]); 8014162: 4b50 ldr r3, [pc, #320] @ (80142a4 ) 8014164: 7bdb ldrb r3, [r3, #15] Debug_UART3_printf("우측 Z펄스 대기 타임아웃 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8014166: 4619 mov r1, r3 WP_EncInit.AngleStep[R], WP_EncInit.CurrentLevel[R]); 8014168: 4b4e ldr r3, [pc, #312] @ (80142a4 ) 801416a: 7b5b ldrb r3, [r3, #13] Debug_UART3_printf("우측 Z펄스 대기 타임아웃 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 801416c: 461a mov r2, r3 801416e: 4855 ldr r0, [pc, #340] @ (80142c4 ) 8014170: f00b fe20 bl 801fdb4 WP_EncInit.AngleStep[R]++; 8014174: 4b4b ldr r3, [pc, #300] @ (80142a4 ) 8014176: 7bdb ldrb r3, [r3, #15] 8014178: 3301 adds r3, #1 801417a: b2da uxtb r2, r3 801417c: 4b49 ldr r3, [pc, #292] @ (80142a4 ) 801417e: 73da strb r2, [r3, #15] WP_EncInit.StartTime[R] = currentTime; 8014180: 4a48 ldr r2, [pc, #288] @ (80142a4 ) 8014182: 6b7b ldr r3, [r7, #52] @ 0x34 8014184: 6153 str r3, [r2, #20] WP_EncInit.StartAngle[R] = Motor2_Ang.AngleElec; // 새 시작 각도 저장 8014186: 4b46 ldr r3, [pc, #280] @ (80142a0 ) 8014188: 6b5b ldr r3, [r3, #52] @ 0x34 801418a: 4a46 ldr r2, [pc, #280] @ (80142a4 ) 801418c: 6253 str r3, [r2, #36] @ 0x24 if (WP_EncInit.AngleStep[R] >= num_Ang) { 801418e: 4b45 ldr r3, [pc, #276] @ (80142a4 ) 8014190: 7bdb ldrb r3, [r3, #15] 8014192: f897 203b ldrb.w r2, [r7, #59] @ 0x3b 8014196: 429a cmp r2, r3 8014198: d82b bhi.n 80141f2 // 모든 각도 시도 완료 WP_EncInit.AngleStep[R] = 0; 801419a: 4b42 ldr r3, [pc, #264] @ (80142a4 ) 801419c: 2200 movs r2, #0 801419e: 73da strb r2, [r3, #15] WP_EncInit.CurrentLevel[R]++; 80141a0: 4b40 ldr r3, [pc, #256] @ (80142a4 ) 80141a2: 7b5b ldrb r3, [r3, #13] 80141a4: 3301 adds r3, #1 80141a6: b2da uxtb r2, r3 80141a8: 4b3e ldr r3, [pc, #248] @ (80142a4 ) 80141aa: 735a strb r2, [r3, #13] if (WP_EncInit.CurrentLevel[R] >= num_Curr) { 80141ac: 4b3d ldr r3, [pc, #244] @ (80142a4 ) 80141ae: 7b5b ldrb r3, [r3, #13] 80141b0: f897 203a ldrb.w r2, [r7, #58] @ 0x3a 80141b4: 429a cmp r2, r3 80141b6: d80a bhi.n 80141ce // 모든 전류 레벨 시도 완료 - 에러 Debug_UART3_printf("우측 초기화 실패 (모든 시도 완료 - 타임아웃)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 80141b8: 4843 ldr r0, [pc, #268] @ (80142c8 ) 80141ba: f00b fdfb bl 801fdb4 WP_EncInit.Status[R] = Error; 80141be: 4b39 ldr r3, [pc, #228] @ (80142a4 ) 80141c0: 2209 movs r2, #9 80141c2: 709a strb r2, [r3, #2] Motor2.Cmd.Icmd.q = 0.0f; 80141c4: 4b3c ldr r3, [pc, #240] @ (80142b8 ) 80141c6: f04f 0200 mov.w r2, #0 80141ca: 605a str r2, [r3, #4] return; // SAFETY: 한쪽 모터라도 에러 시 전체 중단 (안전상 필요) 80141cc: e0b6 b.n 801433c } else { Debug_UART3_printf("우측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) Float2String(CurrentSequence[WP_EncInit.CurrentLevel[R]], 1)); 80141ce: 4b35 ldr r3, [pc, #212] @ (80142a4 ) 80141d0: 7b5b ldrb r3, [r3, #13] 80141d2: 009b lsls r3, r3, #2 80141d4: 3350 adds r3, #80 @ 0x50 80141d6: 443b add r3, r7 80141d8: 3b4c subs r3, #76 @ 0x4c 80141da: edd3 7a00 vldr s15, [r3] Debug_UART3_printf("우측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 80141de: 2001 movs r0, #1 80141e0: eeb0 0a67 vmov.f32 s0, s15 80141e4: f00b fee0 bl 801ffa8 80141e8: 4603 mov r3, r0 80141ea: 4619 mov r1, r3 80141ec: 4833 ldr r0, [pc, #204] @ (80142bc ) 80141ee: f00b fde1 bl 801fdb4 } } // 새로운 각도와 전류 설정 Motor2_Ang.AngleElecOffset = RAM_Data.Motor2_Ang_AngleElecOffset + AngleSequence[WP_EncInit.AngleStep[R]]; 80141f2: 4b33 ldr r3, [pc, #204] @ (80142c0 ) 80141f4: ed93 7a15 vldr s14, [r3, #84] @ 0x54 80141f8: 4b2a ldr r3, [pc, #168] @ (80142a4 ) 80141fa: 7bdb ldrb r3, [r3, #15] 80141fc: 009b lsls r3, r3, #2 80141fe: 3350 adds r3, #80 @ 0x50 8014200: 443b add r3, r7 8014202: 3b44 subs r3, #68 @ 0x44 8014204: edd3 7a00 vldr s15, [r3] 8014208: ee77 7a27 vadd.f32 s15, s14, s15 801420c: 4b24 ldr r3, [pc, #144] @ (80142a0 ) 801420e: edc3 7a00 vstr s15, [r3] Motor2.Cmd.Icmd.q = CurrentSequence[WP_EncInit.CurrentLevel[R]]; 8014212: 4b24 ldr r3, [pc, #144] @ (80142a4 ) 8014214: 7b5b ldrb r3, [r3, #13] 8014216: 009b lsls r3, r3, #2 8014218: 3350 adds r3, #80 @ 0x50 801421a: 443b add r3, r7 801421c: 3b4c subs r3, #76 @ 0x4c 801421e: 681b ldr r3, [r3, #0] 8014220: 4a25 ldr r2, [pc, #148] @ (80142b8 ) 8014222: 6053 str r3, [r2, #4] 8014224: e08a b.n 801433c } } else if (WP_EncInit.StepTime[R] > ROTATION_WAIT_TIME) { 8014226: 4b1f ldr r3, [pc, #124] @ (80142a4 ) 8014228: 69db ldr r3, [r3, #28] 801422a: 6c3a ldr r2, [r7, #64] @ 0x40 801422c: 429a cmp r2, r3 801422e: f080 8085 bcs.w 801433c // 회전 안 됨 - 다음 각도로 Debug_UART3_printf("우측 회전 안됨 - 다음 각도 시도 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) WP_EncInit.AngleStep[R], WP_EncInit.CurrentLevel[R]); 8014232: 4b1c ldr r3, [pc, #112] @ (80142a4 ) 8014234: 7bdb ldrb r3, [r3, #15] Debug_UART3_printf("우측 회전 안됨 - 다음 각도 시도 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8014236: 4619 mov r1, r3 WP_EncInit.AngleStep[R], WP_EncInit.CurrentLevel[R]); 8014238: 4b1a ldr r3, [pc, #104] @ (80142a4 ) 801423a: 7b5b ldrb r3, [r3, #13] Debug_UART3_printf("우측 회전 안됨 - 다음 각도 시도 (각도:%d, 전류:%d)\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 801423c: 461a mov r2, r3 801423e: 4823 ldr r0, [pc, #140] @ (80142cc ) 8014240: f00b fdb8 bl 801fdb4 WP_EncInit.AngleStep[R]++; 8014244: 4b17 ldr r3, [pc, #92] @ (80142a4 ) 8014246: 7bdb ldrb r3, [r3, #15] 8014248: 3301 adds r3, #1 801424a: b2da uxtb r2, r3 801424c: 4b15 ldr r3, [pc, #84] @ (80142a4 ) 801424e: 73da strb r2, [r3, #15] WP_EncInit.StartTime[R] = currentTime; 8014250: 4a14 ldr r2, [pc, #80] @ (80142a4 ) 8014252: 6b7b ldr r3, [r7, #52] @ 0x34 8014254: 6153 str r3, [r2, #20] WP_EncInit.StartAngle[R] = Motor2_Ang.AngleElec; // 새 시작 각도 저장 8014256: 4b12 ldr r3, [pc, #72] @ (80142a0 ) 8014258: 6b5b ldr r3, [r3, #52] @ 0x34 801425a: 4a12 ldr r2, [pc, #72] @ (80142a4 ) 801425c: 6253 str r3, [r2, #36] @ 0x24 if (WP_EncInit.AngleStep[R] >= num_Ang) { 801425e: 4b11 ldr r3, [pc, #68] @ (80142a4 ) 8014260: 7bdb ldrb r3, [r3, #15] 8014262: f897 203b ldrb.w r2, [r7, #59] @ 0x3b 8014266: 429a cmp r2, r3 8014268: d846 bhi.n 80142f8 // 모든 각도 시도 완료 WP_EncInit.AngleStep[R] = 0; 801426a: 4b0e ldr r3, [pc, #56] @ (80142a4 ) 801426c: 2200 movs r2, #0 801426e: 73da strb r2, [r3, #15] WP_EncInit.CurrentLevel[R]++; 8014270: 4b0c ldr r3, [pc, #48] @ (80142a4 ) 8014272: 7b5b ldrb r3, [r3, #13] 8014274: 3301 adds r3, #1 8014276: b2da uxtb r2, r3 8014278: 4b0a ldr r3, [pc, #40] @ (80142a4 ) 801427a: 735a strb r2, [r3, #13] if (WP_EncInit.CurrentLevel[R] >= num_Curr) { 801427c: 4b09 ldr r3, [pc, #36] @ (80142a4 ) 801427e: 7b5b ldrb r3, [r3, #13] 8014280: f897 203a ldrb.w r2, [r7, #58] @ 0x3a 8014284: 429a cmp r2, r3 8014286: d825 bhi.n 80142d4 // 모든 전류 레벨 시도 완료 - 에러 Debug_UART3_printf("우측 초기화 실패 (모든 시도 완료 - 회전 없음)\r\n"); // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 8014288: 4811 ldr r0, [pc, #68] @ (80142d0 ) 801428a: f00b fd93 bl 801fdb4 WP_EncInit.Status[R] = Error; 801428e: 4b05 ldr r3, [pc, #20] @ (80142a4 ) 8014290: 2209 movs r2, #9 8014292: 709a strb r2, [r3, #2] Motor2.Cmd.Icmd.q = 0.0f; 8014294: 4b08 ldr r3, [pc, #32] @ (80142b8 ) 8014296: f04f 0200 mov.w r2, #0 801429a: 605a str r2, [r3, #4] return; // SAFETY: 한쪽 모터라도 에러 시 전체 중단 (안전상 필요) 801429c: e04e b.n 801433c 801429e: bf00 nop 80142a0: 200004f8 .word 0x200004f8 80142a4: 200000b8 .word 0x200000b8 80142a8: 43340000 .word 0x43340000 80142ac: 43b40000 .word 0x43b40000 80142b0: 0802a134 .word 0x0802a134 80142b4: 0802a178 .word 0x0802a178 80142b8: 20000704 .word 0x20000704 80142bc: 0802a1bc .word 0x0802a1bc 80142c0: 20000a98 .word 0x20000a98 80142c4: 0802a1dc .word 0x0802a1dc 80142c8: 0802a218 .word 0x0802a218 80142cc: 0802a258 .word 0x0802a258 80142d0: 0802a2a0 .word 0x0802a2a0 } else { Debug_UART3_printf("우측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) Float2String(CurrentSequence[WP_EncInit.CurrentLevel[R]], 1)); 80142d4: 4b1b ldr r3, [pc, #108] @ (8014344 ) 80142d6: 7b5b ldrb r3, [r3, #13] 80142d8: 009b lsls r3, r3, #2 80142da: 3350 adds r3, #80 @ 0x50 80142dc: 443b add r3, r7 80142de: 3b4c subs r3, #76 @ 0x4c 80142e0: edd3 7a00 vldr s15, [r3] Debug_UART3_printf("우측 전류 변경: %s A\r\n", // TODO: 배포시 제거 (인터럽트에서 UART 출력 위험) 80142e4: 2001 movs r0, #1 80142e6: eeb0 0a67 vmov.f32 s0, s15 80142ea: f00b fe5d bl 801ffa8 80142ee: 4603 mov r3, r0 80142f0: 4619 mov r1, r3 80142f2: 4815 ldr r0, [pc, #84] @ (8014348 ) 80142f4: f00b fd5e bl 801fdb4 } } // 새로운 각도와 전류 설정 Motor2_Ang.AngleElecOffset = RAM_Data.Motor2_Ang_AngleElecOffset + AngleSequence[WP_EncInit.AngleStep[R]]; 80142f8: 4b14 ldr r3, [pc, #80] @ (801434c ) 80142fa: ed93 7a15 vldr s14, [r3, #84] @ 0x54 80142fe: 4b11 ldr r3, [pc, #68] @ (8014344 ) 8014300: 7bdb ldrb r3, [r3, #15] 8014302: 009b lsls r3, r3, #2 8014304: 3350 adds r3, #80 @ 0x50 8014306: 443b add r3, r7 8014308: 3b44 subs r3, #68 @ 0x44 801430a: edd3 7a00 vldr s15, [r3] 801430e: ee77 7a27 vadd.f32 s15, s14, s15 8014312: 4b0f ldr r3, [pc, #60] @ (8014350 ) 8014314: edc3 7a00 vstr s15, [r3] Motor2.Cmd.Icmd.q = CurrentSequence[WP_EncInit.CurrentLevel[R]]; 8014318: 4b0a ldr r3, [pc, #40] @ (8014344 ) 801431a: 7b5b ldrb r3, [r3, #13] 801431c: 009b lsls r3, r3, #2 801431e: 3350 adds r3, #80 @ 0x50 8014320: 443b add r3, r7 8014322: 3b4c subs r3, #76 @ 0x4c 8014324: 681b ldr r3, [r3, #0] 8014326: 4a0b ldr r2, [pc, #44] @ (8014354 ) 8014328: 6053 str r3, [r2, #4] 801432a: e007 b.n 801433c } } // Done 또는 Error에서는 모터 정지 else { Motor2.Cmd.Icmd.q = 0.0f; 801432c: 4b09 ldr r3, [pc, #36] @ (8014354 ) 801432e: f04f 0200 mov.w r2, #0 8014332: 605a str r2, [r3, #4] Motor2.Cmd.Icmd.d = 0.0f; 8014334: 4b07 ldr r3, [pc, #28] @ (8014354 ) 8014336: f04f 0200 mov.w r2, #0 801433a: 601a str r2, [r3, #0] } } } 801433c: 3750 adds r7, #80 @ 0x50 801433e: 46bd mov sp, r7 8014340: bdb0 pop {r4, r5, r7, pc} 8014342: bf00 nop 8014344: 200000b8 .word 0x200000b8 8014348: 0802a1bc .word 0x0802a1bc 801434c: 20000a98 .word 0x20000a98 8014350: 200004f8 .word 0x200004f8 8014354: 20000704 .word 0x20000704 08014358 : //int cnt_FrcCali = 0; int cnt_LED_EncInit, cnt_LED_EncInit_Err, cnt_LED_Calib, cnt_LED_Calib_Err; int Active_ForcedCalib = 0; int ReStart_ForcedCalib = 0; void ForcedCalibration(void) { 8014358: b590 push {r4, r7, lr} 801435a: b093 sub sp, #76 @ 0x4c 801435c: af00 add r7, sp, #0 const float RefSpd_Moving = 2.0f; // 회전 감지 기준 속도 801435e: f04f 4380 mov.w r3, #1073741824 @ 0x40000000 8014362: 643b str r3, [r7, #64] @ 0x40 const float ForcedCaliCurrents[4] = {0.4f, 0.5f, 0.9f, 1.1f}; 8014364: 4b97 ldr r3, [pc, #604] @ (80145c4 ) 8014366: 1d3c adds r4, r7, #4 8014368: cb0f ldmia r3, {r0, r1, r2, r3} 801436a: e884 000f stmia.w r4, {r0, r1, r2, r3} // 수행시간 단축을 위해 변수 없애보기 (250705 오후) //const uint32_t FORCED_CALI_TIMEOUT = 20000; // 20초 //const uint32_t STOP_WAIT_TIME = 750; // 1초 정지 대기 // const float MAX_ROTATION_TURNS = 6480.0f; // 18바퀴 const float MAX_POSITION_MM = 3500.0f; // 3.5m 801436e: 4b96 ldr r3, [pc, #600] @ (80145c8 ) 8014370: 63fb str r3, [r7, #60] @ 0x3c const float MAX_REVERSE_ROTATION = 180.0f; // 역방향 회전 제한 (도) 8014372: 4b96 ldr r3, [pc, #600] @ (80145cc ) 8014374: 63bb str r3, [r7, #56] @ 0x38 const float MAX_WINDING_SPEED = 250.0f; // 최대 감는 속도 (RPM) 8014376: 4b96 ldr r3, [pc, #600] @ (80145d0 ) 8014378: 637b str r3, [r7, #52] @ 0x34 // const uint32_t REVERSE_RETRY_WAIT = 5000; // 5초 역방향 재시도 대기 // const uint8_t MAX_REVERSE_RETRY = 3; // 최대 3회 재시도 uint32_t currentTime = Get_Time(); 801437a: f00b ff55 bl 8020228 801437e: 6338 str r0, [r7, #48] @ 0x30 // 에러 시 중단 if (WP_ForcedCali.Status[L] == Error || WP_ForcedCali.Status[R] == Error) { 8014380: 4b94 ldr r3, [pc, #592] @ (80145d4 ) 8014382: 785b ldrb r3, [r3, #1] 8014384: 2b09 cmp r3, #9 8014386: d003 beq.n 8014390 8014388: 4b92 ldr r3, [pc, #584] @ (80145d4 ) 801438a: 789b ldrb r3, [r3, #2] 801438c: 2b09 cmp r3, #9 801438e: d11c bne.n 80143ca WP_Ctrl.Mode = Inv_Off; 8014390: 4b91 ldr r3, [pc, #580] @ (80145d8 ) 8014392: 2200 movs r2, #0 8014394: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_NoMotor; 8014396: 4b90 ldr r3, [pc, #576] @ (80145d8 ) 8014398: 2200 movs r2, #0 801439a: 705a strb r2, [r3, #1] Motor1.Cmd.Icmd.q = Motor2.Cmd.Icmd.q = 0.0f; 801439c: 4b8f ldr r3, [pc, #572] @ (80145dc ) 801439e: f04f 0200 mov.w r2, #0 80143a2: 605a str r2, [r3, #4] 80143a4: 4b8d ldr r3, [pc, #564] @ (80145dc ) 80143a6: 685b ldr r3, [r3, #4] 80143a8: 4a8d ldr r2, [pc, #564] @ (80145e0 ) 80143aa: 6053 str r3, [r2, #4] Motor1.Cmd.Icmd.d = Motor2.Cmd.Icmd.d = 0.0f; 80143ac: 4b8b ldr r3, [pc, #556] @ (80145dc ) 80143ae: f04f 0200 mov.w r2, #0 80143b2: 601a str r2, [r3, #0] 80143b4: 4b89 ldr r3, [pc, #548] @ (80145dc ) 80143b6: 681b ldr r3, [r3, #0] 80143b8: 4a89 ldr r2, [pc, #548] @ (80145e0 ) 80143ba: 6013 str r3, [r2, #0] Debug_DriveMotor = Drv_NoMotor; 80143bc: 4b89 ldr r3, [pc, #548] @ (80145e4 ) 80143be: 2200 movs r2, #0 80143c0: 701a strb r2, [r3, #0] WP_ForcedCali.Flag = Error; 80143c2: 4b84 ldr r3, [pc, #528] @ (80145d4 ) 80143c4: 2209 movs r2, #9 80143c6: 701a strb r2, [r3, #0] return; 80143c8: e2cc b.n 8014964 } // 양쪽 완료 시 if (WP_ForcedCali.Status[L] == Done && WP_ForcedCali.Status[R] == Done) { 80143ca: 4b82 ldr r3, [pc, #520] @ (80145d4 ) 80143cc: 785b ldrb r3, [r3, #1] 80143ce: 2b01 cmp r3, #1 80143d0: d132 bne.n 8014438 80143d2: 4b80 ldr r3, [pc, #512] @ (80145d4 ) 80143d4: 789b ldrb r3, [r3, #2] 80143d6: 2b01 cmp r3, #1 80143d8: d12e bne.n 8014438 if(WP_ForcedCali.Flag != Done) { 80143da: 4b7e ldr r3, [pc, #504] @ (80145d4 ) 80143dc: 781b ldrb r3, [r3, #0] 80143de: 2b01 cmp r3, #1 80143e0: d005 beq.n 80143ee Debug_UART3_printf("Forced Calibration Success\r\n"); 80143e2: 4881 ldr r0, [pc, #516] @ (80145e8 ) 80143e4: f00b fce6 bl 801fdb4 WP_ForcedCali.Flag = Done; 80143e8: 4b7a ldr r3, [pc, #488] @ (80145d4 ) 80143ea: 2201 movs r2, #1 80143ec: 701a strb r2, [r3, #0] } // 모터 제어 변수 초기화 Motor1.Cmd.Icmd.q = Motor2.Cmd.Icmd.q = 0.0f; 80143ee: 4b7b ldr r3, [pc, #492] @ (80145dc ) 80143f0: f04f 0200 mov.w r2, #0 80143f4: 605a str r2, [r3, #4] 80143f6: 4b79 ldr r3, [pc, #484] @ (80145dc ) 80143f8: 685b ldr r3, [r3, #4] 80143fa: 4a79 ldr r2, [pc, #484] @ (80145e0 ) 80143fc: 6053 str r3, [r2, #4] Motor1.Cmd.Icmd.d = Motor2.Cmd.Icmd.d = 0.0f; 80143fe: 4b77 ldr r3, [pc, #476] @ (80145dc ) 8014400: f04f 0200 mov.w r2, #0 8014404: 601a str r2, [r3, #0] 8014406: 4b75 ldr r3, [pc, #468] @ (80145dc ) 8014408: 681b ldr r3, [r3, #0] 801440a: 4a75 ldr r2, [pc, #468] @ (80145e0 ) 801440c: 6013 str r3, [r2, #0] WP_Ctrl.Mode = Inv_Off; 801440e: 4b72 ldr r3, [pc, #456] @ (80145d8 ) 8014410: 2200 movs r2, #0 8014412: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_NoMotor; // 이게 맞나? 8014414: 4b73 ldr r3, [pc, #460] @ (80145e4 ) 8014416: 2200 movs r2, #0 8014418: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_NoMotor; 801441a: 4b6f ldr r3, [pc, #444] @ (80145d8 ) 801441c: 2200 movs r2, #0 801441e: 705a strb r2, [r3, #1] // 성공 시 웰컴라이트 띄워주고 플래그 받고 나서 RunGym으로 업데이트하자! if(cnt_LED_Welcome > 0){ 8014420: 4b72 ldr r3, [pc, #456] @ (80145ec ) 8014422: 781b ldrb r3, [r3, #0] 8014424: 2b00 cmp r3, #0 8014426: f000 829c beq.w 8014962 Drive_Status = RunGym; 801442a: 4b71 ldr r3, [pc, #452] @ (80145f0 ) 801442c: 2203 movs r2, #3 801442e: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_BothMotor; 8014430: 4b6c ldr r3, [pc, #432] @ (80145e4 ) 8014432: 2203 movs r2, #3 8014434: 701a strb r2, [r3, #0] } return; 8014436: e294 b.n 8014962 } // 첫 진입 시 초기화 if (WP_ForcedCali.Step[L] == 0 && WP_ForcedCali.Step[R] == 0) { 8014438: 4b66 ldr r3, [pc, #408] @ (80145d4 ) 801443a: 78db ldrb r3, [r3, #3] 801443c: 2b00 cmp r3, #0 801443e: d150 bne.n 80144e2 8014440: 4b64 ldr r3, [pc, #400] @ (80145d4 ) 8014442: 791b ldrb r3, [r3, #4] 8014444: 2b00 cmp r3, #0 8014446: d14c bne.n 80144e2 WP_Ctrl.Mode = Inv_TorqueCtrl; 8014448: 4b63 ldr r3, [pc, #396] @ (80145d8 ) 801444a: 2205 movs r2, #5 801444c: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_BothMotor; 801444e: 4b65 ldr r3, [pc, #404] @ (80145e4 ) 8014450: 2203 movs r2, #3 8014452: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_BothMotor; 8014454: 4b60 ldr r3, [pc, #384] @ (80145d8 ) 8014456: 2203 movs r2, #3 8014458: 705a strb r2, [r3, #1] WP_ForcedCali.StartTime[L] = WP_ForcedCali.StartTime[R] = currentTime; 801445a: 4a5e ldr r2, [pc, #376] @ (80145d4 ) 801445c: 6b3b ldr r3, [r7, #48] @ 0x30 801445e: 60d3 str r3, [r2, #12] 8014460: 4b5c ldr r3, [pc, #368] @ (80145d4 ) 8014462: 68db ldr r3, [r3, #12] 8014464: 4a5b ldr r2, [pc, #364] @ (80145d4 ) 8014466: 6093 str r3, [r2, #8] WP_ForcedCali.Step[L] = WP_ForcedCali.Step[R] = 1; 8014468: 4b5a ldr r3, [pc, #360] @ (80145d4 ) 801446a: 2201 movs r2, #1 801446c: 711a strb r2, [r3, #4] 801446e: 4b59 ldr r3, [pc, #356] @ (80145d4 ) 8014470: 791a ldrb r2, [r3, #4] 8014472: 4b58 ldr r3, [pc, #352] @ (80145d4 ) 8014474: 70da strb r2, [r3, #3] WP_ForcedCali.CurrentLevel[L] = WP_ForcedCali.CurrentLevel[R] = 2; // 0.8A에서 시작 8014476: 4b57 ldr r3, [pc, #348] @ (80145d4 ) 8014478: 2202 movs r2, #2 801447a: 765a strb r2, [r3, #25] 801447c: 4b55 ldr r3, [pc, #340] @ (80145d4 ) 801447e: 7e5a ldrb r2, [r3, #25] 8014480: 4b54 ldr r3, [pc, #336] @ (80145d4 ) 8014482: 761a strb r2, [r3, #24] WP_ForcedCali.StartAngle[L] = Motor1_Ang.AngleMechAll; 8014484: 4b5b ldr r3, [pc, #364] @ (80145f4 ) 8014486: 6b1b ldr r3, [r3, #48] @ 0x30 8014488: 4a52 ldr r2, [pc, #328] @ (80145d4 ) 801448a: 61d3 str r3, [r2, #28] WP_ForcedCali.StartAngle[R] = Motor2_Ang.AngleMechAll; 801448c: 4b5a ldr r3, [pc, #360] @ (80145f8 ) 801448e: 6b1b ldr r3, [r3, #48] @ 0x30 8014490: 4a50 ldr r2, [pc, #320] @ (80145d4 ) 8014492: 6213 str r3, [r2, #32] WP_ForcedCali.StartPosition[L] = WP_Gym.Position[L]; 8014494: 4b59 ldr r3, [pc, #356] @ (80145fc ) 8014496: f9b3 3014 ldrsh.w r3, [r3, #20] 801449a: ee07 3a90 vmov s15, r3 801449e: eef8 7ae7 vcvt.f32.s32 s15, s15 80144a2: 4b4c ldr r3, [pc, #304] @ (80145d4 ) 80144a4: edc3 7a09 vstr s15, [r3, #36] @ 0x24 WP_ForcedCali.StartPosition[R] = WP_Gym.Position[R]; 80144a8: 4b54 ldr r3, [pc, #336] @ (80145fc ) 80144aa: f9b3 3016 ldrsh.w r3, [r3, #22] 80144ae: ee07 3a90 vmov s15, r3 80144b2: eef8 7ae7 vcvt.f32.s32 s15, s15 80144b6: 4b47 ldr r3, [pc, #284] @ (80145d4 ) 80144b8: edc3 7a0a vstr s15, [r3, #40] @ 0x28 Motor1.Cmd.Icmd.q = Motor2.Cmd.Icmd.q = ForcedCaliCurrents[2]; // 0.8A 80144bc: 68fb ldr r3, [r7, #12] 80144be: 4a47 ldr r2, [pc, #284] @ (80145dc ) 80144c0: 6053 str r3, [r2, #4] 80144c2: 4b46 ldr r3, [pc, #280] @ (80145dc ) 80144c4: 685b ldr r3, [r3, #4] 80144c6: 4a46 ldr r2, [pc, #280] @ (80145e0 ) 80144c8: 6053 str r3, [r2, #4] Motor1.Cmd.Icmd.d = Motor2.Cmd.Icmd.d = 0.0f; 80144ca: 4b44 ldr r3, [pc, #272] @ (80145dc ) 80144cc: f04f 0200 mov.w r2, #0 80144d0: 601a str r2, [r3, #0] 80144d2: 4b42 ldr r3, [pc, #264] @ (80145dc ) 80144d4: 681b ldr r3, [r3, #0] 80144d6: 4a42 ldr r2, [pc, #264] @ (80145e0 ) 80144d8: 6013 str r3, [r2, #0] Debug_UART3_printf("Forced Calibration Started (TorqueCtrl)\r\n"); 80144da: 4849 ldr r0, [pc, #292] @ (8014600 ) 80144dc: f00b fc6a bl 801fdb4 return; 80144e0: e240 b.n 8014964 } // 좌우 모터 처리 루프 for (int motor = L; motor <= R; motor++) { 80144e2: 2300 movs r3, #0 80144e4: 647b str r3, [r7, #68] @ 0x44 80144e6: e237 b.n 8014958 if (WP_ForcedCali.Status[motor] != NotDone) continue; 80144e8: 4a3a ldr r2, [pc, #232] @ (80145d4 ) 80144ea: 6c7b ldr r3, [r7, #68] @ 0x44 80144ec: 4413 add r3, r2 80144ee: 3301 adds r3, #1 80144f0: 781b ldrb r3, [r3, #0] 80144f2: 2b00 cmp r3, #0 80144f4: f040 822c bne.w 8014950 float rpm = (motor == L) ? Motor1_Ang.RpmFil : Motor2_Ang.RpmFil; 80144f8: 6c7b ldr r3, [r7, #68] @ 0x44 80144fa: 2b00 cmp r3, #0 80144fc: d102 bne.n 8014504 80144fe: 4b3d ldr r3, [pc, #244] @ (80145f4 ) 8014500: 6c5b ldr r3, [r3, #68] @ 0x44 8014502: e001 b.n 8014508 8014504: 4b3c ldr r3, [pc, #240] @ (80145f8 ) 8014506: 6c5b ldr r3, [r3, #68] @ 0x44 8014508: 62fb str r3, [r7, #44] @ 0x2c float angle = (motor == L) ? Motor1_Ang.AngleMechAll : Motor2_Ang.AngleMechAll; 801450a: 6c7b ldr r3, [r7, #68] @ 0x44 801450c: 2b00 cmp r3, #0 801450e: d102 bne.n 8014516 8014510: 4b38 ldr r3, [pc, #224] @ (80145f4 ) 8014512: 6b1b ldr r3, [r3, #48] @ 0x30 8014514: e001 b.n 801451a 8014516: 4b38 ldr r3, [pc, #224] @ (80145f8 ) 8014518: 6b1b ldr r3, [r3, #48] @ 0x30 801451a: 62bb str r3, [r7, #40] @ 0x28 float position = (motor == L) ? WP_Gym.Position[L] : WP_Gym.Position[R]; 801451c: 6c7b ldr r3, [r7, #68] @ 0x44 801451e: 2b00 cmp r3, #0 8014520: d107 bne.n 8014532 8014522: 4b36 ldr r3, [pc, #216] @ (80145fc ) 8014524: f9b3 3014 ldrsh.w r3, [r3, #20] 8014528: ee07 3a90 vmov s15, r3 801452c: eef8 7ae7 vcvt.f32.s32 s15, s15 8014530: e006 b.n 8014540 8014532: 4b32 ldr r3, [pc, #200] @ (80145fc ) 8014534: f9b3 3016 ldrsh.w r3, [r3, #22] 8014538: ee07 3a90 vmov s15, r3 801453c: eef8 7ae7 vcvt.f32.s32 s15, s15 8014540: edc7 7a09 vstr s15, [r7, #36] @ 0x24 // 과속 감는 속도 체크 (전류 감소로 속도 제어) if (rpm > MAX_WINDING_SPEED) { 8014544: ed97 7a0b vldr s14, [r7, #44] @ 0x2c 8014548: edd7 7a0d vldr s15, [r7, #52] @ 0x34 801454c: eeb4 7ae7 vcmpe.f32 s14, s15 8014550: eef1 fa10 vmrs APSR_nzcv, fpscr 8014554: dd5f ble.n 8014616 if (WP_ForcedCali.CurrentLevel[motor] > 0) { 8014556: 4a1f ldr r2, [pc, #124] @ (80145d4 ) 8014558: 6c7b ldr r3, [r7, #68] @ 0x44 801455a: 4413 add r3, r2 801455c: 3318 adds r3, #24 801455e: 781b ldrb r3, [r3, #0] 8014560: 2b00 cmp r3, #0 8014562: d058 beq.n 8014616 WP_ForcedCali.CurrentLevel[motor]--; // 더 낮은 전류로 8014564: 4a1b ldr r2, [pc, #108] @ (80145d4 ) 8014566: 6c7b ldr r3, [r7, #68] @ 0x44 8014568: 4413 add r3, r2 801456a: 3318 adds r3, #24 801456c: 781b ldrb r3, [r3, #0] 801456e: 3b01 subs r3, #1 8014570: b2d9 uxtb r1, r3 8014572: 4a18 ldr r2, [pc, #96] @ (80145d4 ) 8014574: 6c7b ldr r3, [r7, #68] @ 0x44 8014576: 4413 add r3, r2 8014578: 3318 adds r3, #24 801457a: 460a mov r2, r1 801457c: 701a strb r2, [r3, #0] float newCurrent = ForcedCaliCurrents[WP_ForcedCali.CurrentLevel[motor]]; 801457e: 4a15 ldr r2, [pc, #84] @ (80145d4 ) 8014580: 6c7b ldr r3, [r7, #68] @ 0x44 8014582: 4413 add r3, r2 8014584: 3318 adds r3, #24 8014586: 781b ldrb r3, [r3, #0] 8014588: 009b lsls r3, r3, #2 801458a: 3348 adds r3, #72 @ 0x48 801458c: 443b add r3, r7 801458e: 3b44 subs r3, #68 @ 0x44 8014590: 681b ldr r3, [r3, #0] 8014592: 623b str r3, [r7, #32] Debug_UART3_printf("%s 과속 감지 - 전류 감소: %s A\r\n", (motor == L) ? "좌측" : "우측", 8014594: 6c7b ldr r3, [r7, #68] @ 0x44 8014596: 2b00 cmp r3, #0 8014598: d101 bne.n 801459e 801459a: 4c1a ldr r4, [pc, #104] @ (8014604 ) 801459c: e000 b.n 80145a0 801459e: 4c1a ldr r4, [pc, #104] @ (8014608 ) 80145a0: 2001 movs r0, #1 80145a2: ed97 0a08 vldr s0, [r7, #32] 80145a6: f00b fcff bl 801ffa8 80145aa: 4603 mov r3, r0 80145ac: 461a mov r2, r3 80145ae: 4621 mov r1, r4 80145b0: 4816 ldr r0, [pc, #88] @ (801460c ) 80145b2: f00b fbff bl 801fdb4 Float2String(newCurrent, 1)); if (motor == L) Motor1.Cmd.Icmd.q = newCurrent; 80145b6: 6c7b ldr r3, [r7, #68] @ 0x44 80145b8: 2b00 cmp r3, #0 80145ba: d129 bne.n 8014610 80145bc: 4a08 ldr r2, [pc, #32] @ (80145e0 ) 80145be: 6a3b ldr r3, [r7, #32] 80145c0: 6053 str r3, [r2, #4] 80145c2: e028 b.n 8014616 80145c4: 0802a520 .word 0x0802a520 80145c8: 455ac000 .word 0x455ac000 80145cc: 43340000 .word 0x43340000 80145d0: 437a0000 .word 0x437a0000 80145d4: 200000e0 .word 0x200000e0 80145d8: 200003ac .word 0x200003ac 80145dc: 20000704 .word 0x20000704 80145e0: 20000574 .word 0x20000574 80145e4: 20000c04 .word 0x20000c04 80145e8: 0802a314 .word 0x0802a314 80145ec: 20000bf5 .word 0x20000bf5 80145f0: 20000018 .word 0x20000018 80145f4: 2000047c .word 0x2000047c 80145f8: 200004f8 .word 0x200004f8 80145fc: 20000148 .word 0x20000148 8014600: 0802a334 .word 0x0802a334 8014604: 0802a360 .word 0x0802a360 8014608: 0802a368 .word 0x0802a368 801460c: 0802a370 .word 0x0802a370 else Motor2.Cmd.Icmd.q = newCurrent; 8014610: 4aa8 ldr r2, [pc, #672] @ (80148b4 ) 8014612: 6a3b ldr r3, [r7, #32] 8014614: 6053 str r3, [r2, #4] } // 역방향 180도 초과 회전 체크 /* 재시도 없는 버전 보존 */ if (rpm < -RefSpd_Moving) { 8014616: edd7 7a10 vldr s15, [r7, #64] @ 0x40 801461a: eef1 7a67 vneg.f32 s15, s15 801461e: ed97 7a0b vldr s14, [r7, #44] @ 0x2c 8014622: eeb4 7ae7 vcmpe.f32 s14, s15 8014626: eef1 fa10 vmrs APSR_nzcv, fpscr 801462a: d533 bpl.n 8014694 float reverseRotation = WP_ForcedCali.StartAngle[motor] - angle; // 역방향은 감소 801462c: 4aa2 ldr r2, [pc, #648] @ (80148b8 ) 801462e: 6c7b ldr r3, [r7, #68] @ 0x44 8014630: 3306 adds r3, #6 8014632: 009b lsls r3, r3, #2 8014634: 4413 add r3, r2 8014636: 3304 adds r3, #4 8014638: ed93 7a00 vldr s14, [r3] 801463c: edd7 7a0a vldr s15, [r7, #40] @ 0x28 8014640: ee77 7a67 vsub.f32 s15, s14, s15 8014644: edc7 7a07 vstr s15, [r7, #28] if (reverseRotation > MAX_REVERSE_ROTATION) { 8014648: ed97 7a07 vldr s14, [r7, #28] 801464c: edd7 7a0e vldr s15, [r7, #56] @ 0x38 8014650: eeb4 7ae7 vcmpe.f32 s14, s15 8014654: eef1 fa10 vmrs APSR_nzcv, fpscr 8014658: dd1c ble.n 8014694 Debug_UART3_printf("%s 역방향 180도 초과 회전 감지 - 에러\r\n", (motor == L) ? "좌측" : "우측"); 801465a: 6c7b ldr r3, [r7, #68] @ 0x44 801465c: 2b00 cmp r3, #0 801465e: d101 bne.n 8014664 8014660: 4b96 ldr r3, [pc, #600] @ (80148bc ) 8014662: e000 b.n 8014666 8014664: 4b96 ldr r3, [pc, #600] @ (80148c0 ) 8014666: 4619 mov r1, r3 8014668: 4896 ldr r0, [pc, #600] @ (80148c4 ) 801466a: f00b fba3 bl 801fdb4 WP_ForcedCali.Status[motor] = Error; 801466e: 4a92 ldr r2, [pc, #584] @ (80148b8 ) 8014670: 6c7b ldr r3, [r7, #68] @ 0x44 8014672: 4413 add r3, r2 8014674: 3301 adds r3, #1 8014676: 2209 movs r2, #9 8014678: 701a strb r2, [r3, #0] if (motor == L) Motor1.Cmd.Icmd.q = 0.0f; 801467a: 6c7b ldr r3, [r7, #68] @ 0x44 801467c: 2b00 cmp r3, #0 801467e: d104 bne.n 801468a 8014680: 4b91 ldr r3, [pc, #580] @ (80148c8 ) 8014682: f04f 0200 mov.w r2, #0 8014686: 605a str r2, [r3, #4] else Motor2.Cmd.Icmd.q = 0.0f; return; 8014688: e16c b.n 8014964 else Motor2.Cmd.Icmd.q = 0.0f; 801468a: 4b8a ldr r3, [pc, #552] @ (80148b4 ) 801468c: f04f 0200 mov.w r2, #0 8014690: 605a str r2, [r3, #4] return; 8014692: e167 b.n 8014964 } } // 타임아웃 체크 if (currentTime - WP_ForcedCali.StartTime[motor] > 20000) { // FORCED_CALI_TIMEOUT 8014694: 4a88 ldr r2, [pc, #544] @ (80148b8 ) 8014696: 6c7b ldr r3, [r7, #68] @ 0x44 8014698: 3302 adds r3, #2 801469a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 801469e: 6b3a ldr r2, [r7, #48] @ 0x30 80146a0: 1ad3 subs r3, r2, r3 80146a2: f644 6220 movw r2, #20000 @ 0x4e20 80146a6: 4293 cmp r3, r2 80146a8: d91c bls.n 80146e4 Debug_UART3_printf("%s 강제 캘리브레이션 타임아웃 (20초 초과)\r\n", (motor == L) ? "좌측" : "우측"); 80146aa: 6c7b ldr r3, [r7, #68] @ 0x44 80146ac: 2b00 cmp r3, #0 80146ae: d101 bne.n 80146b4 80146b0: 4b82 ldr r3, [pc, #520] @ (80148bc ) 80146b2: e000 b.n 80146b6 80146b4: 4b82 ldr r3, [pc, #520] @ (80148c0 ) 80146b6: 4619 mov r1, r3 80146b8: 4884 ldr r0, [pc, #528] @ (80148cc ) 80146ba: f00b fb7b bl 801fdb4 WP_ForcedCali.Status[motor] = Error; 80146be: 4a7e ldr r2, [pc, #504] @ (80148b8 ) 80146c0: 6c7b ldr r3, [r7, #68] @ 0x44 80146c2: 4413 add r3, r2 80146c4: 3301 adds r3, #1 80146c6: 2209 movs r2, #9 80146c8: 701a strb r2, [r3, #0] if (motor == L) Motor1.Cmd.Icmd.q = 0.0f; 80146ca: 6c7b ldr r3, [r7, #68] @ 0x44 80146cc: 2b00 cmp r3, #0 80146ce: d104 bne.n 80146da 80146d0: 4b7d ldr r3, [pc, #500] @ (80148c8 ) 80146d2: f04f 0200 mov.w r2, #0 80146d6: 605a str r2, [r3, #4] else Motor2.Cmd.Icmd.q = 0.0f; return; 80146d8: e144 b.n 8014964 else Motor2.Cmd.Icmd.q = 0.0f; 80146da: 4b76 ldr r3, [pc, #472] @ (80148b4 ) 80146dc: f04f 0200 mov.w r2, #0 80146e0: 605a str r2, [r3, #4] return; 80146e2: e13f b.n 8014964 return; } */ // 과이동 체크 if ((position - WP_ForcedCali.StartPosition[motor]) > MAX_POSITION_MM) { 80146e4: 4a74 ldr r2, [pc, #464] @ (80148b8 ) 80146e6: 6c7b ldr r3, [r7, #68] @ 0x44 80146e8: 3308 adds r3, #8 80146ea: 009b lsls r3, r3, #2 80146ec: 4413 add r3, r2 80146ee: 3304 adds r3, #4 80146f0: edd3 7a00 vldr s15, [r3] 80146f4: ed97 7a09 vldr s14, [r7, #36] @ 0x24 80146f8: ee77 7a67 vsub.f32 s15, s14, s15 80146fc: ed97 7a0f vldr s14, [r7, #60] @ 0x3c 8014700: eeb4 7ae7 vcmpe.f32 s14, s15 8014704: eef1 fa10 vmrs APSR_nzcv, fpscr 8014708: d51c bpl.n 8014744 Debug_UART3_printf("%s 과도한 이동거리 감지 (3.5m 초과)\r\n", (motor == L) ? "좌측" : "우측"); 801470a: 6c7b ldr r3, [r7, #68] @ 0x44 801470c: 2b00 cmp r3, #0 801470e: d101 bne.n 8014714 8014710: 4b6a ldr r3, [pc, #424] @ (80148bc ) 8014712: e000 b.n 8014716 8014714: 4b6a ldr r3, [pc, #424] @ (80148c0 ) 8014716: 4619 mov r1, r3 8014718: 486d ldr r0, [pc, #436] @ (80148d0 ) 801471a: f00b fb4b bl 801fdb4 WP_ForcedCali.Status[motor] = Error; 801471e: 4a66 ldr r2, [pc, #408] @ (80148b8 ) 8014720: 6c7b ldr r3, [r7, #68] @ 0x44 8014722: 4413 add r3, r2 8014724: 3301 adds r3, #1 8014726: 2209 movs r2, #9 8014728: 701a strb r2, [r3, #0] if (motor == L) Motor1.Cmd.Icmd.q = 0.0f; 801472a: 6c7b ldr r3, [r7, #68] @ 0x44 801472c: 2b00 cmp r3, #0 801472e: d104 bne.n 801473a 8014730: 4b65 ldr r3, [pc, #404] @ (80148c8 ) 8014732: f04f 0200 mov.w r2, #0 8014736: 605a str r2, [r3, #4] else Motor2.Cmd.Icmd.q = 0.0f; return; 8014738: e114 b.n 8014964 else Motor2.Cmd.Icmd.q = 0.0f; 801473a: 4b5e ldr r3, [pc, #376] @ (80148b4 ) 801473c: f04f 0200 mov.w r2, #0 8014740: 605a str r2, [r3, #4] return; 8014742: e10f b.n 8014964 } // 회전/정지 상태 처리 uint8_t isRotating = (Abs(rpm) > RefSpd_Moving); 8014744: edd7 7a0b vldr s15, [r7, #44] @ 0x2c 8014748: eef5 7ac0 vcmpe.f32 s15, #0.0 801474c: eef1 fa10 vmrs APSR_nzcv, fpscr 8014750: dd02 ble.n 8014758 8014752: edd7 7a0b vldr s15, [r7, #44] @ 0x2c 8014756: e003 b.n 8014760 8014758: edd7 7a0b vldr s15, [r7, #44] @ 0x2c 801475c: eef1 7a67 vneg.f32 s15, s15 8014760: ed97 7a10 vldr s14, [r7, #64] @ 0x40 8014764: eef4 7ac7 vcmpe.f32 s15, s14 8014768: eef1 fa10 vmrs APSR_nzcv, fpscr 801476c: bfcc ite gt 801476e: 2301 movgt r3, #1 8014770: 2300 movle r3, #0 8014772: b2db uxtb r3, r3 8014774: 76fb strb r3, [r7, #27] if (WP_ForcedCali.WasRotating[motor] && !isRotating) { 8014776: 4a50 ldr r2, [pc, #320] @ (80148b8 ) 8014778: 6c7b ldr r3, [r7, #68] @ 0x44 801477a: 4413 add r3, r2 801477c: 332c adds r3, #44 @ 0x2c 801477e: 781b ldrb r3, [r3, #0] 8014780: 2b00 cmp r3, #0 8014782: d008 beq.n 8014796 8014784: 7efb ldrb r3, [r7, #27] 8014786: 2b00 cmp r3, #0 8014788: d105 bne.n 8014796 // 회전→정지 전환 WP_ForcedCali.StopTime[motor] = currentTime; 801478a: 494b ldr r1, [pc, #300] @ (80148b8 ) 801478c: 6c7b ldr r3, [r7, #68] @ 0x44 801478e: 3304 adds r3, #4 8014790: 6b3a ldr r2, [r7, #48] @ 0x30 8014792: f841 2023 str.w r2, [r1, r3, lsl #2] } if (!isRotating && (currentTime - WP_ForcedCali.StopTime[motor]) > 750) { // STOP_WAIT_TIME 8014796: 7efb ldrb r3, [r7, #27] 8014798: 2b00 cmp r3, #0 801479a: f040 80d2 bne.w 8014942 801479e: 4a46 ldr r2, [pc, #280] @ (80148b8 ) 80147a0: 6c7b ldr r3, [r7, #68] @ 0x44 80147a2: 3304 adds r3, #4 80147a4: f852 3023 ldr.w r3, [r2, r3, lsl #2] 80147a8: 6b3a ldr r2, [r7, #48] @ 0x30 80147aa: 1ad3 subs r3, r2, r3 80147ac: f240 22ee movw r2, #750 @ 0x2ee 80147b0: 4293 cmp r3, r2 80147b2: f240 80c6 bls.w 8014942 // 1초 이상 정지 - 회전 안 되면 전류 상승, 회전 후 정지면 완료 if (WP_ForcedCali.WasRotating[motor]) { 80147b6: 4a40 ldr r2, [pc, #256] @ (80148b8 ) 80147b8: 6c7b ldr r3, [r7, #68] @ 0x44 80147ba: 4413 add r3, r2 80147bc: 332c adds r3, #44 @ 0x2c 80147be: 781b ldrb r3, [r3, #0] 80147c0: 2b00 cmp r3, #0 80147c2: d035 beq.n 8014830 // 회전 후 정지 - 완료 Debug_UART3_printf("%s 강제 캘리브레이션 완료\r\n", (motor == L) ? "좌측" : "우측"); 80147c4: 6c7b ldr r3, [r7, #68] @ 0x44 80147c6: 2b00 cmp r3, #0 80147c8: d101 bne.n 80147ce 80147ca: 4b3c ldr r3, [pc, #240] @ (80148bc ) 80147cc: e000 b.n 80147d0 80147ce: 4b3c ldr r3, [pc, #240] @ (80148c0 ) 80147d0: 4619 mov r1, r3 80147d2: 4840 ldr r0, [pc, #256] @ (80148d4 ) 80147d4: f00b faee bl 801fdb4 if (motor == L) Motor1.Cmd.Icmd.q = 0.0f; 80147d8: 6c7b ldr r3, [r7, #68] @ 0x44 80147da: 2b00 cmp r3, #0 80147dc: d104 bne.n 80147e8 80147de: 4b3a ldr r3, [pc, #232] @ (80148c8 ) 80147e0: f04f 0200 mov.w r2, #0 80147e4: 605a str r2, [r3, #4] 80147e6: e003 b.n 80147f0 else Motor2.Cmd.Icmd.q = 0.0f; 80147e8: 4b32 ldr r3, [pc, #200] @ (80148b4 ) 80147ea: f04f 0200 mov.w r2, #0 80147ee: 605a str r2, [r3, #4] Debug_UART3_printf("PositionCalibrate(%d) 호출 전\r\n", motor); 80147f0: 6c79 ldr r1, [r7, #68] @ 0x44 80147f2: 4839 ldr r0, [pc, #228] @ (80148d8 ) 80147f4: f00b fade bl 801fdb4 PositionCalibrate(motor); // L(0) 또는 R(1) 직접 전달 80147f8: 6c7b ldr r3, [r7, #68] @ 0x44 80147fa: b2db uxtb r3, r3 80147fc: 4618 mov r0, r3 80147fe: f7fe fdaf bl 8013360 Debug_UART3_printf("PositionCalibrate(%d) 호출 후\r\n", motor); 8014802: 6c79 ldr r1, [r7, #68] @ 0x44 8014804: 4835 ldr r0, [pc, #212] @ (80148dc ) 8014806: f00b fad5 bl 801fdb4 WP_ForcedCali.Status[motor] = Done; 801480a: 4a2b ldr r2, [pc, #172] @ (80148b8 ) 801480c: 6c7b ldr r3, [r7, #68] @ 0x44 801480e: 4413 add r3, r2 8014810: 3301 adds r3, #1 8014812: 2201 movs r2, #1 8014814: 701a strb r2, [r3, #0] if (motor == L) Motor1.Cmd.Icmd.q = 0.0f; 8014816: 6c7b ldr r3, [r7, #68] @ 0x44 8014818: 2b00 cmp r3, #0 801481a: d104 bne.n 8014826 801481c: 4b2a ldr r3, [pc, #168] @ (80148c8 ) 801481e: f04f 0200 mov.w r2, #0 8014822: 605a str r2, [r3, #4] 8014824: e087 b.n 8014936 else Motor2.Cmd.Icmd.q = 0.0f; 8014826: 4b23 ldr r3, [pc, #140] @ (80148b4 ) 8014828: f04f 0200 mov.w r2, #0 801482c: 605a str r2, [r3, #4] 801482e: e082 b.n 8014936 } else { // 회전 안 됨 - 전류 상승 if (WP_ForcedCali.CurrentLevel[motor] < 3) { 8014830: 4a21 ldr r2, [pc, #132] @ (80148b8 ) 8014832: 6c7b ldr r3, [r7, #68] @ 0x44 8014834: 4413 add r3, r2 8014836: 3318 adds r3, #24 8014838: 781b ldrb r3, [r3, #0] 801483a: 2b02 cmp r3, #2 801483c: d852 bhi.n 80148e4 WP_ForcedCali.CurrentLevel[motor]++; // 더 높은 전류로 801483e: 4a1e ldr r2, [pc, #120] @ (80148b8 ) 8014840: 6c7b ldr r3, [r7, #68] @ 0x44 8014842: 4413 add r3, r2 8014844: 3318 adds r3, #24 8014846: 781b ldrb r3, [r3, #0] 8014848: 3301 adds r3, #1 801484a: b2d9 uxtb r1, r3 801484c: 4a1a ldr r2, [pc, #104] @ (80148b8 ) 801484e: 6c7b ldr r3, [r7, #68] @ 0x44 8014850: 4413 add r3, r2 8014852: 3318 adds r3, #24 8014854: 460a mov r2, r1 8014856: 701a strb r2, [r3, #0] float newCurrent = ForcedCaliCurrents[WP_ForcedCali.CurrentLevel[motor]]; 8014858: 4a17 ldr r2, [pc, #92] @ (80148b8 ) 801485a: 6c7b ldr r3, [r7, #68] @ 0x44 801485c: 4413 add r3, r2 801485e: 3318 adds r3, #24 8014860: 781b ldrb r3, [r3, #0] 8014862: 009b lsls r3, r3, #2 8014864: 3348 adds r3, #72 @ 0x48 8014866: 443b add r3, r7 8014868: 3b44 subs r3, #68 @ 0x44 801486a: 681b ldr r3, [r3, #0] 801486c: 617b str r3, [r7, #20] Debug_UART3_printf("%s 회전 안됨 - 전류 증가: %s A\r\n", (motor == L) ? "좌측" : "우측", 801486e: 6c7b ldr r3, [r7, #68] @ 0x44 8014870: 2b00 cmp r3, #0 8014872: d101 bne.n 8014878 8014874: 4c11 ldr r4, [pc, #68] @ (80148bc ) 8014876: e000 b.n 801487a 8014878: 4c11 ldr r4, [pc, #68] @ (80148c0 ) 801487a: 2001 movs r0, #1 801487c: ed97 0a05 vldr s0, [r7, #20] 8014880: f00b fb92 bl 801ffa8 8014884: 4603 mov r3, r0 8014886: 461a mov r2, r3 8014888: 4621 mov r1, r4 801488a: 4815 ldr r0, [pc, #84] @ (80148e0 ) 801488c: f00b fa92 bl 801fdb4 Float2String(newCurrent, 1)); if (motor == L) Motor1.Cmd.Icmd.q = newCurrent; 8014890: 6c7b ldr r3, [r7, #68] @ 0x44 8014892: 2b00 cmp r3, #0 8014894: d103 bne.n 801489e 8014896: 4a0c ldr r2, [pc, #48] @ (80148c8 ) 8014898: 697b ldr r3, [r7, #20] 801489a: 6053 str r3, [r2, #4] 801489c: e002 b.n 80148a4 else Motor2.Cmd.Icmd.q = newCurrent; 801489e: 4a05 ldr r2, [pc, #20] @ (80148b4 ) 80148a0: 697b ldr r3, [r7, #20] 80148a2: 6053 str r3, [r2, #4] WP_ForcedCali.WasRotating[motor] = 0; // 회전 상태 리셋 80148a4: 4a04 ldr r2, [pc, #16] @ (80148b8 ) 80148a6: 6c7b ldr r3, [r7, #68] @ 0x44 80148a8: 4413 add r3, r2 80148aa: 332c adds r3, #44 @ 0x2c 80148ac: 2200 movs r2, #0 80148ae: 701a strb r2, [r3, #0] 80148b0: e041 b.n 8014936 80148b2: bf00 nop 80148b4: 20000704 .word 0x20000704 80148b8: 200000e0 .word 0x200000e0 80148bc: 0802a360 .word 0x0802a360 80148c0: 0802a368 .word 0x0802a368 80148c4: 0802a39c .word 0x0802a39c 80148c8: 20000574 .word 0x20000574 80148cc: 0802a3d0 .word 0x0802a3d0 80148d0: 0802a40c .word 0x0802a40c 80148d4: 0802a440 .word 0x0802a440 80148d8: 0802a468 .word 0x0802a468 80148dc: 0802a48c .word 0x0802a48c 80148e0: 0802a4b0 .word 0x0802a4b0 } else { // 최대 전류(1.1A)에서도 회전 불가 - 케이블이 다 감긴 상태로 판단하여 완료 Debug_UART3_printf("%s 최대 전류에서 회전 불가 - 감기 완료로 판단\r\n", (motor == L) ? "좌측" : "우측"); 80148e4: 6c7b ldr r3, [r7, #68] @ 0x44 80148e6: 2b00 cmp r3, #0 80148e8: d101 bne.n 80148ee 80148ea: 4b20 ldr r3, [pc, #128] @ (801496c ) 80148ec: e000 b.n 80148f0 80148ee: 4b20 ldr r3, [pc, #128] @ (8014970 ) 80148f0: 4619 mov r1, r3 80148f2: 4820 ldr r0, [pc, #128] @ (8014974 ) 80148f4: f00b fa5e bl 801fdb4 if (motor == L) Motor1.Cmd.Icmd.q = 0.0f; 80148f8: 6c7b ldr r3, [r7, #68] @ 0x44 80148fa: 2b00 cmp r3, #0 80148fc: d104 bne.n 8014908 80148fe: 4b1e ldr r3, [pc, #120] @ (8014978 ) 8014900: f04f 0200 mov.w r2, #0 8014904: 605a str r2, [r3, #4] 8014906: e003 b.n 8014910 else Motor2.Cmd.Icmd.q = 0.0f; 8014908: 4b1c ldr r3, [pc, #112] @ (801497c ) 801490a: f04f 0200 mov.w r2, #0 801490e: 605a str r2, [r3, #4] Debug_UART3_printf("PositionCalibrate(%d) 호출 전\r\n", motor); 8014910: 6c79 ldr r1, [r7, #68] @ 0x44 8014912: 481b ldr r0, [pc, #108] @ (8014980 ) 8014914: f00b fa4e bl 801fdb4 PositionCalibrate(motor); // L(0) 또는 R(1) 직접 전달 8014918: 6c7b ldr r3, [r7, #68] @ 0x44 801491a: b2db uxtb r3, r3 801491c: 4618 mov r0, r3 801491e: f7fe fd1f bl 8013360 Debug_UART3_printf("PositionCalibrate(%d) 호출 후\r\n", motor); 8014922: 6c79 ldr r1, [r7, #68] @ 0x44 8014924: 4817 ldr r0, [pc, #92] @ (8014984 ) 8014926: f00b fa45 bl 801fdb4 WP_ForcedCali.Status[motor] = Done; 801492a: 4a17 ldr r2, [pc, #92] @ (8014988 ) 801492c: 6c7b ldr r3, [r7, #68] @ 0x44 801492e: 4413 add r3, r2 8014930: 3301 adds r3, #1 8014932: 2201 movs r2, #1 8014934: 701a strb r2, [r3, #0] } } WP_ForcedCali.StopTime[motor] = currentTime; // 리셋 8014936: 4914 ldr r1, [pc, #80] @ (8014988 ) 8014938: 6c7b ldr r3, [r7, #68] @ 0x44 801493a: 3304 adds r3, #4 801493c: 6b3a ldr r2, [r7, #48] @ 0x30 801493e: f841 2023 str.w r2, [r1, r3, lsl #2] } WP_ForcedCali.WasRotating[motor] = isRotating; 8014942: 4a11 ldr r2, [pc, #68] @ (8014988 ) 8014944: 6c7b ldr r3, [r7, #68] @ 0x44 8014946: 4413 add r3, r2 8014948: 332c adds r3, #44 @ 0x2c 801494a: 7efa ldrb r2, [r7, #27] 801494c: 701a strb r2, [r3, #0] 801494e: e000 b.n 8014952 if (WP_ForcedCali.Status[motor] != NotDone) continue; 8014950: bf00 nop for (int motor = L; motor <= R; motor++) { 8014952: 6c7b ldr r3, [r7, #68] @ 0x44 8014954: 3301 adds r3, #1 8014956: 647b str r3, [r7, #68] @ 0x44 8014958: 6c7b ldr r3, [r7, #68] @ 0x44 801495a: 2b01 cmp r3, #1 801495c: f77f adc4 ble.w 80144e8 8014960: e000 b.n 8014964 return; 8014962: bf00 nop // Debug_DriveMotor = Drv_BothMotor; // cnt_FrcCali++; // } // 모터 제어 관련 변수 초기화할 것! } 8014964: 374c adds r7, #76 @ 0x4c 8014966: 46bd mov sp, r7 8014968: bd90 pop {r4, r7, pc} 801496a: bf00 nop 801496c: 0802a360 .word 0x0802a360 8014970: 0802a368 .word 0x0802a368 8014974: 0802a4dc .word 0x0802a4dc 8014978: 20000574 .word 0x20000574 801497c: 20000704 .word 0x20000704 8014980: 0802a468 .word 0x0802a468 8014984: 0802a48c .word 0x0802a48c 8014988: 200000e0 .word 0x200000e0 0801498c : * @rmtoll CR2 SWSTART LL_ADC_REG_StartConversionSWStart * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StartConversionSWStart(ADC_TypeDef *ADCx) { 801498c: b480 push {r7} 801498e: b083 sub sp, #12 8014990: af00 add r7, sp, #0 8014992: 6078 str r0, [r7, #4] SET_BIT(ADCx->CR2, ADC_CR2_SWSTART); 8014994: 687b ldr r3, [r7, #4] 8014996: 689b ldr r3, [r3, #8] 8014998: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000 801499c: 687b ldr r3, [r7, #4] 801499e: 609a str r2, [r3, #8] } 80149a0: bf00 nop 80149a2: 370c adds r7, #12 80149a4: 46bd mov sp, r7 80149a6: f85d 7b04 ldr.w r7, [sp], #4 80149aa: 4770 bx lr 080149ac : int Debug_MotorErrChk = 0; int Cnt_MtrCtrl_Alternating = 0; int Cnt_Motor1_CurrCtrl, Cnt_Motor2_CurrCtrl; int Check_MtrErrChk = 0; void WESPION_MotorControl(void) // It's in ADC_IRQHandler Function { // No control 14.2us, 1 motor control only 10us 80149ac: b580 push {r7, lr} 80149ae: b082 sub sp, #8 80149b0: af02 add r7, sp, #8 // digitalWrite(57, 1); // digitalWrite(87, 1); InvAdcGet(); 80149b2: f000 fef5 bl 80157a0 // digitalWrite(57, 0); // digitalWrite(87, 1); MotorCtrl_FeedbackCal(); 80149b6: f000 ff2f bl 8015818 // digitalWrite(57, 0); // digitalWrite(87, 0); // digitalWrite(87, 1); if (Debug_MotorErrChk ==1) { 80149ba: 4b13 ldr r3, [pc, #76] @ (8014a08 ) 80149bc: 681b ldr r3, [r3, #0] 80149be: 2b01 cmp r3, #1 80149c0: d11d bne.n 80149fe if(WP_Ctrl.AdOffsetFlg==1) 80149c2: 4b12 ldr r3, [pc, #72] @ (8014a0c ) 80149c4: 789b ldrb r3, [r3, #2] 80149c6: 2b01 cmp r3, #1 80149c8: d119 bne.n 80149fe { Check_MtrErrChk++; 80149ca: 4b11 ldr r3, [pc, #68] @ (8014a10 ) 80149cc: 681b ldr r3, [r3, #0] 80149ce: 3301 adds r3, #1 80149d0: 4a0f ldr r2, [pc, #60] @ (8014a10 ) 80149d2: 6013 str r3, [r2, #0] MotorControl_ErrChk(&WP_CtrlErr.Motor1, &WP_ErrRef, &Motor1.Fb, &Motor1_Ang, &Inv.Ctrl.AD1); 80149d4: 4b0f ldr r3, [pc, #60] @ (8014a14 ) 80149d6: 9300 str r3, [sp, #0] 80149d8: 4b0f ldr r3, [pc, #60] @ (8014a18 ) 80149da: 4a10 ldr r2, [pc, #64] @ (8014a1c ) 80149dc: 4910 ldr r1, [pc, #64] @ (8014a20 ) 80149de: 4811 ldr r0, [pc, #68] @ (8014a24 ) 80149e0: f000 f89c bl 8014b1c MotorControl_ErrChk(&WP_CtrlErr.Motor2, &WP_ErrRef, &Motor2.Fb, &Motor2_Ang, &Inv.Ctrl.AD2); 80149e4: 4b10 ldr r3, [pc, #64] @ (8014a28 ) 80149e6: 9300 str r3, [sp, #0] 80149e8: 4b10 ldr r3, [pc, #64] @ (8014a2c ) 80149ea: 4a11 ldr r2, [pc, #68] @ (8014a30 ) 80149ec: 490c ldr r1, [pc, #48] @ (8014a20 ) 80149ee: 4811 ldr r0, [pc, #68] @ (8014a34 ) 80149f0: f000 f894 bl 8014b1c Controller_ErrChk(&WP_CtrlErr, &WP_ErrRef, &Inv.Ctrl); 80149f4: 4a10 ldr r2, [pc, #64] @ (8014a38 ) 80149f6: 490a ldr r1, [pc, #40] @ (8014a20 ) 80149f8: 480a ldr r0, [pc, #40] @ (8014a24 ) 80149fa: f000 fa55 bl 8014ea8 } } // digitalWrite(87, 0); // digitalWrite(88, 1); MotorCtrl_StateMachine(); //PI 80149fe: f000 f81d bl 8014a3c // Debug_MtrCtrl_Alternating++; // digitalWrite(88, 0); } 8014a02: bf00 nop 8014a04: 46bd mov sp, r7 8014a06: bd80 pop {r7, pc} 8014a08: 20000904 .word 0x20000904 8014a0c: 200003ac .word 0x200003ac 8014a10: 20000914 .word 0x20000914 8014a14: 20000428 .word 0x20000428 8014a18: 2000047c .word 0x2000047c 8014a1c: 200005a0 .word 0x200005a0 8014a20: 200003e0 .word 0x200003e0 8014a24: 200003b8 .word 0x200003b8 8014a28: 20000440 .word 0x20000440 8014a2c: 200004f8 .word 0x200004f8 8014a30: 20000730 .word 0x20000730 8014a34: 200003ca .word 0x200003ca 8014a38: 20000400 .word 0x20000400 08014a3c : Motor2.Fb.VphaseRef = sqrtf(Motor2.Fb.VeRef.d * Motor2.Fb.VeRef.d + Motor2.Fb.VeRef.q * Motor2.Fb.VeRef.q); } /*==========================================================================================================*/ inline void MotorCtrl_StateMachine(void) { 8014a3c: b580 push {r7, lr} 8014a3e: af00 add r7, sp, #0 switch(WP_Ctrl.Mode) 8014a40: 4b35 ldr r3, [pc, #212] @ (8014b18 ) 8014a42: 781b ldrb r3, [r3, #0] 8014a44: 2b08 cmp r3, #8 8014a46: d859 bhi.n 8014afc 8014a48: a201 add r2, pc, #4 @ (adr r2, 8014a50 ) 8014a4a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8014a4e: bf00 nop 8014a50: 08014a75 .word 0x08014a75 8014a54: 08014a9b .word 0x08014a9b 8014a58: 08014ac1 .word 0x08014ac1 8014a5c: 08014ad1 .word 0x08014ad1 8014a60: 08014ad1 .word 0x08014ad1 8014a64: 08014ad1 .word 0x08014ad1 8014a68: 08014ad1 .word 0x08014ad1 8014a6c: 08014ad7 .word 0x08014ad7 8014a70: 08014add .word 0x08014add { case Inv_Off: if(WP_Ctrl.AdOffsetFlg==1) 8014a74: 4b28 ldr r3, [pc, #160] @ (8014b18 ) 8014a76: 789b ldrb r3, [r3, #2] 8014a78: 2b01 cmp r3, #1 8014a7a: d102 bne.n 8014a82 { WP_Ctrl.Mode = Inv_Init; 8014a7c: 4b26 ldr r3, [pc, #152] @ (8014b18 ) 8014a7e: 2201 movs r2, #1 8014a80: 701a strb r2, [r3, #0] // WP_CtrlErr.Motor2.PWM = WP_PWMout(MOTOR2, Motor2.Fb.PWMcnt); // Motor1En(WP_Gate_EN); // Motor2En(WP_Gate_EN); // Motor1Ctrl_PwmStart(); // Motor2Ctrl_PwmStart(); Motor1En(WP_Gate_DIS); 8014a82: 2101 movs r1, #1 8014a84: 2001 movs r0, #1 8014a86: f004 f855 bl 8018b34 Motor2En(WP_Gate_DIS); 8014a8a: 2101 movs r1, #1 8014a8c: 2002 movs r0, #2 8014a8e: f004 f851 bl 8018b34 // Motor1Ctrl_PwmStop(); // Motor2Ctrl_PwmStop(); WP_Ctrl.ActiveMotor = Drv_NoMotor; 8014a92: 4b21 ldr r3, [pc, #132] @ (8014b18 ) 8014a94: 2200 movs r2, #0 8014a96: 705a strb r2, [r3, #1] break; 8014a98: e03c b.n 8014b14 case Inv_Init: // 1번 모드 - 초기화 Motor1En(WP_Gate_DIS); 8014a9a: 2101 movs r1, #1 8014a9c: 2001 movs r0, #1 8014a9e: f004 f849 bl 8018b34 Motor2En(WP_Gate_DIS); 8014aa2: 2101 movs r1, #1 8014aa4: 2002 movs r0, #2 8014aa6: f004 f845 bl 8018b34 // Motor1Ctrl_PwmStop(); // Motor2Ctrl_PwmStop(); WP_Ctrl.ActiveMotor = Drv_NoMotor; 8014aaa: 4b1b ldr r3, [pc, #108] @ (8014b18 ) 8014aac: 2200 movs r2, #0 8014aae: 705a strb r2, [r3, #1] Motor1Ctrl_VariSetZero(); 8014ab0: f001 fdfe bl 80166b0 Motor2Ctrl_VariSetZero(); 8014ab4: f001 fece bl 8016854 WP_Ctrl.Mode = Inv_Ready; 8014ab8: 4b17 ldr r3, [pc, #92] @ (8014b18 ) 8014aba: 2202 movs r2, #2 8014abc: 701a strb r2, [r3, #0] break; 8014abe: e029 b.n 8014b14 case Inv_Ready: // 2번 모드 - 구동 대기 Motor1Ctrl_VariSetZero(); 8014ac0: f001 fdf6 bl 80166b0 Motor2Ctrl_VariSetZero(); 8014ac4: f001 fec6 bl 8016854 WP_Ctrl.ActiveMotor = Drv_NoMotor; 8014ac8: 4b13 ldr r3, [pc, #76] @ (8014b18 ) 8014aca: 2200 movs r2, #0 8014acc: 705a strb r2, [r3, #1] break; 8014ace: e021 b.n 8014b14 case Inv_IbyFCtrl: // 4번 모드 - I by F case Inv_TorqueCtrl: // 5번 모드 - FOC !! case Inv_TorqueWeakCtrl: // 6번 모드 - FOC with field weak control !! MotorCurControl(); 8014ad0: f000 fa3a bl 8014f48 break; 8014ad4: e01e b.n 8014b14 case Inv_SpeedCtrl: // 7번 모드 - 속도 제어 MotorSpdControl(); 8014ad6: f000 fda7 bl 8015628 break; 8014ada: e01b b.n 8014b14 case Inv_Fault: // 8번 모드 - 에러 발생 시 진입 WP_Ctrl.ActiveMotor = Drv_NoMotor; 8014adc: 4b0e ldr r3, [pc, #56] @ (8014b18 ) 8014ade: 2200 movs r2, #0 8014ae0: 705a strb r2, [r3, #1] // Motor1Ctrl_PwmStop(); // Motor2Ctrl_PwmStop(); Motor1En(WP_Gate_DIS); 8014ae2: 2101 movs r1, #1 8014ae4: 2001 movs r0, #1 8014ae6: f004 f825 bl 8018b34 Motor2En(WP_Gate_DIS); 8014aea: 2101 movs r1, #1 8014aec: 2002 movs r0, #2 8014aee: f004 f821 bl 8018b34 Motor1Ctrl_VariSetZero(); 8014af2: f001 fddd bl 80166b0 Motor2Ctrl_VariSetZero(); 8014af6: f001 fead bl 8016854 break; 8014afa: e00b b.n 8014b14 default: Motor1En(WP_Gate_DIS); 8014afc: 2101 movs r1, #1 8014afe: 2001 movs r0, #1 8014b00: f004 f818 bl 8018b34 Motor2En(WP_Gate_DIS); 8014b04: 2101 movs r1, #1 8014b06: 2002 movs r0, #2 8014b08: f004 f814 bl 8018b34 // Motor1Ctrl_PwmStop(); // Motor2Ctrl_PwmStop(); WP_Ctrl.Mode = Inv_Off; 8014b0c: 4b02 ldr r3, [pc, #8] @ (8014b18 ) 8014b0e: 2200 movs r2, #0 8014b10: 701a strb r2, [r3, #0] break; 8014b12: bf00 nop } } 8014b14: bf00 nop 8014b16: bd80 pop {r7, pc} 8014b18: 200003ac .word 0x200003ac 08014b1c : inline void MotorControl_ErrChk(WP_MotorControllerErrorTypeDef *_err, WP_ErrorValueTypeDef *_errRef, WP_MotorAxisTypeDef *_fb, WP_MotorAngleTypeDef *_ang, WP_InverterAdOffsetTypeDef *_off) { 8014b1c: b580 push {r7, lr} 8014b1e: b086 sub sp, #24 8014b20: af00 add r7, sp, #0 8014b22: 60f8 str r0, [r7, #12] 8014b24: 60b9 str r1, [r7, #8] 8014b26: 607a str r2, [r7, #4] 8014b28: 603b str r3, [r7, #0] uint32_t error_flag = 0x00; 8014b2a: 2300 movs r3, #0 8014b2c: 617b str r3, [r7, #20] if(_off->iRaw.U > _errRef->IsensorOpen) //3908.0f; // 50A에 해당하는 값 8014b2e: 6a3b ldr r3, [r7, #32] 8014b30: ed93 7a00 vldr s14, [r3] 8014b34: 68bb ldr r3, [r7, #8] 8014b36: edd3 7a05 vldr s15, [r3, #20] 8014b3a: eeb4 7ae7 vcmpe.f32 s14, s15 8014b3e: eef1 fa10 vmrs APSR_nzcv, fpscr 8014b42: dd06 ble.n 8014b52 { _err->CurrentSensorOpenU = WP_ERR; 8014b44: 68fb ldr r3, [r7, #12] 8014b46: 2201 movs r2, #1 8014b48: 721a strb r2, [r3, #8] Bit_Set(error_flag, ERROR_U_I_SENSOR_OPEN); 8014b4a: 697b ldr r3, [r7, #20] 8014b4c: f043 0301 orr.w r3, r3, #1 8014b50: 617b str r3, [r7, #20] } if(_off->iRaw.V > _errRef->IsensorOpen) 8014b52: 6a3b ldr r3, [r7, #32] 8014b54: ed93 7a01 vldr s14, [r3, #4] 8014b58: 68bb ldr r3, [r7, #8] 8014b5a: edd3 7a05 vldr s15, [r3, #20] 8014b5e: eeb4 7ae7 vcmpe.f32 s14, s15 8014b62: eef1 fa10 vmrs APSR_nzcv, fpscr 8014b66: dd06 ble.n 8014b76 { _err->CurrentSensorOpenV = WP_ERR; 8014b68: 68fb ldr r3, [r7, #12] 8014b6a: 2201 movs r2, #1 8014b6c: 725a strb r2, [r3, #9] Bit_Set(error_flag, ERROR_V_I_SENSOR_OPEN); 8014b6e: 697b ldr r3, [r7, #20] 8014b70: f443 7380 orr.w r3, r3, #256 @ 0x100 8014b74: 617b str r3, [r7, #20] } if(_off->iRaw.W > _errRef->IsensorOpen) 8014b76: 6a3b ldr r3, [r7, #32] 8014b78: ed93 7a02 vldr s14, [r3, #8] 8014b7c: 68bb ldr r3, [r7, #8] 8014b7e: edd3 7a05 vldr s15, [r3, #20] 8014b82: eeb4 7ae7 vcmpe.f32 s14, s15 8014b86: eef1 fa10 vmrs APSR_nzcv, fpscr 8014b8a: dd06 ble.n 8014b9a { _err->CurrentSensorOpenW = WP_ERR; 8014b8c: 68fb ldr r3, [r7, #12] 8014b8e: 2201 movs r2, #1 8014b90: 729a strb r2, [r3, #10] Bit_Set(error_flag, ERROR_W_I_SENSOR_OPEN); 8014b92: 697b ldr r3, [r7, #20] 8014b94: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8014b98: 617b str r3, [r7, #20] } if(_off->iRaw.U < _errRef->IsensorShort) // 186.0f; // -50A에 해당하는 값 8014b9a: 6a3b ldr r3, [r7, #32] 8014b9c: ed93 7a00 vldr s14, [r3] 8014ba0: 68bb ldr r3, [r7, #8] 8014ba2: edd3 7a04 vldr s15, [r3, #16] 8014ba6: eeb4 7ae7 vcmpe.f32 s14, s15 8014baa: eef1 fa10 vmrs APSR_nzcv, fpscr 8014bae: d506 bpl.n 8014bbe { _err->CurrentSensorShortU = WP_ERR; 8014bb0: 68fb ldr r3, [r7, #12] 8014bb2: 2201 movs r2, #1 8014bb4: 715a strb r2, [r3, #5] Bit_Set(error_flag, ERROR_U_I_SENSOR_SHORT); 8014bb6: 697b ldr r3, [r7, #20] 8014bb8: f043 0302 orr.w r3, r3, #2 8014bbc: 617b str r3, [r7, #20] } if(_off->iRaw.V < _errRef->IsensorShort) 8014bbe: 6a3b ldr r3, [r7, #32] 8014bc0: ed93 7a01 vldr s14, [r3, #4] 8014bc4: 68bb ldr r3, [r7, #8] 8014bc6: edd3 7a04 vldr s15, [r3, #16] 8014bca: eeb4 7ae7 vcmpe.f32 s14, s15 8014bce: eef1 fa10 vmrs APSR_nzcv, fpscr 8014bd2: d506 bpl.n 8014be2 { _err->CurrentSensorShortV = WP_ERR; 8014bd4: 68fb ldr r3, [r7, #12] 8014bd6: 2201 movs r2, #1 8014bd8: 719a strb r2, [r3, #6] Bit_Set(error_flag, ERROR_V_I_SENSOR_SHORT); 8014bda: 697b ldr r3, [r7, #20] 8014bdc: f443 7300 orr.w r3, r3, #512 @ 0x200 8014be0: 617b str r3, [r7, #20] } if(_off->iRaw.W < _errRef->IsensorShort) 8014be2: 6a3b ldr r3, [r7, #32] 8014be4: ed93 7a02 vldr s14, [r3, #8] 8014be8: 68bb ldr r3, [r7, #8] 8014bea: edd3 7a04 vldr s15, [r3, #16] 8014bee: eeb4 7ae7 vcmpe.f32 s14, s15 8014bf2: eef1 fa10 vmrs APSR_nzcv, fpscr 8014bf6: d506 bpl.n 8014c06 { _err->CurrentSensorShortW = WP_ERR; 8014bf8: 68fb ldr r3, [r7, #12] 8014bfa: 2201 movs r2, #1 8014bfc: 71da strb r2, [r3, #7] Bit_Set(error_flag, ERROR_W_I_SENSOR_SHORT); 8014bfe: 697b ldr r3, [r7, #20] 8014c00: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8014c04: 617b str r3, [r7, #20] } if(_off->iOffset.U < _errRef->IsensorOffsetMin) 8014c06: 6a3b ldr r3, [r7, #32] 8014c08: ed93 7a03 vldr s14, [r3, #12] 8014c0c: 68bb ldr r3, [r7, #8] 8014c0e: edd3 7a07 vldr s15, [r3, #28] 8014c12: eeb4 7ae7 vcmpe.f32 s14, s15 8014c16: eef1 fa10 vmrs APSR_nzcv, fpscr 8014c1a: d507 bpl.n 8014c2c { _err->CurrentSensorOffsetU = WP_ERR; 8014c1c: 68fb ldr r3, [r7, #12] 8014c1e: 2201 movs r2, #1 8014c20: 72da strb r2, [r3, #11] Bit_Set(error_flag, ERROR_U_I_SENSOR_OFFSET_MIN); 8014c22: 697b ldr r3, [r7, #20] 8014c24: f043 0304 orr.w r3, r3, #4 8014c28: 617b str r3, [r7, #20] 8014c2a: e011 b.n 8014c50 } else if(_off->iOffset.U > _errRef->IsensorOffsetMax) 8014c2c: 6a3b ldr r3, [r7, #32] 8014c2e: ed93 7a03 vldr s14, [r3, #12] 8014c32: 68bb ldr r3, [r7, #8] 8014c34: edd3 7a06 vldr s15, [r3, #24] 8014c38: eeb4 7ae7 vcmpe.f32 s14, s15 8014c3c: eef1 fa10 vmrs APSR_nzcv, fpscr 8014c40: dd06 ble.n 8014c50 { _err->CurrentSensorOffsetU = WP_ERR; 8014c42: 68fb ldr r3, [r7, #12] 8014c44: 2201 movs r2, #1 8014c46: 72da strb r2, [r3, #11] Bit_Set(error_flag, ERROR_U_I_SENSOR_OFFSET_MAX); 8014c48: 697b ldr r3, [r7, #20] 8014c4a: f043 0308 orr.w r3, r3, #8 8014c4e: 617b str r3, [r7, #20] } if(_off->iOffset.V < _errRef->IsensorOffsetMin) 8014c50: 6a3b ldr r3, [r7, #32] 8014c52: ed93 7a04 vldr s14, [r3, #16] 8014c56: 68bb ldr r3, [r7, #8] 8014c58: edd3 7a07 vldr s15, [r3, #28] 8014c5c: eeb4 7ae7 vcmpe.f32 s14, s15 8014c60: eef1 fa10 vmrs APSR_nzcv, fpscr 8014c64: d507 bpl.n 8014c76 { _err->CurrentSensorOffsetV = WP_ERR; 8014c66: 68fb ldr r3, [r7, #12] 8014c68: 2201 movs r2, #1 8014c6a: 731a strb r2, [r3, #12] Bit_Set(error_flag, ERROR_V_I_SENSOR_OFFSET_MIN); 8014c6c: 697b ldr r3, [r7, #20] 8014c6e: f443 6380 orr.w r3, r3, #1024 @ 0x400 8014c72: 617b str r3, [r7, #20] 8014c74: e011 b.n 8014c9a } else if(_off->iOffset.V > _errRef->IsensorOffsetMax) 8014c76: 6a3b ldr r3, [r7, #32] 8014c78: ed93 7a04 vldr s14, [r3, #16] 8014c7c: 68bb ldr r3, [r7, #8] 8014c7e: edd3 7a06 vldr s15, [r3, #24] 8014c82: eeb4 7ae7 vcmpe.f32 s14, s15 8014c86: eef1 fa10 vmrs APSR_nzcv, fpscr 8014c8a: dd06 ble.n 8014c9a { _err->CurrentSensorOffsetV = WP_ERR; 8014c8c: 68fb ldr r3, [r7, #12] 8014c8e: 2201 movs r2, #1 8014c90: 731a strb r2, [r3, #12] Bit_Set(error_flag, ERROR_V_I_SENSOR_OFFSET_MAX); 8014c92: 697b ldr r3, [r7, #20] 8014c94: f443 6300 orr.w r3, r3, #2048 @ 0x800 8014c98: 617b str r3, [r7, #20] } if(_off->iOffset.W < _errRef->IsensorOffsetMin) 8014c9a: 6a3b ldr r3, [r7, #32] 8014c9c: ed93 7a05 vldr s14, [r3, #20] 8014ca0: 68bb ldr r3, [r7, #8] 8014ca2: edd3 7a07 vldr s15, [r3, #28] 8014ca6: eeb4 7ae7 vcmpe.f32 s14, s15 8014caa: eef1 fa10 vmrs APSR_nzcv, fpscr 8014cae: d507 bpl.n 8014cc0 { _err->CurrentSensorOffsetW = WP_ERR; 8014cb0: 68fb ldr r3, [r7, #12] 8014cb2: 2201 movs r2, #1 8014cb4: 735a strb r2, [r3, #13] Bit_Set(error_flag, ERROR_W_I_SENSOR_OFFSET_MIN); 8014cb6: 697b ldr r3, [r7, #20] 8014cb8: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8014cbc: 617b str r3, [r7, #20] 8014cbe: e011 b.n 8014ce4 } else if(_off->iOffset.W > _errRef->IsensorOffsetMax) 8014cc0: 6a3b ldr r3, [r7, #32] 8014cc2: ed93 7a05 vldr s14, [r3, #20] 8014cc6: 68bb ldr r3, [r7, #8] 8014cc8: edd3 7a06 vldr s15, [r3, #24] 8014ccc: eeb4 7ae7 vcmpe.f32 s14, s15 8014cd0: eef1 fa10 vmrs APSR_nzcv, fpscr 8014cd4: dd06 ble.n 8014ce4 { _err->CurrentSensorOffsetW = WP_ERR; 8014cd6: 68fb ldr r3, [r7, #12] 8014cd8: 2201 movs r2, #1 8014cda: 735a strb r2, [r3, #13] Bit_Set(error_flag, ERROR_W_I_SENSOR_OFFSET_MAX); 8014cdc: 697b ldr r3, [r7, #20] 8014cde: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8014ce2: 617b str r3, [r7, #20] } if(Abs(_fb->I3.U) > _errRef->OverCurrent) 8014ce4: 687b ldr r3, [r7, #4] 8014ce6: edd3 7a00 vldr s15, [r3] 8014cea: eef5 7ac0 vcmpe.f32 s15, #0.0 8014cee: eef1 fa10 vmrs APSR_nzcv, fpscr 8014cf2: dd03 ble.n 8014cfc 8014cf4: 687b ldr r3, [r7, #4] 8014cf6: edd3 7a00 vldr s15, [r3] 8014cfa: e004 b.n 8014d06 8014cfc: 687b ldr r3, [r7, #4] 8014cfe: edd3 7a00 vldr s15, [r3] 8014d02: eef1 7a67 vneg.f32 s15, s15 8014d06: 68bb ldr r3, [r7, #8] 8014d08: ed93 7a02 vldr s14, [r3, #8] 8014d0c: eef4 7ac7 vcmpe.f32 s15, s14 8014d10: eef1 fa10 vmrs APSR_nzcv, fpscr 8014d14: dd06 ble.n 8014d24 { _err->OverCurrentU = WP_ERR; 8014d16: 68fb ldr r3, [r7, #12] 8014d18: 2201 movs r2, #1 8014d1a: 701a strb r2, [r3, #0] Bit_Set(error_flag, ERROR_U_I_SENSOR_OVER); 8014d1c: 697b ldr r3, [r7, #20] 8014d1e: f043 0310 orr.w r3, r3, #16 8014d22: 617b str r3, [r7, #20] } if(Abs(_fb->I3.V) > _errRef->OverCurrent) 8014d24: 687b ldr r3, [r7, #4] 8014d26: edd3 7a01 vldr s15, [r3, #4] 8014d2a: eef5 7ac0 vcmpe.f32 s15, #0.0 8014d2e: eef1 fa10 vmrs APSR_nzcv, fpscr 8014d32: dd03 ble.n 8014d3c 8014d34: 687b ldr r3, [r7, #4] 8014d36: edd3 7a01 vldr s15, [r3, #4] 8014d3a: e004 b.n 8014d46 8014d3c: 687b ldr r3, [r7, #4] 8014d3e: edd3 7a01 vldr s15, [r3, #4] 8014d42: eef1 7a67 vneg.f32 s15, s15 8014d46: 68bb ldr r3, [r7, #8] 8014d48: ed93 7a02 vldr s14, [r3, #8] 8014d4c: eef4 7ac7 vcmpe.f32 s15, s14 8014d50: eef1 fa10 vmrs APSR_nzcv, fpscr 8014d54: dd06 ble.n 8014d64 { _err->OverCurrentV = WP_ERR; 8014d56: 68fb ldr r3, [r7, #12] 8014d58: 2201 movs r2, #1 8014d5a: 705a strb r2, [r3, #1] Bit_Set(error_flag, ERROR_V_I_SENSOR_OVER); 8014d5c: 697b ldr r3, [r7, #20] 8014d5e: f443 5380 orr.w r3, r3, #4096 @ 0x1000 8014d62: 617b str r3, [r7, #20] } if(Abs(_fb->I3.W) > _errRef->OverCurrent) 8014d64: 687b ldr r3, [r7, #4] 8014d66: edd3 7a02 vldr s15, [r3, #8] 8014d6a: eef5 7ac0 vcmpe.f32 s15, #0.0 8014d6e: eef1 fa10 vmrs APSR_nzcv, fpscr 8014d72: dd03 ble.n 8014d7c 8014d74: 687b ldr r3, [r7, #4] 8014d76: edd3 7a02 vldr s15, [r3, #8] 8014d7a: e004 b.n 8014d86 8014d7c: 687b ldr r3, [r7, #4] 8014d7e: edd3 7a02 vldr s15, [r3, #8] 8014d82: eef1 7a67 vneg.f32 s15, s15 8014d86: 68bb ldr r3, [r7, #8] 8014d88: ed93 7a02 vldr s14, [r3, #8] 8014d8c: eef4 7ac7 vcmpe.f32 s15, s14 8014d90: eef1 fa10 vmrs APSR_nzcv, fpscr 8014d94: dd06 ble.n 8014da4 { _err->OverCurrentW = WP_ERR; 8014d96: 68fb ldr r3, [r7, #12] 8014d98: 2201 movs r2, #1 8014d9a: 709a strb r2, [r3, #2] Bit_Set(error_flag, ERROR_W_I_SENSOR_OVER); 8014d9c: 697b ldr r3, [r7, #20] 8014d9e: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8014da2: 617b str r3, [r7, #20] } if(Abs(_fb->Ie.d) > _errRef->OverCurrent) 8014da4: 687b ldr r3, [r7, #4] 8014da6: edd3 7a05 vldr s15, [r3, #20] 8014daa: eef5 7ac0 vcmpe.f32 s15, #0.0 8014dae: eef1 fa10 vmrs APSR_nzcv, fpscr 8014db2: dd03 ble.n 8014dbc 8014db4: 687b ldr r3, [r7, #4] 8014db6: edd3 7a05 vldr s15, [r3, #20] 8014dba: e004 b.n 8014dc6 8014dbc: 687b ldr r3, [r7, #4] 8014dbe: edd3 7a05 vldr s15, [r3, #20] 8014dc2: eef1 7a67 vneg.f32 s15, s15 8014dc6: 68bb ldr r3, [r7, #8] 8014dc8: ed93 7a02 vldr s14, [r3, #8] 8014dcc: eef4 7ac7 vcmpe.f32 s15, s14 8014dd0: eef1 fa10 vmrs APSR_nzcv, fpscr 8014dd4: dd06 ble.n 8014de4 { _err->OverCurrentD = WP_ERR; 8014dd6: 68fb ldr r3, [r7, #12] 8014dd8: 2201 movs r2, #1 8014dda: 70da strb r2, [r3, #3] Bit_Set(error_flag, ERROR_D_I_OVER); 8014ddc: 697b ldr r3, [r7, #20] 8014dde: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8014de2: 617b str r3, [r7, #20] } if(Abs(_fb->Ie.q) > _errRef->OverCurrent) 8014de4: 687b ldr r3, [r7, #4] 8014de6: edd3 7a06 vldr s15, [r3, #24] 8014dea: eef5 7ac0 vcmpe.f32 s15, #0.0 8014dee: eef1 fa10 vmrs APSR_nzcv, fpscr 8014df2: dd03 ble.n 8014dfc 8014df4: 687b ldr r3, [r7, #4] 8014df6: edd3 7a06 vldr s15, [r3, #24] 8014dfa: e004 b.n 8014e06 8014dfc: 687b ldr r3, [r7, #4] 8014dfe: edd3 7a06 vldr s15, [r3, #24] 8014e02: eef1 7a67 vneg.f32 s15, s15 8014e06: 68bb ldr r3, [r7, #8] 8014e08: ed93 7a02 vldr s14, [r3, #8] 8014e0c: eef4 7ac7 vcmpe.f32 s15, s14 8014e10: eef1 fa10 vmrs APSR_nzcv, fpscr 8014e14: dd06 ble.n 8014e24 { _err->OverCurrentQ = WP_ERR; 8014e16: 68fb ldr r3, [r7, #12] 8014e18: 2201 movs r2, #1 8014e1a: 711a strb r2, [r3, #4] Bit_Set(error_flag, ERROR_D_I_OVER); 8014e1c: 697b ldr r3, [r7, #20] 8014e1e: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8014e22: 617b str r3, [r7, #20] } if(Abs(_ang->RpmFil) > _errRef->OverSpeed) 8014e24: 683b ldr r3, [r7, #0] 8014e26: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8014e2a: eef5 7ac0 vcmpe.f32 s15, #0.0 8014e2e: eef1 fa10 vmrs APSR_nzcv, fpscr 8014e32: dd03 ble.n 8014e3c 8014e34: 683b ldr r3, [r7, #0] 8014e36: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8014e3a: e004 b.n 8014e46 8014e3c: 683b ldr r3, [r7, #0] 8014e3e: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8014e42: eef1 7a67 vneg.f32 s15, s15 8014e46: 68bb ldr r3, [r7, #8] 8014e48: ed93 7a03 vldr s14, [r3, #12] 8014e4c: eef4 7ac7 vcmpe.f32 s15, s14 8014e50: eef1 fa10 vmrs APSR_nzcv, fpscr 8014e54: dd06 ble.n 8014e64 { _err->OverSpd = WP_ERR; 8014e56: 68fb ldr r3, [r7, #12] 8014e58: 2201 movs r2, #1 8014e5a: 739a strb r2, [r3, #14] Bit_Set(error_flag, ERROR_SPEED_OVER); 8014e5c: 697b ldr r3, [r7, #20] 8014e5e: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8014e62: 617b str r3, [r7, #20] } error_flag |= (Error_Flag & 0xFF000000); 8014e64: 4b0e ldr r3, [pc, #56] @ (8014ea0 ) 8014e66: 681b ldr r3, [r3, #0] 8014e68: f003 437f and.w r3, r3, #4278190080 @ 0xff000000 8014e6c: 697a ldr r2, [r7, #20] 8014e6e: 4313 orrs r3, r2 8014e70: 617b str r3, [r7, #20] if(Error_Flag != error_flag) { 8014e72: 4b0b ldr r3, [pc, #44] @ (8014ea0 ) 8014e74: 681b ldr r3, [r3, #0] 8014e76: 697a ldr r2, [r7, #20] 8014e78: 429a cmp r2, r3 8014e7a: d00c beq.n 8014e96 Error_Flag = error_flag; 8014e7c: 4a08 ldr r2, [pc, #32] @ (8014ea0 ) 8014e7e: 697b ldr r3, [r7, #20] 8014e80: 6013 str r3, [r2, #0] if(Error_Flag_Enable) Return_4byte(FAIL_SAFE_ERROR, Error_Flag); 8014e82: 4b08 ldr r3, [pc, #32] @ (8014ea4 ) 8014e84: 781b ldrb r3, [r3, #0] 8014e86: 2b00 cmp r3, #0 8014e88: d005 beq.n 8014e96 8014e8a: 4b05 ldr r3, [pc, #20] @ (8014ea0 ) 8014e8c: 681b ldr r3, [r3, #0] 8014e8e: 4619 mov r1, r3 8014e90: 20f3 movs r0, #243 @ 0xf3 8014e92: f004 fff5 bl 8019e80 } } 8014e96: bf00 nop 8014e98: 3718 adds r7, #24 8014e9a: 46bd mov sp, r7 8014e9c: bd80 pop {r7, pc} 8014e9e: bf00 nop 8014ea0: 20000c14 .word 0x20000c14 8014ea4: 20000c18 .word 0x20000c18 08014ea8 : inline void Controller_ErrChk(WP_ControllerErrorTypeDef *_err, WP_ErrorValueTypeDef *_errRef, WP_InverterControlTypeDef *_inv) { 8014ea8: b580 push {r7, lr} 8014eaa: b086 sub sp, #24 8014eac: af00 add r7, sp, #0 8014eae: 60f8 str r0, [r7, #12] 8014eb0: 60b9 str r1, [r7, #8] 8014eb2: 607a str r2, [r7, #4] uint32_t error_flag = 0x00; 8014eb4: 2300 movs r3, #0 8014eb6: 617b str r3, [r7, #20] if(_inv->VdcFil > _errRef->OverVoltage) 8014eb8: 687b ldr r3, [r7, #4] 8014eba: ed93 7a01 vldr s14, [r3, #4] 8014ebe: 68bb ldr r3, [r7, #8] 8014ec0: edd3 7a00 vldr s15, [r3] 8014ec4: eeb4 7ae7 vcmpe.f32 s14, s15 8014ec8: eef1 fa10 vmrs APSR_nzcv, fpscr 8014ecc: dd07 ble.n 8014ede { _err->OverV = WP_ERR; 8014ece: 68fb ldr r3, [r7, #12] 8014ed0: 2201 movs r2, #1 8014ed2: f883 2025 strb.w r2, [r3, #37] @ 0x25 Bit_Set(error_flag, ERROR_VOLT_OVER); 8014ed6: 697b ldr r3, [r7, #20] 8014ed8: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 8014edc: 617b str r3, [r7, #20] } if(_inv->VdcFil < _errRef->UnderVoltage) 8014ede: 687b ldr r3, [r7, #4] 8014ee0: ed93 7a01 vldr s14, [r3, #4] 8014ee4: 68bb ldr r3, [r7, #8] 8014ee6: edd3 7a01 vldr s15, [r3, #4] 8014eea: eeb4 7ae7 vcmpe.f32 s14, s15 8014eee: eef1 fa10 vmrs APSR_nzcv, fpscr 8014ef2: d507 bpl.n 8014f04 { _err->UnderV = WP_ERR; 8014ef4: 68fb ldr r3, [r7, #12] 8014ef6: 2201 movs r2, #1 8014ef8: f883 2024 strb.w r2, [r3, #36] @ 0x24 Bit_Set(error_flag, ERROR_VOLT_UNDER); 8014efc: 697b ldr r3, [r7, #20] 8014efe: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8014f02: 617b str r3, [r7, #20] } error_flag |= (Error_Flag & 0x00FFFFFF); 8014f04: 4b0e ldr r3, [pc, #56] @ (8014f40 ) 8014f06: 681b ldr r3, [r3, #0] 8014f08: f023 437f bic.w r3, r3, #4278190080 @ 0xff000000 8014f0c: 697a ldr r2, [r7, #20] 8014f0e: 4313 orrs r3, r2 8014f10: 617b str r3, [r7, #20] if(Error_Flag != error_flag) { 8014f12: 4b0b ldr r3, [pc, #44] @ (8014f40 ) 8014f14: 681b ldr r3, [r3, #0] 8014f16: 697a ldr r2, [r7, #20] 8014f18: 429a cmp r2, r3 8014f1a: d00c beq.n 8014f36 Error_Flag = error_flag; 8014f1c: 4a08 ldr r2, [pc, #32] @ (8014f40 ) 8014f1e: 697b ldr r3, [r7, #20] 8014f20: 6013 str r3, [r2, #0] if(Error_Flag_Enable) Return_4byte(FAIL_SAFE_ERROR, Error_Flag); 8014f22: 4b08 ldr r3, [pc, #32] @ (8014f44 ) 8014f24: 781b ldrb r3, [r3, #0] 8014f26: 2b00 cmp r3, #0 8014f28: d005 beq.n 8014f36 8014f2a: 4b05 ldr r3, [pc, #20] @ (8014f40 ) 8014f2c: 681b ldr r3, [r3, #0] 8014f2e: 4619 mov r1, r3 8014f30: 20f3 movs r0, #243 @ 0xf3 8014f32: f004 ffa5 bl 8019e80 } } 8014f36: bf00 nop 8014f38: 3718 adds r7, #24 8014f3a: 46bd mov sp, r7 8014f3c: bd80 pop {r7, pc} 8014f3e: bf00 nop 8014f40: 20000c14 .word 0x20000c14 8014f44: 20000c18 .word 0x20000c18 08014f48 : inline void MotorCurControl(void) { 8014f48: b580 push {r7, lr} 8014f4a: af00 add r7, sp, #0 switch(WP_Ctrl.ActiveMotor&0x1) // Motor1 Test 8014f4c: 4b38 ldr r3, [pc, #224] @ (8015030 ) 8014f4e: 785b ldrb r3, [r3, #1] 8014f50: f003 0301 and.w r3, r3, #1 8014f54: 2b00 cmp r3, #0 8014f56: d020 beq.n 8014f9a 8014f58: 2b01 cmp r3, #1 8014f5a: d125 bne.n 8014fa8 { case WP_RUN: // Motor1Ctrl_PwmStart(); // in main.c if (MotorCurrCtrl_Alternating) { 8014f5c: 4b35 ldr r3, [pc, #212] @ (8015034 ) 8014f5e: 681b ldr r3, [r3, #0] 8014f60: 2b00 cmp r3, #0 8014f62: d00e beq.n 8014f82 if ((Cnt_MtrCtrl_Alternating+1) % 2) { 8014f64: 4b34 ldr r3, [pc, #208] @ (8015038 ) 8014f66: 681b ldr r3, [r3, #0] 8014f68: 3301 adds r3, #1 8014f6a: f003 0301 and.w r3, r3, #1 8014f6e: 2b00 cmp r3, #0 8014f70: d00e beq.n 8014f90 // DAC1_SetValue(3000); Motor1CurCtrl(); 8014f72: f000 f867 bl 8015044 // DAC1_SetValue(0); Cnt_Motor1_CurrCtrl++; 8014f76: 4b31 ldr r3, [pc, #196] @ (801503c ) 8014f78: 681b ldr r3, [r3, #0] 8014f7a: 3301 adds r3, #1 8014f7c: 4a2f ldr r2, [pc, #188] @ (801503c ) 8014f7e: 6013 str r3, [r2, #0] 8014f80: e006 b.n 8014f90 } }else{ Motor1CurCtrl(); 8014f82: f000 f85f bl 8015044 Cnt_Motor1_CurrCtrl++; 8014f86: 4b2d ldr r3, [pc, #180] @ (801503c ) 8014f88: 681b ldr r3, [r3, #0] 8014f8a: 3301 adds r3, #1 8014f8c: 4a2b ldr r2, [pc, #172] @ (801503c ) 8014f8e: 6013 str r3, [r2, #0] } Motor1En(WP_Gate_EN); 8014f90: 2100 movs r1, #0 8014f92: 2001 movs r0, #1 8014f94: f003 fdce bl 8018b34 break; 8014f98: e00d b.n 8014fb6 case WP_STOP: Motor1Ctrl_VariSetZero(); 8014f9a: f001 fb89 bl 80166b0 Motor1En(WP_Gate_DIS); 8014f9e: 2101 movs r1, #1 8014fa0: 2001 movs r0, #1 8014fa2: f003 fdc7 bl 8018b34 // Motor1Ctrl_PwmStop(); break; 8014fa6: e006 b.n 8014fb6 default: Motor1Ctrl_VariSetZero(); 8014fa8: f001 fb82 bl 80166b0 Motor1En(WP_Gate_DIS); 8014fac: 2101 movs r1, #1 8014fae: 2001 movs r0, #1 8014fb0: f003 fdc0 bl 8018b34 // Motor1Ctrl_PwmStop(); break; 8014fb4: bf00 nop } switch((WP_Ctrl.ActiveMotor>>1)&0x1) // Motor2 Test 8014fb6: 4b1e ldr r3, [pc, #120] @ (8015030 ) 8014fb8: 785b ldrb r3, [r3, #1] 8014fba: 085b lsrs r3, r3, #1 8014fbc: b2db uxtb r3, r3 8014fbe: f003 0301 and.w r3, r3, #1 8014fc2: 2b00 cmp r3, #0 8014fc4: d01f beq.n 8015006 8014fc6: 2b01 cmp r3, #1 8014fc8: d124 bne.n 8015014 { case WP_RUN: // Motor2Ctrl_PwmStart(); // in main.c if(MotorCurrCtrl_Alternating){ 8014fca: 4b1a ldr r3, [pc, #104] @ (8015034 ) 8014fcc: 681b ldr r3, [r3, #0] 8014fce: 2b00 cmp r3, #0 8014fd0: d00d beq.n 8014fee if (Cnt_MtrCtrl_Alternating % 2) { 8014fd2: 4b19 ldr r3, [pc, #100] @ (8015038 ) 8014fd4: 681b ldr r3, [r3, #0] 8014fd6: f003 0301 and.w r3, r3, #1 8014fda: 2b00 cmp r3, #0 8014fdc: d00e beq.n 8014ffc // DAC2_SetValue(3000); Motor2CurCtrl(); 8014fde: f000 f9a9 bl 8015334 // DAC2_SetValue(0); Cnt_Motor2_CurrCtrl++; 8014fe2: 4b17 ldr r3, [pc, #92] @ (8015040 ) 8014fe4: 681b ldr r3, [r3, #0] 8014fe6: 3301 adds r3, #1 8014fe8: 4a15 ldr r2, [pc, #84] @ (8015040 ) 8014fea: 6013 str r3, [r2, #0] 8014fec: e006 b.n 8014ffc } } else { Motor2CurCtrl(); 8014fee: f000 f9a1 bl 8015334 Cnt_Motor2_CurrCtrl++; 8014ff2: 4b13 ldr r3, [pc, #76] @ (8015040 ) 8014ff4: 681b ldr r3, [r3, #0] 8014ff6: 3301 adds r3, #1 8014ff8: 4a11 ldr r2, [pc, #68] @ (8015040 ) 8014ffa: 6013 str r3, [r2, #0] } Motor2En(WP_Gate_EN); 8014ffc: 2100 movs r1, #0 8014ffe: 2002 movs r0, #2 8015000: f003 fd98 bl 8018b34 break; 8015004: e00d b.n 8015022 case WP_STOP: Motor2Ctrl_VariSetZero(); 8015006: f001 fc25 bl 8016854 Motor2En(WP_Gate_DIS); 801500a: 2101 movs r1, #1 801500c: 2002 movs r0, #2 801500e: f003 fd91 bl 8018b34 // Motor2Ctrl_PwmStop(); break; 8015012: e006 b.n 8015022 default: Motor2Ctrl_VariSetZero(); 8015014: f001 fc1e bl 8016854 Motor2En(WP_Gate_DIS); 8015018: 2101 movs r1, #1 801501a: 2002 movs r0, #2 801501c: f003 fd8a bl 8018b34 // Motor2Ctrl_PwmStop(); break; 8015020: bf00 nop } Cnt_MtrCtrl_Alternating++; 8015022: 4b05 ldr r3, [pc, #20] @ (8015038 ) 8015024: 681b ldr r3, [r3, #0] 8015026: 3301 adds r3, #1 8015028: 4a03 ldr r2, [pc, #12] @ (8015038 ) 801502a: 6013 str r3, [r2, #0] } 801502c: bf00 nop 801502e: bd80 pop {r7, pc} 8015030: 200003ac .word 0x200003ac 8015034: 2000001c .word 0x2000001c 8015038: 20000908 .word 0x20000908 801503c: 2000090c .word 0x2000090c 8015040: 20000910 .word 0x20000910 08015044 : inline void Motor1CurCtrl(void) { 8015044: b580 push {r7, lr} 8015046: af00 add r7, sp, #0 WP_RampUpDn(&Motor1.Cmd.Icmd.q, &Motor1.Cmd.Iref.q, 1.0f, 1.0f); 8015048: eef7 0a00 vmov.f32 s1, #112 @ 0x3f800000 1.0 801504c: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 8015050: 499f ldr r1, [pc, #636] @ (80152d0 ) 8015052: 48a0 ldr r0, [pc, #640] @ (80152d4 ) 8015054: f002 f9a6 bl 80173a4 if(WP_Ctrl.Mode==Inv_TorqueWeakCtrl) 8015058: 4b9f ldr r3, [pc, #636] @ (80152d8 ) 801505a: 781b ldrb r3, [r3, #0] 801505c: 2b06 cmp r3, #6 801505e: d118 bne.n 8015092 { #if FIELDWEAK_MODE == FIELDWEAK_MOT Motor1.Cmd.Iref.d = WP_PIcontrolForFieldWeak(Inv.Ctrl.VlimFweak, Motor1.Fb.VphaseFil, &Motor1.PiFweak, &Motor1.GainFweak, Inv.Ctrl.IlimFweak); #endif #if FIELDWEAK_MODE == FIELDWEAK_GEN Motor1.Cmd.Iref.d = WP_PIcontrolForFieldWeak(Inv.Ctrl.VdcLimFweak, Inv.Ctrl.VdcFil, &Motor1.PiFweak, &Motor1.GainFweak, Inv.Ctrl.IlimFweak); 8015060: 4b9e ldr r3, [pc, #632] @ (80152dc ) 8015062: edd3 7a07 vldr s15, [r3, #28] 8015066: 4b9d ldr r3, [pc, #628] @ (80152dc ) 8015068: ed93 7a01 vldr s14, [r3, #4] 801506c: 4b9b ldr r3, [pc, #620] @ (80152dc ) 801506e: edd3 6a09 vldr s13, [r3, #36] @ 0x24 8015072: eeb0 1a66 vmov.f32 s2, s13 8015076: 499a ldr r1, [pc, #616] @ (80152e0 ) 8015078: 489a ldr r0, [pc, #616] @ (80152e4 ) 801507a: eef0 0a47 vmov.f32 s1, s14 801507e: eeb0 0a67 vmov.f32 s0, s15 8015082: f001 ff53 bl 8016f2c 8015086: eef0 7a40 vmov.f32 s15, s0 801508a: 4b97 ldr r3, [pc, #604] @ (80152e8 ) 801508c: edc3 7a02 vstr s15, [r3, #8] 8015090: e007 b.n 80150a2 #endif } else { WP_RampUpDn(&Motor1.Cmd.Icmd.d, &Motor1.Cmd.Iref.d, 1.0f, 1.0f); 8015092: eef7 0a00 vmov.f32 s1, #112 @ 0x3f800000 1.0 8015096: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 801509a: 4994 ldr r1, [pc, #592] @ (80152ec ) 801509c: 4892 ldr r0, [pc, #584] @ (80152e8 ) 801509e: f002 f981 bl 80173a4 } Motor1.PiCurQ.Ff = Motor1.Para.PhaiF * Motor1_Ang.RpmFil * WP_Weight.FfScale.Temp[L]; 80150a2: 4b91 ldr r3, [pc, #580] @ (80152e8 ) 80150a4: ed93 7a63 vldr s14, [r3, #396] @ 0x18c 80150a8: 4b91 ldr r3, [pc, #580] @ (80152f0 ) 80150aa: edd3 7a11 vldr s15, [r3, #68] @ 0x44 80150ae: ee27 7a27 vmul.f32 s14, s14, s15 80150b2: 4b90 ldr r3, [pc, #576] @ (80152f4 ) 80150b4: edd3 7a18 vldr s15, [r3, #96] @ 0x60 80150b8: ee67 7a27 vmul.f32 s15, s14, s15 80150bc: 4b8a ldr r3, [pc, #552] @ (80152e8 ) 80150be: edc3 7a4c vstr s15, [r3, #304] @ 0x130 // Motor1.PiCurQ.Ff = Motor1.Para.PhaiF * Motor1_Ang.RpmFil * WP_Weight.FfScale.Temp[MOTOR_L];// + Motor1.Para.Ld * Motor1.Fb.Ie.d * Motor1_Ang.WeFil; // Motor1.PiCurQ.Ff = Motor1.Para.PhaiF * Motor1_Ang.RpmFil * WP_WeightFeel.FfScale_L; // Motor1.PiCurD.Ff = - Motor1.Para.Lq * Motor1.Fb.Ie.q * Motor1_Ang.WeFil; // Motor1.Fb.VeRef.q = WP_PIcontrol_Spdlim(Motor1.Cmd.Iref.q, Motor1.Fb.Ie.q, &Motor1.PiCurQ, &Motor1.GainCurQ, Inv.Ctrl.VphaseLim, Motor1_Ang.RpmFil);///somebp 2024.02.02 Motor1.Fb.VeRef.q = WP_PIcontrol(Motor1.Cmd.Iref.q, Motor1.Fb.Ie.q, &Motor1.PiCurQ, &Motor1.GainCurQ, Inv.Ctrl.VphaseLim); ///origin 80150c2: 4b89 ldr r3, [pc, #548] @ (80152e8 ) 80150c4: edd3 7a03 vldr s15, [r3, #12] 80150c8: 4b87 ldr r3, [pc, #540] @ (80152e8 ) 80150ca: ed93 7a11 vldr s14, [r3, #68] @ 0x44 80150ce: 4b83 ldr r3, [pc, #524] @ (80152dc ) 80150d0: edd3 6a02 vldr s13, [r3, #8] 80150d4: eeb0 1a66 vmov.f32 s2, s13 80150d8: 4987 ldr r1, [pc, #540] @ (80152f8 ) 80150da: 4888 ldr r0, [pc, #544] @ (80152fc ) 80150dc: eef0 0a47 vmov.f32 s1, s14 80150e0: eeb0 0a67 vmov.f32 s0, s15 80150e4: f001 fe72 bl 8016dcc 80150e8: eef0 7a40 vmov.f32 s15, s0 80150ec: 4b7e ldr r3, [pc, #504] @ (80152e8 ) 80150ee: edc3 7a14 vstr s15, [r3, #80] @ 0x50 Motor1.Fb.VeRef.d = WP_PIcontrol(Motor1.Cmd.Iref.d, Motor1.Fb.Ie.d, &Motor1.PiCurD, &Motor1.GainCurD, Inv.Ctrl.VphaseLim); 80150f2: 4b7d ldr r3, [pc, #500] @ (80152e8 ) 80150f4: edd3 7a02 vldr s15, [r3, #8] 80150f8: 4b7b ldr r3, [pc, #492] @ (80152e8 ) 80150fa: ed93 7a10 vldr s14, [r3, #64] @ 0x40 80150fe: 4b77 ldr r3, [pc, #476] @ (80152dc ) 8015100: edd3 6a02 vldr s13, [r3, #8] 8015104: eeb0 1a66 vmov.f32 s2, s13 8015108: 497d ldr r1, [pc, #500] @ (8015300 ) 801510a: 487e ldr r0, [pc, #504] @ (8015304 ) 801510c: eef0 0a47 vmov.f32 s1, s14 8015110: eeb0 0a67 vmov.f32 s0, s15 8015114: f001 fe5a bl 8016dcc 8015118: eef0 7a40 vmov.f32 s15, s0 801511c: 4b72 ldr r3, [pc, #456] @ (80152e8 ) 801511e: edc3 7a13 vstr s15, [r3, #76] @ 0x4c Motor1.Fb.VphaseRef = sqrtf(Motor1.Fb.VeRef.d * Motor1.Fb.VeRef.d + Motor1.Fb.VeRef.q * Motor1.Fb.VeRef.q); // 700ns 8015122: 4b71 ldr r3, [pc, #452] @ (80152e8 ) 8015124: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 8015128: 4b6f ldr r3, [pc, #444] @ (80152e8 ) 801512a: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 801512e: ee27 7a27 vmul.f32 s14, s14, s15 8015132: 4b6d ldr r3, [pc, #436] @ (80152e8 ) 8015134: edd3 6a14 vldr s13, [r3, #80] @ 0x50 8015138: 4b6b ldr r3, [pc, #428] @ (80152e8 ) 801513a: edd3 7a14 vldr s15, [r3, #80] @ 0x50 801513e: ee66 7aa7 vmul.f32 s15, s13, s15 8015142: ee77 7a27 vadd.f32 s15, s14, s15 8015146: eeb0 0a67 vmov.f32 s0, s15 801514a: f013 fe4b bl 8028de4 801514e: eef0 7a40 vmov.f32 s15, s0 8015152: 4b65 ldr r3, [pc, #404] @ (80152e8 ) 8015154: edc3 7a26 vstr s15, [r3, #152] @ 0x98 LPF(Motor1.Fb.VphaseFil, Motor1.Fb.VphaseRef, LpfVdc.fct); 8015158: 4b63 ldr r3, [pc, #396] @ (80152e8 ) 801515a: ed93 7a27 vldr s14, [r3, #156] @ 0x9c 801515e: 4b62 ldr r3, [pc, #392] @ (80152e8 ) 8015160: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8015164: ee77 7a67 vsub.f32 s15, s14, s15 8015168: eef5 7ac0 vcmpe.f32 s15, #0.0 801516c: eef1 fa10 vmrs APSR_nzcv, fpscr 8015170: dd12 ble.n 8015198 8015172: 4b65 ldr r3, [pc, #404] @ (8015308 ) 8015174: ed93 7a02 vldr s14, [r3, #8] 8015178: 4b5b ldr r3, [pc, #364] @ (80152e8 ) 801517a: edd3 6a27 vldr s13, [r3, #156] @ 0x9c 801517e: 4b5a ldr r3, [pc, #360] @ (80152e8 ) 8015180: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8015184: ee76 7ae7 vsub.f32 s15, s13, s15 8015188: ee27 7a27 vmul.f32 s14, s14, s15 801518c: 4b56 ldr r3, [pc, #344] @ (80152e8 ) 801518e: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8015192: ee77 7a27 vadd.f32 s15, s14, s15 8015196: e013 b.n 80151c0 8015198: 4b5b ldr r3, [pc, #364] @ (8015308 ) 801519a: edd3 7a02 vldr s15, [r3, #8] 801519e: eeb1 7a67 vneg.f32 s14, s15 80151a2: 4b51 ldr r3, [pc, #324] @ (80152e8 ) 80151a4: edd3 6a26 vldr s13, [r3, #152] @ 0x98 80151a8: 4b4f ldr r3, [pc, #316] @ (80152e8 ) 80151aa: edd3 7a27 vldr s15, [r3, #156] @ 0x9c 80151ae: ee76 7ae7 vsub.f32 s15, s13, s15 80151b2: ee27 7a27 vmul.f32 s14, s14, s15 80151b6: 4b4c ldr r3, [pc, #304] @ (80152e8 ) 80151b8: edd3 7a26 vldr s15, [r3, #152] @ 0x98 80151bc: ee77 7a27 vadd.f32 s15, s14, s15 80151c0: 4b49 ldr r3, [pc, #292] @ (80152e8 ) 80151c2: edc3 7a27 vstr s15, [r3, #156] @ 0x9c Motor1.Fb.VphaseSet = 1.0f / Motor1.Fb.VphaseFil; // 역수 취한 값 80151c6: 4b48 ldr r3, [pc, #288] @ (80152e8 ) 80151c8: ed93 7a27 vldr s14, [r3, #156] @ 0x9c 80151cc: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 80151d0: eec6 7a87 vdiv.f32 s15, s13, s14 80151d4: 4b44 ldr r3, [pc, #272] @ (80152e8 ) 80151d6: edc3 7a28 vstr s15, [r3, #160] @ 0xa0 switch(WP_Ctrl.Mode) 80151da: 4b3f ldr r3, [pc, #252] @ (80152d8 ) 80151dc: 781b ldrb r3, [r3, #0] 80151de: 2b03 cmp r3, #3 80151e0: d106 bne.n 80151f0 { case Inv_VbyFCtrl: WP_InvClarkeParkTrans(&Motor1.Fb.V3Set, &Motor1.Fb.VsSet, &Motor1.Cmd.Vfcmd, &Motor1_Ang); 80151e2: 4b43 ldr r3, [pc, #268] @ (80152f0 ) 80151e4: 4a49 ldr r2, [pc, #292] @ (801530c ) 80151e6: 494a ldr r1, [pc, #296] @ (8015310 ) 80151e8: 484a ldr r0, [pc, #296] @ (8015314 ) 80151ea: f001 fcb5 bl 8016b58 break; 80151ee: e03a b.n 8015266 default: if(Motor1.Fb.VphaseFil > Inv.Ctrl.VphaseLim) 80151f0: 4b3d ldr r3, [pc, #244] @ (80152e8 ) 80151f2: ed93 7a27 vldr s14, [r3, #156] @ 0x9c 80151f6: 4b39 ldr r3, [pc, #228] @ (80152dc ) 80151f8: edd3 7a02 vldr s15, [r3, #8] 80151fc: eeb4 7ae7 vcmpe.f32 s14, s15 8015200: eef1 fa10 vmrs APSR_nzcv, fpscr 8015204: dd20 ble.n 8015248 { Motor1.Fb.VeSet.d = Motor1.Fb.VeRef.d * Inv.Ctrl.VphaseLim * Motor1.Fb.VphaseSet; 8015206: 4b38 ldr r3, [pc, #224] @ (80152e8 ) 8015208: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 801520c: 4b33 ldr r3, [pc, #204] @ (80152dc ) 801520e: edd3 7a02 vldr s15, [r3, #8] 8015212: ee27 7a27 vmul.f32 s14, s14, s15 8015216: 4b34 ldr r3, [pc, #208] @ (80152e8 ) 8015218: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 801521c: ee67 7a27 vmul.f32 s15, s14, s15 8015220: 4b31 ldr r3, [pc, #196] @ (80152e8 ) 8015222: edc3 7a15 vstr s15, [r3, #84] @ 0x54 Motor1.Fb.VeSet.q = Motor1.Fb.VeRef.q * Inv.Ctrl.VphaseLim * Motor1.Fb.VphaseSet; 8015226: 4b30 ldr r3, [pc, #192] @ (80152e8 ) 8015228: ed93 7a14 vldr s14, [r3, #80] @ 0x50 801522c: 4b2b ldr r3, [pc, #172] @ (80152dc ) 801522e: edd3 7a02 vldr s15, [r3, #8] 8015232: ee27 7a27 vmul.f32 s14, s14, s15 8015236: 4b2c ldr r3, [pc, #176] @ (80152e8 ) 8015238: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 801523c: ee67 7a27 vmul.f32 s15, s14, s15 8015240: 4b29 ldr r3, [pc, #164] @ (80152e8 ) 8015242: edc3 7a16 vstr s15, [r3, #88] @ 0x58 8015246: e007 b.n 8015258 } else { Motor1.Fb.VeSet.d = Motor1.Fb.VeRef.d; 8015248: 4b27 ldr r3, [pc, #156] @ (80152e8 ) 801524a: 6cdb ldr r3, [r3, #76] @ 0x4c 801524c: 4a26 ldr r2, [pc, #152] @ (80152e8 ) 801524e: 6553 str r3, [r2, #84] @ 0x54 Motor1.Fb.VeSet.q = Motor1.Fb.VeRef.q; 8015250: 4b25 ldr r3, [pc, #148] @ (80152e8 ) 8015252: 6d1b ldr r3, [r3, #80] @ 0x50 8015254: 4a24 ldr r2, [pc, #144] @ (80152e8 ) 8015256: 6593 str r3, [r2, #88] @ 0x58 } WP_InvClarkeParkTrans(&Motor1.Fb.V3Set, &Motor1.Fb.VsSet, &Motor1.Fb.VeSet, &Motor1_Ang); 8015258: 4b25 ldr r3, [pc, #148] @ (80152f0 ) 801525a: 4a2f ldr r2, [pc, #188] @ (8015318 ) 801525c: 492c ldr r1, [pc, #176] @ (8015310 ) 801525e: 482d ldr r0, [pc, #180] @ (8015314 ) 8015260: f001 fc7a bl 8016b58 break; 8015264: bf00 nop } /* Limit Function Add */ WP_InvMinMax(&Motor1.Fb.V3Set, &Motor1.Fb.V3, Inv.Ctrl.VphLim); 8015266: 4b1d ldr r3, [pc, #116] @ (80152dc ) 8015268: edd3 7a03 vldr s15, [r3, #12] 801526c: eeb0 0a67 vmov.f32 s0, s15 8015270: 492a ldr r1, [pc, #168] @ (801531c ) 8015272: 4828 ldr r0, [pc, #160] @ (8015314 ) 8015274: f001 fcd6 bl 8016c24 WP_ClarkeParkTrans(&Motor1.Fb.V3, &Motor1.Fb.Vs, &Motor1.Fb.Ve, &Motor1_Ang); 8015278: 4b1d ldr r3, [pc, #116] @ (80152f0 ) 801527a: 4a29 ldr r2, [pc, #164] @ (8015320 ) 801527c: 4929 ldr r1, [pc, #164] @ (8015324 ) 801527e: 4827 ldr r0, [pc, #156] @ (801531c ) 8015280: f001 fc1e bl 8016ac0 Motor1.PiCurQ.AW = Motor1.Fb.VeRef.q - Motor1.Fb.Ve.q; 8015284: 4b18 ldr r3, [pc, #96] @ (80152e8 ) 8015286: ed93 7a14 vldr s14, [r3, #80] @ 0x50 801528a: 4b17 ldr r3, [pc, #92] @ (80152e8 ) 801528c: edd3 7a25 vldr s15, [r3, #148] @ 0x94 8015290: ee77 7a67 vsub.f32 s15, s14, s15 8015294: 4b14 ldr r3, [pc, #80] @ (80152e8 ) 8015296: edc3 7a4d vstr s15, [r3, #308] @ 0x134 Motor1.PiCurD.AW = Motor1.Fb.VeRef.d - Motor1.Fb.Ve.d; 801529a: 4b13 ldr r3, [pc, #76] @ (80152e8 ) 801529c: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 80152a0: 4b11 ldr r3, [pc, #68] @ (80152e8 ) 80152a2: edd3 7a24 vldr s15, [r3, #144] @ 0x90 80152a6: ee77 7a67 vsub.f32 s15, s14, s15 80152aa: 4b0f ldr r3, [pc, #60] @ (80152e8 ) 80152ac: edc3 7a45 vstr s15, [r3, #276] @ 0x114 WP_PwmScale(Motor1.Fb.PWMcnt, &Motor1.Fb.V3, Motor1.Fb.Dutyratio, &Inv); 80152b0: 4b0a ldr r3, [pc, #40] @ (80152dc ) 80152b2: 4a1d ldr r2, [pc, #116] @ (8015328 ) 80152b4: 4919 ldr r1, [pc, #100] @ (801531c ) 80152b6: 481d ldr r0, [pc, #116] @ (801532c ) 80152b8: f001 fece bl 8017058 WP_CtrlErr.Motor1.PWM = WP_PWMout(MOTOR1, Motor1.Fb.PWMcnt); 80152bc: 491b ldr r1, [pc, #108] @ (801532c ) 80152be: 2001 movs r0, #1 80152c0: f002 f836 bl 8017330 80152c4: 4603 mov r3, r0 80152c6: 461a mov r2, r3 80152c8: 4b19 ldr r3, [pc, #100] @ (8015330 ) 80152ca: 745a strb r2, [r3, #17] } 80152cc: bf00 nop 80152ce: bd80 pop {r7, pc} 80152d0: 20000580 .word 0x20000580 80152d4: 20000578 .word 0x20000578 80152d8: 200003ac .word 0x200003ac 80152dc: 20000400 .word 0x20000400 80152e0: 20000660 .word 0x20000660 80152e4: 200006d0 .word 0x200006d0 80152e8: 20000574 .word 0x20000574 80152ec: 2000057c .word 0x2000057c 80152f0: 2000047c .word 0x2000047c 80152f4: 200001d8 .word 0x200001d8 80152f8: 20000640 .word 0x20000640 80152fc: 20000690 .word 0x20000690 8015300: 20000630 .word 0x20000630 8015304: 20000670 .word 0x20000670 8015308: 200008ec .word 0x200008ec 801530c: 20000598 .word 0x20000598 8015310: 200005d0 .word 0x200005d0 8015314: 200005d8 .word 0x200005d8 8015318: 200005c8 .word 0x200005c8 801531c: 200005f0 .word 0x200005f0 8015320: 20000604 .word 0x20000604 8015324: 200005fc .word 0x200005fc 8015328: 20000618 .word 0x20000618 801532c: 20000624 .word 0x20000624 8015330: 200003b8 .word 0x200003b8 08015334 : inline void Motor2CurCtrl(void) { 8015334: b580 push {r7, lr} 8015336: af00 add r7, sp, #0 WP_RampUpDn(&Motor2.Cmd.Icmd.q, &Motor2.Cmd.Iref.q, 1.0f, 1.0f); 8015338: eef7 0a00 vmov.f32 s1, #112 @ 0x3f800000 1.0 801533c: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 8015340: 49a0 ldr r1, [pc, #640] @ (80155c4 ) 8015342: 48a1 ldr r0, [pc, #644] @ (80155c8 ) 8015344: f002 f82e bl 80173a4 if(WP_Ctrl.Mode==Inv_TorqueWeakCtrl) 8015348: 4ba0 ldr r3, [pc, #640] @ (80155cc ) 801534a: 781b ldrb r3, [r3, #0] 801534c: 2b06 cmp r3, #6 801534e: d118 bne.n 8015382 { #if FIELDWEAK_MODE == FIELDWEAK_MOT Motor2.Cmd.Iref.d = WP_PIcontrolForFieldWeak(Inv.Ctrl.VlimFweak, Motor2.Fb.VphaseFil, &Motor2.PiFweak, &Motor2.GainFweak, Inv.Ctrl.IlimFweak); #endif #if FIELDWEAK_MODE == FIELDWEAK_GEN Motor2.Cmd.Iref.d = WP_PIcontrolForFieldWeak(Inv.Ctrl.VdcLimFweak, Inv.Ctrl.VdcFil, &Motor2.PiFweak, &Motor2.GainFweak, Inv.Ctrl.IlimFweak); 8015350: 4b9f ldr r3, [pc, #636] @ (80155d0 ) 8015352: edd3 7a07 vldr s15, [r3, #28] 8015356: 4b9e ldr r3, [pc, #632] @ (80155d0 ) 8015358: ed93 7a01 vldr s14, [r3, #4] 801535c: 4b9c ldr r3, [pc, #624] @ (80155d0 ) 801535e: edd3 6a09 vldr s13, [r3, #36] @ 0x24 8015362: eeb0 1a66 vmov.f32 s2, s13 8015366: 499b ldr r1, [pc, #620] @ (80155d4 ) 8015368: 489b ldr r0, [pc, #620] @ (80155d8 ) 801536a: eef0 0a47 vmov.f32 s1, s14 801536e: eeb0 0a67 vmov.f32 s0, s15 8015372: f001 fddb bl 8016f2c 8015376: eef0 7a40 vmov.f32 s15, s0 801537a: 4b98 ldr r3, [pc, #608] @ (80155dc ) 801537c: edc3 7a02 vstr s15, [r3, #8] 8015380: e007 b.n 8015392 #endif } else { WP_RampUpDn(&Motor2.Cmd.Icmd.d, &Motor2.Cmd.Iref.d, 1.0f, 1.0f); 8015382: eef7 0a00 vmov.f32 s1, #112 @ 0x3f800000 1.0 8015386: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 801538a: 4995 ldr r1, [pc, #596] @ (80155e0 ) 801538c: 4893 ldr r0, [pc, #588] @ (80155dc ) 801538e: f002 f809 bl 80173a4 } Motor2.PiCurQ.Ff = Motor2.Para.PhaiF * Motor2_Ang.RpmFil * WP_Weight.FfScale.Temp[R]; 8015392: 4b92 ldr r3, [pc, #584] @ (80155dc ) 8015394: ed93 7a63 vldr s14, [r3, #396] @ 0x18c 8015398: 4b92 ldr r3, [pc, #584] @ (80155e4 ) 801539a: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801539e: ee27 7a27 vmul.f32 s14, s14, s15 80153a2: 4b91 ldr r3, [pc, #580] @ (80155e8 ) 80153a4: edd3 7a19 vldr s15, [r3, #100] @ 0x64 80153a8: ee67 7a27 vmul.f32 s15, s14, s15 80153ac: 4b8b ldr r3, [pc, #556] @ (80155dc ) 80153ae: edc3 7a4c vstr s15, [r3, #304] @ 0x130 // Motor2.PiCurQ.Ff = Motor2.Para.PhaiF * Motor2_Ang.RpmFil * WP_Weight.FfScale.Temp[MOTOR_R];// + Motor2.Para.Ld * Motor2.Fb.Ie.d * Motor2_Ang.WeFil; // Motor2.PiCurQ.Ff = Motor2.Para.PhaiF * Motor2_Ang.RpmFil * WP_WeightFeel.FfScale_R; // Motor2.PiCurD.Ff = - Motor2.Para.Lq * Motor2.Fb.Ie.q * Motor2_Ang.WeFil; // Motor2.Fb.VeRef.q = WP_PIcontrol_Spdlim(Motor2.Cmd.Iref.q, Motor2.Fb.Ie.q, &Motor2.PiCurQ, &Motor2.GainCurQ, Inv.Ctrl.VphaseLim, Motor2_Ang.RpmFil);///somebp 2024.02.02 Motor2.Fb.VeRef.q = WP_PIcontrol(Motor2.Cmd.Iref.q, Motor2.Fb.Ie.q, &Motor2.PiCurQ, &Motor2.GainCurQ, Inv.Ctrl.VphaseLim); ///origin 80153b2: 4b8a ldr r3, [pc, #552] @ (80155dc ) 80153b4: edd3 7a03 vldr s15, [r3, #12] 80153b8: 4b88 ldr r3, [pc, #544] @ (80155dc ) 80153ba: ed93 7a11 vldr s14, [r3, #68] @ 0x44 80153be: 4b84 ldr r3, [pc, #528] @ (80155d0 ) 80153c0: edd3 6a02 vldr s13, [r3, #8] 80153c4: eeb0 1a66 vmov.f32 s2, s13 80153c8: 4988 ldr r1, [pc, #544] @ (80155ec ) 80153ca: 4889 ldr r0, [pc, #548] @ (80155f0 ) 80153cc: eef0 0a47 vmov.f32 s1, s14 80153d0: eeb0 0a67 vmov.f32 s0, s15 80153d4: f001 fcfa bl 8016dcc 80153d8: eef0 7a40 vmov.f32 s15, s0 80153dc: 4b7f ldr r3, [pc, #508] @ (80155dc ) 80153de: edc3 7a14 vstr s15, [r3, #80] @ 0x50 Motor2.Fb.VeRef.d = WP_PIcontrol(Motor2.Cmd.Iref.d, Motor2.Fb.Ie.d, &Motor2.PiCurD, &Motor2.GainCurD, Inv.Ctrl.VphaseLim); 80153e2: 4b7e ldr r3, [pc, #504] @ (80155dc ) 80153e4: edd3 7a02 vldr s15, [r3, #8] 80153e8: 4b7c ldr r3, [pc, #496] @ (80155dc ) 80153ea: ed93 7a10 vldr s14, [r3, #64] @ 0x40 80153ee: 4b78 ldr r3, [pc, #480] @ (80155d0 ) 80153f0: edd3 6a02 vldr s13, [r3, #8] 80153f4: eeb0 1a66 vmov.f32 s2, s13 80153f8: 497e ldr r1, [pc, #504] @ (80155f4 ) 80153fa: 487f ldr r0, [pc, #508] @ (80155f8 ) 80153fc: eef0 0a47 vmov.f32 s1, s14 8015400: eeb0 0a67 vmov.f32 s0, s15 8015404: f001 fce2 bl 8016dcc 8015408: eef0 7a40 vmov.f32 s15, s0 801540c: 4b73 ldr r3, [pc, #460] @ (80155dc ) 801540e: edc3 7a13 vstr s15, [r3, #76] @ 0x4c Motor2.Fb.VphaseRef = sqrtf(Motor2.Fb.VeRef.d * Motor2.Fb.VeRef.d + Motor2.Fb.VeRef.q * Motor2.Fb.VeRef.q); // 700ns 8015412: 4b72 ldr r3, [pc, #456] @ (80155dc ) 8015414: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 8015418: 4b70 ldr r3, [pc, #448] @ (80155dc ) 801541a: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 801541e: ee27 7a27 vmul.f32 s14, s14, s15 8015422: 4b6e ldr r3, [pc, #440] @ (80155dc ) 8015424: edd3 6a14 vldr s13, [r3, #80] @ 0x50 8015428: 4b6c ldr r3, [pc, #432] @ (80155dc ) 801542a: edd3 7a14 vldr s15, [r3, #80] @ 0x50 801542e: ee66 7aa7 vmul.f32 s15, s13, s15 8015432: ee77 7a27 vadd.f32 s15, s14, s15 8015436: eeb0 0a67 vmov.f32 s0, s15 801543a: f013 fcd3 bl 8028de4 801543e: eef0 7a40 vmov.f32 s15, s0 8015442: 4b66 ldr r3, [pc, #408] @ (80155dc ) 8015444: edc3 7a26 vstr s15, [r3, #152] @ 0x98 LPF(Motor2.Fb.VphaseFil, Motor2.Fb.VphaseRef, LpfVdc.fct); 8015448: 4b64 ldr r3, [pc, #400] @ (80155dc ) 801544a: ed93 7a27 vldr s14, [r3, #156] @ 0x9c 801544e: 4b63 ldr r3, [pc, #396] @ (80155dc ) 8015450: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8015454: ee77 7a67 vsub.f32 s15, s14, s15 8015458: eef5 7ac0 vcmpe.f32 s15, #0.0 801545c: eef1 fa10 vmrs APSR_nzcv, fpscr 8015460: dd12 ble.n 8015488 8015462: 4b66 ldr r3, [pc, #408] @ (80155fc ) 8015464: ed93 7a02 vldr s14, [r3, #8] 8015468: 4b5c ldr r3, [pc, #368] @ (80155dc ) 801546a: edd3 6a27 vldr s13, [r3, #156] @ 0x9c 801546e: 4b5b ldr r3, [pc, #364] @ (80155dc ) 8015470: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8015474: ee76 7ae7 vsub.f32 s15, s13, s15 8015478: ee27 7a27 vmul.f32 s14, s14, s15 801547c: 4b57 ldr r3, [pc, #348] @ (80155dc ) 801547e: edd3 7a26 vldr s15, [r3, #152] @ 0x98 8015482: ee77 7a27 vadd.f32 s15, s14, s15 8015486: e013 b.n 80154b0 8015488: 4b5c ldr r3, [pc, #368] @ (80155fc ) 801548a: edd3 7a02 vldr s15, [r3, #8] 801548e: eeb1 7a67 vneg.f32 s14, s15 8015492: 4b52 ldr r3, [pc, #328] @ (80155dc ) 8015494: edd3 6a26 vldr s13, [r3, #152] @ 0x98 8015498: 4b50 ldr r3, [pc, #320] @ (80155dc ) 801549a: edd3 7a27 vldr s15, [r3, #156] @ 0x9c 801549e: ee76 7ae7 vsub.f32 s15, s13, s15 80154a2: ee27 7a27 vmul.f32 s14, s14, s15 80154a6: 4b4d ldr r3, [pc, #308] @ (80155dc ) 80154a8: edd3 7a26 vldr s15, [r3, #152] @ 0x98 80154ac: ee77 7a27 vadd.f32 s15, s14, s15 80154b0: 4b4a ldr r3, [pc, #296] @ (80155dc ) 80154b2: edc3 7a27 vstr s15, [r3, #156] @ 0x9c Motor2.Fb.VphaseSet = 1.0f / Motor2.Fb.VphaseFil; 80154b6: 4b49 ldr r3, [pc, #292] @ (80155dc ) 80154b8: ed93 7a27 vldr s14, [r3, #156] @ 0x9c 80154bc: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 80154c0: eec6 7a87 vdiv.f32 s15, s13, s14 80154c4: 4b45 ldr r3, [pc, #276] @ (80155dc ) 80154c6: edc3 7a28 vstr s15, [r3, #160] @ 0xa0 switch(WP_Ctrl.Mode) 80154ca: 4b40 ldr r3, [pc, #256] @ (80155cc ) 80154cc: 781b ldrb r3, [r3, #0] 80154ce: 2b03 cmp r3, #3 80154d0: d106 bne.n 80154e0 { case Inv_VbyFCtrl: WP_InvClarkeParkTrans(&Motor2.Fb.V3Set, &Motor2.Fb.VsSet, &Motor2.Cmd.Vfcmd, &Motor2_Ang); 80154d2: 4b44 ldr r3, [pc, #272] @ (80155e4 ) 80154d4: 4a4a ldr r2, [pc, #296] @ (8015600 ) 80154d6: 494b ldr r1, [pc, #300] @ (8015604 ) 80154d8: 484b ldr r0, [pc, #300] @ (8015608 ) 80154da: f001 fb3d bl 8016b58 break; 80154de: e03a b.n 8015556 default: if(Motor2.Fb.VphaseFil > Inv.Ctrl.VphaseLim) 80154e0: 4b3e ldr r3, [pc, #248] @ (80155dc ) 80154e2: ed93 7a27 vldr s14, [r3, #156] @ 0x9c 80154e6: 4b3a ldr r3, [pc, #232] @ (80155d0 ) 80154e8: edd3 7a02 vldr s15, [r3, #8] 80154ec: eeb4 7ae7 vcmpe.f32 s14, s15 80154f0: eef1 fa10 vmrs APSR_nzcv, fpscr 80154f4: dd20 ble.n 8015538 { Motor2.Fb.VeSet.d = Motor2.Fb.VeRef.d * Inv.Ctrl.VphaseLim * Motor2.Fb.VphaseSet; 80154f6: 4b39 ldr r3, [pc, #228] @ (80155dc ) 80154f8: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 80154fc: 4b34 ldr r3, [pc, #208] @ (80155d0 ) 80154fe: edd3 7a02 vldr s15, [r3, #8] 8015502: ee27 7a27 vmul.f32 s14, s14, s15 8015506: 4b35 ldr r3, [pc, #212] @ (80155dc ) 8015508: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 801550c: ee67 7a27 vmul.f32 s15, s14, s15 8015510: 4b32 ldr r3, [pc, #200] @ (80155dc ) 8015512: edc3 7a15 vstr s15, [r3, #84] @ 0x54 Motor2.Fb.VeSet.q = Motor2.Fb.VeRef.q * Inv.Ctrl.VphaseLim * Motor2.Fb.VphaseSet; 8015516: 4b31 ldr r3, [pc, #196] @ (80155dc ) 8015518: ed93 7a14 vldr s14, [r3, #80] @ 0x50 801551c: 4b2c ldr r3, [pc, #176] @ (80155d0 ) 801551e: edd3 7a02 vldr s15, [r3, #8] 8015522: ee27 7a27 vmul.f32 s14, s14, s15 8015526: 4b2d ldr r3, [pc, #180] @ (80155dc ) 8015528: edd3 7a28 vldr s15, [r3, #160] @ 0xa0 801552c: ee67 7a27 vmul.f32 s15, s14, s15 8015530: 4b2a ldr r3, [pc, #168] @ (80155dc ) 8015532: edc3 7a16 vstr s15, [r3, #88] @ 0x58 8015536: e007 b.n 8015548 } else { Motor2.Fb.VeSet.d = Motor2.Fb.VeRef.d; 8015538: 4b28 ldr r3, [pc, #160] @ (80155dc ) 801553a: 6cdb ldr r3, [r3, #76] @ 0x4c 801553c: 4a27 ldr r2, [pc, #156] @ (80155dc ) 801553e: 6553 str r3, [r2, #84] @ 0x54 Motor2.Fb.VeSet.q = Motor2.Fb.VeRef.q; 8015540: 4b26 ldr r3, [pc, #152] @ (80155dc ) 8015542: 6d1b ldr r3, [r3, #80] @ 0x50 8015544: 4a25 ldr r2, [pc, #148] @ (80155dc ) 8015546: 6593 str r3, [r2, #88] @ 0x58 } WP_InvClarkeParkTrans(&Motor2.Fb.V3Set, &Motor2.Fb.VsSet, &Motor2.Fb.VeSet, &Motor2_Ang); 8015548: 4b26 ldr r3, [pc, #152] @ (80155e4 ) 801554a: 4a30 ldr r2, [pc, #192] @ (801560c ) 801554c: 492d ldr r1, [pc, #180] @ (8015604 ) 801554e: 482e ldr r0, [pc, #184] @ (8015608 ) 8015550: f001 fb02 bl 8016b58 break; 8015554: bf00 nop } /* Limit Function Add */ WP_InvMinMax(&Motor2.Fb.V3Set, &Motor2.Fb.V3, Inv.Ctrl.VphLim); 8015556: 4b1e ldr r3, [pc, #120] @ (80155d0 ) 8015558: edd3 7a03 vldr s15, [r3, #12] 801555c: eeb0 0a67 vmov.f32 s0, s15 8015560: 492b ldr r1, [pc, #172] @ (8015610 ) 8015562: 4829 ldr r0, [pc, #164] @ (8015608 ) 8015564: f001 fb5e bl 8016c24 WP_ClarkeParkTrans(&Motor2.Fb.V3, &Motor2.Fb.Vs, &Motor2.Fb.Ve, &Motor2_Ang); 8015568: 4b1e ldr r3, [pc, #120] @ (80155e4 ) 801556a: 4a2a ldr r2, [pc, #168] @ (8015614 ) 801556c: 492a ldr r1, [pc, #168] @ (8015618 ) 801556e: 4828 ldr r0, [pc, #160] @ (8015610 ) 8015570: f001 faa6 bl 8016ac0 Motor2.PiCurQ.AW = Motor2.Fb.VeRef.q - Motor2.Fb.Ve.q; 8015574: 4b19 ldr r3, [pc, #100] @ (80155dc ) 8015576: ed93 7a14 vldr s14, [r3, #80] @ 0x50 801557a: 4b18 ldr r3, [pc, #96] @ (80155dc ) 801557c: edd3 7a25 vldr s15, [r3, #148] @ 0x94 8015580: ee77 7a67 vsub.f32 s15, s14, s15 8015584: 4b15 ldr r3, [pc, #84] @ (80155dc ) 8015586: edc3 7a4d vstr s15, [r3, #308] @ 0x134 Motor2.PiCurD.AW = Motor2.Fb.VeRef.d - Motor2.Fb.Ve.d; 801558a: 4b14 ldr r3, [pc, #80] @ (80155dc ) 801558c: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 8015590: 4b12 ldr r3, [pc, #72] @ (80155dc ) 8015592: edd3 7a24 vldr s15, [r3, #144] @ 0x90 8015596: ee77 7a67 vsub.f32 s15, s14, s15 801559a: 4b10 ldr r3, [pc, #64] @ (80155dc ) 801559c: edc3 7a45 vstr s15, [r3, #276] @ 0x114 WP_PwmScale(Motor2.Fb.PWMcnt, &Motor2.Fb.V3, Motor2.Fb.Dutyratio, &Inv); 80155a0: 4b0b ldr r3, [pc, #44] @ (80155d0 ) 80155a2: 4a1e ldr r2, [pc, #120] @ (801561c ) 80155a4: 491a ldr r1, [pc, #104] @ (8015610 ) 80155a6: 481e ldr r0, [pc, #120] @ (8015620 ) 80155a8: f001 fd56 bl 8017058 WP_CtrlErr.Motor2.PWM = WP_PWMout(MOTOR2, Motor2.Fb.PWMcnt); 80155ac: 491c ldr r1, [pc, #112] @ (8015620 ) 80155ae: 2002 movs r0, #2 80155b0: f001 febe bl 8017330 80155b4: 4603 mov r3, r0 80155b6: 461a mov r2, r3 80155b8: 4b1a ldr r3, [pc, #104] @ (8015624 ) 80155ba: f883 2023 strb.w r2, [r3, #35] @ 0x23 } 80155be: bf00 nop 80155c0: bd80 pop {r7, pc} 80155c2: bf00 nop 80155c4: 20000710 .word 0x20000710 80155c8: 20000708 .word 0x20000708 80155cc: 200003ac .word 0x200003ac 80155d0: 20000400 .word 0x20000400 80155d4: 200007f0 .word 0x200007f0 80155d8: 20000860 .word 0x20000860 80155dc: 20000704 .word 0x20000704 80155e0: 2000070c .word 0x2000070c 80155e4: 200004f8 .word 0x200004f8 80155e8: 200001d8 .word 0x200001d8 80155ec: 200007d0 .word 0x200007d0 80155f0: 20000820 .word 0x20000820 80155f4: 200007c0 .word 0x200007c0 80155f8: 20000800 .word 0x20000800 80155fc: 200008ec .word 0x200008ec 8015600: 20000728 .word 0x20000728 8015604: 20000760 .word 0x20000760 8015608: 20000768 .word 0x20000768 801560c: 20000758 .word 0x20000758 8015610: 20000780 .word 0x20000780 8015614: 20000794 .word 0x20000794 8015618: 2000078c .word 0x2000078c 801561c: 200007a8 .word 0x200007a8 8015620: 200007b4 .word 0x200007b4 8015624: 200003b8 .word 0x200003b8 08015628 : inline void MotorSpdControl(void) { 8015628: b580 push {r7, lr} 801562a: af00 add r7, sp, #0 switch(WP_Ctrl.ActiveMotor&0x1) // Motor1 Test 801562c: 4b29 ldr r3, [pc, #164] @ (80156d4 ) 801562e: 785b ldrb r3, [r3, #1] 8015630: f003 0301 and.w r3, r3, #1 8015634: 2b00 cmp r3, #0 8015636: d013 beq.n 8015660 8015638: 2b01 cmp r3, #1 801563a: d118 bne.n 801566e { case WP_RUN: // Motor1Ctrl_PwmStart(); if(Motor1_Ang._1msFlg == 1) 801563c: 4b26 ldr r3, [pc, #152] @ (80156d8 ) 801563e: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8015642: 2b01 cmp r3, #1 8015644: d105 bne.n 8015652 { Motor1SpdCtrl(); 8015646: f000 f84b bl 80156e0 Motor1_Ang._1msFlg = 0; 801564a: 4b23 ldr r3, [pc, #140] @ (80156d8 ) 801564c: 2200 movs r2, #0 801564e: f883 2021 strb.w r2, [r3, #33] @ 0x21 } Motor1CurCtrl(); 8015652: f7ff fcf7 bl 8015044 Motor1En(WP_Gate_EN); 8015656: 2100 movs r1, #0 8015658: 2001 movs r0, #1 801565a: f003 fa6b bl 8018b34 break; 801565e: e00d b.n 801567c case WP_STOP: Motor1Ctrl_VariSetZero(); 8015660: f001 f826 bl 80166b0 Motor1En(WP_Gate_DIS); 8015664: 2101 movs r1, #1 8015666: 2001 movs r0, #1 8015668: f003 fa64 bl 8018b34 // Motor1Ctrl_PwmStop(); break; 801566c: e006 b.n 801567c default: Motor1Ctrl_VariSetZero(); 801566e: f001 f81f bl 80166b0 Motor1En(WP_Gate_DIS); 8015672: 2101 movs r1, #1 8015674: 2001 movs r0, #1 8015676: f003 fa5d bl 8018b34 // Motor1Ctrl_PwmStop(); break; 801567a: bf00 nop } switch((WP_Ctrl.ActiveMotor>>1)&0x1) // Motor2 Test 801567c: 4b15 ldr r3, [pc, #84] @ (80156d4 ) 801567e: 785b ldrb r3, [r3, #1] 8015680: 085b lsrs r3, r3, #1 8015682: b2db uxtb r3, r3 8015684: f003 0301 and.w r3, r3, #1 8015688: 2b00 cmp r3, #0 801568a: d013 beq.n 80156b4 801568c: 2b01 cmp r3, #1 801568e: d118 bne.n 80156c2 { case WP_RUN: // Motor2Ctrl_PwmStart(); if(Motor2_Ang._1msFlg == 1) 8015690: 4b12 ldr r3, [pc, #72] @ (80156dc ) 8015692: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8015696: 2b01 cmp r3, #1 8015698: d105 bne.n 80156a6 { Motor2SpdCtrl(); 801569a: f000 f851 bl 8015740 Motor2_Ang._1msFlg = 0; 801569e: 4b0f ldr r3, [pc, #60] @ (80156dc ) 80156a0: 2200 movs r2, #0 80156a2: f883 2021 strb.w r2, [r3, #33] @ 0x21 } Motor2CurCtrl(); 80156a6: f7ff fe45 bl 8015334 Motor2En(WP_Gate_EN); 80156aa: 2100 movs r1, #0 80156ac: 2002 movs r0, #2 80156ae: f003 fa41 bl 8018b34 break; 80156b2: e00d b.n 80156d0 case WP_STOP: Motor2Ctrl_VariSetZero(); 80156b4: f001 f8ce bl 8016854 Motor2En(WP_Gate_DIS); 80156b8: 2101 movs r1, #1 80156ba: 2002 movs r0, #2 80156bc: f003 fa3a bl 8018b34 // Motor2Ctrl_PwmStop(); break; 80156c0: e006 b.n 80156d0 default: Motor2Ctrl_VariSetZero(); 80156c2: f001 f8c7 bl 8016854 Motor2En(WP_Gate_DIS); 80156c6: 2101 movs r1, #1 80156c8: 2002 movs r0, #2 80156ca: f003 fa33 bl 8018b34 // Motor2Ctrl_PwmStop(); break; 80156ce: bf00 nop } } 80156d0: bf00 nop 80156d2: bd80 pop {r7, pc} 80156d4: 200003ac .word 0x200003ac 80156d8: 2000047c .word 0x2000047c 80156dc: 200004f8 .word 0x200004f8 080156e0 : inline void Motor1SpdCtrl(void) { 80156e0: b580 push {r7, lr} 80156e2: af00 add r7, sp, #0 WP_RampUpDn(&Motor1.Cmd.RpmCmd, &Motor1.Cmd.RpmRef, 10.0f, 10.0f); 80156e4: eef2 0a04 vmov.f32 s1, #36 @ 0x41200000 10.0 80156e8: eeb2 0a04 vmov.f32 s0, #36 @ 0x41200000 10.0 80156ec: 490e ldr r1, [pc, #56] @ (8015728 ) 80156ee: 480f ldr r0, [pc, #60] @ (801572c ) 80156f0: f001 fe58 bl 80173a4 Motor1.Cmd.Icmd.q = WP_PIcontrol(Motor1.Cmd.RpmRef, Motor1_Ang.RpmFil, &Motor1.PiSpd, &Motor1.GainSpd, Motor1_Ang.SpdCtrlOutLim); 80156f4: 4b0e ldr r3, [pc, #56] @ (8015730 ) 80156f6: edd3 7a07 vldr s15, [r3, #28] 80156fa: 4b0e ldr r3, [pc, #56] @ (8015734 ) 80156fc: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8015700: 4b0c ldr r3, [pc, #48] @ (8015734 ) 8015702: edd3 6a13 vldr s13, [r3, #76] @ 0x4c 8015706: eeb0 1a66 vmov.f32 s2, s13 801570a: 490b ldr r1, [pc, #44] @ (8015738 ) 801570c: 480b ldr r0, [pc, #44] @ (801573c ) 801570e: eef0 0a47 vmov.f32 s1, s14 8015712: eeb0 0a67 vmov.f32 s0, s15 8015716: f001 fb59 bl 8016dcc 801571a: eef0 7a40 vmov.f32 s15, s0 801571e: 4b04 ldr r3, [pc, #16] @ (8015730 ) 8015720: edc3 7a01 vstr s15, [r3, #4] } 8015724: bf00 nop 8015726: bd80 pop {r7, pc} 8015728: 20000590 .word 0x20000590 801572c: 2000058c .word 0x2000058c 8015730: 20000574 .word 0x20000574 8015734: 2000047c .word 0x2000047c 8015738: 20000650 .word 0x20000650 801573c: 200006b0 .word 0x200006b0 08015740 : inline void Motor2SpdCtrl(void) { 8015740: b580 push {r7, lr} 8015742: af00 add r7, sp, #0 WP_RampUpDn(&Motor2.Cmd.RpmCmd, &Motor2.Cmd.RpmRef, 10.0f, 10.0f); 8015744: eef2 0a04 vmov.f32 s1, #36 @ 0x41200000 10.0 8015748: eeb2 0a04 vmov.f32 s0, #36 @ 0x41200000 10.0 801574c: 490e ldr r1, [pc, #56] @ (8015788 ) 801574e: 480f ldr r0, [pc, #60] @ (801578c ) 8015750: f001 fe28 bl 80173a4 Motor2.Cmd.Icmd.q = WP_PIcontrol(Motor2.Cmd.RpmRef, Motor2_Ang.RpmFil, &Motor2.PiSpd, &Motor2.GainSpd, Motor2_Ang.SpdCtrlOutLim); 8015754: 4b0e ldr r3, [pc, #56] @ (8015790 ) 8015756: edd3 7a07 vldr s15, [r3, #28] 801575a: 4b0e ldr r3, [pc, #56] @ (8015794 ) 801575c: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8015760: 4b0c ldr r3, [pc, #48] @ (8015794 ) 8015762: edd3 6a13 vldr s13, [r3, #76] @ 0x4c 8015766: eeb0 1a66 vmov.f32 s2, s13 801576a: 490b ldr r1, [pc, #44] @ (8015798 ) 801576c: 480b ldr r0, [pc, #44] @ (801579c ) 801576e: eef0 0a47 vmov.f32 s1, s14 8015772: eeb0 0a67 vmov.f32 s0, s15 8015776: f001 fb29 bl 8016dcc 801577a: eef0 7a40 vmov.f32 s15, s0 801577e: 4b04 ldr r3, [pc, #16] @ (8015790 ) 8015780: edc3 7a01 vstr s15, [r3, #4] } 8015784: bf00 nop 8015786: bd80 pop {r7, pc} 8015788: 20000720 .word 0x20000720 801578c: 2000071c .word 0x2000071c 8015790: 20000704 .word 0x20000704 8015794: 200004f8 .word 0x200004f8 8015798: 200007e0 .word 0x200007e0 801579c: 20000840 .word 0x20000840 080157a0 : /*==========================================================================================================*/ inline void InvAdcGet(void) { 80157a0: b480 push {r7} 80157a2: af00 add r7, sp, #0 ADinj.Raw[0][0] = ADC_Inject[0][0]; // AD_IU0; 80157a4: 4b1a ldr r3, [pc, #104] @ (8015810 ) 80157a6: 881a ldrh r2, [r3, #0] 80157a8: 4b1a ldr r3, [pc, #104] @ (8015814 ) 80157aa: 801a strh r2, [r3, #0] ADinj.Raw[0][1] = ADC_Inject[0][1]; // AD_IU1; 80157ac: 4b18 ldr r3, [pc, #96] @ (8015810 ) 80157ae: 885a ldrh r2, [r3, #2] 80157b0: 4b18 ldr r3, [pc, #96] @ (8015814 ) 80157b2: 805a strh r2, [r3, #2] ADinj.Raw[0][2] = ADC_Inject[0][2]; // AD_SIN0; 80157b4: 4b16 ldr r3, [pc, #88] @ (8015810 ) 80157b6: 889a ldrh r2, [r3, #4] 80157b8: 4b16 ldr r3, [pc, #88] @ (8015814 ) 80157ba: 809a strh r2, [r3, #4] ADinj.Raw[0][3] = ADC_Inject[0][3]; // AD_SIN1; 80157bc: 4b14 ldr r3, [pc, #80] @ (8015810 ) 80157be: 88da ldrh r2, [r3, #6] 80157c0: 4b14 ldr r3, [pc, #80] @ (8015814 ) 80157c2: 80da strh r2, [r3, #6] ADinj.Raw[1][0] = ADC_Inject[1][0]; // AD_IV0; 80157c4: 4b12 ldr r3, [pc, #72] @ (8015810 ) 80157c6: 891a ldrh r2, [r3, #8] 80157c8: 4b12 ldr r3, [pc, #72] @ (8015814 ) 80157ca: 811a strh r2, [r3, #8] ADinj.Raw[1][1] = ADC_Inject[1][1]; // AD_IV1; 80157cc: 4b10 ldr r3, [pc, #64] @ (8015810 ) 80157ce: 895a ldrh r2, [r3, #10] 80157d0: 4b10 ldr r3, [pc, #64] @ (8015814 ) 80157d2: 815a strh r2, [r3, #10] ADinj.Raw[1][2] = ADC_Inject[1][2]; // AD_COS0; 80157d4: 4b0e ldr r3, [pc, #56] @ (8015810 ) 80157d6: 899a ldrh r2, [r3, #12] 80157d8: 4b0e ldr r3, [pc, #56] @ (8015814 ) 80157da: 819a strh r2, [r3, #12] ADinj.Raw[1][3] = ADC_Inject[1][3]; // AD_COS1; 80157dc: 4b0c ldr r3, [pc, #48] @ (8015810 ) 80157de: 89da ldrh r2, [r3, #14] 80157e0: 4b0c ldr r3, [pc, #48] @ (8015814 ) 80157e2: 81da strh r2, [r3, #14] ADinj.Raw[2][0] = ADC_Inject[2][0]; // AD_IW0; 80157e4: 4b0a ldr r3, [pc, #40] @ (8015810 ) 80157e6: 8a1a ldrh r2, [r3, #16] 80157e8: 4b0a ldr r3, [pc, #40] @ (8015814 ) 80157ea: 821a strh r2, [r3, #16] ADinj.Raw[2][1] = ADC_Inject[2][1]; // AD_IW1; 80157ec: 4b08 ldr r3, [pc, #32] @ (8015810 ) 80157ee: 8a5a ldrh r2, [r3, #18] 80157f0: 4b08 ldr r3, [pc, #32] @ (8015814 ) 80157f2: 825a strh r2, [r3, #18] ADinj.Raw[2][2] = ADC_Inject[2][2]; // AD_VDC; 80157f4: 4b06 ldr r3, [pc, #24] @ (8015810 ) 80157f6: 8a9a ldrh r2, [r3, #20] 80157f8: 4b06 ldr r3, [pc, #24] @ (8015814 ) 80157fa: 829a strh r2, [r3, #20] ADinj.Raw[2][3] = ADC_Inject[2][3]; // AD_EXT0; 80157fc: 4b04 ldr r3, [pc, #16] @ (8015810 ) 80157fe: 8ada ldrh r2, [r3, #22] 8015800: 4b04 ldr r3, [pc, #16] @ (8015814 ) 8015802: 82da strh r2, [r3, #22] } 8015804: bf00 nop 8015806: 46bd mov sp, r7 8015808: f85d 7b04 ldr.w r7, [sp], #4 801580c: 4770 bx lr 801580e: bf00 nop 8015810: 20000a64 .word 0x20000a64 8015814: 20000894 .word 0x20000894 08015818 : inline void MotorCtrl_FeedbackCal(void) { 8015818: b580 push {r7, lr} 801581a: af00 add r7, sp, #0 // digitalWrite(57, 1); Inv.Ctrl.Vdc = ADinj.Raw[2][2] * Inv.Para.VdcScale; 801581c: 4bb2 ldr r3, [pc, #712] @ (8015ae8 ) 801581e: 8a9b ldrh r3, [r3, #20] 8015820: ee07 3a90 vmov s15, r3 8015824: eeb8 7ae7 vcvt.f32.s32 s14, s15 8015828: 4bb0 ldr r3, [pc, #704] @ (8015aec ) 801582a: edd3 7a19 vldr s15, [r3, #100] @ 0x64 801582e: ee67 7a27 vmul.f32 s15, s14, s15 8015832: 4bae ldr r3, [pc, #696] @ (8015aec ) 8015834: edc3 7a00 vstr s15, [r3] Inv.Ctrl.AD1.iRaw.U = ADinj.Raw[0][0]; 8015838: 4bab ldr r3, [pc, #684] @ (8015ae8 ) 801583a: 881b ldrh r3, [r3, #0] 801583c: ee07 3a90 vmov s15, r3 8015840: eef8 7a67 vcvt.f32.u32 s15, s15 8015844: 4ba9 ldr r3, [pc, #676] @ (8015aec ) 8015846: edc3 7a0a vstr s15, [r3, #40] @ 0x28 Inv.Ctrl.AD2.iRaw.U = ADinj.Raw[0][1]; 801584a: 4ba7 ldr r3, [pc, #668] @ (8015ae8 ) 801584c: 885b ldrh r3, [r3, #2] 801584e: ee07 3a90 vmov s15, r3 8015852: eef8 7a67 vcvt.f32.u32 s15, s15 8015856: 4ba5 ldr r3, [pc, #660] @ (8015aec ) 8015858: edc3 7a10 vstr s15, [r3, #64] @ 0x40 Inv.Ctrl.AD1.iRaw.V = ADinj.Raw[1][0]; 801585c: 4ba2 ldr r3, [pc, #648] @ (8015ae8 ) 801585e: 891b ldrh r3, [r3, #8] 8015860: ee07 3a90 vmov s15, r3 8015864: eef8 7a67 vcvt.f32.u32 s15, s15 8015868: 4ba0 ldr r3, [pc, #640] @ (8015aec ) 801586a: edc3 7a0b vstr s15, [r3, #44] @ 0x2c Inv.Ctrl.AD2.iRaw.V = ADinj.Raw[1][1]; 801586e: 4b9e ldr r3, [pc, #632] @ (8015ae8 ) 8015870: 895b ldrh r3, [r3, #10] 8015872: ee07 3a90 vmov s15, r3 8015876: eef8 7a67 vcvt.f32.u32 s15, s15 801587a: 4b9c ldr r3, [pc, #624] @ (8015aec ) 801587c: edc3 7a11 vstr s15, [r3, #68] @ 0x44 Inv.Ctrl.AD1.iRaw.W = ADinj.Raw[2][0]; 8015880: 4b99 ldr r3, [pc, #612] @ (8015ae8 ) 8015882: 8a1b ldrh r3, [r3, #16] 8015884: ee07 3a90 vmov s15, r3 8015888: eef8 7a67 vcvt.f32.u32 s15, s15 801588c: 4b97 ldr r3, [pc, #604] @ (8015aec ) 801588e: edc3 7a0c vstr s15, [r3, #48] @ 0x30 Inv.Ctrl.AD2.iRaw.W = ADinj.Raw[2][1]; 8015892: 4b95 ldr r3, [pc, #596] @ (8015ae8 ) 8015894: 8a5b ldrh r3, [r3, #18] 8015896: ee07 3a90 vmov s15, r3 801589a: eef8 7a67 vcvt.f32.u32 s15, s15 801589e: 4b93 ldr r3, [pc, #588] @ (8015aec ) 80158a0: edc3 7a12 vstr s15, [r3, #72] @ 0x48 switch(WP_Ctrl.AdOffsetFlg) 80158a4: 4b92 ldr r3, [pc, #584] @ (8015af0 ) 80158a6: 789b ldrb r3, [r3, #2] 80158a8: 2b00 cmp r3, #0 80158aa: d003 beq.n 80158b4 80158ac: 2b01 cmp r3, #1 80158ae: f000 8177 beq.w 8015ba0 80158b2: e170 b.n 8015b96 { case WP_STOP: WP_Ctrl.AdOffsetCnt++; 80158b4: 4b8e ldr r3, [pc, #568] @ (8015af0 ) 80158b6: 889b ldrh r3, [r3, #4] 80158b8: 3301 adds r3, #1 80158ba: b29a uxth r2, r3 80158bc: 4b8c ldr r3, [pc, #560] @ (8015af0 ) 80158be: 809a strh r2, [r3, #4] if(WP_Ctrl.AdOffsetCnt > 5000) 80158c0: 4b8b ldr r3, [pc, #556] @ (8015af0 ) 80158c2: 889b ldrh r3, [r3, #4] 80158c4: f241 3288 movw r2, #5000 @ 0x1388 80158c8: 4293 cmp r3, r2 80158ca: d907 bls.n 80158dc { WP_Ctrl.AdOffsetFlg = WP_RUN; 80158cc: 4b88 ldr r3, [pc, #544] @ (8015af0 ) 80158ce: 2201 movs r2, #1 80158d0: 709a strb r2, [r3, #2] WP_Ctrl.AdOffsetCnt=5001; 80158d2: 4b87 ldr r3, [pc, #540] @ (8015af0 ) 80158d4: f241 3289 movw r2, #5001 @ 0x1389 80158d8: 809a strh r2, [r3, #4] LPF(Inv.Ctrl.AD1.iOffset.W, Inv.Ctrl.AD1.iRaw.W, LpfCur.fct); LPF(Inv.Ctrl.AD2.iOffset.U, Inv.Ctrl.AD2.iRaw.U, LpfCur.fct); LPF(Inv.Ctrl.AD2.iOffset.V, Inv.Ctrl.AD2.iRaw.V, LpfCur.fct); LPF(Inv.Ctrl.AD2.iOffset.W, Inv.Ctrl.AD2.iRaw.W, LpfCur.fct); } break; 80158da: e162 b.n 8015ba2 WP_Ctrl.Mode=0; 80158dc: 4b84 ldr r3, [pc, #528] @ (8015af0 ) 80158de: 2200 movs r2, #0 80158e0: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor=0; 80158e2: 4b83 ldr r3, [pc, #524] @ (8015af0 ) 80158e4: 2200 movs r2, #0 80158e6: 705a strb r2, [r3, #1] WP_Ctrl.AdOffsetFlg=0; 80158e8: 4b81 ldr r3, [pc, #516] @ (8015af0 ) 80158ea: 2200 movs r2, #0 80158ec: 709a strb r2, [r3, #2] LPF(Inv.Ctrl.AD1.iOffset.U, Inv.Ctrl.AD1.iRaw.U, LpfCur.fct); 80158ee: 4b7f ldr r3, [pc, #508] @ (8015aec ) 80158f0: ed93 7a0d vldr s14, [r3, #52] @ 0x34 80158f4: 4b7d ldr r3, [pc, #500] @ (8015aec ) 80158f6: edd3 7a0a vldr s15, [r3, #40] @ 0x28 80158fa: ee77 7a67 vsub.f32 s15, s14, s15 80158fe: eef5 7ac0 vcmpe.f32 s15, #0.0 8015902: eef1 fa10 vmrs APSR_nzcv, fpscr 8015906: dd12 ble.n 801592e 8015908: 4b7a ldr r3, [pc, #488] @ (8015af4 ) 801590a: ed93 7a02 vldr s14, [r3, #8] 801590e: 4b77 ldr r3, [pc, #476] @ (8015aec ) 8015910: edd3 6a0d vldr s13, [r3, #52] @ 0x34 8015914: 4b75 ldr r3, [pc, #468] @ (8015aec ) 8015916: edd3 7a0a vldr s15, [r3, #40] @ 0x28 801591a: ee76 7ae7 vsub.f32 s15, s13, s15 801591e: ee27 7a27 vmul.f32 s14, s14, s15 8015922: 4b72 ldr r3, [pc, #456] @ (8015aec ) 8015924: edd3 7a0a vldr s15, [r3, #40] @ 0x28 8015928: ee77 7a27 vadd.f32 s15, s14, s15 801592c: e013 b.n 8015956 801592e: 4b71 ldr r3, [pc, #452] @ (8015af4 ) 8015930: edd3 7a02 vldr s15, [r3, #8] 8015934: eeb1 7a67 vneg.f32 s14, s15 8015938: 4b6c ldr r3, [pc, #432] @ (8015aec ) 801593a: edd3 6a0a vldr s13, [r3, #40] @ 0x28 801593e: 4b6b ldr r3, [pc, #428] @ (8015aec ) 8015940: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8015944: ee76 7ae7 vsub.f32 s15, s13, s15 8015948: ee27 7a27 vmul.f32 s14, s14, s15 801594c: 4b67 ldr r3, [pc, #412] @ (8015aec ) 801594e: edd3 7a0a vldr s15, [r3, #40] @ 0x28 8015952: ee77 7a27 vadd.f32 s15, s14, s15 8015956: 4b65 ldr r3, [pc, #404] @ (8015aec ) 8015958: edc3 7a0d vstr s15, [r3, #52] @ 0x34 LPF(Inv.Ctrl.AD1.iOffset.V, Inv.Ctrl.AD1.iRaw.V, LpfCur.fct); 801595c: 4b63 ldr r3, [pc, #396] @ (8015aec ) 801595e: ed93 7a0e vldr s14, [r3, #56] @ 0x38 8015962: 4b62 ldr r3, [pc, #392] @ (8015aec ) 8015964: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 8015968: ee77 7a67 vsub.f32 s15, s14, s15 801596c: eef5 7ac0 vcmpe.f32 s15, #0.0 8015970: eef1 fa10 vmrs APSR_nzcv, fpscr 8015974: dd12 ble.n 801599c 8015976: 4b5f ldr r3, [pc, #380] @ (8015af4 ) 8015978: ed93 7a02 vldr s14, [r3, #8] 801597c: 4b5b ldr r3, [pc, #364] @ (8015aec ) 801597e: edd3 6a0e vldr s13, [r3, #56] @ 0x38 8015982: 4b5a ldr r3, [pc, #360] @ (8015aec ) 8015984: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 8015988: ee76 7ae7 vsub.f32 s15, s13, s15 801598c: ee27 7a27 vmul.f32 s14, s14, s15 8015990: 4b56 ldr r3, [pc, #344] @ (8015aec ) 8015992: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 8015996: ee77 7a27 vadd.f32 s15, s14, s15 801599a: e013 b.n 80159c4 801599c: 4b55 ldr r3, [pc, #340] @ (8015af4 ) 801599e: edd3 7a02 vldr s15, [r3, #8] 80159a2: eeb1 7a67 vneg.f32 s14, s15 80159a6: 4b51 ldr r3, [pc, #324] @ (8015aec ) 80159a8: edd3 6a0b vldr s13, [r3, #44] @ 0x2c 80159ac: 4b4f ldr r3, [pc, #316] @ (8015aec ) 80159ae: edd3 7a0e vldr s15, [r3, #56] @ 0x38 80159b2: ee76 7ae7 vsub.f32 s15, s13, s15 80159b6: ee27 7a27 vmul.f32 s14, s14, s15 80159ba: 4b4c ldr r3, [pc, #304] @ (8015aec ) 80159bc: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 80159c0: ee77 7a27 vadd.f32 s15, s14, s15 80159c4: 4b49 ldr r3, [pc, #292] @ (8015aec ) 80159c6: edc3 7a0e vstr s15, [r3, #56] @ 0x38 LPF(Inv.Ctrl.AD1.iOffset.W, Inv.Ctrl.AD1.iRaw.W, LpfCur.fct); 80159ca: 4b48 ldr r3, [pc, #288] @ (8015aec ) 80159cc: ed93 7a0f vldr s14, [r3, #60] @ 0x3c 80159d0: 4b46 ldr r3, [pc, #280] @ (8015aec ) 80159d2: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80159d6: ee77 7a67 vsub.f32 s15, s14, s15 80159da: eef5 7ac0 vcmpe.f32 s15, #0.0 80159de: eef1 fa10 vmrs APSR_nzcv, fpscr 80159e2: dd12 ble.n 8015a0a 80159e4: 4b43 ldr r3, [pc, #268] @ (8015af4 ) 80159e6: ed93 7a02 vldr s14, [r3, #8] 80159ea: 4b40 ldr r3, [pc, #256] @ (8015aec ) 80159ec: edd3 6a0f vldr s13, [r3, #60] @ 0x3c 80159f0: 4b3e ldr r3, [pc, #248] @ (8015aec ) 80159f2: edd3 7a0c vldr s15, [r3, #48] @ 0x30 80159f6: ee76 7ae7 vsub.f32 s15, s13, s15 80159fa: ee27 7a27 vmul.f32 s14, s14, s15 80159fe: 4b3b ldr r3, [pc, #236] @ (8015aec ) 8015a00: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8015a04: ee77 7a27 vadd.f32 s15, s14, s15 8015a08: e013 b.n 8015a32 8015a0a: 4b3a ldr r3, [pc, #232] @ (8015af4 ) 8015a0c: edd3 7a02 vldr s15, [r3, #8] 8015a10: eeb1 7a67 vneg.f32 s14, s15 8015a14: 4b35 ldr r3, [pc, #212] @ (8015aec ) 8015a16: edd3 6a0c vldr s13, [r3, #48] @ 0x30 8015a1a: 4b34 ldr r3, [pc, #208] @ (8015aec ) 8015a1c: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8015a20: ee76 7ae7 vsub.f32 s15, s13, s15 8015a24: ee27 7a27 vmul.f32 s14, s14, s15 8015a28: 4b30 ldr r3, [pc, #192] @ (8015aec ) 8015a2a: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8015a2e: ee77 7a27 vadd.f32 s15, s14, s15 8015a32: 4b2e ldr r3, [pc, #184] @ (8015aec ) 8015a34: edc3 7a0f vstr s15, [r3, #60] @ 0x3c LPF(Inv.Ctrl.AD2.iOffset.U, Inv.Ctrl.AD2.iRaw.U, LpfCur.fct); 8015a38: 4b2c ldr r3, [pc, #176] @ (8015aec ) 8015a3a: ed93 7a13 vldr s14, [r3, #76] @ 0x4c 8015a3e: 4b2b ldr r3, [pc, #172] @ (8015aec ) 8015a40: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8015a44: ee77 7a67 vsub.f32 s15, s14, s15 8015a48: eef5 7ac0 vcmpe.f32 s15, #0.0 8015a4c: eef1 fa10 vmrs APSR_nzcv, fpscr 8015a50: dd12 ble.n 8015a78 8015a52: 4b28 ldr r3, [pc, #160] @ (8015af4 ) 8015a54: ed93 7a02 vldr s14, [r3, #8] 8015a58: 4b24 ldr r3, [pc, #144] @ (8015aec ) 8015a5a: edd3 6a13 vldr s13, [r3, #76] @ 0x4c 8015a5e: 4b23 ldr r3, [pc, #140] @ (8015aec ) 8015a60: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8015a64: ee76 7ae7 vsub.f32 s15, s13, s15 8015a68: ee27 7a27 vmul.f32 s14, s14, s15 8015a6c: 4b1f ldr r3, [pc, #124] @ (8015aec ) 8015a6e: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8015a72: ee77 7a27 vadd.f32 s15, s14, s15 8015a76: e013 b.n 8015aa0 8015a78: 4b1e ldr r3, [pc, #120] @ (8015af4 ) 8015a7a: edd3 7a02 vldr s15, [r3, #8] 8015a7e: eeb1 7a67 vneg.f32 s14, s15 8015a82: 4b1a ldr r3, [pc, #104] @ (8015aec ) 8015a84: edd3 6a10 vldr s13, [r3, #64] @ 0x40 8015a88: 4b18 ldr r3, [pc, #96] @ (8015aec ) 8015a8a: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 8015a8e: ee76 7ae7 vsub.f32 s15, s13, s15 8015a92: ee27 7a27 vmul.f32 s14, s14, s15 8015a96: 4b15 ldr r3, [pc, #84] @ (8015aec ) 8015a98: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8015a9c: ee77 7a27 vadd.f32 s15, s14, s15 8015aa0: 4b12 ldr r3, [pc, #72] @ (8015aec ) 8015aa2: edc3 7a13 vstr s15, [r3, #76] @ 0x4c LPF(Inv.Ctrl.AD2.iOffset.V, Inv.Ctrl.AD2.iRaw.V, LpfCur.fct); 8015aa6: 4b11 ldr r3, [pc, #68] @ (8015aec ) 8015aa8: ed93 7a14 vldr s14, [r3, #80] @ 0x50 8015aac: 4b0f ldr r3, [pc, #60] @ (8015aec ) 8015aae: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8015ab2: ee77 7a67 vsub.f32 s15, s14, s15 8015ab6: eef5 7ac0 vcmpe.f32 s15, #0.0 8015aba: eef1 fa10 vmrs APSR_nzcv, fpscr 8015abe: dd1b ble.n 8015af8 8015ac0: 4b0c ldr r3, [pc, #48] @ (8015af4 ) 8015ac2: ed93 7a02 vldr s14, [r3, #8] 8015ac6: 4b09 ldr r3, [pc, #36] @ (8015aec ) 8015ac8: edd3 6a14 vldr s13, [r3, #80] @ 0x50 8015acc: 4b07 ldr r3, [pc, #28] @ (8015aec ) 8015ace: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8015ad2: ee76 7ae7 vsub.f32 s15, s13, s15 8015ad6: ee27 7a27 vmul.f32 s14, s14, s15 8015ada: 4b04 ldr r3, [pc, #16] @ (8015aec ) 8015adc: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8015ae0: ee77 7a27 vadd.f32 s15, s14, s15 8015ae4: e01c b.n 8015b20 8015ae6: bf00 nop 8015ae8: 20000894 .word 0x20000894 8015aec: 20000400 .word 0x20000400 8015af0: 200003ac .word 0x200003ac 8015af4: 200008e0 .word 0x200008e0 8015af8: 4bbe ldr r3, [pc, #760] @ (8015df4 ) 8015afa: edd3 7a02 vldr s15, [r3, #8] 8015afe: eeb1 7a67 vneg.f32 s14, s15 8015b02: 4bbd ldr r3, [pc, #756] @ (8015df8 ) 8015b04: edd3 6a11 vldr s13, [r3, #68] @ 0x44 8015b08: 4bbb ldr r3, [pc, #748] @ (8015df8 ) 8015b0a: edd3 7a14 vldr s15, [r3, #80] @ 0x50 8015b0e: ee76 7ae7 vsub.f32 s15, s13, s15 8015b12: ee27 7a27 vmul.f32 s14, s14, s15 8015b16: 4bb8 ldr r3, [pc, #736] @ (8015df8 ) 8015b18: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8015b1c: ee77 7a27 vadd.f32 s15, s14, s15 8015b20: 4bb5 ldr r3, [pc, #724] @ (8015df8 ) 8015b22: edc3 7a14 vstr s15, [r3, #80] @ 0x50 LPF(Inv.Ctrl.AD2.iOffset.W, Inv.Ctrl.AD2.iRaw.W, LpfCur.fct); 8015b26: 4bb4 ldr r3, [pc, #720] @ (8015df8 ) 8015b28: ed93 7a15 vldr s14, [r3, #84] @ 0x54 8015b2c: 4bb2 ldr r3, [pc, #712] @ (8015df8 ) 8015b2e: edd3 7a12 vldr s15, [r3, #72] @ 0x48 8015b32: ee77 7a67 vsub.f32 s15, s14, s15 8015b36: eef5 7ac0 vcmpe.f32 s15, #0.0 8015b3a: eef1 fa10 vmrs APSR_nzcv, fpscr 8015b3e: dd12 ble.n 8015b66 8015b40: 4bac ldr r3, [pc, #688] @ (8015df4 ) 8015b42: ed93 7a02 vldr s14, [r3, #8] 8015b46: 4bac ldr r3, [pc, #688] @ (8015df8 ) 8015b48: edd3 6a15 vldr s13, [r3, #84] @ 0x54 8015b4c: 4baa ldr r3, [pc, #680] @ (8015df8 ) 8015b4e: edd3 7a12 vldr s15, [r3, #72] @ 0x48 8015b52: ee76 7ae7 vsub.f32 s15, s13, s15 8015b56: ee27 7a27 vmul.f32 s14, s14, s15 8015b5a: 4ba7 ldr r3, [pc, #668] @ (8015df8 ) 8015b5c: edd3 7a12 vldr s15, [r3, #72] @ 0x48 8015b60: ee77 7a27 vadd.f32 s15, s14, s15 8015b64: e013 b.n 8015b8e 8015b66: 4ba3 ldr r3, [pc, #652] @ (8015df4 ) 8015b68: edd3 7a02 vldr s15, [r3, #8] 8015b6c: eeb1 7a67 vneg.f32 s14, s15 8015b70: 4ba1 ldr r3, [pc, #644] @ (8015df8 ) 8015b72: edd3 6a12 vldr s13, [r3, #72] @ 0x48 8015b76: 4ba0 ldr r3, [pc, #640] @ (8015df8 ) 8015b78: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8015b7c: ee76 7ae7 vsub.f32 s15, s13, s15 8015b80: ee27 7a27 vmul.f32 s14, s14, s15 8015b84: 4b9c ldr r3, [pc, #624] @ (8015df8 ) 8015b86: edd3 7a12 vldr s15, [r3, #72] @ 0x48 8015b8a: ee77 7a27 vadd.f32 s15, s14, s15 8015b8e: 4b9a ldr r3, [pc, #616] @ (8015df8 ) 8015b90: edc3 7a15 vstr s15, [r3, #84] @ 0x54 break; 8015b94: e005 b.n 8015ba2 case WP_RUN: break; default: WP_CtrlErr.AdOffset = WP_ERR; 8015b96: 4b99 ldr r3, [pc, #612] @ (8015dfc ) 8015b98: 2201 movs r2, #1 8015b9a: f883 2026 strb.w r2, [r3, #38] @ 0x26 8015b9e: e000 b.n 8015ba2 break; 8015ba0: bf00 nop } Motor1.Fb.I3.U = (Inv.Ctrl.AD1.iRaw.U - Inv.Ctrl.AD1.iOffset.U) * Inv.Para.iScale; 8015ba2: 4b95 ldr r3, [pc, #596] @ (8015df8 ) 8015ba4: ed93 7a0a vldr s14, [r3, #40] @ 0x28 8015ba8: 4b93 ldr r3, [pc, #588] @ (8015df8 ) 8015baa: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8015bae: ee37 7a67 vsub.f32 s14, s14, s15 8015bb2: 4b91 ldr r3, [pc, #580] @ (8015df8 ) 8015bb4: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8015bb8: ee67 7a27 vmul.f32 s15, s14, s15 8015bbc: 4b90 ldr r3, [pc, #576] @ (8015e00 ) 8015bbe: edc3 7a0b vstr s15, [r3, #44] @ 0x2c Motor1.Fb.I3.V = (Inv.Ctrl.AD1.iRaw.V - Inv.Ctrl.AD1.iOffset.V) * Inv.Para.iScale; 8015bc2: 4b8d ldr r3, [pc, #564] @ (8015df8 ) 8015bc4: ed93 7a0b vldr s14, [r3, #44] @ 0x2c 8015bc8: 4b8b ldr r3, [pc, #556] @ (8015df8 ) 8015bca: edd3 7a0e vldr s15, [r3, #56] @ 0x38 8015bce: ee37 7a67 vsub.f32 s14, s14, s15 8015bd2: 4b89 ldr r3, [pc, #548] @ (8015df8 ) 8015bd4: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8015bd8: ee67 7a27 vmul.f32 s15, s14, s15 8015bdc: 4b88 ldr r3, [pc, #544] @ (8015e00 ) 8015bde: edc3 7a0c vstr s15, [r3, #48] @ 0x30 Motor1.Fb.I3.W = (Inv.Ctrl.AD1.iRaw.W - Inv.Ctrl.AD1.iOffset.W) * Inv.Para.iScale; 8015be2: 4b85 ldr r3, [pc, #532] @ (8015df8 ) 8015be4: ed93 7a0c vldr s14, [r3, #48] @ 0x30 8015be8: 4b83 ldr r3, [pc, #524] @ (8015df8 ) 8015bea: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8015bee: ee37 7a67 vsub.f32 s14, s14, s15 8015bf2: 4b81 ldr r3, [pc, #516] @ (8015df8 ) 8015bf4: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8015bf8: ee67 7a27 vmul.f32 s15, s14, s15 8015bfc: 4b80 ldr r3, [pc, #512] @ (8015e00 ) 8015bfe: edc3 7a0d vstr s15, [r3, #52] @ 0x34 // Motor1.Fb.I3.W = - Motor1.Fb.I3.U - Motor1.Fb.I3.V; Motor2.Fb.I3.U = (Inv.Ctrl.AD2.iRaw.U - Inv.Ctrl.AD2.iOffset.U) * Inv.Para.iScale; 8015c02: 4b7d ldr r3, [pc, #500] @ (8015df8 ) 8015c04: ed93 7a10 vldr s14, [r3, #64] @ 0x40 8015c08: 4b7b ldr r3, [pc, #492] @ (8015df8 ) 8015c0a: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 8015c0e: ee37 7a67 vsub.f32 s14, s14, s15 8015c12: 4b79 ldr r3, [pc, #484] @ (8015df8 ) 8015c14: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8015c18: ee67 7a27 vmul.f32 s15, s14, s15 8015c1c: 4b79 ldr r3, [pc, #484] @ (8015e04 ) 8015c1e: edc3 7a0b vstr s15, [r3, #44] @ 0x2c Motor2.Fb.I3.V = (Inv.Ctrl.AD2.iRaw.V - Inv.Ctrl.AD2.iOffset.V) * Inv.Para.iScale; 8015c22: 4b75 ldr r3, [pc, #468] @ (8015df8 ) 8015c24: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8015c28: 4b73 ldr r3, [pc, #460] @ (8015df8 ) 8015c2a: edd3 7a14 vldr s15, [r3, #80] @ 0x50 8015c2e: ee37 7a67 vsub.f32 s14, s14, s15 8015c32: 4b71 ldr r3, [pc, #452] @ (8015df8 ) 8015c34: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8015c38: ee67 7a27 vmul.f32 s15, s14, s15 8015c3c: 4b71 ldr r3, [pc, #452] @ (8015e04 ) 8015c3e: edc3 7a0c vstr s15, [r3, #48] @ 0x30 Motor2.Fb.I3.W = (Inv.Ctrl.AD2.iRaw.W - Inv.Ctrl.AD2.iOffset.W) * Inv.Para.iScale; 8015c42: 4b6d ldr r3, [pc, #436] @ (8015df8 ) 8015c44: ed93 7a12 vldr s14, [r3, #72] @ 0x48 8015c48: 4b6b ldr r3, [pc, #428] @ (8015df8 ) 8015c4a: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8015c4e: ee37 7a67 vsub.f32 s14, s14, s15 8015c52: 4b69 ldr r3, [pc, #420] @ (8015df8 ) 8015c54: edd3 7a1a vldr s15, [r3, #104] @ 0x68 8015c58: ee67 7a27 vmul.f32 s15, s14, s15 8015c5c: 4b69 ldr r3, [pc, #420] @ (8015e04 ) 8015c5e: edc3 7a0d vstr s15, [r3, #52] @ 0x34 // Motor2.Fb.I3.W = - Motor2.Fb.I3.U - Motor2.Fb.I3.V; Motor1_Ang.MR.Raw.Sin = ADinj.Raw[0][2]; // AD_SIN0; 8015c62: 4b69 ldr r3, [pc, #420] @ (8015e08 ) 8015c64: 889a ldrh r2, [r3, #4] 8015c66: 4b69 ldr r3, [pc, #420] @ (8015e0c ) 8015c68: f8a3 205c strh.w r2, [r3, #92] @ 0x5c Motor2_Ang.MR.Raw.Sin = ADinj.Raw[0][3]; // AD_SIN1; 8015c6c: 4b66 ldr r3, [pc, #408] @ (8015e08 ) 8015c6e: 88da ldrh r2, [r3, #6] 8015c70: 4b67 ldr r3, [pc, #412] @ (8015e10 ) 8015c72: f8a3 205c strh.w r2, [r3, #92] @ 0x5c Motor1_Ang.MR.Raw.Cos = ADinj.Raw[1][2]; // AD_COS0; 8015c76: 4b64 ldr r3, [pc, #400] @ (8015e08 ) 8015c78: 899a ldrh r2, [r3, #12] 8015c7a: 4b64 ldr r3, [pc, #400] @ (8015e0c ) 8015c7c: f8a3 205e strh.w r2, [r3, #94] @ 0x5e Motor2_Ang.MR.Raw.Cos = ADinj.Raw[1][3]; // AD_COS1; 8015c80: 4b61 ldr r3, [pc, #388] @ (8015e08 ) 8015c82: 89da ldrh r2, [r3, #14] 8015c84: 4b62 ldr r3, [pc, #392] @ (8015e10 ) 8015c86: f8a3 205e strh.w r2, [r3, #94] @ 0x5e #if ANGLE_MODE == ANGLE_MR // 누적앵글 구하는 코드 없는 상태 WP_MrPos(&Motor1_Ang); WP_MrPos(&Motor2_Ang); #endif #if ANGLE_MODE == ANGLE_ENC WP_CtrlErr.Motor1.Speed = WP_EncSpd(MOTOR1, &Motor1_Ang); 8015c8a: 4960 ldr r1, [pc, #384] @ (8015e0c ) 8015c8c: 2001 movs r0, #1 8015c8e: f001 fd73 bl 8017778 8015c92: 4603 mov r3, r0 8015c94: 461a mov r2, r3 8015c96: 4b59 ldr r3, [pc, #356] @ (8015dfc ) 8015c98: 741a strb r2, [r3, #16] WP_CtrlErr.Motor2.Speed = WP_EncSpd(MOTOR2, &Motor2_Ang); 8015c9a: 495d ldr r1, [pc, #372] @ (8015e10 ) 8015c9c: 2002 movs r0, #2 8015c9e: f001 fd6b bl 8017778 8015ca2: 4603 mov r3, r0 8015ca4: 461a mov r2, r3 8015ca6: 4b55 ldr r3, [pc, #340] @ (8015dfc ) 8015ca8: f883 2022 strb.w r2, [r3, #34] @ 0x22 #endif // digitalWrite(87, 0); // digitalWrite(88, 1); LPF(Inv.Ctrl.VdcFil, Inv.Ctrl.Vdc, LpfVdc.fct); 8015cac: 4b52 ldr r3, [pc, #328] @ (8015df8 ) 8015cae: ed93 7a01 vldr s14, [r3, #4] 8015cb2: 4b51 ldr r3, [pc, #324] @ (8015df8 ) 8015cb4: edd3 7a00 vldr s15, [r3] 8015cb8: ee77 7a67 vsub.f32 s15, s14, s15 8015cbc: eef5 7ac0 vcmpe.f32 s15, #0.0 8015cc0: eef1 fa10 vmrs APSR_nzcv, fpscr 8015cc4: dd12 ble.n 8015cec 8015cc6: 4b53 ldr r3, [pc, #332] @ (8015e14 ) 8015cc8: ed93 7a02 vldr s14, [r3, #8] 8015ccc: 4b4a ldr r3, [pc, #296] @ (8015df8 ) 8015cce: edd3 6a01 vldr s13, [r3, #4] 8015cd2: 4b49 ldr r3, [pc, #292] @ (8015df8 ) 8015cd4: edd3 7a00 vldr s15, [r3] 8015cd8: ee76 7ae7 vsub.f32 s15, s13, s15 8015cdc: ee27 7a27 vmul.f32 s14, s14, s15 8015ce0: 4b45 ldr r3, [pc, #276] @ (8015df8 ) 8015ce2: edd3 7a00 vldr s15, [r3] 8015ce6: ee77 7a27 vadd.f32 s15, s14, s15 8015cea: e013 b.n 8015d14 8015cec: 4b49 ldr r3, [pc, #292] @ (8015e14 ) 8015cee: edd3 7a02 vldr s15, [r3, #8] 8015cf2: eeb1 7a67 vneg.f32 s14, s15 8015cf6: 4b40 ldr r3, [pc, #256] @ (8015df8 ) 8015cf8: edd3 6a00 vldr s13, [r3] 8015cfc: 4b3e ldr r3, [pc, #248] @ (8015df8 ) 8015cfe: edd3 7a01 vldr s15, [r3, #4] 8015d02: ee76 7ae7 vsub.f32 s15, s13, s15 8015d06: ee27 7a27 vmul.f32 s14, s14, s15 8015d0a: 4b3b ldr r3, [pc, #236] @ (8015df8 ) 8015d0c: edd3 7a00 vldr s15, [r3] 8015d10: ee77 7a27 vadd.f32 s15, s14, s15 8015d14: 4b38 ldr r3, [pc, #224] @ (8015df8 ) 8015d16: edc3 7a01 vstr s15, [r3, #4] Inv.Ctrl.VphaseLim = Inv.Ctrl.VdcFil * MT_SQ3_OVR_2 * Inv.Para.VdcMargin; 8015d1a: 4b37 ldr r3, [pc, #220] @ (8015df8 ) 8015d1c: edd3 7a01 vldr s15, [r3, #4] 8015d20: ed9f 7a3d vldr s14, [pc, #244] @ 8015e18 8015d24: ee27 7a87 vmul.f32 s14, s15, s14 8015d28: 4b33 ldr r3, [pc, #204] @ (8015df8 ) 8015d2a: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 8015d2e: ee67 7a27 vmul.f32 s15, s14, s15 8015d32: 4b31 ldr r3, [pc, #196] @ (8015df8 ) 8015d34: edc3 7a02 vstr s15, [r3, #8] Inv.Ctrl.VlimFweak = Inv.Ctrl.VphaseLim * 0.8f; 8015d38: 4b2f ldr r3, [pc, #188] @ (8015df8 ) 8015d3a: edd3 7a02 vldr s15, [r3, #8] 8015d3e: ed9f 7a37 vldr s14, [pc, #220] @ 8015e1c 8015d42: ee67 7a87 vmul.f32 s15, s15, s14 8015d46: 4b2c ldr r3, [pc, #176] @ (8015df8 ) 8015d48: edc3 7a08 vstr s15, [r3, #32] Inv.Ctrl.Vdc_2 = Inv.Ctrl.VdcFil * MT_1_OVR_2; 8015d4c: 4b2a ldr r3, [pc, #168] @ (8015df8 ) 8015d4e: edd3 7a01 vldr s15, [r3, #4] 8015d52: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8015d56: ee67 7a87 vmul.f32 s15, s15, s14 8015d5a: 4b27 ldr r3, [pc, #156] @ (8015df8 ) 8015d5c: edc3 7a04 vstr s15, [r3, #16] Inv.Ctrl.VphLim = Inv.Ctrl.Vdc_2 * Inv.Para.VdcMargin; 8015d60: 4b25 ldr r3, [pc, #148] @ (8015df8 ) 8015d62: ed93 7a04 vldr s14, [r3, #16] 8015d66: 4b24 ldr r3, [pc, #144] @ (8015df8 ) 8015d68: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 8015d6c: ee67 7a27 vmul.f32 s15, s14, s15 8015d70: 4b21 ldr r3, [pc, #132] @ (8015df8 ) 8015d72: edc3 7a03 vstr s15, [r3, #12] Inv.Ctrl._Vdc_2 = 1.0f / Inv.Ctrl.Vdc_2; 8015d76: 4b20 ldr r3, [pc, #128] @ (8015df8 ) 8015d78: ed93 7a04 vldr s14, [r3, #16] 8015d7c: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 8015d80: eec6 7a87 vdiv.f32 s15, s13, s14 8015d84: 4b1c ldr r3, [pc, #112] @ (8015df8 ) 8015d86: edc3 7a05 vstr s15, [r3, #20] Inv.Ctrl.PWM_Scale = Inv.Para.PWM_Mid * Inv.Ctrl._Vdc_2; 8015d8a: 4b1b ldr r3, [pc, #108] @ (8015df8 ) 8015d8c: ed93 7a1d vldr s14, [r3, #116] @ 0x74 8015d90: 4b19 ldr r3, [pc, #100] @ (8015df8 ) 8015d92: edd3 7a05 vldr s15, [r3, #20] 8015d96: ee67 7a27 vmul.f32 s15, s14, s15 8015d9a: 4b17 ldr r3, [pc, #92] @ (8015df8 ) 8015d9c: edc3 7a06 vstr s15, [r3, #24] MotorCtrl_TransformAngle(&Motor1_Ang, Motor1.Cmd.XbyF_Freq, Inv.Para.Tsamp); 8015da0: 4b17 ldr r3, [pc, #92] @ (8015e00 ) 8015da2: edd3 7a08 vldr s15, [r3, #32] 8015da6: 4b14 ldr r3, [pc, #80] @ (8015df8 ) 8015da8: ed93 7a1c vldr s14, [r3, #112] @ 0x70 8015dac: eef0 0a47 vmov.f32 s1, s14 8015db0: eeb0 0a67 vmov.f32 s0, s15 8015db4: 4815 ldr r0, [pc, #84] @ (8015e0c ) 8015db6: f000 f83f bl 8015e38 WP_ClarkeParkTrans(&Motor1.Fb.I3, &Motor1.Fb.Is, &Motor1.Fb.Ie, &Motor1_Ang); 8015dba: 4b14 ldr r3, [pc, #80] @ (8015e0c ) 8015dbc: 4a18 ldr r2, [pc, #96] @ (8015e20 ) 8015dbe: 4919 ldr r1, [pc, #100] @ (8015e24 ) 8015dc0: 4819 ldr r0, [pc, #100] @ (8015e28 ) 8015dc2: f000 fe7d bl 8016ac0 MotorCtrl_TransformAngle(&Motor2_Ang, Motor2.Cmd.XbyF_Freq, Inv.Para.Tsamp); 8015dc6: 4b0f ldr r3, [pc, #60] @ (8015e04 ) 8015dc8: edd3 7a08 vldr s15, [r3, #32] 8015dcc: 4b0a ldr r3, [pc, #40] @ (8015df8 ) 8015dce: ed93 7a1c vldr s14, [r3, #112] @ 0x70 8015dd2: eef0 0a47 vmov.f32 s1, s14 8015dd6: eeb0 0a67 vmov.f32 s0, s15 8015dda: 480d ldr r0, [pc, #52] @ (8015e10 ) 8015ddc: f000 f82c bl 8015e38 WP_ClarkeParkTrans(&Motor2.Fb.I3, &Motor2.Fb.Is, &Motor2.Fb.Ie, &Motor2_Ang); 8015de0: 4b0b ldr r3, [pc, #44] @ (8015e10 ) 8015de2: 4a12 ldr r2, [pc, #72] @ (8015e2c ) 8015de4: 4912 ldr r1, [pc, #72] @ (8015e30 ) 8015de6: 4813 ldr r0, [pc, #76] @ (8015e34 ) 8015de8: f000 fe6a bl 8016ac0 Inverter_Comm1ms(); 8015dec: f000 f8de bl 8015fac // digitalWrite(88, 0); } 8015df0: bf00 nop 8015df2: bd80 pop {r7, pc} 8015df4: 200008e0 .word 0x200008e0 8015df8: 20000400 .word 0x20000400 8015dfc: 200003b8 .word 0x200003b8 8015e00: 20000574 .word 0x20000574 8015e04: 20000704 .word 0x20000704 8015e08: 20000894 .word 0x20000894 8015e0c: 2000047c .word 0x2000047c 8015e10: 200004f8 .word 0x200004f8 8015e14: 200008ec .word 0x200008ec 8015e18: 3f5db3d7 .word 0x3f5db3d7 8015e1c: 3f4ccccd .word 0x3f4ccccd 8015e20: 200005b4 .word 0x200005b4 8015e24: 200005ac .word 0x200005ac 8015e28: 200005a0 .word 0x200005a0 8015e2c: 20000744 .word 0x20000744 8015e30: 2000073c .word 0x2000073c 8015e34: 20000730 .word 0x20000730 08015e38 : inline void MotorCtrl_TransformAngle(WP_MotorAngleTypeDef *angle, float cmd, float tsamp) { 8015e38: b580 push {r7, lr} 8015e3a: b086 sub sp, #24 8015e3c: af00 add r7, sp, #0 8015e3e: 60f8 str r0, [r7, #12] 8015e40: ed87 0a02 vstr s0, [r7, #8] 8015e44: edc7 0a01 vstr s1, [r7, #4] uint32_t array_theta=0; 8015e48: 2300 movs r3, #0 8015e4a: 617b str r3, [r7, #20] switch(WP_Ctrl.Mode) 8015e4c: 4b23 ldr r3, [pc, #140] @ (8015edc ) 8015e4e: 781b ldrb r3, [r3, #0] 8015e50: 3b03 subs r3, #3 8015e52: 2b01 cmp r3, #1 8015e54: d819 bhi.n 8015e8a { case Inv_IbyFCtrl: // 3번 모드 - I by F case Inv_VbyFCtrl: // 4번 모드 - V by F MotorCtrl_XbyF_Ctrl(cmd, &angle->XbyFAngle, tsamp); 8015e56: 68fb ldr r3, [r7, #12] 8015e58: 333c adds r3, #60 @ 0x3c 8015e5a: edd7 0a01 vldr s1, [r7, #4] 8015e5e: 4618 mov r0, r3 8015e60: ed97 0a02 vldr s0, [r7, #8] 8015e64: f000 f842 bl 8015eec array_theta = (uint32_t)(2048*(angle->XbyFAngle)*MT_1_OVR_360); 8015e68: 68fb ldr r3, [r7, #12] 8015e6a: edd3 7a0f vldr s15, [r3, #60] @ 0x3c 8015e6e: ed9f 7a1c vldr s14, [pc, #112] @ 8015ee0 8015e72: ee67 7a87 vmul.f32 s15, s15, s14 8015e76: ed9f 7a1b vldr s14, [pc, #108] @ 8015ee4 8015e7a: ee67 7a87 vmul.f32 s15, s15, s14 8015e7e: eefc 7ae7 vcvt.u32.f32 s15, s15 8015e82: ee17 3a90 vmov r3, s15 8015e86: 617b str r3, [r7, #20] break; 8015e88: e010 b.n 8015eac default: array_theta = (uint32_t)(2048*(angle->AngleElec)*MT_1_OVR_360); 8015e8a: 68fb ldr r3, [r7, #12] 8015e8c: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8015e90: ed9f 7a13 vldr s14, [pc, #76] @ 8015ee0 8015e94: ee67 7a87 vmul.f32 s15, s15, s14 8015e98: ed9f 7a12 vldr s14, [pc, #72] @ 8015ee4 8015e9c: ee67 7a87 vmul.f32 s15, s15, s14 8015ea0: eefc 7ae7 vcvt.u32.f32 s15, s15 8015ea4: ee17 3a90 vmov r3, s15 8015ea8: 617b str r3, [r7, #20] break; 8015eaa: bf00 nop } angle->Tr_Sin = sinTab[((array_theta )&0x7FF)]; 8015eac: 697b ldr r3, [r7, #20] 8015eae: f3c3 030a ubfx r3, r3, #0, #11 8015eb2: 4a0d ldr r2, [pc, #52] @ (8015ee8 ) 8015eb4: 009b lsls r3, r3, #2 8015eb6: 4413 add r3, r2 8015eb8: 681a ldr r2, [r3, #0] 8015eba: 68fb ldr r3, [r7, #12] 8015ebc: 655a str r2, [r3, #84] @ 0x54 angle->Tr_Cos = sinTab[((array_theta+511)&0x7FF)]; 8015ebe: 697b ldr r3, [r7, #20] 8015ec0: f203 13ff addw r3, r3, #511 @ 0x1ff 8015ec4: f3c3 030a ubfx r3, r3, #0, #11 8015ec8: 4a07 ldr r2, [pc, #28] @ (8015ee8 ) 8015eca: 009b lsls r3, r3, #2 8015ecc: 4413 add r3, r2 8015ece: 681a ldr r2, [r3, #0] 8015ed0: 68fb ldr r3, [r7, #12] 8015ed2: 659a str r2, [r3, #88] @ 0x58 } 8015ed4: bf00 nop 8015ed6: 3718 adds r7, #24 8015ed8: 46bd mov sp, r7 8015eda: bd80 pop {r7, pc} 8015edc: 200003ac .word 0x200003ac 8015ee0: 45000000 .word 0x45000000 8015ee4: 3b360b61 .word 0x3b360b61 8015ee8: 0802b150 .word 0x0802b150 08015eec : inline void MotorCtrl_XbyF_Ctrl(float fc, float *angle, float SampT) { 8015eec: b480 push {r7} 8015eee: b085 sub sp, #20 8015ef0: af00 add r7, sp, #0 8015ef2: ed87 0a03 vstr s0, [r7, #12] 8015ef6: 60b8 str r0, [r7, #8] 8015ef8: edc7 0a01 vstr s1, [r7, #4] *angle += fc * SampT * 360.0f;//fcmd*0.00001*2*3.141592; 8015efc: 68bb ldr r3, [r7, #8] 8015efe: ed93 7a00 vldr s14, [r3] 8015f02: edd7 6a03 vldr s13, [r7, #12] 8015f06: edd7 7a01 vldr s15, [r7, #4] 8015f0a: ee66 7aa7 vmul.f32 s15, s13, s15 8015f0e: eddf 6a1b vldr s13, [pc, #108] @ 8015f7c 8015f12: ee67 7aa6 vmul.f32 s15, s15, s13 8015f16: ee77 7a27 vadd.f32 s15, s14, s15 8015f1a: 68bb ldr r3, [r7, #8] 8015f1c: edc3 7a00 vstr s15, [r3] if(*angle >= 360.0f) *angle -= 360.0f; 8015f20: 68bb ldr r3, [r7, #8] 8015f22: edd3 7a00 vldr s15, [r3] 8015f26: ed9f 7a15 vldr s14, [pc, #84] @ 8015f7c 8015f2a: eef4 7ac7 vcmpe.f32 s15, s14 8015f2e: eef1 fa10 vmrs APSR_nzcv, fpscr 8015f32: db0a blt.n 8015f4a 8015f34: 68bb ldr r3, [r7, #8] 8015f36: edd3 7a00 vldr s15, [r3] 8015f3a: ed9f 7a10 vldr s14, [pc, #64] @ 8015f7c 8015f3e: ee77 7ac7 vsub.f32 s15, s15, s14 8015f42: 68bb ldr r3, [r7, #8] 8015f44: edc3 7a00 vstr s15, [r3] else if(*angle < 0) *angle += 360.0f; } 8015f48: e012 b.n 8015f70 else if(*angle < 0) *angle += 360.0f; 8015f4a: 68bb ldr r3, [r7, #8] 8015f4c: edd3 7a00 vldr s15, [r3] 8015f50: eef5 7ac0 vcmpe.f32 s15, #0.0 8015f54: eef1 fa10 vmrs APSR_nzcv, fpscr 8015f58: d400 bmi.n 8015f5c } 8015f5a: e009 b.n 8015f70 else if(*angle < 0) *angle += 360.0f; 8015f5c: 68bb ldr r3, [r7, #8] 8015f5e: edd3 7a00 vldr s15, [r3] 8015f62: ed9f 7a06 vldr s14, [pc, #24] @ 8015f7c 8015f66: ee77 7a87 vadd.f32 s15, s15, s14 8015f6a: 68bb ldr r3, [r7, #8] 8015f6c: edc3 7a00 vstr s15, [r3] } 8015f70: bf00 nop 8015f72: 3714 adds r7, #20 8015f74: 46bd mov sp, r7 8015f76: f85d 7b04 ldr.w r7, [sp], #4 8015f7a: 4770 bx lr 8015f7c: 43b40000 .word 0x43b40000 08015f80 : /*==========================================================================================================*/ void Inverter_Comm(void) { 8015f80: b580 push {r7, lr} 8015f82: af00 add r7, sp, #0 if(ComAd.Flg==WP_RUN) 8015f84: 4b07 ldr r3, [pc, #28] @ (8015fa4 ) 8015f86: 781b ldrb r3, [r3, #0] 8015f88: 2b01 cmp r3, #1 8015f8a: d109 bne.n 8015fa0 { InvComAdcGet(); 8015f8c: f000 f836 bl 8015ffc Inverter_CommDataCal(); 8015f90: f000 f860 bl 8016054 ComAd.Flg=WP_STOP; 8015f94: 4b03 ldr r3, [pc, #12] @ (8015fa4 ) 8015f96: 2200 movs r2, #0 8015f98: 701a strb r2, [r3, #0] ADC_SWStart(); //Start Trigger 8015f9a: 4803 ldr r0, [pc, #12] @ (8015fa8 ) 8015f9c: f7fe fcf6 bl 801498c } } 8015fa0: bf00 nop 8015fa2: bd80 pop {r7, pc} 8015fa4: 200008ac .word 0x200008ac 8015fa8: 40012200 .word 0x40012200 08015fac : inline void Inverter_Comm1ms(void) { 8015fac: b580 push {r7, lr} 8015fae: b082 sub sp, #8 8015fb0: af00 add r7, sp, #0 static uint16_t _1msCnt; #if defined(TIM_8KHZ) uint8_t CntRef=8; #elif defined(TIM_10KHZ) uint8_t CntRef=10; 8015fb2: 230a movs r3, #10 8015fb4: 71fb strb r3, [r7, #7] uint8_t CntRef=20; #else uint8_t CntRef=10; #endif _1msCnt++; 8015fb6: 4b0a ldr r3, [pc, #40] @ (8015fe0 ) 8015fb8: 881b ldrh r3, [r3, #0] 8015fba: 3301 adds r3, #1 8015fbc: b29a uxth r2, r3 8015fbe: 4b08 ldr r3, [pc, #32] @ (8015fe0 ) 8015fc0: 801a strh r2, [r3, #0] if(_1msCnt > CntRef) 8015fc2: 79fb ldrb r3, [r7, #7] 8015fc4: b29a uxth r2, r3 8015fc6: 4b06 ldr r3, [pc, #24] @ (8015fe0 ) 8015fc8: 881b ldrh r3, [r3, #0] 8015fca: 429a cmp r2, r3 8015fcc: d204 bcs.n 8015fd8 { Inverter_CommEnable(); 8015fce: f000 f809 bl 8015fe4 _1msCnt=0; 8015fd2: 4b03 ldr r3, [pc, #12] @ (8015fe0 ) 8015fd4: 2200 movs r2, #0 8015fd6: 801a strh r2, [r3, #0] } else{} } 8015fd8: bf00 nop 8015fda: 3708 adds r7, #8 8015fdc: 46bd mov sp, r7 8015fde: bd80 pop {r7, pc} 8015fe0: 20000918 .word 0x20000918 08015fe4 : inline void Inverter_CommEnable(void) { // This Function Run in "HAL_ADC_ConvCpltCallback" in adc.c 8015fe4: b480 push {r7} 8015fe6: af00 add r7, sp, #0 ComAd.Flg=WP_RUN; 8015fe8: 4b03 ldr r3, [pc, #12] @ (8015ff8 ) 8015fea: 2201 movs r2, #1 8015fec: 701a strb r2, [r3, #0] } 8015fee: bf00 nop 8015ff0: 46bd mov sp, r7 8015ff2: f85d 7b04 ldr.w r7, [sp], #4 8015ff6: 4770 bx lr 8015ff8: 200008ac .word 0x200008ac 08015ffc : inline void InvComAdcGet(void) { 8015ffc: b480 push {r7} 8015ffe: af00 add r7, sp, #0 ComAd.Raw.VU0 = ADC_Buffer[0]; 8016000: 4b12 ldr r3, [pc, #72] @ (801604c ) 8016002: 881a ldrh r2, [r3, #0] 8016004: 4b12 ldr r3, [pc, #72] @ (8016050 ) 8016006: 805a strh r2, [r3, #2] ComAd.Raw.VU1 = ADC_Buffer[1]; 8016008: 4b10 ldr r3, [pc, #64] @ (801604c ) 801600a: 885a ldrh r2, [r3, #2] 801600c: 4b10 ldr r3, [pc, #64] @ (8016050 ) 801600e: 809a strh r2, [r3, #4] ComAd.Raw.NTC0 = ADC_Buffer[2]; 8016010: 4b0e ldr r3, [pc, #56] @ (801604c ) 8016012: 889a ldrh r2, [r3, #4] 8016014: 4b0e ldr r3, [pc, #56] @ (8016050 ) 8016016: 80da strh r2, [r3, #6] ComAd.Raw.NTC1 = ADC_Buffer[3]; 8016018: 4b0c ldr r3, [pc, #48] @ (801604c ) 801601a: 88da ldrh r2, [r3, #6] 801601c: 4b0c ldr r3, [pc, #48] @ (8016050 ) 801601e: 811a strh r2, [r3, #8] ComAd.Raw.EXT1 = ADC_Buffer[4]; 8016020: 4b0a ldr r3, [pc, #40] @ (801604c ) 8016022: 891a ldrh r2, [r3, #8] 8016024: 4b0a ldr r3, [pc, #40] @ (8016050 ) 8016026: 815a strh r2, [r3, #10] ComAd.Raw.EXT2 = ADC_Buffer[5]; 8016028: 4b08 ldr r3, [pc, #32] @ (801604c ) 801602a: 895a ldrh r2, [r3, #10] 801602c: 4b08 ldr r3, [pc, #32] @ (8016050 ) 801602e: 819a strh r2, [r3, #12] ComAd.Raw.EXT3 = ADC_Buffer[6]; 8016030: 4b06 ldr r3, [pc, #24] @ (801604c ) 8016032: 899a ldrh r2, [r3, #12] 8016034: 4b06 ldr r3, [pc, #24] @ (8016050 ) 8016036: 81da strh r2, [r3, #14] ComAd.Raw.EXT4 = ADC_Buffer[7]; 8016038: 4b04 ldr r3, [pc, #16] @ (801604c ) 801603a: 89da ldrh r2, [r3, #14] 801603c: 4b04 ldr r3, [pc, #16] @ (8016050 ) 801603e: 821a strh r2, [r3, #16] } 8016040: bf00 nop 8016042: 46bd mov sp, r7 8016044: f85d 7b04 ldr.w r7, [sp], #4 8016048: 4770 bx lr 801604a: bf00 nop 801604c: 20000a54 .word 0x20000a54 8016050: 200008ac .word 0x200008ac 08016054 : inline void Inverter_CommDataCal(void) { 8016054: b480 push {r7} 8016056: af00 add r7, sp, #0 ComAd.Data.VU0 = ComAd.Raw.VU0 * Inv.Para.HwAdcScale; 8016058: 4b3a ldr r3, [pc, #232] @ (8016144 ) 801605a: 885b ldrh r3, [r3, #2] 801605c: ee07 3a90 vmov s15, r3 8016060: eeb8 7ae7 vcvt.f32.s32 s14, s15 8016064: 4b38 ldr r3, [pc, #224] @ (8016148 ) 8016066: edd3 7a16 vldr s15, [r3, #88] @ 0x58 801606a: ee67 7a27 vmul.f32 s15, s14, s15 801606e: 4b35 ldr r3, [pc, #212] @ (8016144 ) 8016070: edc3 7a05 vstr s15, [r3, #20] ComAd.Data.VU1 = ComAd.Raw.VU1 * Inv.Para.HwAdcScale; 8016074: 4b33 ldr r3, [pc, #204] @ (8016144 ) 8016076: 889b ldrh r3, [r3, #4] 8016078: ee07 3a90 vmov s15, r3 801607c: eeb8 7ae7 vcvt.f32.s32 s14, s15 8016080: 4b31 ldr r3, [pc, #196] @ (8016148 ) 8016082: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016086: ee67 7a27 vmul.f32 s15, s14, s15 801608a: 4b2e ldr r3, [pc, #184] @ (8016144 ) 801608c: edc3 7a06 vstr s15, [r3, #24] ComAd.Data.NTC0 = ComAd.Raw.NTC0 * Inv.Para.HwAdcScale; 8016090: 4b2c ldr r3, [pc, #176] @ (8016144 ) 8016092: 88db ldrh r3, [r3, #6] 8016094: ee07 3a90 vmov s15, r3 8016098: eeb8 7ae7 vcvt.f32.s32 s14, s15 801609c: 4b2a ldr r3, [pc, #168] @ (8016148 ) 801609e: edd3 7a16 vldr s15, [r3, #88] @ 0x58 80160a2: ee67 7a27 vmul.f32 s15, s14, s15 80160a6: 4b27 ldr r3, [pc, #156] @ (8016144 ) 80160a8: edc3 7a07 vstr s15, [r3, #28] ComAd.Data.NTC1 = ComAd.Raw.NTC1 * Inv.Para.HwAdcScale; 80160ac: 4b25 ldr r3, [pc, #148] @ (8016144 ) 80160ae: 891b ldrh r3, [r3, #8] 80160b0: ee07 3a90 vmov s15, r3 80160b4: eeb8 7ae7 vcvt.f32.s32 s14, s15 80160b8: 4b23 ldr r3, [pc, #140] @ (8016148 ) 80160ba: edd3 7a16 vldr s15, [r3, #88] @ 0x58 80160be: ee67 7a27 vmul.f32 s15, s14, s15 80160c2: 4b20 ldr r3, [pc, #128] @ (8016144 ) 80160c4: edc3 7a08 vstr s15, [r3, #32] ComAd.Data.EXT1 = ComAd.Raw.EXT1 * Inv.Para.HwAdcScale; 80160c8: 4b1e ldr r3, [pc, #120] @ (8016144 ) 80160ca: 895b ldrh r3, [r3, #10] 80160cc: ee07 3a90 vmov s15, r3 80160d0: eeb8 7ae7 vcvt.f32.s32 s14, s15 80160d4: 4b1c ldr r3, [pc, #112] @ (8016148 ) 80160d6: edd3 7a16 vldr s15, [r3, #88] @ 0x58 80160da: ee67 7a27 vmul.f32 s15, s14, s15 80160de: 4b19 ldr r3, [pc, #100] @ (8016144 ) 80160e0: edc3 7a09 vstr s15, [r3, #36] @ 0x24 ComAd.Data.EXT2 = ComAd.Raw.EXT2 * Inv.Para.HwAdcScale; 80160e4: 4b17 ldr r3, [pc, #92] @ (8016144 ) 80160e6: 899b ldrh r3, [r3, #12] 80160e8: ee07 3a90 vmov s15, r3 80160ec: eeb8 7ae7 vcvt.f32.s32 s14, s15 80160f0: 4b15 ldr r3, [pc, #84] @ (8016148 ) 80160f2: edd3 7a16 vldr s15, [r3, #88] @ 0x58 80160f6: ee67 7a27 vmul.f32 s15, s14, s15 80160fa: 4b12 ldr r3, [pc, #72] @ (8016144 ) 80160fc: edc3 7a0a vstr s15, [r3, #40] @ 0x28 ComAd.Data.EXT3 = ComAd.Raw.EXT3 * Inv.Para.HwAdcScale; 8016100: 4b10 ldr r3, [pc, #64] @ (8016144 ) 8016102: 89db ldrh r3, [r3, #14] 8016104: ee07 3a90 vmov s15, r3 8016108: eeb8 7ae7 vcvt.f32.s32 s14, s15 801610c: 4b0e ldr r3, [pc, #56] @ (8016148 ) 801610e: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016112: ee67 7a27 vmul.f32 s15, s14, s15 8016116: 4b0b ldr r3, [pc, #44] @ (8016144 ) 8016118: edc3 7a0b vstr s15, [r3, #44] @ 0x2c ComAd.Data.EXT4 = ComAd.Raw.EXT4 * Inv.Para.HwAdcScale; 801611c: 4b09 ldr r3, [pc, #36] @ (8016144 ) 801611e: 8a1b ldrh r3, [r3, #16] 8016120: ee07 3a90 vmov s15, r3 8016124: eeb8 7ae7 vcvt.f32.s32 s14, s15 8016128: 4b07 ldr r3, [pc, #28] @ (8016148 ) 801612a: edd3 7a16 vldr s15, [r3, #88] @ 0x58 801612e: ee67 7a27 vmul.f32 s15, s14, s15 8016132: 4b04 ldr r3, [pc, #16] @ (8016144 ) 8016134: edc3 7a0c vstr s15, [r3, #48] @ 0x30 } 8016138: bf00 nop 801613a: 46bd mov sp, r7 801613c: f85d 7b04 ldr.w r7, [sp], #4 8016140: 4770 bx lr 8016142: bf00 nop 8016144: 200008ac .word 0x200008ac 8016148: 20000400 .word 0x20000400 801614c: 00000000 .word 0x00000000 08016150 : /*==========================================================================================================*/ void MotorCtrl_Initialize(void) { 8016150: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} 8016154: af00 add r7, sp, #0 // Motor Parameters // Gate IC DISABLE Pin Settings pinMode(1, OUTPUT); // PWM0_EN 8016156: 2101 movs r1, #1 8016158: 2001 movs r0, #1 801615a: f002 fc5f bl 8018a1c pinMode(2, OUTPUT); // PWM1_EN 801615e: 2101 movs r1, #1 8016160: 2002 movs r0, #2 8016162: f002 fc5b bl 8018a1c Motor1En(WP_Gate_DIS); 8016166: 2101 movs r1, #1 8016168: 2001 movs r0, #1 801616a: f002 fce3 bl 8018b34 Motor2En(WP_Gate_DIS); 801616e: 2101 movs r1, #1 8016170: 2002 movs r0, #2 8016172: f002 fcdf bl 8018b34 // kiQ=3000.*motorR*tsamp; // Motor1 Parameter Settings //Motor1.Para.Pole = 10; // SAT : 4, JKONG : 8, BS-105-10 : 30 //Motor1.Para.Pole = 8; Motor1.Para.Pole = RAM_Data.Motor_Para_Pole; ///MOTOR_PARA_POLE 8016176: 4baa ldr r3, [pc, #680] @ (8016420 ) 8016178: 7a1a ldrb r2, [r3, #8] 801617a: 4baa ldr r3, [pc, #680] @ (8016424 ) 801617c: f883 217c strb.w r2, [r3, #380] @ 0x17c Motor1.Para.PolePair = Motor1.Para.Pole>>1; 8016180: 4ba8 ldr r3, [pc, #672] @ (8016424 ) 8016182: f893 317c ldrb.w r3, [r3, #380] @ 0x17c 8016186: 085b lsrs r3, r3, #1 8016188: b2da uxtb r2, r3 801618a: 4ba6 ldr r3, [pc, #664] @ (8016424 ) 801618c: f883 217d strb.w r2, [r3, #381] @ 0x17d //Motor1.Para.Ld = 0.0f; //Motor1.Para.Lq = 0.0f; //Motor1.Para.Rs = 0.0f; //Motor1.Para.PhaiF = 72.2f * 0.001f * MT_1_OVR_SQ3; // V/krpm //Motor1.Para.PhaiF = 25.3f * 0.001f * MT_1_OVR_SQ3; Motor1.Para.Ld = RAM_Data.Motor_Para_Ld; ///MOTOR_PARA_Ld 8016190: 4ba3 ldr r3, [pc, #652] @ (8016420 ) 8016192: 68db ldr r3, [r3, #12] 8016194: 4aa3 ldr r2, [pc, #652] @ (8016424 ) 8016196: f8c2 3184 str.w r3, [r2, #388] @ 0x184 Motor1.Para.Lq = RAM_Data.Motor_Para_Lq; ///MOTOR_PARA_Lq 801619a: 4ba1 ldr r3, [pc, #644] @ (8016420 ) 801619c: 691b ldr r3, [r3, #16] 801619e: 4aa1 ldr r2, [pc, #644] @ (8016424 ) 80161a0: f8c2 3188 str.w r3, [r2, #392] @ 0x188 Motor1.Para.Rs = RAM_Data.Motor_Para_Rs; ///MOTOR_PARA_Rs 80161a4: 4b9e ldr r3, [pc, #632] @ (8016420 ) 80161a6: 695b ldr r3, [r3, #20] 80161a8: 4a9e ldr r2, [pc, #632] @ (8016424 ) 80161aa: f8c2 3180 str.w r3, [r2, #384] @ 0x180 Motor1.Para.PhaiF = RAM_Data.Motor_Para_Phaif; ///MOTOR_PARA_PhaiF 80161ae: 4b9c ldr r3, [pc, #624] @ (8016420 ) 80161b0: 699b ldr r3, [r3, #24] 80161b2: 4a9c ldr r2, [pc, #624] @ (8016424 ) 80161b4: f8c2 318c str.w r3, [r2, #396] @ 0x18c //Motor1.GainCurD.Ki = 0.011f; //Motor1.GainCurD.Kaw = 1.0f / Motor1.GainCurD.Kp; //Motor1.GainCurQ.Kp = 1.0f; //Motor1.GainCurQ.Ki = 0.011f; //Motor1.GainCurQ.Kaw = 1.0f / Motor1.GainCurQ.Kp; Motor1.GainCurD.Kp = RAM_Data.Motor_GainCurD_Kp; ///MOTOR_GAINCURD_Kp 80161b8: 4b99 ldr r3, [pc, #612] @ (8016420 ) 80161ba: 69db ldr r3, [r3, #28] 80161bc: 4a99 ldr r2, [pc, #612] @ (8016424 ) 80161be: f8c2 30bc str.w r3, [r2, #188] @ 0xbc Motor1.GainCurD.Ki = RAM_Data.Motor_GainCurD_Ki; ///MOTOR_GAINCURD_Ki 80161c2: 4b97 ldr r3, [pc, #604] @ (8016420 ) 80161c4: 6a1b ldr r3, [r3, #32] 80161c6: 4a97 ldr r2, [pc, #604] @ (8016424 ) 80161c8: f8c2 30c0 str.w r3, [r2, #192] @ 0xc0 Motor1.GainCurD.Kaw = RAM_Data.Motor_GainCurD_Kaw; ///MOTOR_GAINCURD_Kaw 80161cc: 4b94 ldr r3, [pc, #592] @ (8016420 ) 80161ce: 6a5b ldr r3, [r3, #36] @ 0x24 80161d0: 4a94 ldr r2, [pc, #592] @ (8016424 ) 80161d2: f8c2 30c4 str.w r3, [r2, #196] @ 0xc4 Motor1.GainCurQ.Kp = RAM_Data.Motor_GainCurQ_Kp; ///MOTOR_GAINCURQ_Kp 80161d6: 4b92 ldr r3, [pc, #584] @ (8016420 ) 80161d8: 6a9b ldr r3, [r3, #40] @ 0x28 80161da: 4a92 ldr r2, [pc, #584] @ (8016424 ) 80161dc: f8c2 30cc str.w r3, [r2, #204] @ 0xcc Motor1.GainCurQ.Ki = RAM_Data.Motor_GainCurQ_Ki; ///MOTOR_GAINCURQ_Ki 80161e0: 4b8f ldr r3, [pc, #572] @ (8016420 ) 80161e2: 6adb ldr r3, [r3, #44] @ 0x2c 80161e4: 4a8f ldr r2, [pc, #572] @ (8016424 ) 80161e6: f8c2 30d0 str.w r3, [r2, #208] @ 0xd0 Motor1.GainCurQ.Kaw = RAM_Data.Motor_GainCurQ_Kaw; ///MOTOR_GAINCURQ_Kaw 80161ea: 4b8d ldr r3, [pc, #564] @ (8016420 ) 80161ec: 6b1b ldr r3, [r3, #48] @ 0x30 80161ee: 4a8d ldr r2, [pc, #564] @ (8016424 ) 80161f0: f8c2 30d4 str.w r3, [r2, #212] @ 0xd4 Motor1.GainCurQ.Kd = 0.008f; //somebp 2024.02.02 80161f4: 4b8b ldr r3, [pc, #556] @ (8016424 ) 80161f6: 4a8c ldr r2, [pc, #560] @ (8016428 ) 80161f8: f8c3 20d8 str.w r2, [r3, #216] @ 0xd8 // Motor1.GainCurQ.Kd = 0.008f; // HSW 24.02.21 //Motor1.GainSpd.Kp = 0.0022f; //Motor1.GainSpd.Ki = 0.00001f; //Motor1.GainSpd.Kaw = 1.0f / Motor1.GainSpd.Kp; Motor1.GainSpd.Kp = RAM_Data.Motor_GainSpd_Kp; ///MOTOR_GAINSPD_Kp 80161fc: 4b88 ldr r3, [pc, #544] @ (8016420 ) 80161fe: 6b5b ldr r3, [r3, #52] @ 0x34 8016200: 4a88 ldr r2, [pc, #544] @ (8016424 ) 8016202: f8c2 30dc str.w r3, [r2, #220] @ 0xdc Motor1.GainSpd.Ki = RAM_Data.Motor_GainSpd_Ki; ///MOTOR_GAINSPD_Ki 8016206: 4b86 ldr r3, [pc, #536] @ (8016420 ) 8016208: 6b9b ldr r3, [r3, #56] @ 0x38 801620a: 4a86 ldr r2, [pc, #536] @ (8016424 ) 801620c: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0 Motor1.GainSpd.Kaw = RAM_Data.Motor_Gainspd_Kaw; ///MOTOR_GAINSPD_Kaw 8016210: 4b83 ldr r3, [pc, #524] @ (8016420 ) 8016212: 6bdb ldr r3, [r3, #60] @ 0x3c 8016214: 4a83 ldr r2, [pc, #524] @ (8016424 ) 8016216: f8c2 30e4 str.w r3, [r2, #228] @ 0xe4 //Motor1.GainFweak.Kp = 2.0f; //Motor1.GainFweak.Ki = 0.002f; Motor1.GainFweak.Kp = RAM_Data.Motor_GainFweak_Kp; ///MOTOR_GAINFWEAK_Kp 801621a: 4b81 ldr r3, [pc, #516] @ (8016420 ) 801621c: 6c1b ldr r3, [r3, #64] @ 0x40 801621e: 4a81 ldr r2, [pc, #516] @ (8016424 ) 8016220: f8c2 30ec str.w r3, [r2, #236] @ 0xec Motor1.GainFweak.Ki = RAM_Data.Motor_GainFweak_Ki; ///MOTOR_GAINFWEAK_Ki 8016224: 4b7e ldr r3, [pc, #504] @ (8016420 ) 8016226: 6c5b ldr r3, [r3, #68] @ 0x44 8016228: 4a7e ldr r2, [pc, #504] @ (8016424 ) 801622a: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0 Motor1_Ang.PolePair = Motor1.Para.PolePair; 801622e: 4b7d ldr r3, [pc, #500] @ (8016424 ) 8016230: f893 217d ldrb.w r2, [r3, #381] @ 0x17d 8016234: 4b7d ldr r3, [pc, #500] @ (801642c ) 8016236: 731a strb r2, [r3, #12] //Motor1_Ang.AngleScale = 360.0f / (float)Motor1_Ang.EncPulse; //Motor1_Ang.SpeedScale = 1000.0f * 60.0f / (float)Motor1_Ang.EncPulse; //Motor1_Ang.AngleElecOffset = 10.0f; // SAT : 12, JKONG : #1 257 / #2 197 -> inaccurate, check every time! //Motor1_Ang.AngleElecOffset = 190.03f; //Motor1_Ang.AngleElecOffset = 194.0f; // 24.01.05 -> Can be changed by sample modification, check every time! Motor1_Ang.EncPulse = RAM_Data.Motor_Ang_EncPulse; ///MOTOR_ANG_ENCPULSE 8016238: 4b79 ldr r3, [pc, #484] @ (8016420 ) 801623a: 895a ldrh r2, [r3, #10] 801623c: 4b7b ldr r3, [pc, #492] @ (801642c ) 801623e: 809a strh r2, [r3, #4] Motor1_Ang.AngleScale = RAM_Data.Motor_Ang_AngleScale;///MOTOR_ANG_ANGLESCALE 8016240: 4b77 ldr r3, [pc, #476] @ (8016420 ) 8016242: 6c9b ldr r3, [r3, #72] @ 0x48 8016244: 4a79 ldr r2, [pc, #484] @ (801642c ) 8016246: 6093 str r3, [r2, #8] Motor1_Ang.SpeedScale = RAM_Data.Motor_Ang_SpeedScale;///MOTOR_ANG_SPEEDSCALE 8016248: 4b75 ldr r3, [pc, #468] @ (8016420 ) 801624a: 6cdb ldr r3, [r3, #76] @ 0x4c 801624c: 4a77 ldr r2, [pc, #476] @ (801642c ) 801624e: 6113 str r3, [r2, #16] Motor1_Ang.AngleElecOffset = RAM_Data.Motor1_Ang_AngleElecOffset; ///MOTOR1_ANG_ANGLEELCOFFSET 8016250: 4b73 ldr r3, [pc, #460] @ (8016420 ) 8016252: 6d1b ldr r3, [r3, #80] @ 0x50 8016254: 4a75 ldr r2, [pc, #468] @ (801642c ) 8016256: 6013 str r3, [r2, #0] // Motor1_Ang.MR.Min.Cos = 4095; // Motor1_Ang.MR.Mid.Sin = 0; // Motor1_Ang.MR.Mid.Cos = 0; // Motor1_Ang.MR.Gain.Sin = 1.0f; // Motor1_Ang.MR.Gain.Cos = 1.0f; Motor1_Ang.MR.Max.Sin = RAM_Data.Motor_Ang_MR_Max_Sin; ///MOTOR_ANG_MR_MAX_SIN 8016258: 4b71 ldr r3, [pc, #452] @ (8016420 ) 801625a: f8b3 2058 ldrh.w r2, [r3, #88] @ 0x58 801625e: 4b73 ldr r3, [pc, #460] @ (801642c ) 8016260: f8a3 2064 strh.w r2, [r3, #100] @ 0x64 Motor1_Ang.MR.Max.Cos = RAM_Data.Motor_Ang_MR_Max_Cos; ///MOTOR_ANG_MR_MAX_COS 8016264: 4b6e ldr r3, [pc, #440] @ (8016420 ) 8016266: f8b3 205a ldrh.w r2, [r3, #90] @ 0x5a 801626a: 4b70 ldr r3, [pc, #448] @ (801642c ) 801626c: f8a3 2066 strh.w r2, [r3, #102] @ 0x66 Motor1_Ang.MR.Min.Sin = RAM_Data.Motor_Ang_MR_Min_Sin; ///MOTOR_ANG_MR_MIN_SIN 8016270: 4b6b ldr r3, [pc, #428] @ (8016420 ) 8016272: f8b3 205c ldrh.w r2, [r3, #92] @ 0x5c 8016276: 4b6d ldr r3, [pc, #436] @ (801642c ) 8016278: f8a3 2060 strh.w r2, [r3, #96] @ 0x60 Motor1_Ang.MR.Min.Cos = RAM_Data.Motor_Ang_MR_Min_Cos; ///MOTOR_ANG_MR_MIN_COS 801627c: 4b68 ldr r3, [pc, #416] @ (8016420 ) 801627e: f8b3 205e ldrh.w r2, [r3, #94] @ 0x5e 8016282: 4b6a ldr r3, [pc, #424] @ (801642c ) 8016284: f8a3 2062 strh.w r2, [r3, #98] @ 0x62 Motor1_Ang.MR.Mid.Sin = RAM_Data.Motor_Ang_MR_Mid_Sin; ///MOTOR_ANG_MR_MID_SIN 8016288: 4b65 ldr r3, [pc, #404] @ (8016420 ) 801628a: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60 801628e: 4b67 ldr r3, [pc, #412] @ (801642c ) 8016290: f8a3 2068 strh.w r2, [r3, #104] @ 0x68 Motor1_Ang.MR.Mid.Cos = RAM_Data.Motor_Ang_MR_Mid_Cos; ///MOTOR_ANG_MR_MID_COS 8016294: 4b62 ldr r3, [pc, #392] @ (8016420 ) 8016296: f8b3 2062 ldrh.w r2, [r3, #98] @ 0x62 801629a: 4b64 ldr r3, [pc, #400] @ (801642c ) 801629c: f8a3 206a strh.w r2, [r3, #106] @ 0x6a Motor1_Ang.MR.Gain.Sin = RAM_Data.Motor_Ang_MR_Gain_Sin;///MOTOR_ANG_MR_GAIN_SIN 80162a0: 4b5f ldr r3, [pc, #380] @ (8016420 ) 80162a2: 6e5b ldr r3, [r3, #100] @ 0x64 80162a4: 4a61 ldr r2, [pc, #388] @ (801642c ) 80162a6: 66d3 str r3, [r2, #108] @ 0x6c Motor1_Ang.MR.Gain.Cos = RAM_Data.Motor_Ang_MR_Gain_Cos;///MOTOR_ANG_MR_GAIN_COS 80162a8: 4b5d ldr r3, [pc, #372] @ (8016420 ) 80162aa: 6e9b ldr r3, [r3, #104] @ 0x68 80162ac: 4a5f ldr r2, [pc, #380] @ (801642c ) 80162ae: 6713 str r3, [r2, #112] @ 0x70 // Motor2 Parameter Settings Motor2.Para.Pole = Motor1.Para.Pole; // SAT : 4, JKONG : 8, BS-105-10 : 30 80162b0: 4b5c ldr r3, [pc, #368] @ (8016424 ) 80162b2: f893 217c ldrb.w r2, [r3, #380] @ 0x17c 80162b6: 4b5e ldr r3, [pc, #376] @ (8016430 ) 80162b8: f883 217c strb.w r2, [r3, #380] @ 0x17c Motor2.Para.PolePair = Motor2.Para.Pole>>1; 80162bc: 4b5c ldr r3, [pc, #368] @ (8016430 ) 80162be: f893 317c ldrb.w r3, [r3, #380] @ 0x17c 80162c2: 085b lsrs r3, r3, #1 80162c4: b2da uxtb r2, r3 80162c6: 4b5a ldr r3, [pc, #360] @ (8016430 ) 80162c8: f883 217d strb.w r2, [r3, #381] @ 0x17d Motor2.Para.Ld = Motor1.Para.Ld; 80162cc: 4b55 ldr r3, [pc, #340] @ (8016424 ) 80162ce: f8d3 3184 ldr.w r3, [r3, #388] @ 0x184 80162d2: 4a57 ldr r2, [pc, #348] @ (8016430 ) 80162d4: f8c2 3184 str.w r3, [r2, #388] @ 0x184 Motor2.Para.Lq = Motor1.Para.Lq; 80162d8: 4b52 ldr r3, [pc, #328] @ (8016424 ) 80162da: f8d3 3188 ldr.w r3, [r3, #392] @ 0x188 80162de: 4a54 ldr r2, [pc, #336] @ (8016430 ) 80162e0: f8c2 3188 str.w r3, [r2, #392] @ 0x188 Motor2.Para.Rs = Motor1.Para.Rs; 80162e4: 4b4f ldr r3, [pc, #316] @ (8016424 ) 80162e6: f8d3 3180 ldr.w r3, [r3, #384] @ 0x180 80162ea: 4a51 ldr r2, [pc, #324] @ (8016430 ) 80162ec: f8c2 3180 str.w r3, [r2, #384] @ 0x180 Motor2.Para.PhaiF = Motor1.Para.PhaiF; // V/krpm 80162f0: 4b4c ldr r3, [pc, #304] @ (8016424 ) 80162f2: f8d3 318c ldr.w r3, [r3, #396] @ 0x18c 80162f6: 4a4e ldr r2, [pc, #312] @ (8016430 ) 80162f8: f8c2 318c str.w r3, [r2, #396] @ 0x18c Motor2.GainCurD.Kp = Motor1.GainCurD.Kp; 80162fc: 4b49 ldr r3, [pc, #292] @ (8016424 ) 80162fe: f8d3 30bc ldr.w r3, [r3, #188] @ 0xbc 8016302: 4a4b ldr r2, [pc, #300] @ (8016430 ) 8016304: f8c2 30bc str.w r3, [r2, #188] @ 0xbc Motor2.GainCurD.Ki = Motor1.GainCurD.Ki; 8016308: 4b46 ldr r3, [pc, #280] @ (8016424 ) 801630a: f8d3 30c0 ldr.w r3, [r3, #192] @ 0xc0 801630e: 4a48 ldr r2, [pc, #288] @ (8016430 ) 8016310: f8c2 30c0 str.w r3, [r2, #192] @ 0xc0 Motor2.GainCurD.Kaw = 1.0f / Motor2.GainCurD.Kp; 8016314: 4b46 ldr r3, [pc, #280] @ (8016430 ) 8016316: ed93 7a2f vldr s14, [r3, #188] @ 0xbc 801631a: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 801631e: eec6 7a87 vdiv.f32 s15, s13, s14 8016322: 4b43 ldr r3, [pc, #268] @ (8016430 ) 8016324: edc3 7a31 vstr s15, [r3, #196] @ 0xc4 Motor2.GainCurQ.Kp = Motor1.GainCurQ.Kp; 8016328: 4b3e ldr r3, [pc, #248] @ (8016424 ) 801632a: f8d3 30cc ldr.w r3, [r3, #204] @ 0xcc 801632e: 4a40 ldr r2, [pc, #256] @ (8016430 ) 8016330: f8c2 30cc str.w r3, [r2, #204] @ 0xcc Motor2.GainCurQ.Ki = Motor1.GainCurQ.Ki; 8016334: 4b3b ldr r3, [pc, #236] @ (8016424 ) 8016336: f8d3 30d0 ldr.w r3, [r3, #208] @ 0xd0 801633a: 4a3d ldr r2, [pc, #244] @ (8016430 ) 801633c: f8c2 30d0 str.w r3, [r2, #208] @ 0xd0 Motor2.GainCurQ.Kaw = 1.0f / Motor2.GainCurQ.Kp; 8016340: 4b3b ldr r3, [pc, #236] @ (8016430 ) 8016342: ed93 7a33 vldr s14, [r3, #204] @ 0xcc 8016346: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 801634a: eec6 7a87 vdiv.f32 s15, s13, s14 801634e: 4b38 ldr r3, [pc, #224] @ (8016430 ) 8016350: edc3 7a35 vstr s15, [r3, #212] @ 0xd4 // Motor2.GainCurQ.Kd = Motor1.GainCurQ.Kd; Motor2.GainSpd.Kp = Motor1.GainSpd.Kp; 8016354: 4b33 ldr r3, [pc, #204] @ (8016424 ) 8016356: f8d3 30dc ldr.w r3, [r3, #220] @ 0xdc 801635a: 4a35 ldr r2, [pc, #212] @ (8016430 ) 801635c: f8c2 30dc str.w r3, [r2, #220] @ 0xdc Motor2.GainSpd.Ki = Motor1.GainSpd.Ki; 8016360: 4b30 ldr r3, [pc, #192] @ (8016424 ) 8016362: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0 8016366: 4a32 ldr r2, [pc, #200] @ (8016430 ) 8016368: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0 Motor2.GainSpd.Kaw = 1.0f / Motor2.GainSpd.Kp; 801636c: 4b30 ldr r3, [pc, #192] @ (8016430 ) 801636e: ed93 7a37 vldr s14, [r3, #220] @ 0xdc 8016372: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 8016376: eec6 7a87 vdiv.f32 s15, s13, s14 801637a: 4b2d ldr r3, [pc, #180] @ (8016430 ) 801637c: edc3 7a39 vstr s15, [r3, #228] @ 0xe4 Motor2.GainFweak.Kp = Motor1.GainFweak.Kp; 8016380: 4b28 ldr r3, [pc, #160] @ (8016424 ) 8016382: f8d3 30ec ldr.w r3, [r3, #236] @ 0xec 8016386: 4a2a ldr r2, [pc, #168] @ (8016430 ) 8016388: f8c2 30ec str.w r3, [r2, #236] @ 0xec Motor2.GainFweak.Ki = Motor1.GainFweak.Ki; 801638c: 4b25 ldr r3, [pc, #148] @ (8016424 ) 801638e: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0 8016392: 4a27 ldr r2, [pc, #156] @ (8016430 ) 8016394: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0 Motor2_Ang.PolePair = Motor2.Para.PolePair; 8016398: 4b25 ldr r3, [pc, #148] @ (8016430 ) 801639a: f893 217d ldrb.w r2, [r3, #381] @ 0x17d 801639e: 4b25 ldr r3, [pc, #148] @ (8016434 ) 80163a0: 731a strb r2, [r3, #12] Motor2_Ang.EncPulse = Motor1_Ang.EncPulse; // TLE5012B : 4096, JKONG : 1000 80163a2: 4b22 ldr r3, [pc, #136] @ (801642c ) 80163a4: 889a ldrh r2, [r3, #4] 80163a6: 4b23 ldr r3, [pc, #140] @ (8016434 ) 80163a8: 809a strh r2, [r3, #4] Motor2_Ang.AngleScale = Motor1_Ang.AngleScale; 80163aa: 4b20 ldr r3, [pc, #128] @ (801642c ) 80163ac: 689b ldr r3, [r3, #8] 80163ae: 4a21 ldr r2, [pc, #132] @ (8016434 ) 80163b0: 6093 str r3, [r2, #8] Motor2_Ang.SpeedScale = Motor1_Ang.SpeedScale; 80163b2: 4b1e ldr r3, [pc, #120] @ (801642c ) 80163b4: 691b ldr r3, [r3, #16] 80163b6: 4a1f ldr r2, [pc, #124] @ (8016434 ) 80163b8: 6113 str r3, [r2, #16] //Motor2_Ang.AngleElecOffset = 147.0f; // SAT : 12, JKONG : #1 77 / #2 198.759857f -> inaccurate, check every time! Motor2_Ang.AngleElecOffset = RAM_Data.Motor2_Ang_AngleElecOffset; ///MOTOR2_ANG_ANGLEELCOFFSET// SAT : 12, JKONG : #1 77 / #2 198.759857f -> inaccurate, check every time! 80163ba: 4b19 ldr r3, [pc, #100] @ (8016420 ) 80163bc: 6d5b ldr r3, [r3, #84] @ 0x54 80163be: 4a1d ldr r2, [pc, #116] @ (8016434 ) 80163c0: 6013 str r3, [r2, #0] Motor2_Ang.MR.Max.Sin = Motor1_Ang.MR.Max.Sin; 80163c2: 4b1a ldr r3, [pc, #104] @ (801642c ) 80163c4: f8b3 2064 ldrh.w r2, [r3, #100] @ 0x64 80163c8: 4b1a ldr r3, [pc, #104] @ (8016434 ) 80163ca: f8a3 2064 strh.w r2, [r3, #100] @ 0x64 Motor2_Ang.MR.Max.Cos = Motor1_Ang.MR.Max.Cos; 80163ce: 4b17 ldr r3, [pc, #92] @ (801642c ) 80163d0: f8b3 2066 ldrh.w r2, [r3, #102] @ 0x66 80163d4: 4b17 ldr r3, [pc, #92] @ (8016434 ) 80163d6: f8a3 2066 strh.w r2, [r3, #102] @ 0x66 Motor2_Ang.MR.Min.Sin = Motor1_Ang.MR.Min.Sin; 80163da: 4b14 ldr r3, [pc, #80] @ (801642c ) 80163dc: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60 80163e0: 4b14 ldr r3, [pc, #80] @ (8016434 ) 80163e2: f8a3 2060 strh.w r2, [r3, #96] @ 0x60 Motor2_Ang.MR.Min.Cos = Motor1_Ang.MR.Min.Cos; 80163e6: 4b11 ldr r3, [pc, #68] @ (801642c ) 80163e8: f8b3 2062 ldrh.w r2, [r3, #98] @ 0x62 80163ec: 4b11 ldr r3, [pc, #68] @ (8016434 ) 80163ee: f8a3 2062 strh.w r2, [r3, #98] @ 0x62 Motor2_Ang.MR.Mid.Sin = Motor1_Ang.MR.Mid.Sin; 80163f2: 4b0e ldr r3, [pc, #56] @ (801642c ) 80163f4: f8b3 2068 ldrh.w r2, [r3, #104] @ 0x68 80163f8: 4b0e ldr r3, [pc, #56] @ (8016434 ) 80163fa: f8a3 2068 strh.w r2, [r3, #104] @ 0x68 Motor2_Ang.MR.Mid.Cos = Motor1_Ang.MR.Mid.Cos; 80163fe: 4b0b ldr r3, [pc, #44] @ (801642c ) 8016400: f8b3 206a ldrh.w r2, [r3, #106] @ 0x6a 8016404: 4b0b ldr r3, [pc, #44] @ (8016434 ) 8016406: f8a3 206a strh.w r2, [r3, #106] @ 0x6a Motor2_Ang.MR.Gain.Sin = Motor1_Ang.MR.Gain.Sin; 801640a: 4b08 ldr r3, [pc, #32] @ (801642c ) 801640c: 6edb ldr r3, [r3, #108] @ 0x6c 801640e: 4a09 ldr r2, [pc, #36] @ (8016434 ) 8016410: 66d3 str r3, [r2, #108] @ 0x6c Motor2_Ang.MR.Gain.Cos = Motor1_Ang.MR.Gain.Cos; 8016412: 4b06 ldr r3, [pc, #24] @ (801642c ) 8016414: 6f1b ldr r3, [r3, #112] @ 0x70 8016416: 4a07 ldr r2, [pc, #28] @ (8016434 ) 8016418: 6713 str r3, [r2, #112] @ 0x70 // Inverter Parameters // Inv.Para.HwAdcScale = 3.3f / 4095.0f; // Inv.Para.HwVdcScale = 1.0f / (30.0f + 1.0f); // Inv.Para.HwiScale = 0.002f * 15.0f / 1.0f; Inv.Para.HwAdcScale = RAM_Data.Inv_Para_HwAdcScale; ///INV_PARA_HWADCSCALE 801641a: 4b01 ldr r3, [pc, #4] @ (8016420 ) 801641c: 6edb ldr r3, [r3, #108] @ 0x6c 801641e: e00b b.n 8016438 8016420: 20000a98 .word 0x20000a98 8016424: 20000574 .word 0x20000574 8016428: 3c03126f .word 0x3c03126f 801642c: 2000047c .word 0x2000047c 8016430: 20000704 .word 0x20000704 8016434: 200004f8 .word 0x200004f8 8016438: 4a95 ldr r2, [pc, #596] @ (8016690 ) 801643a: 6593 str r3, [r2, #88] @ 0x58 Inv.Para.HwVdcScale = RAM_Data.Inv_Para_HwVdcScale; ///INV_PARA_HWVDCSCALE 801643c: 4b95 ldr r3, [pc, #596] @ (8016694 ) 801643e: 6f1b ldr r3, [r3, #112] @ 0x70 8016440: 4a93 ldr r2, [pc, #588] @ (8016690 ) 8016442: 65d3 str r3, [r2, #92] @ 0x5c Inv.Para.HwiScale = RAM_Data.Inv_Para_HwiScale; ///INV_PARA_HWISCALE 8016444: 4b93 ldr r3, [pc, #588] @ (8016694 ) 8016446: 6f5b ldr r3, [r3, #116] @ 0x74 8016448: 4a91 ldr r2, [pc, #580] @ (8016690 ) 801644a: 6613 str r3, [r2, #96] @ 0x60 Inv.Para.VdcScale = Inv.Para.HwAdcScale / Inv.Para.HwVdcScale; 801644c: 4b90 ldr r3, [pc, #576] @ (8016690 ) 801644e: edd3 6a16 vldr s13, [r3, #88] @ 0x58 8016452: 4b8f ldr r3, [pc, #572] @ (8016690 ) 8016454: ed93 7a17 vldr s14, [r3, #92] @ 0x5c 8016458: eec6 7a87 vdiv.f32 s15, s13, s14 801645c: 4b8c ldr r3, [pc, #560] @ (8016690 ) 801645e: edc3 7a19 vstr s15, [r3, #100] @ 0x64 Inv.Para.iScale = - Inv.Para.HwAdcScale / Inv.Para.HwiScale; 8016462: 4b8b ldr r3, [pc, #556] @ (8016690 ) 8016464: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016468: eef1 6a67 vneg.f32 s13, s15 801646c: 4b88 ldr r3, [pc, #544] @ (8016690 ) 801646e: ed93 7a18 vldr s14, [r3, #96] @ 0x60 8016472: eec6 7a87 vdiv.f32 s15, s13, s14 8016476: 4b86 ldr r3, [pc, #536] @ (8016690 ) 8016478: edc3 7a1a vstr s15, [r3, #104] @ 0x68 //#elif defined(TIM_20KHZ) // Inv.Para.Tsamp = 1.0f/20000.0f; //#else // Inv.Para.Tsamp = 1.0f/10000.0f; //#endif Inv.Para.Tsamp = RAM_Data.Inv_Para_Tsamp; ///INV_PARA_TSAMP 801647c: 4b85 ldr r3, [pc, #532] @ (8016694 ) 801647e: 6f9b ldr r3, [r3, #120] @ 0x78 8016480: 4a83 ldr r2, [pc, #524] @ (8016690 ) 8016482: 6713 str r3, [r2, #112] @ 0x70 // Inv.Para.PWM_Max = TIM_PERIOD; // Inv.Para.PWM_Mid = ((TIM_PERIOD+1)>>1); // // Inv.Para.VdcMargin = 0.90f; Inv.Para.PWM_Max = RAM_Data.Inv_Para_PWM_Max; ///INV_PARA_PWM_MAX 8016484: 4b83 ldr r3, [pc, #524] @ (8016694 ) 8016486: 6fdb ldr r3, [r3, #124] @ 0x7c 8016488: 4a81 ldr r2, [pc, #516] @ (8016690 ) 801648a: 6793 str r3, [r2, #120] @ 0x78 Inv.Para.PWM_Mid = RAM_Data.Inv_Para_PWM_Mid; ///INV_PARA_PWM_MID 801648c: 4b81 ldr r3, [pc, #516] @ (8016694 ) 801648e: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80 8016492: 4a7f ldr r2, [pc, #508] @ (8016690 ) 8016494: 6753 str r3, [r2, #116] @ 0x74 Inv.Para.VdcMargin = RAM_Data.Inv_Para_VdcMargin; ///INV_PARA_VDCMARGIN 8016496: 4b7f ldr r3, [pc, #508] @ (8016694 ) 8016498: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 801649c: 4a7c ldr r2, [pc, #496] @ (8016690 ) 801649e: 66d3 str r3, [r2, #108] @ 0x6c // LpfVdc.fc = 1000.0f; // LpfVdc.fs = 1.0f / Inv.Para.Tsamp; LpfVdc.fc = RAM_Data.LPFVdc_fc; ///LPFVDC_FC 80164a0: 4b7c ldr r3, [pc, #496] @ (8016694 ) 80164a2: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80164a6: 4a7c ldr r2, [pc, #496] @ (8016698 ) 80164a8: 6013 str r3, [r2, #0] LpfVdc.fs = RAM_Data.LPFVdc_fs; ///LPFVDC_FS 80164aa: 4b7a ldr r3, [pc, #488] @ (8016694 ) 80164ac: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 80164b0: 4a79 ldr r2, [pc, #484] @ (8016698 ) 80164b2: 6053 str r3, [r2, #4] LpfFACTOR(LpfVdc.fc, LpfVdc.fs, LpfVdc.fct); 80164b4: 4b78 ldr r3, [pc, #480] @ (8016698 ) 80164b6: 685b ldr r3, [r3, #4] 80164b8: 4618 mov r0, r3 80164ba: f7f9 ff75 bl 80103a8 <__aeabi_f2d> 80164be: 4604 mov r4, r0 80164c0: 460d mov r5, r1 80164c2: 4b75 ldr r3, [pc, #468] @ (8016698 ) 80164c4: 681b ldr r3, [r3, #0] 80164c6: 4618 mov r0, r3 80164c8: f7f9 ff6e bl 80103a8 <__aeabi_f2d> 80164cc: a36e add r3, pc, #440 @ (adr r3, 8016688 ) 80164ce: e9d3 2300 ldrd r2, r3, [r3] 80164d2: f7f9 ffc1 bl 8010458 <__aeabi_dmul> 80164d6: 4602 mov r2, r0 80164d8: 460b mov r3, r1 80164da: 4690 mov r8, r2 80164dc: 4699 mov r9, r3 80164de: 4b6e ldr r3, [pc, #440] @ (8016698 ) 80164e0: 685b ldr r3, [r3, #4] 80164e2: 4618 mov r0, r3 80164e4: f7f9 ff60 bl 80103a8 <__aeabi_f2d> 80164e8: 4602 mov r2, r0 80164ea: 460b mov r3, r1 80164ec: 4640 mov r0, r8 80164ee: 4649 mov r1, r9 80164f0: f7f9 fdfc bl 80100ec <__adddf3> 80164f4: 4602 mov r2, r0 80164f6: 460b mov r3, r1 80164f8: 4620 mov r0, r4 80164fa: 4629 mov r1, r5 80164fc: f7fa f8d6 bl 80106ac <__aeabi_ddiv> 8016500: 4602 mov r2, r0 8016502: 460b mov r3, r1 8016504: 4610 mov r0, r2 8016506: 4619 mov r1, r3 8016508: f7fa fa40 bl 801098c <__aeabi_d2f> 801650c: 4603 mov r3, r0 801650e: 4a62 ldr r2, [pc, #392] @ (8016698 ) 8016510: 6093 str r3, [r2, #8] // LpfCur.fc = 10.0f; // LpfCur.fs = 1.0f / Inv.Para.Tsamp; LpfCur.fc = RAM_Data.LPFCur_fc; ///LPFCUR_FC 8016512: 4b60 ldr r3, [pc, #384] @ (8016694 ) 8016514: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8016518: 4a60 ldr r2, [pc, #384] @ (801669c ) 801651a: 6013 str r3, [r2, #0] LpfCur.fs = RAM_Data.LPFCur_fs; ///LPFCUR_FS 801651c: 4b5d ldr r3, [pc, #372] @ (8016694 ) 801651e: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8016522: 4a5e ldr r2, [pc, #376] @ (801669c ) 8016524: 6053 str r3, [r2, #4] LpfFACTOR(LpfCur.fc, LpfCur.fs, LpfCur.fct); 8016526: 4b5d ldr r3, [pc, #372] @ (801669c ) 8016528: 685b ldr r3, [r3, #4] 801652a: 4618 mov r0, r3 801652c: f7f9 ff3c bl 80103a8 <__aeabi_f2d> 8016530: 4604 mov r4, r0 8016532: 460d mov r5, r1 8016534: 4b59 ldr r3, [pc, #356] @ (801669c ) 8016536: 681b ldr r3, [r3, #0] 8016538: 4618 mov r0, r3 801653a: f7f9 ff35 bl 80103a8 <__aeabi_f2d> 801653e: a352 add r3, pc, #328 @ (adr r3, 8016688 ) 8016540: e9d3 2300 ldrd r2, r3, [r3] 8016544: f7f9 ff88 bl 8010458 <__aeabi_dmul> 8016548: 4602 mov r2, r0 801654a: 460b mov r3, r1 801654c: 4690 mov r8, r2 801654e: 4699 mov r9, r3 8016550: 4b52 ldr r3, [pc, #328] @ (801669c ) 8016552: 685b ldr r3, [r3, #4] 8016554: 4618 mov r0, r3 8016556: f7f9 ff27 bl 80103a8 <__aeabi_f2d> 801655a: 4602 mov r2, r0 801655c: 460b mov r3, r1 801655e: 4640 mov r0, r8 8016560: 4649 mov r1, r9 8016562: f7f9 fdc3 bl 80100ec <__adddf3> 8016566: 4602 mov r2, r0 8016568: 460b mov r3, r1 801656a: 4620 mov r0, r4 801656c: 4629 mov r1, r5 801656e: f7fa f89d bl 80106ac <__aeabi_ddiv> 8016572: 4602 mov r2, r0 8016574: 460b mov r3, r1 8016576: 4610 mov r0, r2 8016578: 4619 mov r1, r3 801657a: f7fa fa07 bl 801098c <__aeabi_d2f> 801657e: 4603 mov r3, r0 8016580: 4a46 ldr r2, [pc, #280] @ (801669c ) 8016582: 6093 str r3, [r2, #8] // LpfSpd.fc = 100.0f; // LpfSpd.fs = 1000.0f; LpfSpd.fc = RAM_Data.LPFSpd_fc; ///LPFSPD_FC 8016584: 4b43 ldr r3, [pc, #268] @ (8016694 ) 8016586: f8d3 3098 ldr.w r3, [r3, #152] @ 0x98 801658a: 4a45 ldr r2, [pc, #276] @ (80166a0 ) 801658c: 6013 str r3, [r2, #0] LpfSpd.fs = RAM_Data.LPFSpd_fs; ///LPFSPD_FS 801658e: 4b41 ldr r3, [pc, #260] @ (8016694 ) 8016590: f8d3 309c ldr.w r3, [r3, #156] @ 0x9c 8016594: 4a42 ldr r2, [pc, #264] @ (80166a0 ) 8016596: 6053 str r3, [r2, #4] LpfFACTOR(LpfSpd.fc, LpfSpd.fs, LpfSpd.fct); 8016598: 4b41 ldr r3, [pc, #260] @ (80166a0 ) 801659a: 685b ldr r3, [r3, #4] 801659c: 4618 mov r0, r3 801659e: f7f9 ff03 bl 80103a8 <__aeabi_f2d> 80165a2: 4604 mov r4, r0 80165a4: 460d mov r5, r1 80165a6: 4b3e ldr r3, [pc, #248] @ (80166a0 ) 80165a8: 681b ldr r3, [r3, #0] 80165aa: 4618 mov r0, r3 80165ac: f7f9 fefc bl 80103a8 <__aeabi_f2d> 80165b0: a335 add r3, pc, #212 @ (adr r3, 8016688 ) 80165b2: e9d3 2300 ldrd r2, r3, [r3] 80165b6: f7f9 ff4f bl 8010458 <__aeabi_dmul> 80165ba: 4602 mov r2, r0 80165bc: 460b mov r3, r1 80165be: 4690 mov r8, r2 80165c0: 4699 mov r9, r3 80165c2: 4b37 ldr r3, [pc, #220] @ (80166a0 ) 80165c4: 685b ldr r3, [r3, #4] 80165c6: 4618 mov r0, r3 80165c8: f7f9 feee bl 80103a8 <__aeabi_f2d> 80165cc: 4602 mov r2, r0 80165ce: 460b mov r3, r1 80165d0: 4640 mov r0, r8 80165d2: 4649 mov r1, r9 80165d4: f7f9 fd8a bl 80100ec <__adddf3> 80165d8: 4602 mov r2, r0 80165da: 460b mov r3, r1 80165dc: 4620 mov r0, r4 80165de: 4629 mov r1, r5 80165e0: f7fa f864 bl 80106ac <__aeabi_ddiv> 80165e4: 4602 mov r2, r0 80165e6: 460b mov r3, r1 80165e8: 4610 mov r0, r2 80165ea: 4619 mov r1, r3 80165ec: f7fa f9ce bl 801098c <__aeabi_d2f> 80165f0: 4603 mov r3, r0 80165f2: 4a2b ldr r2, [pc, #172] @ (80166a0 ) 80165f4: 6093 str r3, [r2, #8] // WP_ErrRef.OverSpeed = 4000.0; // WP_ErrRef.OverVoltage = 70.0; // WP_ErrRef.UnderVoltage = 30.0; // WP_ErrRef.IsensorOffsetMax = 2048.0f + 50.0f; // WP_ErrRef.IsensorOffsetMin = 2048.0f - 50.0f; WP_ErrRef.IsensorOpen = RAM_Data.ErrRef_IsensorOpen; ///ERRREF_ISENSOROPEN 80165f6: 4b27 ldr r3, [pc, #156] @ (8016694 ) 80165f8: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0 80165fc: 4a29 ldr r2, [pc, #164] @ (80166a4 ) 80165fe: 6153 str r3, [r2, #20] WP_ErrRef.IsensorShort = RAM_Data.ErrRef_IsensorShort; ///ERRREF_ISENSORSHORT 8016600: 4b24 ldr r3, [pc, #144] @ (8016694 ) 8016602: f8d3 30a4 ldr.w r3, [r3, #164] @ 0xa4 8016606: 4a27 ldr r2, [pc, #156] @ (80166a4 ) 8016608: 6113 str r3, [r2, #16] WP_ErrRef.OverCurrent = RAM_Data.ErrRef_OverCurrent; ///ERRREF_OVERCURRENT 801660a: 4b22 ldr r3, [pc, #136] @ (8016694 ) 801660c: f8d3 30a8 ldr.w r3, [r3, #168] @ 0xa8 8016610: 4a24 ldr r2, [pc, #144] @ (80166a4 ) 8016612: 6093 str r3, [r2, #8] WP_ErrRef.OverSpeed = RAM_Data.ErrRef_OverSpeed; ///ERRREF_OVERSPEED 8016614: 4b1f ldr r3, [pc, #124] @ (8016694 ) 8016616: f8d3 30ac ldr.w r3, [r3, #172] @ 0xac 801661a: 4a22 ldr r2, [pc, #136] @ (80166a4 ) 801661c: 60d3 str r3, [r2, #12] WP_ErrRef.OverVoltage = RAM_Data.ErrRef_OverVoltage; ///ERRREF_OVERVOLTAGE 801661e: 4b1d ldr r3, [pc, #116] @ (8016694 ) 8016620: f8d3 30b0 ldr.w r3, [r3, #176] @ 0xb0 8016624: 4a1f ldr r2, [pc, #124] @ (80166a4 ) 8016626: 6013 str r3, [r2, #0] WP_ErrRef.UnderVoltage = RAM_Data.ErrRef_UnderVoltage; ///ERRREF_UNDERVOLTAGE 8016628: 4b1a ldr r3, [pc, #104] @ (8016694 ) 801662a: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4 801662e: 4a1d ldr r2, [pc, #116] @ (80166a4 ) 8016630: 6053 str r3, [r2, #4] WP_ErrRef.IsensorOffsetMax = RAM_Data.ErrRef_IsensorOffsetMax;///ERRREF_ISENSOROFFSETMAX 8016632: 4b18 ldr r3, [pc, #96] @ (8016694 ) 8016634: f8d3 30b8 ldr.w r3, [r3, #184] @ 0xb8 8016638: 4a1a ldr r2, [pc, #104] @ (80166a4 ) 801663a: 6193 str r3, [r2, #24] WP_ErrRef.IsensorOffsetMin = RAM_Data.ErrRef_IsensorOffsetMin;///ERRREF_ISENSOROFFSETMIN 801663c: 4b15 ldr r3, [pc, #84] @ (8016694 ) 801663e: f8d3 30bc ldr.w r3, [r3, #188] @ 0xbc 8016642: 4a18 ldr r2, [pc, #96] @ (80166a4 ) 8016644: 61d3 str r3, [r2, #28] // Inv.Ctrl.VdcLimFweak = 49.0f; // Generation Field weak Pi Controller Output Limit // Inv.Ctrl.IlimFweak = WP_ErrRef.OverCurrent * 0.8f; // Motoring Field weak Pi controller Output Limit Inv.Ctrl.VdcLimFweak = RAM_Data.Inv_Ctrl_VdcLimFweak; ///INV_CTRL_VDCLIMFWEAK // Generation Field weak Pi Controller Output Limit 8016646: 4b13 ldr r3, [pc, #76] @ (8016694 ) 8016648: f8d3 30c0 ldr.w r3, [r3, #192] @ 0xc0 801664c: 4a10 ldr r2, [pc, #64] @ (8016690 ) 801664e: 61d3 str r3, [r2, #28] Inv.Ctrl.IlimFweak = RAM_Data.Inv_Ctrl_IlimFweak; ///INV_CTRL_ILIMFWEAK // Motoring Field weak Pi controller Output Limit 8016650: 4b10 ldr r3, [pc, #64] @ (8016694 ) 8016652: f8d3 30c4 ldr.w r3, [r3, #196] @ 0xc4 8016656: 4a0e ldr r2, [pc, #56] @ (8016690 ) 8016658: 6253 str r3, [r2, #36] @ 0x24 // Motor1_Ang.RpmLim = WP_ErrRef.OverSpeed * 0.8f; // Motor1_Ang.SpdCtrlOutLim = WP_ErrRef.OverCurrent * 0.8f; // Speed Control Pi Controller Output Limit // Motor2_Ang.RpmLim = WP_ErrRef.OverSpeed * 0.8f; // Motor2_Ang.SpdCtrlOutLim = WP_ErrRef.OverCurrent * 0.8f; // Speed Control Pi Controller Output Limit Motor1_Ang.RpmLim = RAM_Data.Motor_Ang_RpmLim; ///MOTOR_ANG_RPMLIM 801665a: 4b0e ldr r3, [pc, #56] @ (8016694 ) 801665c: f8d3 30c8 ldr.w r3, [r3, #200] @ 0xc8 8016660: 4a11 ldr r2, [pc, #68] @ (80166a8 ) 8016662: 6493 str r3, [r2, #72] @ 0x48 Motor1_Ang.SpdCtrlOutLim = RAM_Data.Motor_Ang_SpdCtrlOutLim;///MOTOR_ANG_SPDCTRLOUTLIM // Speed Control Pi Controller Output Limit 8016664: 4b0b ldr r3, [pc, #44] @ (8016694 ) 8016666: f8d3 30cc ldr.w r3, [r3, #204] @ 0xcc 801666a: 4a0f ldr r2, [pc, #60] @ (80166a8 ) 801666c: 64d3 str r3, [r2, #76] @ 0x4c Motor2_Ang.RpmLim = RAM_Data.Motor_Ang_RpmLim; ///MOTOR_ANG_RPMLIM 801666e: 4b09 ldr r3, [pc, #36] @ (8016694 ) 8016670: f8d3 30c8 ldr.w r3, [r3, #200] @ 0xc8 8016674: 4a0d ldr r2, [pc, #52] @ (80166ac ) 8016676: 6493 str r3, [r2, #72] @ 0x48 Motor2_Ang.SpdCtrlOutLim = RAM_Data.Motor_Ang_SpdCtrlOutLim;///MOTOR_ANG_SPDCTRLOUTLIM // Speed Control Pi Controller Output Limit 8016678: 4b06 ldr r3, [pc, #24] @ (8016694 ) 801667a: f8d3 30cc ldr.w r3, [r3, #204] @ 0xcc 801667e: 4a0b ldr r2, [pc, #44] @ (80166ac ) 8016680: 64d3 str r3, [r2, #76] @ 0x4c } 8016682: bf00 nop 8016684: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} 8016688: 54442d11 .word 0x54442d11 801668c: 401921fb .word 0x401921fb 8016690: 20000400 .word 0x20000400 8016694: 20000a98 .word 0x20000a98 8016698: 200008ec .word 0x200008ec 801669c: 200008e0 .word 0x200008e0 80166a0: 200008f8 .word 0x200008f8 80166a4: 200003e0 .word 0x200003e0 80166a8: 2000047c .word 0x2000047c 80166ac: 200004f8 .word 0x200004f8 080166b0 : inline void Motor1Ctrl_VariSetZero(void) { 80166b0: b480 push {r7} 80166b2: af00 add r7, sp, #0 Motor1.Cmd.Icmd.d = 0.0f; 80166b4: 4b65 ldr r3, [pc, #404] @ (801684c ) 80166b6: f04f 0200 mov.w r2, #0 80166ba: 601a str r2, [r3, #0] Motor1.Cmd.Icmd.q = 0.0f; 80166bc: 4b63 ldr r3, [pc, #396] @ (801684c ) 80166be: f04f 0200 mov.w r2, #0 80166c2: 605a str r2, [r3, #4] Motor1.Cmd.Iref.d = 0.0f; 80166c4: 4b61 ldr r3, [pc, #388] @ (801684c ) 80166c6: f04f 0200 mov.w r2, #0 80166ca: 609a str r2, [r3, #8] Motor1.Cmd.Iref.q = 0.0f; 80166cc: 4b5f ldr r3, [pc, #380] @ (801684c ) 80166ce: f04f 0200 mov.w r2, #0 80166d2: 60da str r2, [r3, #12] Motor1.Cmd.IsBeta = 0.0f; 80166d4: 4b5d ldr r3, [pc, #372] @ (801684c ) 80166d6: f04f 0200 mov.w r2, #0 80166da: 615a str r2, [r3, #20] Motor1.Cmd.IsCmd = 0.0f; 80166dc: 4b5b ldr r3, [pc, #364] @ (801684c ) 80166de: f04f 0200 mov.w r2, #0 80166e2: 611a str r2, [r3, #16] Motor1.Cmd.XbyF_Freq = 0.0f; 80166e4: 4b59 ldr r3, [pc, #356] @ (801684c ) 80166e6: f04f 0200 mov.w r2, #0 80166ea: 621a str r2, [r3, #32] Motor1.Cmd.Vfcmd.d = 0.0f; 80166ec: 4b57 ldr r3, [pc, #348] @ (801684c ) 80166ee: f04f 0200 mov.w r2, #0 80166f2: 625a str r2, [r3, #36] @ 0x24 Motor1.Cmd.Vfcmd.q = 0.0f; 80166f4: 4b55 ldr r3, [pc, #340] @ (801684c ) 80166f6: f04f 0200 mov.w r2, #0 80166fa: 629a str r2, [r3, #40] @ 0x28 Motor1.PiCurD.Err = 0.0f; 80166fc: 4b53 ldr r3, [pc, #332] @ (801684c ) 80166fe: f04f 0200 mov.w r2, #0 8016702: f8c3 20fc str.w r2, [r3, #252] @ 0xfc Motor1.PiCurD.Pterm = 0.0f; 8016706: 4b51 ldr r3, [pc, #324] @ (801684c ) 8016708: f04f 0200 mov.w r2, #0 801670c: f8c3 2100 str.w r2, [r3, #256] @ 0x100 Motor1.PiCurD.Iterm = 0.0f; 8016710: 4b4e ldr r3, [pc, #312] @ (801684c ) 8016712: f04f 0200 mov.w r2, #0 8016716: f8c3 2104 str.w r2, [r3, #260] @ 0x104 Motor1.PiCurD.PIterm = 0.0f; 801671a: 4b4c ldr r3, [pc, #304] @ (801684c ) 801671c: f04f 0200 mov.w r2, #0 8016720: f8c3 210c str.w r2, [r3, #268] @ 0x10c Motor1.PiCurD.Ff = 0.0f; 8016724: 4b49 ldr r3, [pc, #292] @ (801684c ) 8016726: f04f 0200 mov.w r2, #0 801672a: f8c3 2110 str.w r2, [r3, #272] @ 0x110 Motor1.PiCurD.AW = 0.0f; 801672e: 4b47 ldr r3, [pc, #284] @ (801684c ) 8016730: f04f 0200 mov.w r2, #0 8016734: f8c3 2114 str.w r2, [r3, #276] @ 0x114 Motor1.PiCurD.Out = 0.0f; 8016738: 4b44 ldr r3, [pc, #272] @ (801684c ) 801673a: f04f 0200 mov.w r2, #0 801673e: f8c3 2118 str.w r2, [r3, #280] @ 0x118 Motor1.PiCurQ.Err = 0.0f; 8016742: 4b42 ldr r3, [pc, #264] @ (801684c ) 8016744: f04f 0200 mov.w r2, #0 8016748: f8c3 211c str.w r2, [r3, #284] @ 0x11c Motor1.PiCurQ.Pterm = 0.0f; 801674c: 4b3f ldr r3, [pc, #252] @ (801684c ) 801674e: f04f 0200 mov.w r2, #0 8016752: f8c3 2120 str.w r2, [r3, #288] @ 0x120 Motor1.PiCurQ.Iterm = 0.0f; 8016756: 4b3d ldr r3, [pc, #244] @ (801684c ) 8016758: f04f 0200 mov.w r2, #0 801675c: f8c3 2124 str.w r2, [r3, #292] @ 0x124 Motor1.PiCurQ.PIterm = 0.0f; 8016760: 4b3a ldr r3, [pc, #232] @ (801684c ) 8016762: f04f 0200 mov.w r2, #0 8016766: f8c3 212c str.w r2, [r3, #300] @ 0x12c // Motor1.PiCurQ.Dterm = 0.0f; ///somebp 2024.02.02 Motor1.PiCurQ.Ff = 0.0f; 801676a: 4b38 ldr r3, [pc, #224] @ (801684c ) 801676c: f04f 0200 mov.w r2, #0 8016770: f8c3 2130 str.w r2, [r3, #304] @ 0x130 Motor1.PiCurQ.AW = 0.0f; 8016774: 4b35 ldr r3, [pc, #212] @ (801684c ) 8016776: f04f 0200 mov.w r2, #0 801677a: f8c3 2134 str.w r2, [r3, #308] @ 0x134 Motor1.PiCurQ.Out = 0.0f; 801677e: 4b33 ldr r3, [pc, #204] @ (801684c ) 8016780: f04f 0200 mov.w r2, #0 8016784: f8c3 2138 str.w r2, [r3, #312] @ 0x138 Motor1.Fb.VeRef.d = 0.0f; 8016788: 4b30 ldr r3, [pc, #192] @ (801684c ) 801678a: f04f 0200 mov.w r2, #0 801678e: 64da str r2, [r3, #76] @ 0x4c Motor1.Fb.VeRef.q = 0.0f; 8016790: 4b2e ldr r3, [pc, #184] @ (801684c ) 8016792: f04f 0200 mov.w r2, #0 8016796: 651a str r2, [r3, #80] @ 0x50 Motor1.Fb.VeSet.d = 0.0f; 8016798: 4b2c ldr r3, [pc, #176] @ (801684c ) 801679a: f04f 0200 mov.w r2, #0 801679e: 655a str r2, [r3, #84] @ 0x54 Motor1.Fb.VeSet.q = 0.0f; 80167a0: 4b2a ldr r3, [pc, #168] @ (801684c ) 80167a2: f04f 0200 mov.w r2, #0 80167a6: 659a str r2, [r3, #88] @ 0x58 Motor1.Fb.V3Set.U = 0.0f; 80167a8: 4b28 ldr r3, [pc, #160] @ (801684c ) 80167aa: f04f 0200 mov.w r2, #0 80167ae: 665a str r2, [r3, #100] @ 0x64 Motor1.Fb.V3Set.V = 0.0f; 80167b0: 4b26 ldr r3, [pc, #152] @ (801684c ) 80167b2: f04f 0200 mov.w r2, #0 80167b6: 669a str r2, [r3, #104] @ 0x68 Motor1.Fb.V3Set.W = 0.0f; 80167b8: 4b24 ldr r3, [pc, #144] @ (801684c ) 80167ba: f04f 0200 mov.w r2, #0 80167be: 66da str r2, [r3, #108] @ 0x6c Motor1.Fb.PWMcnt[0] = Inv.Para.PWM_Mid; 80167c0: 4b23 ldr r3, [pc, #140] @ (8016850 ) 80167c2: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80167c6: eefc 7ae7 vcvt.u32.f32 s15, s15 80167ca: ee17 2a90 vmov r2, s15 80167ce: 4b1f ldr r3, [pc, #124] @ (801684c ) 80167d0: f8c3 20b0 str.w r2, [r3, #176] @ 0xb0 Motor1.Fb.PWMcnt[1] = Inv.Para.PWM_Mid; 80167d4: 4b1e ldr r3, [pc, #120] @ (8016850 ) 80167d6: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80167da: eefc 7ae7 vcvt.u32.f32 s15, s15 80167de: ee17 2a90 vmov r2, s15 80167e2: 4b1a ldr r3, [pc, #104] @ (801684c ) 80167e4: f8c3 20b4 str.w r2, [r3, #180] @ 0xb4 Motor1.Fb.PWMcnt[2] = Inv.Para.PWM_Mid; 80167e8: 4b19 ldr r3, [pc, #100] @ (8016850 ) 80167ea: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80167ee: eefc 7ae7 vcvt.u32.f32 s15, s15 80167f2: ee17 2a90 vmov r2, s15 80167f6: 4b15 ldr r3, [pc, #84] @ (801684c ) 80167f8: f8c3 20b8 str.w r2, [r3, #184] @ 0xb8 Motor1.PiSpd.Err = 0.0f; 80167fc: 4b13 ldr r3, [pc, #76] @ (801684c ) 80167fe: f04f 0200 mov.w r2, #0 8016802: f8c3 213c str.w r2, [r3, #316] @ 0x13c Motor1.PiSpd.Pterm = 0.0f; 8016806: 4b11 ldr r3, [pc, #68] @ (801684c ) 8016808: f04f 0200 mov.w r2, #0 801680c: f8c3 2140 str.w r2, [r3, #320] @ 0x140 Motor1.PiSpd.Iterm = 0.0f; 8016810: 4b0e ldr r3, [pc, #56] @ (801684c ) 8016812: f04f 0200 mov.w r2, #0 8016816: f8c3 2144 str.w r2, [r3, #324] @ 0x144 Motor1.PiSpd.PIterm = 0.0f; 801681a: 4b0c ldr r3, [pc, #48] @ (801684c ) 801681c: f04f 0200 mov.w r2, #0 8016820: f8c3 214c str.w r2, [r3, #332] @ 0x14c Motor1.PiSpd.Ff = 0.0f; 8016824: 4b09 ldr r3, [pc, #36] @ (801684c ) 8016826: f04f 0200 mov.w r2, #0 801682a: f8c3 2150 str.w r2, [r3, #336] @ 0x150 Motor1.PiSpd.AW = 0.0f; 801682e: 4b07 ldr r3, [pc, #28] @ (801684c ) 8016830: f04f 0200 mov.w r2, #0 8016834: f8c3 2154 str.w r2, [r3, #340] @ 0x154 Motor1.PiSpd.Out = 0.0f; 8016838: 4b04 ldr r3, [pc, #16] @ (801684c ) 801683a: f04f 0200 mov.w r2, #0 801683e: f8c3 2158 str.w r2, [r3, #344] @ 0x158 } 8016842: bf00 nop 8016844: 46bd mov sp, r7 8016846: f85d 7b04 ldr.w r7, [sp], #4 801684a: 4770 bx lr 801684c: 20000574 .word 0x20000574 8016850: 20000400 .word 0x20000400 08016854 : inline void Motor2Ctrl_VariSetZero(void) { 8016854: b480 push {r7} 8016856: af00 add r7, sp, #0 Motor2.Cmd.Icmd.d = 0.0f; 8016858: 4b65 ldr r3, [pc, #404] @ (80169f0 ) 801685a: f04f 0200 mov.w r2, #0 801685e: 601a str r2, [r3, #0] Motor2.Cmd.Icmd.q = 0.0f; 8016860: 4b63 ldr r3, [pc, #396] @ (80169f0 ) 8016862: f04f 0200 mov.w r2, #0 8016866: 605a str r2, [r3, #4] Motor2.Cmd.Iref.d = 0.0f; 8016868: 4b61 ldr r3, [pc, #388] @ (80169f0 ) 801686a: f04f 0200 mov.w r2, #0 801686e: 609a str r2, [r3, #8] Motor2.Cmd.Iref.q = 0.0f; 8016870: 4b5f ldr r3, [pc, #380] @ (80169f0 ) 8016872: f04f 0200 mov.w r2, #0 8016876: 60da str r2, [r3, #12] Motor2.Cmd.IsBeta = 0.0f; 8016878: 4b5d ldr r3, [pc, #372] @ (80169f0 ) 801687a: f04f 0200 mov.w r2, #0 801687e: 615a str r2, [r3, #20] Motor2.Cmd.IsCmd = 0.0f; 8016880: 4b5b ldr r3, [pc, #364] @ (80169f0 ) 8016882: f04f 0200 mov.w r2, #0 8016886: 611a str r2, [r3, #16] Motor2.Cmd.XbyF_Freq = 0.0f; 8016888: 4b59 ldr r3, [pc, #356] @ (80169f0 ) 801688a: f04f 0200 mov.w r2, #0 801688e: 621a str r2, [r3, #32] Motor2.Cmd.Vfcmd.d = 0.0f; 8016890: 4b57 ldr r3, [pc, #348] @ (80169f0 ) 8016892: f04f 0200 mov.w r2, #0 8016896: 625a str r2, [r3, #36] @ 0x24 Motor2.Cmd.Vfcmd.q = 0.0f; 8016898: 4b55 ldr r3, [pc, #340] @ (80169f0 ) 801689a: f04f 0200 mov.w r2, #0 801689e: 629a str r2, [r3, #40] @ 0x28 Motor2.PiCurD.Err = 0.0f; 80168a0: 4b53 ldr r3, [pc, #332] @ (80169f0 ) 80168a2: f04f 0200 mov.w r2, #0 80168a6: f8c3 20fc str.w r2, [r3, #252] @ 0xfc Motor2.PiCurD.Pterm = 0.0f; 80168aa: 4b51 ldr r3, [pc, #324] @ (80169f0 ) 80168ac: f04f 0200 mov.w r2, #0 80168b0: f8c3 2100 str.w r2, [r3, #256] @ 0x100 Motor2.PiCurD.Iterm = 0.0f; 80168b4: 4b4e ldr r3, [pc, #312] @ (80169f0 ) 80168b6: f04f 0200 mov.w r2, #0 80168ba: f8c3 2104 str.w r2, [r3, #260] @ 0x104 Motor2.PiCurD.PIterm = 0.0f; 80168be: 4b4c ldr r3, [pc, #304] @ (80169f0 ) 80168c0: f04f 0200 mov.w r2, #0 80168c4: f8c3 210c str.w r2, [r3, #268] @ 0x10c Motor2.PiCurD.Ff = 0.0f; 80168c8: 4b49 ldr r3, [pc, #292] @ (80169f0 ) 80168ca: f04f 0200 mov.w r2, #0 80168ce: f8c3 2110 str.w r2, [r3, #272] @ 0x110 Motor2.PiCurD.AW = 0.0f; 80168d2: 4b47 ldr r3, [pc, #284] @ (80169f0 ) 80168d4: f04f 0200 mov.w r2, #0 80168d8: f8c3 2114 str.w r2, [r3, #276] @ 0x114 Motor2.PiCurD.Out = 0.0f; 80168dc: 4b44 ldr r3, [pc, #272] @ (80169f0 ) 80168de: f04f 0200 mov.w r2, #0 80168e2: f8c3 2118 str.w r2, [r3, #280] @ 0x118 Motor2.PiCurQ.Err = 0.0f; 80168e6: 4b42 ldr r3, [pc, #264] @ (80169f0 ) 80168e8: f04f 0200 mov.w r2, #0 80168ec: f8c3 211c str.w r2, [r3, #284] @ 0x11c Motor2.PiCurQ.Pterm = 0.0f; 80168f0: 4b3f ldr r3, [pc, #252] @ (80169f0 ) 80168f2: f04f 0200 mov.w r2, #0 80168f6: f8c3 2120 str.w r2, [r3, #288] @ 0x120 Motor2.PiCurQ.Iterm = 0.0f; 80168fa: 4b3d ldr r3, [pc, #244] @ (80169f0 ) 80168fc: f04f 0200 mov.w r2, #0 8016900: f8c3 2124 str.w r2, [r3, #292] @ 0x124 Motor2.PiCurQ.PIterm = 0.0f; 8016904: 4b3a ldr r3, [pc, #232] @ (80169f0 ) 8016906: f04f 0200 mov.w r2, #0 801690a: f8c3 212c str.w r2, [r3, #300] @ 0x12c Motor2.PiCurQ.Ff = 0.0f; 801690e: 4b38 ldr r3, [pc, #224] @ (80169f0 ) 8016910: f04f 0200 mov.w r2, #0 8016914: f8c3 2130 str.w r2, [r3, #304] @ 0x130 Motor2.PiCurQ.AW = 0.0f; 8016918: 4b35 ldr r3, [pc, #212] @ (80169f0 ) 801691a: f04f 0200 mov.w r2, #0 801691e: f8c3 2134 str.w r2, [r3, #308] @ 0x134 Motor2.PiCurQ.Out = 0.0f; 8016922: 4b33 ldr r3, [pc, #204] @ (80169f0 ) 8016924: f04f 0200 mov.w r2, #0 8016928: f8c3 2138 str.w r2, [r3, #312] @ 0x138 Motor2.Fb.VeRef.d = 0.0f; 801692c: 4b30 ldr r3, [pc, #192] @ (80169f0 ) 801692e: f04f 0200 mov.w r2, #0 8016932: 64da str r2, [r3, #76] @ 0x4c Motor2.Fb.VeRef.q = 0.0f; 8016934: 4b2e ldr r3, [pc, #184] @ (80169f0 ) 8016936: f04f 0200 mov.w r2, #0 801693a: 651a str r2, [r3, #80] @ 0x50 Motor2.Fb.VeSet.d = 0.0f; 801693c: 4b2c ldr r3, [pc, #176] @ (80169f0 ) 801693e: f04f 0200 mov.w r2, #0 8016942: 655a str r2, [r3, #84] @ 0x54 Motor2.Fb.VeSet.q = 0.0f; 8016944: 4b2a ldr r3, [pc, #168] @ (80169f0 ) 8016946: f04f 0200 mov.w r2, #0 801694a: 659a str r2, [r3, #88] @ 0x58 Motor2.Fb.V3Set.U = 0.0f; 801694c: 4b28 ldr r3, [pc, #160] @ (80169f0 ) 801694e: f04f 0200 mov.w r2, #0 8016952: 665a str r2, [r3, #100] @ 0x64 Motor2.Fb.V3Set.V = 0.0f; 8016954: 4b26 ldr r3, [pc, #152] @ (80169f0 ) 8016956: f04f 0200 mov.w r2, #0 801695a: 669a str r2, [r3, #104] @ 0x68 Motor2.Fb.V3Set.W = 0.0f; 801695c: 4b24 ldr r3, [pc, #144] @ (80169f0 ) 801695e: f04f 0200 mov.w r2, #0 8016962: 66da str r2, [r3, #108] @ 0x6c Motor2.Fb.PWMcnt[0] = Inv.Para.PWM_Mid; 8016964: 4b23 ldr r3, [pc, #140] @ (80169f4 ) 8016966: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801696a: eefc 7ae7 vcvt.u32.f32 s15, s15 801696e: ee17 2a90 vmov r2, s15 8016972: 4b1f ldr r3, [pc, #124] @ (80169f0 ) 8016974: f8c3 20b0 str.w r2, [r3, #176] @ 0xb0 Motor2.Fb.PWMcnt[1] = Inv.Para.PWM_Mid; 8016978: 4b1e ldr r3, [pc, #120] @ (80169f4 ) 801697a: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801697e: eefc 7ae7 vcvt.u32.f32 s15, s15 8016982: ee17 2a90 vmov r2, s15 8016986: 4b1a ldr r3, [pc, #104] @ (80169f0 ) 8016988: f8c3 20b4 str.w r2, [r3, #180] @ 0xb4 Motor2.Fb.PWMcnt[2] = Inv.Para.PWM_Mid; 801698c: 4b19 ldr r3, [pc, #100] @ (80169f4 ) 801698e: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8016992: eefc 7ae7 vcvt.u32.f32 s15, s15 8016996: ee17 2a90 vmov r2, s15 801699a: 4b15 ldr r3, [pc, #84] @ (80169f0 ) 801699c: f8c3 20b8 str.w r2, [r3, #184] @ 0xb8 Motor2.PiSpd.Err = 0.0f; 80169a0: 4b13 ldr r3, [pc, #76] @ (80169f0 ) 80169a2: f04f 0200 mov.w r2, #0 80169a6: f8c3 213c str.w r2, [r3, #316] @ 0x13c Motor2.PiSpd.Pterm = 0.0f; 80169aa: 4b11 ldr r3, [pc, #68] @ (80169f0 ) 80169ac: f04f 0200 mov.w r2, #0 80169b0: f8c3 2140 str.w r2, [r3, #320] @ 0x140 Motor2.PiSpd.Iterm = 0.0f; 80169b4: 4b0e ldr r3, [pc, #56] @ (80169f0 ) 80169b6: f04f 0200 mov.w r2, #0 80169ba: f8c3 2144 str.w r2, [r3, #324] @ 0x144 Motor2.PiSpd.PIterm = 0.0f; 80169be: 4b0c ldr r3, [pc, #48] @ (80169f0 ) 80169c0: f04f 0200 mov.w r2, #0 80169c4: f8c3 214c str.w r2, [r3, #332] @ 0x14c Motor2.PiSpd.Ff = 0.0f; 80169c8: 4b09 ldr r3, [pc, #36] @ (80169f0 ) 80169ca: f04f 0200 mov.w r2, #0 80169ce: f8c3 2150 str.w r2, [r3, #336] @ 0x150 Motor2.PiSpd.AW = 0.0f; 80169d2: 4b07 ldr r3, [pc, #28] @ (80169f0 ) 80169d4: f04f 0200 mov.w r2, #0 80169d8: f8c3 2154 str.w r2, [r3, #340] @ 0x154 Motor2.PiSpd.Out = 0.0f; 80169dc: 4b04 ldr r3, [pc, #16] @ (80169f0 ) 80169de: f04f 0200 mov.w r2, #0 80169e2: f8c3 2158 str.w r2, [r3, #344] @ 0x158 } 80169e6: bf00 nop 80169e8: 46bd mov sp, r7 80169ea: f85d 7b04 ldr.w r7, [sp], #4 80169ee: 4770 bx lr 80169f0: 20000704 .word 0x20000704 80169f4: 20000400 .word 0x20000400 080169f8 : inline void Motor1Ctrl_PwmStart(void) { 80169f8: b580 push {r7, lr} 80169fa: af00 add r7, sp, #0 switch(WP_Ctrl.Motor1Pwm&0x01) 80169fc: 4b15 ldr r3, [pc, #84] @ (8016a54 ) 80169fe: 79db ldrb r3, [r3, #7] 8016a00: f003 0301 and.w r3, r3, #1 8016a04: 2b00 cmp r3, #0 8016a06: d11f bne.n 8016a48 { case 0: HAL_TIM_PWM_Start_IT(&htim1, TIM_CHANNEL_1); 8016a08: 2100 movs r1, #0 8016a0a: 4813 ldr r0, [pc, #76] @ (8016a58 ) 8016a0c: f00f fb76 bl 80260fc HAL_TIM_PWM_Start_IT(&htim1, TIM_CHANNEL_2); 8016a10: 2104 movs r1, #4 8016a12: 4811 ldr r0, [pc, #68] @ (8016a58 ) 8016a14: f00f fb72 bl 80260fc HAL_TIM_PWM_Start_IT(&htim1, TIM_CHANNEL_3); 8016a18: 2108 movs r1, #8 8016a1a: 480f ldr r0, [pc, #60] @ (8016a58 ) 8016a1c: f00f fb6e bl 80260fc HAL_TIMEx_PWMN_Start_IT(&htim1, TIM_CHANNEL_1); 8016a20: 2100 movs r1, #0 8016a22: 480d ldr r0, [pc, #52] @ (8016a58 ) 8016a24: f010 fba4 bl 8027170 HAL_TIMEx_PWMN_Start_IT(&htim1, TIM_CHANNEL_2); 8016a28: 2104 movs r1, #4 8016a2a: 480b ldr r0, [pc, #44] @ (8016a58 ) 8016a2c: f010 fba0 bl 8027170 HAL_TIMEx_PWMN_Start_IT(&htim1, TIM_CHANNEL_3); 8016a30: 2108 movs r1, #8 8016a32: 4809 ldr r0, [pc, #36] @ (8016a58 ) 8016a34: f010 fb9c bl 8027170 WP_Ctrl.Motor1Pwm |= 0x01; 8016a38: 4b06 ldr r3, [pc, #24] @ (8016a54 ) 8016a3a: 79db ldrb r3, [r3, #7] 8016a3c: f043 0301 orr.w r3, r3, #1 8016a40: b2da uxtb r2, r3 8016a42: 4b04 ldr r3, [pc, #16] @ (8016a54 ) 8016a44: 71da strb r2, [r3, #7] break; 8016a46: e003 b.n 8016a50 default: WP_Ctrl.Motor1Pwm = 0x01; 8016a48: 4b02 ldr r3, [pc, #8] @ (8016a54 ) 8016a4a: 2201 movs r2, #1 8016a4c: 71da strb r2, [r3, #7] break; 8016a4e: bf00 nop } } 8016a50: bf00 nop 8016a52: bd80 pop {r7, pc} 8016a54: 200003ac .word 0x200003ac 8016a58: 20000d68 .word 0x20000d68 08016a5c : inline void Motor2Ctrl_PwmStart(void) { 8016a5c: b580 push {r7, lr} 8016a5e: af00 add r7, sp, #0 switch(WP_Ctrl.Motor2Pwm&0x01) 8016a60: 4b15 ldr r3, [pc, #84] @ (8016ab8 ) 8016a62: 7a1b ldrb r3, [r3, #8] 8016a64: f003 0301 and.w r3, r3, #1 8016a68: 2b00 cmp r3, #0 8016a6a: d11f bne.n 8016aac { case 0: HAL_TIM_PWM_Start_IT(&htim8, TIM_CHANNEL_1); 8016a6c: 2100 movs r1, #0 8016a6e: 4813 ldr r0, [pc, #76] @ (8016abc ) 8016a70: f00f fb44 bl 80260fc HAL_TIM_PWM_Start_IT(&htim8, TIM_CHANNEL_2); 8016a74: 2104 movs r1, #4 8016a76: 4811 ldr r0, [pc, #68] @ (8016abc ) 8016a78: f00f fb40 bl 80260fc HAL_TIM_PWM_Start_IT(&htim8, TIM_CHANNEL_3); 8016a7c: 2108 movs r1, #8 8016a7e: 480f ldr r0, [pc, #60] @ (8016abc ) 8016a80: f00f fb3c bl 80260fc HAL_TIMEx_PWMN_Start_IT(&htim8, TIM_CHANNEL_1); 8016a84: 2100 movs r1, #0 8016a86: 480d ldr r0, [pc, #52] @ (8016abc ) 8016a88: f010 fb72 bl 8027170 HAL_TIMEx_PWMN_Start_IT(&htim8, TIM_CHANNEL_2); 8016a8c: 2104 movs r1, #4 8016a8e: 480b ldr r0, [pc, #44] @ (8016abc ) 8016a90: f010 fb6e bl 8027170 HAL_TIMEx_PWMN_Start_IT(&htim8, TIM_CHANNEL_3); 8016a94: 2108 movs r1, #8 8016a96: 4809 ldr r0, [pc, #36] @ (8016abc ) 8016a98: f010 fb6a bl 8027170 WP_Ctrl.Motor2Pwm |= 0x01; 8016a9c: 4b06 ldr r3, [pc, #24] @ (8016ab8 ) 8016a9e: 7a1b ldrb r3, [r3, #8] 8016aa0: f043 0301 orr.w r3, r3, #1 8016aa4: b2da uxtb r2, r3 8016aa6: 4b04 ldr r3, [pc, #16] @ (8016ab8 ) 8016aa8: 721a strb r2, [r3, #8] break; 8016aaa: e003 b.n 8016ab4 default: WP_Ctrl.Motor2Pwm = 0x01; 8016aac: 4b02 ldr r3, [pc, #8] @ (8016ab8 ) 8016aae: 2201 movs r2, #1 8016ab0: 721a strb r2, [r3, #8] break; 8016ab2: bf00 nop } } 8016ab4: bf00 nop 8016ab6: bd80 pop {r7, pc} 8016ab8: 200003ac .word 0x200003ac 8016abc: 20000e88 .word 0x20000e88 08016ac0 : /* ************************************************************************************ * Motor Control Basic API * * ************************************************************************************/ inline void WP_ClarkeParkTrans(WP_Motor3PhaseTypeDef *_3, WP_MotorDQTypeDef *s, WP_MotorDQTypeDef *e, WP_MotorAngleTypeDef *Angle) { 8016ac0: b480 push {r7} 8016ac2: b085 sub sp, #20 8016ac4: af00 add r7, sp, #0 8016ac6: 60f8 str r0, [r7, #12] 8016ac8: 60b9 str r1, [r7, #8] 8016aca: 607a str r2, [r7, #4] 8016acc: 603b str r3, [r7, #0] // use to match q axis to a phase, abc -> dq s->d = _3->U; 8016ace: 68fb ldr r3, [r7, #12] 8016ad0: 681a ldr r2, [r3, #0] 8016ad2: 68bb ldr r3, [r7, #8] 8016ad4: 601a str r2, [r3, #0] s->q = MT_1_OVR_SQ3*(_3->V - _3->W); 8016ad6: 68fb ldr r3, [r7, #12] 8016ad8: ed93 7a01 vldr s14, [r3, #4] 8016adc: 68fb ldr r3, [r7, #12] 8016ade: edd3 7a02 vldr s15, [r3, #8] 8016ae2: ee77 7a67 vsub.f32 s15, s14, s15 8016ae6: ed9f 7a1b vldr s14, [pc, #108] @ 8016b54 8016aea: ee67 7a87 vmul.f32 s15, s15, s14 8016aee: 68bb ldr r3, [r7, #8] 8016af0: edc3 7a01 vstr s15, [r3, #4] // abc -> d-q axis : PARK transform e->d = s->q * Angle->Tr_Sin + s->d * Angle->Tr_Cos; 8016af4: 68bb ldr r3, [r7, #8] 8016af6: ed93 7a01 vldr s14, [r3, #4] 8016afa: 683b ldr r3, [r7, #0] 8016afc: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8016b00: ee27 7a27 vmul.f32 s14, s14, s15 8016b04: 68bb ldr r3, [r7, #8] 8016b06: edd3 6a00 vldr s13, [r3] 8016b0a: 683b ldr r3, [r7, #0] 8016b0c: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016b10: ee66 7aa7 vmul.f32 s15, s13, s15 8016b14: ee77 7a27 vadd.f32 s15, s14, s15 8016b18: 687b ldr r3, [r7, #4] 8016b1a: edc3 7a00 vstr s15, [r3] e->q = s->q * Angle->Tr_Cos - s->d * Angle->Tr_Sin; 8016b1e: 68bb ldr r3, [r7, #8] 8016b20: ed93 7a01 vldr s14, [r3, #4] 8016b24: 683b ldr r3, [r7, #0] 8016b26: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016b2a: ee27 7a27 vmul.f32 s14, s14, s15 8016b2e: 68bb ldr r3, [r7, #8] 8016b30: edd3 6a00 vldr s13, [r3] 8016b34: 683b ldr r3, [r7, #0] 8016b36: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8016b3a: ee66 7aa7 vmul.f32 s15, s13, s15 8016b3e: ee77 7a67 vsub.f32 s15, s14, s15 8016b42: 687b ldr r3, [r7, #4] 8016b44: edc3 7a01 vstr s15, [r3, #4] // ids = ias; // iqs = ONE_SQRT3*(ibs - ics); // ide = iqs*Sin + ids*Cos; // iqe = iqs*Cos - ids*Sin; } 8016b48: bf00 nop 8016b4a: 3714 adds r7, #20 8016b4c: 46bd mov sp, r7 8016b4e: f85d 7b04 ldr.w r7, [sp], #4 8016b52: 4770 bx lr 8016b54: 3f13cd3a .word 0x3f13cd3a 08016b58 : inline void WP_InvClarkeParkTrans(WP_Motor3PhaseTypeDef *_3, WP_MotorDQTypeDef *s, WP_MotorDQTypeDef *e, WP_MotorAngleTypeDef *Angle) { 8016b58: b480 push {r7} 8016b5a: b085 sub sp, #20 8016b5c: af00 add r7, sp, #0 8016b5e: 60f8 str r0, [r7, #12] 8016b60: 60b9 str r1, [r7, #8] 8016b62: 607a str r2, [r7, #4] 8016b64: 603b str r3, [r7, #0] // dq axis ->UVW axis : IPARK transform s->d = -e->q * Angle->Tr_Sin + e->d * Angle->Tr_Cos; 8016b66: 687b ldr r3, [r7, #4] 8016b68: edd3 7a01 vldr s15, [r3, #4] 8016b6c: eeb1 7a67 vneg.f32 s14, s15 8016b70: 683b ldr r3, [r7, #0] 8016b72: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8016b76: ee27 7a27 vmul.f32 s14, s14, s15 8016b7a: 687b ldr r3, [r7, #4] 8016b7c: edd3 6a00 vldr s13, [r3] 8016b80: 683b ldr r3, [r7, #0] 8016b82: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016b86: ee66 7aa7 vmul.f32 s15, s13, s15 8016b8a: ee77 7a27 vadd.f32 s15, s14, s15 8016b8e: 68bb ldr r3, [r7, #8] 8016b90: edc3 7a00 vstr s15, [r3] s->q = e->q * Angle->Tr_Cos + e->d * Angle->Tr_Sin; 8016b94: 687b ldr r3, [r7, #4] 8016b96: ed93 7a01 vldr s14, [r3, #4] 8016b9a: 683b ldr r3, [r7, #0] 8016b9c: edd3 7a16 vldr s15, [r3, #88] @ 0x58 8016ba0: ee27 7a27 vmul.f32 s14, s14, s15 8016ba4: 687b ldr r3, [r7, #4] 8016ba6: edd3 6a00 vldr s13, [r3] 8016baa: 683b ldr r3, [r7, #0] 8016bac: edd3 7a15 vldr s15, [r3, #84] @ 0x54 8016bb0: ee66 7aa7 vmul.f32 s15, s13, s15 8016bb4: ee77 7a27 vadd.f32 s15, s14, s15 8016bb8: 68bb ldr r3, [r7, #8] 8016bba: edc3 7a01 vstr s15, [r3, #4] // SPACE Vector PWM _3->U = s->d; 8016bbe: 68bb ldr r3, [r7, #8] 8016bc0: 681a ldr r2, [r3, #0] 8016bc2: 68fb ldr r3, [r7, #12] 8016bc4: 601a str r2, [r3, #0] _3->V = -MT_1_OVR_2 * s->d + MT_SQ3_OVR_2 * s->q; 8016bc6: 68bb ldr r3, [r7, #8] 8016bc8: edd3 7a00 vldr s15, [r3] 8016bcc: eebe 7a00 vmov.f32 s14, #224 @ 0xbf000000 -0.5 8016bd0: ee27 7a87 vmul.f32 s14, s15, s14 8016bd4: 68bb ldr r3, [r7, #8] 8016bd6: edd3 7a01 vldr s15, [r3, #4] 8016bda: eddf 6a11 vldr s13, [pc, #68] @ 8016c20 8016bde: ee67 7aa6 vmul.f32 s15, s15, s13 8016be2: ee77 7a27 vadd.f32 s15, s14, s15 8016be6: 68fb ldr r3, [r7, #12] 8016be8: edc3 7a01 vstr s15, [r3, #4] _3->W = -MT_1_OVR_2 * s->d - MT_SQ3_OVR_2 * s->q; 8016bec: 68bb ldr r3, [r7, #8] 8016bee: edd3 7a00 vldr s15, [r3] 8016bf2: eebe 7a00 vmov.f32 s14, #224 @ 0xbf000000 -0.5 8016bf6: ee27 7a87 vmul.f32 s14, s15, s14 8016bfa: 68bb ldr r3, [r7, #8] 8016bfc: edd3 7a01 vldr s15, [r3, #4] 8016c00: eddf 6a07 vldr s13, [pc, #28] @ 8016c20 8016c04: ee67 7aa6 vmul.f32 s15, s15, s13 8016c08: ee77 7a67 vsub.f32 s15, s14, s15 8016c0c: 68fb ldr r3, [r7, #12] 8016c0e: edc3 7a02 vstr s15, [r3, #8] // vdsRef = -vqeOut*Sin+ vdeOut*Cos; // vqsRef = vqeOut*Cos+ vdeOut*Sin; // vasRef = vdsRef; // vbsRef = -HALF*vdsRef + SQRT3_TWO*vqsRef; // vcsRef = -HALF*vdsRef - SQRT3_TWO*vqsRef; } 8016c12: bf00 nop 8016c14: 3714 adds r7, #20 8016c16: 46bd mov sp, r7 8016c18: f85d 7b04 ldr.w r7, [sp], #4 8016c1c: 4770 bx lr 8016c1e: bf00 nop 8016c20: 3f5db3d7 .word 0x3f5db3d7 08016c24 : inline void WP_InvMinMax(WP_Motor3PhaseTypeDef *_3in, WP_Motor3PhaseTypeDef *_3out, float Vlim) { 8016c24: b480 push {r7} 8016c26: b087 sub sp, #28 8016c28: af00 add r7, sp, #0 8016c2a: 60f8 str r0, [r7, #12] 8016c2c: 60b9 str r1, [r7, #8] 8016c2e: ed87 0a01 vstr s0, [r7, #4] float a, b; a = _3in->W - _3in->U; 8016c32: 68fb ldr r3, [r7, #12] 8016c34: ed93 7a02 vldr s14, [r3, #8] 8016c38: 68fb ldr r3, [r7, #12] 8016c3a: edd3 7a00 vldr s15, [r3] 8016c3e: ee77 7a67 vsub.f32 s15, s14, s15 8016c42: edc7 7a05 vstr s15, [r7, #20] b = ( (_3in->U - _3in->V) * a > 0 ) ? ( _3in->U ): ( (_3in->V - _3in->W) * a >=0 ? _3in->W : _3in->V ); 8016c46: 68fb ldr r3, [r7, #12] 8016c48: ed93 7a00 vldr s14, [r3] 8016c4c: 68fb ldr r3, [r7, #12] 8016c4e: edd3 7a01 vldr s15, [r3, #4] 8016c52: ee37 7a67 vsub.f32 s14, s14, s15 8016c56: edd7 7a05 vldr s15, [r7, #20] 8016c5a: ee67 7a27 vmul.f32 s15, s14, s15 8016c5e: eef5 7ac0 vcmpe.f32 s15, #0.0 8016c62: eef1 fa10 vmrs APSR_nzcv, fpscr 8016c66: dd02 ble.n 8016c6e 8016c68: 68fb ldr r3, [r7, #12] 8016c6a: 681b ldr r3, [r3, #0] 8016c6c: e015 b.n 8016c9a 8016c6e: 68fb ldr r3, [r7, #12] 8016c70: ed93 7a01 vldr s14, [r3, #4] 8016c74: 68fb ldr r3, [r7, #12] 8016c76: edd3 7a02 vldr s15, [r3, #8] 8016c7a: ee37 7a67 vsub.f32 s14, s14, s15 8016c7e: edd7 7a05 vldr s15, [r7, #20] 8016c82: ee67 7a27 vmul.f32 s15, s14, s15 8016c86: eef5 7ac0 vcmpe.f32 s15, #0.0 8016c8a: eef1 fa10 vmrs APSR_nzcv, fpscr 8016c8e: db02 blt.n 8016c96 8016c90: 68fb ldr r3, [r7, #12] 8016c92: 689b ldr r3, [r3, #8] 8016c94: e001 b.n 8016c9a 8016c96: 68fb ldr r3, [r7, #12] 8016c98: 685b ldr r3, [r3, #4] 8016c9a: 613b str r3, [r7, #16] b = b * 0.5f; 8016c9c: edd7 7a04 vldr s15, [r7, #16] 8016ca0: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 8016ca4: ee67 7a87 vmul.f32 s15, s15, s14 8016ca8: edc7 7a04 vstr s15, [r7, #16] _3out->U = _3in->U + b; 8016cac: 68fb ldr r3, [r7, #12] 8016cae: ed93 7a00 vldr s14, [r3] 8016cb2: edd7 7a04 vldr s15, [r7, #16] 8016cb6: ee77 7a27 vadd.f32 s15, s14, s15 8016cba: 68bb ldr r3, [r7, #8] 8016cbc: edc3 7a00 vstr s15, [r3] _3out->V = _3in->V + b; 8016cc0: 68fb ldr r3, [r7, #12] 8016cc2: ed93 7a01 vldr s14, [r3, #4] 8016cc6: edd7 7a04 vldr s15, [r7, #16] 8016cca: ee77 7a27 vadd.f32 s15, s14, s15 8016cce: 68bb ldr r3, [r7, #8] 8016cd0: edc3 7a01 vstr s15, [r3, #4] _3out->W = _3in->W + b; 8016cd4: 68fb ldr r3, [r7, #12] 8016cd6: ed93 7a02 vldr s14, [r3, #8] 8016cda: edd7 7a04 vldr s15, [r7, #16] 8016cde: ee77 7a27 vadd.f32 s15, s14, s15 8016ce2: 68bb ldr r3, [r7, #8] 8016ce4: edc3 7a02 vstr s15, [r3, #8] _3out->U = SAT(_3out->U, Vlim); 8016ce8: 68bb ldr r3, [r7, #8] 8016cea: edd3 7a00 vldr s15, [r3] 8016cee: ed97 7a01 vldr s14, [r7, #4] 8016cf2: eeb4 7ae7 vcmpe.f32 s14, s15 8016cf6: eef1 fa10 vmrs APSR_nzcv, fpscr 8016cfa: d502 bpl.n 8016d02 8016cfc: edd7 7a01 vldr s15, [r7, #4] 8016d00: e013 b.n 8016d2a 8016d02: 68bb ldr r3, [r7, #8] 8016d04: ed93 7a00 vldr s14, [r3] 8016d08: edd7 7a01 vldr s15, [r7, #4] 8016d0c: eef1 7a67 vneg.f32 s15, s15 8016d10: eeb4 7ae7 vcmpe.f32 s14, s15 8016d14: eef1 fa10 vmrs APSR_nzcv, fpscr 8016d18: d504 bpl.n 8016d24 8016d1a: edd7 7a01 vldr s15, [r7, #4] 8016d1e: eef1 7a67 vneg.f32 s15, s15 8016d22: e002 b.n 8016d2a 8016d24: 68bb ldr r3, [r7, #8] 8016d26: edd3 7a00 vldr s15, [r3] 8016d2a: 68bb ldr r3, [r7, #8] 8016d2c: edc3 7a00 vstr s15, [r3] _3out->V = SAT(_3out->V, Vlim); 8016d30: 68bb ldr r3, [r7, #8] 8016d32: edd3 7a01 vldr s15, [r3, #4] 8016d36: ed97 7a01 vldr s14, [r7, #4] 8016d3a: eeb4 7ae7 vcmpe.f32 s14, s15 8016d3e: eef1 fa10 vmrs APSR_nzcv, fpscr 8016d42: d502 bpl.n 8016d4a 8016d44: edd7 7a01 vldr s15, [r7, #4] 8016d48: e013 b.n 8016d72 8016d4a: 68bb ldr r3, [r7, #8] 8016d4c: ed93 7a01 vldr s14, [r3, #4] 8016d50: edd7 7a01 vldr s15, [r7, #4] 8016d54: eef1 7a67 vneg.f32 s15, s15 8016d58: eeb4 7ae7 vcmpe.f32 s14, s15 8016d5c: eef1 fa10 vmrs APSR_nzcv, fpscr 8016d60: d504 bpl.n 8016d6c 8016d62: edd7 7a01 vldr s15, [r7, #4] 8016d66: eef1 7a67 vneg.f32 s15, s15 8016d6a: e002 b.n 8016d72 8016d6c: 68bb ldr r3, [r7, #8] 8016d6e: edd3 7a01 vldr s15, [r3, #4] 8016d72: 68bb ldr r3, [r7, #8] 8016d74: edc3 7a01 vstr s15, [r3, #4] _3out->W = SAT(_3out->W, Vlim); 8016d78: 68bb ldr r3, [r7, #8] 8016d7a: edd3 7a02 vldr s15, [r3, #8] 8016d7e: ed97 7a01 vldr s14, [r7, #4] 8016d82: eeb4 7ae7 vcmpe.f32 s14, s15 8016d86: eef1 fa10 vmrs APSR_nzcv, fpscr 8016d8a: d502 bpl.n 8016d92 8016d8c: edd7 7a01 vldr s15, [r7, #4] 8016d90: e013 b.n 8016dba 8016d92: 68bb ldr r3, [r7, #8] 8016d94: ed93 7a02 vldr s14, [r3, #8] 8016d98: edd7 7a01 vldr s15, [r7, #4] 8016d9c: eef1 7a67 vneg.f32 s15, s15 8016da0: eeb4 7ae7 vcmpe.f32 s14, s15 8016da4: eef1 fa10 vmrs APSR_nzcv, fpscr 8016da8: d504 bpl.n 8016db4 8016daa: edd7 7a01 vldr s15, [r7, #4] 8016dae: eef1 7a67 vneg.f32 s15, s15 8016db2: e002 b.n 8016dba 8016db4: 68bb ldr r3, [r7, #8] 8016db6: edd3 7a02 vldr s15, [r3, #8] 8016dba: 68bb ldr r3, [r7, #8] 8016dbc: edc3 7a02 vstr s15, [r3, #8] } 8016dc0: bf00 nop 8016dc2: 371c adds r7, #28 8016dc4: 46bd mov sp, r7 8016dc6: f85d 7b04 ldr.w r7, [sp], #4 8016dca: 4770 bx lr 08016dcc : _3V->W = SAT(_3V->W, Vlim); } inline float WP_PIcontrol(float Cmd, float Fedb, WP_PITypeDef *PiCur, WP_GainTypeDef *Gain, float VRefLim) { 8016dcc: b480 push {r7} 8016dce: b087 sub sp, #28 8016dd0: af00 add r7, sp, #0 8016dd2: ed87 0a05 vstr s0, [r7, #20] 8016dd6: edc7 0a04 vstr s1, [r7, #16] 8016dda: 60f8 str r0, [r7, #12] 8016ddc: 60b9 str r1, [r7, #8] 8016dde: ed87 1a01 vstr s2, [r7, #4] PiCur->Err = Cmd - Fedb; 8016de2: ed97 7a05 vldr s14, [r7, #20] 8016de6: edd7 7a04 vldr s15, [r7, #16] 8016dea: ee77 7a67 vsub.f32 s15, s14, s15 8016dee: 68fb ldr r3, [r7, #12] 8016df0: edc3 7a00 vstr s15, [r3] PiCur->Pterm = Gain->Kp * PiCur->Err;// Kp*e(k) 8016df4: 68bb ldr r3, [r7, #8] 8016df6: ed93 7a00 vldr s14, [r3] 8016dfa: 68fb ldr r3, [r7, #12] 8016dfc: edd3 7a00 vldr s15, [r3] 8016e00: ee67 7a27 vmul.f32 s15, s14, s15 8016e04: 68fb ldr r3, [r7, #12] 8016e06: edc3 7a01 vstr s15, [r3, #4] PiCur->PIterm = PiCur->Pterm + Gain->Ki*(PiCur->Err - PiCur->AW * Gain->Kaw) + PiCur->Iterm + PiCur->Ff; //piout=Ki*e(k)+x(k-1)+Kp*e(k) 8016e0a: 68fb ldr r3, [r7, #12] 8016e0c: ed93 7a01 vldr s14, [r3, #4] 8016e10: 68bb ldr r3, [r7, #8] 8016e12: edd3 6a01 vldr s13, [r3, #4] 8016e16: 68fb ldr r3, [r7, #12] 8016e18: ed93 6a00 vldr s12, [r3] 8016e1c: 68fb ldr r3, [r7, #12] 8016e1e: edd3 5a06 vldr s11, [r3, #24] 8016e22: 68bb ldr r3, [r7, #8] 8016e24: edd3 7a02 vldr s15, [r3, #8] 8016e28: ee65 7aa7 vmul.f32 s15, s11, s15 8016e2c: ee76 7a67 vsub.f32 s15, s12, s15 8016e30: ee66 7aa7 vmul.f32 s15, s13, s15 8016e34: ee37 7a27 vadd.f32 s14, s14, s15 8016e38: 68fb ldr r3, [r7, #12] 8016e3a: edd3 7a02 vldr s15, [r3, #8] 8016e3e: ee37 7a27 vadd.f32 s14, s14, s15 8016e42: 68fb ldr r3, [r7, #12] 8016e44: edd3 7a05 vldr s15, [r3, #20] 8016e48: ee77 7a27 vadd.f32 s15, s14, s15 8016e4c: 68fb ldr r3, [r7, #12] 8016e4e: edc3 7a04 vstr s15, [r3, #16] PiCur->Out = SAT(PiCur->PIterm, VRefLim); 8016e52: 68fb ldr r3, [r7, #12] 8016e54: edd3 7a04 vldr s15, [r3, #16] 8016e58: ed97 7a01 vldr s14, [r7, #4] 8016e5c: eeb4 7ae7 vcmpe.f32 s14, s15 8016e60: eef1 fa10 vmrs APSR_nzcv, fpscr 8016e64: d502 bpl.n 8016e6c 8016e66: edd7 7a01 vldr s15, [r7, #4] 8016e6a: e013 b.n 8016e94 8016e6c: 68fb ldr r3, [r7, #12] 8016e6e: ed93 7a04 vldr s14, [r3, #16] 8016e72: edd7 7a01 vldr s15, [r7, #4] 8016e76: eef1 7a67 vneg.f32 s15, s15 8016e7a: eeb4 7ae7 vcmpe.f32 s14, s15 8016e7e: eef1 fa10 vmrs APSR_nzcv, fpscr 8016e82: d504 bpl.n 8016e8e 8016e84: edd7 7a01 vldr s15, [r7, #4] 8016e88: eef1 7a67 vneg.f32 s15, s15 8016e8c: e002 b.n 8016e94 8016e8e: 68fb ldr r3, [r7, #12] 8016e90: edd3 7a04 vldr s15, [r3, #16] 8016e94: 68fb ldr r3, [r7, #12] 8016e96: edc3 7a07 vstr s15, [r3, #28] PiCur->Iterm += Gain->Ki * (PiCur->Err - PiCur->AW * Gain->Kaw); //x(k)=x(k-1)+Ki*e(k) 8016e9a: 68fb ldr r3, [r7, #12] 8016e9c: ed93 7a02 vldr s14, [r3, #8] 8016ea0: 68bb ldr r3, [r7, #8] 8016ea2: edd3 6a01 vldr s13, [r3, #4] 8016ea6: 68fb ldr r3, [r7, #12] 8016ea8: ed93 6a00 vldr s12, [r3] 8016eac: 68fb ldr r3, [r7, #12] 8016eae: edd3 5a06 vldr s11, [r3, #24] 8016eb2: 68bb ldr r3, [r7, #8] 8016eb4: edd3 7a02 vldr s15, [r3, #8] 8016eb8: ee65 7aa7 vmul.f32 s15, s11, s15 8016ebc: ee76 7a67 vsub.f32 s15, s12, s15 8016ec0: ee66 7aa7 vmul.f32 s15, s13, s15 8016ec4: ee77 7a27 vadd.f32 s15, s14, s15 8016ec8: 68fb ldr r3, [r7, #12] 8016eca: edc3 7a02 vstr s15, [r3, #8] PiCur->Iterm = SAT(PiCur->Iterm, VRefLim); 8016ece: 68fb ldr r3, [r7, #12] 8016ed0: edd3 7a02 vldr s15, [r3, #8] 8016ed4: ed97 7a01 vldr s14, [r7, #4] 8016ed8: eeb4 7ae7 vcmpe.f32 s14, s15 8016edc: eef1 fa10 vmrs APSR_nzcv, fpscr 8016ee0: d502 bpl.n 8016ee8 8016ee2: edd7 7a01 vldr s15, [r7, #4] 8016ee6: e013 b.n 8016f10 8016ee8: 68fb ldr r3, [r7, #12] 8016eea: ed93 7a02 vldr s14, [r3, #8] 8016eee: edd7 7a01 vldr s15, [r7, #4] 8016ef2: eef1 7a67 vneg.f32 s15, s15 8016ef6: eeb4 7ae7 vcmpe.f32 s14, s15 8016efa: eef1 fa10 vmrs APSR_nzcv, fpscr 8016efe: d504 bpl.n 8016f0a 8016f00: edd7 7a01 vldr s15, [r7, #4] 8016f04: eef1 7a67 vneg.f32 s15, s15 8016f08: e002 b.n 8016f10 8016f0a: 68fb ldr r3, [r7, #12] 8016f0c: edd3 7a02 vldr s15, [r3, #8] 8016f10: 68fb ldr r3, [r7, #12] 8016f12: edc3 7a02 vstr s15, [r3, #8] return PiCur->Out; 8016f16: 68fb ldr r3, [r7, #12] 8016f18: 69db ldr r3, [r3, #28] 8016f1a: ee07 3a90 vmov s15, r3 } 8016f1e: eeb0 0a67 vmov.f32 s0, s15 8016f22: 371c adds r7, #28 8016f24: 46bd mov sp, r7 8016f26: f85d 7b04 ldr.w r7, [sp], #4 8016f2a: 4770 bx lr 08016f2c : // return PiCur->Out; //} /////somebp 2024.02.02 inline float WP_PIcontrolForFieldWeak(float Cmd, float Fedb, WP_PITypeDef *PiCur, WP_GainTypeDef *Gain, float VRefLim) { 8016f2c: b480 push {r7} 8016f2e: b087 sub sp, #28 8016f30: af00 add r7, sp, #0 8016f32: ed87 0a05 vstr s0, [r7, #20] 8016f36: edc7 0a04 vstr s1, [r7, #16] 8016f3a: 60f8 str r0, [r7, #12] 8016f3c: 60b9 str r1, [r7, #8] 8016f3e: ed87 1a01 vstr s2, [r7, #4] PiCur->Err = Cmd - Fedb; 8016f42: ed97 7a05 vldr s14, [r7, #20] 8016f46: edd7 7a04 vldr s15, [r7, #16] 8016f4a: ee77 7a67 vsub.f32 s15, s14, s15 8016f4e: 68fb ldr r3, [r7, #12] 8016f50: edc3 7a00 vstr s15, [r3] PiCur->Pterm = Gain->Kp * PiCur->Err;// Kp*e(k) 8016f54: 68bb ldr r3, [r7, #8] 8016f56: ed93 7a00 vldr s14, [r3] 8016f5a: 68fb ldr r3, [r7, #12] 8016f5c: edd3 7a00 vldr s15, [r3] 8016f60: ee67 7a27 vmul.f32 s15, s14, s15 8016f64: 68fb ldr r3, [r7, #12] 8016f66: edc3 7a01 vstr s15, [r3, #4] PiCur->PIterm = PiCur->Pterm + Gain->Ki*(PiCur->Err) + PiCur->Iterm; //piout=Ki*e(k)+x(k-1)+Kp*e(k) 8016f6a: 68fb ldr r3, [r7, #12] 8016f6c: ed93 7a01 vldr s14, [r3, #4] 8016f70: 68bb ldr r3, [r7, #8] 8016f72: edd3 6a01 vldr s13, [r3, #4] 8016f76: 68fb ldr r3, [r7, #12] 8016f78: edd3 7a00 vldr s15, [r3] 8016f7c: ee66 7aa7 vmul.f32 s15, s13, s15 8016f80: ee37 7a27 vadd.f32 s14, s14, s15 8016f84: 68fb ldr r3, [r7, #12] 8016f86: edd3 7a02 vldr s15, [r3, #8] 8016f8a: ee77 7a27 vadd.f32 s15, s14, s15 8016f8e: 68fb ldr r3, [r7, #12] 8016f90: edc3 7a04 vstr s15, [r3, #16] PiCur->Out = SAT_Fw(PiCur->PIterm, VRefLim); 8016f94: 68fb ldr r3, [r7, #12] 8016f96: edd3 7a04 vldr s15, [r3, #16] 8016f9a: eef5 7ac0 vcmpe.f32 s15, #0.0 8016f9e: eef1 fa10 vmrs APSR_nzcv, fpscr 8016fa2: db02 blt.n 8016faa 8016fa4: eddf 7a2b vldr s15, [pc, #172] @ 8017054 8016fa8: e013 b.n 8016fd2 8016faa: 68fb ldr r3, [r7, #12] 8016fac: ed93 7a04 vldr s14, [r3, #16] 8016fb0: edd7 7a01 vldr s15, [r7, #4] 8016fb4: eef1 7a67 vneg.f32 s15, s15 8016fb8: eeb4 7ae7 vcmpe.f32 s14, s15 8016fbc: eef1 fa10 vmrs APSR_nzcv, fpscr 8016fc0: d504 bpl.n 8016fcc 8016fc2: edd7 7a01 vldr s15, [r7, #4] 8016fc6: eef1 7a67 vneg.f32 s15, s15 8016fca: e002 b.n 8016fd2 8016fcc: 68fb ldr r3, [r7, #12] 8016fce: edd3 7a04 vldr s15, [r3, #16] 8016fd2: 68fb ldr r3, [r7, #12] 8016fd4: edc3 7a07 vstr s15, [r3, #28] PiCur->Iterm += Gain->Ki * (PiCur->Err); //x(k)=x(k-1)+Ki*e(k) 8016fd8: 68fb ldr r3, [r7, #12] 8016fda: ed93 7a02 vldr s14, [r3, #8] 8016fde: 68bb ldr r3, [r7, #8] 8016fe0: edd3 6a01 vldr s13, [r3, #4] 8016fe4: 68fb ldr r3, [r7, #12] 8016fe6: edd3 7a00 vldr s15, [r3] 8016fea: ee66 7aa7 vmul.f32 s15, s13, s15 8016fee: ee77 7a27 vadd.f32 s15, s14, s15 8016ff2: 68fb ldr r3, [r7, #12] 8016ff4: edc3 7a02 vstr s15, [r3, #8] PiCur->Iterm = SAT_Fw(PiCur->Iterm, VRefLim); 8016ff8: 68fb ldr r3, [r7, #12] 8016ffa: edd3 7a02 vldr s15, [r3, #8] 8016ffe: eef5 7ac0 vcmpe.f32 s15, #0.0 8017002: eef1 fa10 vmrs APSR_nzcv, fpscr 8017006: db02 blt.n 801700e 8017008: eddf 7a12 vldr s15, [pc, #72] @ 8017054 801700c: e013 b.n 8017036 801700e: 68fb ldr r3, [r7, #12] 8017010: ed93 7a02 vldr s14, [r3, #8] 8017014: edd7 7a01 vldr s15, [r7, #4] 8017018: eef1 7a67 vneg.f32 s15, s15 801701c: eeb4 7ae7 vcmpe.f32 s14, s15 8017020: eef1 fa10 vmrs APSR_nzcv, fpscr 8017024: d504 bpl.n 8017030 8017026: edd7 7a01 vldr s15, [r7, #4] 801702a: eef1 7a67 vneg.f32 s15, s15 801702e: e002 b.n 8017036 8017030: 68fb ldr r3, [r7, #12] 8017032: edd3 7a02 vldr s15, [r3, #8] 8017036: 68fb ldr r3, [r7, #12] 8017038: edc3 7a02 vstr s15, [r3, #8] return PiCur->Out; 801703c: 68fb ldr r3, [r7, #12] 801703e: 69db ldr r3, [r3, #28] 8017040: ee07 3a90 vmov s15, r3 } 8017044: eeb0 0a67 vmov.f32 s0, s15 8017048: 371c adds r7, #28 801704a: 46bd mov sp, r7 801704c: f85d 7b04 ldr.w r7, [sp], #4 8017050: 4770 bx lr 8017052: bf00 nop 8017054: 00000000 .word 0x00000000 08017058 : inline void WP_PwmScale(uint32_t* Duty, WP_Motor3PhaseTypeDef *_3V, float *Rt, WP_InverterTypeDef *inv) { 8017058: b480 push {r7} 801705a: b089 sub sp, #36 @ 0x24 801705c: af00 add r7, sp, #0 801705e: 60f8 str r0, [r7, #12] 8017060: 60b9 str r1, [r7, #8] 8017062: 607a str r2, [r7, #4] 8017064: 603b str r3, [r7, #0] float Du[3]; *(Rt) = _3V->U * inv->Ctrl._Vdc_2; 8017066: 68bb ldr r3, [r7, #8] 8017068: ed93 7a00 vldr s14, [r3] 801706c: 683b ldr r3, [r7, #0] 801706e: edd3 7a05 vldr s15, [r3, #20] 8017072: ee67 7a27 vmul.f32 s15, s14, s15 8017076: 687b ldr r3, [r7, #4] 8017078: edc3 7a00 vstr s15, [r3] *(Rt+1) = _3V->V * inv->Ctrl._Vdc_2; 801707c: 68bb ldr r3, [r7, #8] 801707e: ed93 7a01 vldr s14, [r3, #4] 8017082: 683b ldr r3, [r7, #0] 8017084: edd3 7a05 vldr s15, [r3, #20] 8017088: 687b ldr r3, [r7, #4] 801708a: 3304 adds r3, #4 801708c: ee67 7a27 vmul.f32 s15, s14, s15 8017090: edc3 7a00 vstr s15, [r3] *(Rt+2) = _3V->W * inv->Ctrl._Vdc_2; 8017094: 68bb ldr r3, [r7, #8] 8017096: ed93 7a02 vldr s14, [r3, #8] 801709a: 683b ldr r3, [r7, #0] 801709c: edd3 7a05 vldr s15, [r3, #20] 80170a0: 687b ldr r3, [r7, #4] 80170a2: 3308 adds r3, #8 80170a4: ee67 7a27 vmul.f32 s15, s14, s15 80170a8: edc3 7a00 vstr s15, [r3] Du[0] = SAT(_3V->U * inv->Ctrl.PWM_Scale, inv->Para.PWM_Mid); 80170ac: 68bb ldr r3, [r7, #8] 80170ae: ed93 7a00 vldr s14, [r3] 80170b2: 683b ldr r3, [r7, #0] 80170b4: edd3 7a06 vldr s15, [r3, #24] 80170b8: ee27 7a27 vmul.f32 s14, s14, s15 80170bc: 683b ldr r3, [r7, #0] 80170be: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80170c2: eeb4 7ae7 vcmpe.f32 s14, s15 80170c6: eef1 fa10 vmrs APSR_nzcv, fpscr 80170ca: dd03 ble.n 80170d4 80170cc: 683b ldr r3, [r7, #0] 80170ce: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80170d2: e01f b.n 8017114 80170d4: 68bb ldr r3, [r7, #8] 80170d6: ed93 7a00 vldr s14, [r3] 80170da: 683b ldr r3, [r7, #0] 80170dc: edd3 7a06 vldr s15, [r3, #24] 80170e0: ee27 7a27 vmul.f32 s14, s14, s15 80170e4: 683b ldr r3, [r7, #0] 80170e6: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80170ea: eef1 7a67 vneg.f32 s15, s15 80170ee: eeb4 7ae7 vcmpe.f32 s14, s15 80170f2: eef1 fa10 vmrs APSR_nzcv, fpscr 80170f6: d505 bpl.n 8017104 80170f8: 683b ldr r3, [r7, #0] 80170fa: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80170fe: eef1 7a67 vneg.f32 s15, s15 8017102: e007 b.n 8017114 8017104: 68bb ldr r3, [r7, #8] 8017106: ed93 7a00 vldr s14, [r3] 801710a: 683b ldr r3, [r7, #0] 801710c: edd3 7a06 vldr s15, [r3, #24] 8017110: ee67 7a27 vmul.f32 s15, s14, s15 8017114: edc7 7a05 vstr s15, [r7, #20] Du[1] = SAT(_3V->V * inv->Ctrl.PWM_Scale, inv->Para.PWM_Mid); 8017118: 68bb ldr r3, [r7, #8] 801711a: ed93 7a01 vldr s14, [r3, #4] 801711e: 683b ldr r3, [r7, #0] 8017120: edd3 7a06 vldr s15, [r3, #24] 8017124: ee27 7a27 vmul.f32 s14, s14, s15 8017128: 683b ldr r3, [r7, #0] 801712a: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801712e: eeb4 7ae7 vcmpe.f32 s14, s15 8017132: eef1 fa10 vmrs APSR_nzcv, fpscr 8017136: dd03 ble.n 8017140 8017138: 683b ldr r3, [r7, #0] 801713a: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801713e: e01f b.n 8017180 8017140: 68bb ldr r3, [r7, #8] 8017142: ed93 7a01 vldr s14, [r3, #4] 8017146: 683b ldr r3, [r7, #0] 8017148: edd3 7a06 vldr s15, [r3, #24] 801714c: ee27 7a27 vmul.f32 s14, s14, s15 8017150: 683b ldr r3, [r7, #0] 8017152: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8017156: eef1 7a67 vneg.f32 s15, s15 801715a: eeb4 7ae7 vcmpe.f32 s14, s15 801715e: eef1 fa10 vmrs APSR_nzcv, fpscr 8017162: d505 bpl.n 8017170 8017164: 683b ldr r3, [r7, #0] 8017166: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801716a: eef1 7a67 vneg.f32 s15, s15 801716e: e007 b.n 8017180 8017170: 68bb ldr r3, [r7, #8] 8017172: ed93 7a01 vldr s14, [r3, #4] 8017176: 683b ldr r3, [r7, #0] 8017178: edd3 7a06 vldr s15, [r3, #24] 801717c: ee67 7a27 vmul.f32 s15, s14, s15 8017180: edc7 7a06 vstr s15, [r7, #24] Du[2] = SAT(_3V->W * inv->Ctrl.PWM_Scale, inv->Para.PWM_Mid); 8017184: 68bb ldr r3, [r7, #8] 8017186: ed93 7a02 vldr s14, [r3, #8] 801718a: 683b ldr r3, [r7, #0] 801718c: edd3 7a06 vldr s15, [r3, #24] 8017190: ee27 7a27 vmul.f32 s14, s14, s15 8017194: 683b ldr r3, [r7, #0] 8017196: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801719a: eeb4 7ae7 vcmpe.f32 s14, s15 801719e: eef1 fa10 vmrs APSR_nzcv, fpscr 80171a2: dd03 ble.n 80171ac 80171a4: 683b ldr r3, [r7, #0] 80171a6: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80171aa: e01f b.n 80171ec 80171ac: 68bb ldr r3, [r7, #8] 80171ae: ed93 7a02 vldr s14, [r3, #8] 80171b2: 683b ldr r3, [r7, #0] 80171b4: edd3 7a06 vldr s15, [r3, #24] 80171b8: ee27 7a27 vmul.f32 s14, s14, s15 80171bc: 683b ldr r3, [r7, #0] 80171be: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80171c2: eef1 7a67 vneg.f32 s15, s15 80171c6: eeb4 7ae7 vcmpe.f32 s14, s15 80171ca: eef1 fa10 vmrs APSR_nzcv, fpscr 80171ce: d505 bpl.n 80171dc 80171d0: 683b ldr r3, [r7, #0] 80171d2: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80171d6: eef1 7a67 vneg.f32 s15, s15 80171da: e007 b.n 80171ec 80171dc: 68bb ldr r3, [r7, #8] 80171de: ed93 7a02 vldr s14, [r3, #8] 80171e2: 683b ldr r3, [r7, #0] 80171e4: edd3 7a06 vldr s15, [r3, #24] 80171e8: ee67 7a27 vmul.f32 s15, s14, s15 80171ec: edc7 7a07 vstr s15, [r7, #28] *(Duty) = (uint32_t) SAT_U((Du[0] + inv->Para.PWM_Mid), inv->Para.PWM_Max); 80171f0: ed97 7a05 vldr s14, [r7, #20] 80171f4: 683b ldr r3, [r7, #0] 80171f6: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80171fa: ee37 7a27 vadd.f32 s14, s14, s15 80171fe: 683b ldr r3, [r7, #0] 8017200: edd3 7a1e vldr s15, [r3, #120] @ 0x78 8017204: eeb4 7ae7 vcmpe.f32 s14, s15 8017208: eef1 fa10 vmrs APSR_nzcv, fpscr 801720c: dd05 ble.n 801721a 801720e: 683b ldr r3, [r7, #0] 8017210: edd3 7a1e vldr s15, [r3, #120] @ 0x78 8017214: eefc 7ae7 vcvt.u32.f32 s15, s15 8017218: e019 b.n 801724e 801721a: ed97 7a05 vldr s14, [r7, #20] 801721e: 683b ldr r3, [r7, #0] 8017220: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8017224: ee77 7a27 vadd.f32 s15, s14, s15 8017228: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 801722c: eef4 7ac7 vcmpe.f32 s15, s14 8017230: eef1 fa10 vmrs APSR_nzcv, fpscr 8017234: d802 bhi.n 801723c 8017236: eddf 7a3d vldr s15, [pc, #244] @ 801732c 801723a: e008 b.n 801724e 801723c: ed97 7a05 vldr s14, [r7, #20] 8017240: 683b ldr r3, [r7, #0] 8017242: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8017246: ee77 7a27 vadd.f32 s15, s14, s15 801724a: eefc 7ae7 vcvt.u32.f32 s15, s15 801724e: 68fb ldr r3, [r7, #12] 8017250: edc3 7a00 vstr s15, [r3] *(Duty+1) = (uint32_t) SAT_U((Du[1] + inv->Para.PWM_Mid), inv->Para.PWM_Max); 8017254: ed97 7a06 vldr s14, [r7, #24] 8017258: 683b ldr r3, [r7, #0] 801725a: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801725e: ee37 7a27 vadd.f32 s14, s14, s15 8017262: 683b ldr r3, [r7, #0] 8017264: edd3 7a1e vldr s15, [r3, #120] @ 0x78 8017268: eeb4 7ae7 vcmpe.f32 s14, s15 801726c: eef1 fa10 vmrs APSR_nzcv, fpscr 8017270: dd05 ble.n 801727e 8017272: 683b ldr r3, [r7, #0] 8017274: edd3 7a1e vldr s15, [r3, #120] @ 0x78 8017278: eefc 7ae7 vcvt.u32.f32 s15, s15 801727c: e019 b.n 80172b2 801727e: ed97 7a06 vldr s14, [r7, #24] 8017282: 683b ldr r3, [r7, #0] 8017284: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8017288: ee77 7a27 vadd.f32 s15, s14, s15 801728c: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 8017290: eef4 7ac7 vcmpe.f32 s15, s14 8017294: eef1 fa10 vmrs APSR_nzcv, fpscr 8017298: d802 bhi.n 80172a0 801729a: eddf 7a24 vldr s15, [pc, #144] @ 801732c 801729e: e008 b.n 80172b2 80172a0: ed97 7a06 vldr s14, [r7, #24] 80172a4: 683b ldr r3, [r7, #0] 80172a6: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80172aa: ee77 7a27 vadd.f32 s15, s14, s15 80172ae: eefc 7ae7 vcvt.u32.f32 s15, s15 80172b2: 68fb ldr r3, [r7, #12] 80172b4: 3304 adds r3, #4 80172b6: edc3 7a00 vstr s15, [r3] *(Duty+2) = (uint32_t) SAT_U((Du[2] + inv->Para.PWM_Mid), inv->Para.PWM_Max); 80172ba: ed97 7a07 vldr s14, [r7, #28] 80172be: 683b ldr r3, [r7, #0] 80172c0: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80172c4: ee37 7a27 vadd.f32 s14, s14, s15 80172c8: 683b ldr r3, [r7, #0] 80172ca: edd3 7a1e vldr s15, [r3, #120] @ 0x78 80172ce: eeb4 7ae7 vcmpe.f32 s14, s15 80172d2: eef1 fa10 vmrs APSR_nzcv, fpscr 80172d6: dd05 ble.n 80172e4 80172d8: 683b ldr r3, [r7, #0] 80172da: edd3 7a1e vldr s15, [r3, #120] @ 0x78 80172de: eefc 7ae7 vcvt.u32.f32 s15, s15 80172e2: e019 b.n 8017318 80172e4: ed97 7a07 vldr s14, [r7, #28] 80172e8: 683b ldr r3, [r7, #0] 80172ea: edd3 7a1d vldr s15, [r3, #116] @ 0x74 80172ee: ee77 7a27 vadd.f32 s15, s14, s15 80172f2: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 80172f6: eef4 7ac7 vcmpe.f32 s15, s14 80172fa: eef1 fa10 vmrs APSR_nzcv, fpscr 80172fe: d802 bhi.n 8017306 8017300: eddf 7a0a vldr s15, [pc, #40] @ 801732c 8017304: e008 b.n 8017318 8017306: ed97 7a07 vldr s14, [r7, #28] 801730a: 683b ldr r3, [r7, #0] 801730c: edd3 7a1d vldr s15, [r3, #116] @ 0x74 8017310: ee77 7a27 vadd.f32 s15, s14, s15 8017314: eefc 7ae7 vcvt.u32.f32 s15, s15 8017318: 68fb ldr r3, [r7, #12] 801731a: 3308 adds r3, #8 801731c: edc3 7a00 vstr s15, [r3] } 8017320: bf00 nop 8017322: 3724 adds r7, #36 @ 0x24 8017324: 46bd mov sp, r7 8017326: f85d 7b04 ldr.w r7, [sp], #4 801732a: 4770 bx lr 801732c: 00000001 .word 0x00000001 08017330 : inline WP_ErrorStatus WP_PWMout(uint8_t Mot, uint32_t* Duty) { 8017330: b480 push {r7} 8017332: b083 sub sp, #12 8017334: af00 add r7, sp, #0 8017336: 4603 mov r3, r0 8017338: 6039 str r1, [r7, #0] 801733a: 71fb strb r3, [r7, #7] switch(Mot) 801733c: 79fb ldrb r3, [r7, #7] 801733e: 2b01 cmp r3, #1 8017340: d002 beq.n 8017348 8017342: 2b02 cmp r3, #2 8017344: d011 beq.n 801736a 8017346: e021 b.n 801738c { case MOTOR1: PWM0_U = *(Duty); 8017348: 4b14 ldr r3, [pc, #80] @ (801739c ) 801734a: 681b ldr r3, [r3, #0] 801734c: 683a ldr r2, [r7, #0] 801734e: 6812 ldr r2, [r2, #0] 8017350: 635a str r2, [r3, #52] @ 0x34 PWM0_V = *(Duty+1); 8017352: 4b12 ldr r3, [pc, #72] @ (801739c ) 8017354: 681b ldr r3, [r3, #0] 8017356: 683a ldr r2, [r7, #0] 8017358: 6852 ldr r2, [r2, #4] 801735a: 639a str r2, [r3, #56] @ 0x38 PWM0_W = *(Duty+2); 801735c: 4b0f ldr r3, [pc, #60] @ (801739c ) 801735e: 681b ldr r3, [r3, #0] 8017360: 683a ldr r2, [r7, #0] 8017362: 6892 ldr r2, [r2, #8] 8017364: 63da str r2, [r3, #60] @ 0x3c return WP_OK; 8017366: 2300 movs r3, #0 8017368: e011 b.n 801738e break; case MOTOR2: PWM1_U = *(Duty); 801736a: 4b0d ldr r3, [pc, #52] @ (80173a0 ) 801736c: 681b ldr r3, [r3, #0] 801736e: 683a ldr r2, [r7, #0] 8017370: 6812 ldr r2, [r2, #0] 8017372: 635a str r2, [r3, #52] @ 0x34 PWM1_V = *(Duty+1); 8017374: 4b0a ldr r3, [pc, #40] @ (80173a0 ) 8017376: 681b ldr r3, [r3, #0] 8017378: 683a ldr r2, [r7, #0] 801737a: 6852 ldr r2, [r2, #4] 801737c: 639a str r2, [r3, #56] @ 0x38 PWM1_W = *(Duty+2); 801737e: 4b08 ldr r3, [pc, #32] @ (80173a0 ) 8017380: 681b ldr r3, [r3, #0] 8017382: 683a ldr r2, [r7, #0] 8017384: 6892 ldr r2, [r2, #8] 8017386: 63da str r2, [r3, #60] @ 0x3c return WP_OK; 8017388: 2300 movs r3, #0 801738a: e000 b.n 801738e break; default: return WP_ERR; 801738c: 2301 movs r3, #1 break; } } 801738e: 4618 mov r0, r3 8017390: 370c adds r7, #12 8017392: 46bd mov sp, r7 8017394: f85d 7b04 ldr.w r7, [sp], #4 8017398: 4770 bx lr 801739a: bf00 nop 801739c: 20000d68 .word 0x20000d68 80173a0: 20000e88 .word 0x20000e88 080173a4 : //*cmd : Motor1.Cmd.Icmd.q/d, Ref : Motor1.Cmd.Iref.q/d inline void WP_RampUpDn(float *Cmd, float *Ref, float RampU, float RampD) // 단위 : 1A / 스위칭 { 80173a4: b480 push {r7} 80173a6: b085 sub sp, #20 80173a8: af00 add r7, sp, #0 80173aa: 60f8 str r0, [r7, #12] 80173ac: 60b9 str r1, [r7, #8] 80173ae: ed87 0a01 vstr s0, [r7, #4] 80173b2: edc7 0a00 vstr s1, [r7] if(*Ref < *Cmd){ 80173b6: 68bb ldr r3, [r7, #8] 80173b8: ed93 7a00 vldr s14, [r3] 80173bc: 68fb ldr r3, [r7, #12] 80173be: edd3 7a00 vldr s15, [r3] 80173c2: eeb4 7ae7 vcmpe.f32 s14, s15 80173c6: eef1 fa10 vmrs APSR_nzcv, fpscr 80173ca: d51c bpl.n 8017406 *Ref += RampU; 80173cc: 68bb ldr r3, [r7, #8] 80173ce: ed93 7a00 vldr s14, [r3] 80173d2: edd7 7a01 vldr s15, [r7, #4] 80173d6: ee77 7a27 vadd.f32 s15, s14, s15 80173da: 68bb ldr r3, [r7, #8] 80173dc: edc3 7a00 vstr s15, [r3] *Ref = (*Ref > *Cmd) ? *Cmd : *Ref; 80173e0: 68bb ldr r3, [r7, #8] 80173e2: ed93 7a00 vldr s14, [r3] 80173e6: 68fb ldr r3, [r7, #12] 80173e8: edd3 7a00 vldr s15, [r3] 80173ec: eeb4 7ae7 vcmpe.f32 s14, s15 80173f0: eef1 fa10 vmrs APSR_nzcv, fpscr 80173f4: dd02 ble.n 80173fc 80173f6: 68fb ldr r3, [r7, #12] 80173f8: 681b ldr r3, [r3, #0] 80173fa: e001 b.n 8017400 80173fc: 68bb ldr r3, [r7, #8] 80173fe: 681b ldr r3, [r3, #0] 8017400: 68ba ldr r2, [r7, #8] 8017402: 6013 str r3, [r2, #0] } else if(*Ref > *Cmd){ *Ref -= RampD; *Ref = (*Ref < *Cmd) ? *Cmd : *Ref; } } 8017404: e027 b.n 8017456 else if(*Ref > *Cmd){ 8017406: 68bb ldr r3, [r7, #8] 8017408: ed93 7a00 vldr s14, [r3] 801740c: 68fb ldr r3, [r7, #12] 801740e: edd3 7a00 vldr s15, [r3] 8017412: eeb4 7ae7 vcmpe.f32 s14, s15 8017416: eef1 fa10 vmrs APSR_nzcv, fpscr 801741a: dc00 bgt.n 801741e } 801741c: e01b b.n 8017456 *Ref -= RampD; 801741e: 68bb ldr r3, [r7, #8] 8017420: ed93 7a00 vldr s14, [r3] 8017424: edd7 7a00 vldr s15, [r7] 8017428: ee77 7a67 vsub.f32 s15, s14, s15 801742c: 68bb ldr r3, [r7, #8] 801742e: edc3 7a00 vstr s15, [r3] *Ref = (*Ref < *Cmd) ? *Cmd : *Ref; 8017432: 68bb ldr r3, [r7, #8] 8017434: ed93 7a00 vldr s14, [r3] 8017438: 68fb ldr r3, [r7, #12] 801743a: edd3 7a00 vldr s15, [r3] 801743e: eeb4 7ae7 vcmpe.f32 s14, s15 8017442: eef1 fa10 vmrs APSR_nzcv, fpscr 8017446: d502 bpl.n 801744e 8017448: 68fb ldr r3, [r7, #12] 801744a: 681b ldr r3, [r3, #0] 801744c: e001 b.n 8017452 801744e: 68bb ldr r3, [r7, #8] 8017450: 681b ldr r3, [r3, #0] 8017452: 68ba ldr r2, [r7, #8] 8017454: 6013 str r3, [r2, #0] } 8017456: bf00 nop 8017458: 3714 adds r7, #20 801745a: 46bd mov sp, r7 801745c: f85d 7b04 ldr.w r7, [sp], #4 8017460: 4770 bx lr ... 08017464 : else if(Ang->AngleElec < 0) Ang->AngleElec += 360.0f; } inline WP_ErrorStatus WP_EncPos(uint8_t Mot, WP_MotorAngleTypeDef *Ang) // this function in 'stm32f4xx_it.c' { 8017464: b480 push {r7} 8017466: b083 sub sp, #12 8017468: af00 add r7, sp, #0 801746a: 4603 mov r3, r0 801746c: 6039 str r1, [r7, #0] 801746e: 71fb strb r3, [r7, #7] if(Mot==MOTOR1) 8017470: 79fb ldrb r3, [r7, #7] 8017472: 2b01 cmp r3, #1 8017474: f040 80b7 bne.w 80175e6 { // Ang->Pulse = __HAL_TIM_GET_COUNTER(&htim2); Ang->Pulse = -1 *__HAL_TIM_GET_COUNTER(&htim2); 8017478: 4bad ldr r3, [pc, #692] @ (8017730 ) 801747a: 681b ldr r3, [r3, #0] 801747c: 6a5b ldr r3, [r3, #36] @ 0x24 801747e: b29b uxth r3, r3 8017480: 425b negs r3, r3 8017482: b29a uxth r2, r3 8017484: 683b ldr r3, [r7, #0] 8017486: 829a strh r2, [r3, #20] // cnt1 = tick*4; // Ang->diffL += ((Ang->Pulse - Ang->PulseOld)<<16)>>16; Ang->diffL += ((Ang->PulseOld - Ang->Pulse)<<16)>>16; 8017488: 683b ldr r3, [r7, #0] 801748a: 699a ldr r2, [r3, #24] 801748c: 683b ldr r3, [r7, #0] 801748e: 8adb ldrh r3, [r3, #22] 8017490: 4619 mov r1, r3 8017492: 683b ldr r3, [r7, #0] 8017494: 8a9b ldrh r3, [r3, #20] 8017496: 1acb subs r3, r1, r3 8017498: 041b lsls r3, r3, #16 801749a: 141b asrs r3, r3, #16 801749c: 441a add r2, r3 801749e: 683b ldr r3, [r7, #0] 80174a0: 619a str r2, [r3, #24] // Ang->diffF += (float)(((Ang->Pulse - Ang->PulseOld)<<16)>>16); Ang->diffF += (float)(((Ang->PulseOld - Ang->Pulse)<<16)>>16); 80174a2: 683b ldr r3, [r7, #0] 80174a4: ed93 7a07 vldr s14, [r3, #28] 80174a8: 683b ldr r3, [r7, #0] 80174aa: 8adb ldrh r3, [r3, #22] 80174ac: 461a mov r2, r3 80174ae: 683b ldr r3, [r7, #0] 80174b0: 8a9b ldrh r3, [r3, #20] 80174b2: 1ad3 subs r3, r2, r3 80174b4: 041b lsls r3, r3, #16 80174b6: 141b asrs r3, r3, #16 80174b8: ee07 3a90 vmov s15, r3 80174bc: eef8 7ae7 vcvt.f32.s32 s15, s15 80174c0: ee77 7a27 vadd.f32 s15, s14, s15 80174c4: 683b ldr r3, [r7, #0] 80174c6: edc3 7a07 vstr s15, [r3, #28] if(Ang -> diffL > Ang->EncPulse){ 80174ca: 683b ldr r3, [r7, #0] 80174cc: 699b ldr r3, [r3, #24] 80174ce: 683a ldr r2, [r7, #0] 80174d0: 8892 ldrh r2, [r2, #4] 80174d2: 4293 cmp r3, r2 80174d4: dd07 ble.n 80174e6 Ang->diffL = Ang->diffL - Ang->EncPulse; 80174d6: 683b ldr r3, [r7, #0] 80174d8: 699b ldr r3, [r3, #24] 80174da: 683a ldr r2, [r7, #0] 80174dc: 8892 ldrh r2, [r2, #4] 80174de: 1a9a subs r2, r3, r2 80174e0: 683b ldr r3, [r7, #0] 80174e2: 619a str r2, [r3, #24] 80174e4: e00a b.n 80174fc } else if(Ang->diffL < 0){ 80174e6: 683b ldr r3, [r7, #0] 80174e8: 699b ldr r3, [r3, #24] 80174ea: 2b00 cmp r3, #0 80174ec: da06 bge.n 80174fc Ang->diffL = Ang->diffL + Ang->EncPulse; 80174ee: 683b ldr r3, [r7, #0] 80174f0: 699b ldr r3, [r3, #24] 80174f2: 683a ldr r2, [r7, #0] 80174f4: 8892 ldrh r2, [r2, #4] 80174f6: 441a add r2, r3 80174f8: 683b ldr r3, [r7, #0] 80174fa: 619a str r2, [r3, #24] } Ang->AngleMech = (float)Ang->diffL * Ang->AngleScale; 80174fc: 683b ldr r3, [r7, #0] 80174fe: 699b ldr r3, [r3, #24] 8017500: ee07 3a90 vmov s15, r3 8017504: eeb8 7ae7 vcvt.f32.s32 s14, s15 8017508: 683b ldr r3, [r7, #0] 801750a: edd3 7a02 vldr s15, [r3, #8] 801750e: ee67 7a27 vmul.f32 s15, s14, s15 8017512: 683b ldr r3, [r7, #0] 8017514: edc3 7a0b vstr s15, [r3, #44] @ 0x2c Ang->AngleMechAll = Ang->diffF * Ang->AngleScale; 8017518: 683b ldr r3, [r7, #0] 801751a: ed93 7a07 vldr s14, [r3, #28] 801751e: 683b ldr r3, [r7, #0] 8017520: edd3 7a02 vldr s15, [r3, #8] 8017524: ee67 7a27 vmul.f32 s15, s14, s15 8017528: 683b ldr r3, [r7, #0] 801752a: edc3 7a0c vstr s15, [r3, #48] @ 0x30 Ang->PulseOld = Ang->Pulse; 801752e: 683b ldr r3, [r7, #0] 8017530: 8a9a ldrh r2, [r3, #20] 8017532: 683b ldr r3, [r7, #0] 8017534: 82da strh r2, [r3, #22] Ang->AngleElec = Ang->AngleMech * (float)Ang->PolePair; 8017536: 683b ldr r3, [r7, #0] 8017538: ed93 7a0b vldr s14, [r3, #44] @ 0x2c 801753c: 683b ldr r3, [r7, #0] 801753e: 7b1b ldrb r3, [r3, #12] 8017540: ee07 3a90 vmov s15, r3 8017544: eef8 7a67 vcvt.f32.u32 s15, s15 8017548: ee67 7a27 vmul.f32 s15, s14, s15 801754c: 683b ldr r3, [r7, #0] 801754e: edc3 7a0d vstr s15, [r3, #52] @ 0x34 Ang->AngleElec = Ang->AngleElec - (float)((uint16_t)(Ang->AngleElec * MT_1_OVR_360))*360.0f + Ang->AngleElecOffset; 8017552: 683b ldr r3, [r7, #0] 8017554: ed93 7a0d vldr s14, [r3, #52] @ 0x34 8017558: 683b ldr r3, [r7, #0] 801755a: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801755e: eddf 6a75 vldr s13, [pc, #468] @ 8017734 8017562: ee67 7aa6 vmul.f32 s15, s15, s13 8017566: eefc 7ae7 vcvt.u32.f32 s15, s15 801756a: ee17 3a90 vmov r3, s15 801756e: b29b uxth r3, r3 8017570: ee07 3a90 vmov s15, r3 8017574: eef8 7a67 vcvt.f32.u32 s15, s15 8017578: eddf 6a70 vldr s13, [pc, #448] @ 801773c 801757c: ee67 7aa6 vmul.f32 s15, s15, s13 8017580: ee37 7a67 vsub.f32 s14, s14, s15 8017584: 683b ldr r3, [r7, #0] 8017586: edd3 7a00 vldr s15, [r3] 801758a: ee77 7a27 vadd.f32 s15, s14, s15 801758e: 683b ldr r3, [r7, #0] 8017590: edc3 7a0d vstr s15, [r3, #52] @ 0x34 if(Ang->AngleElec >= 360.0f) Ang->AngleElec -= 360.0f; 8017594: 683b ldr r3, [r7, #0] 8017596: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801759a: ed9f 7a68 vldr s14, [pc, #416] @ 801773c 801759e: eef4 7ac7 vcmpe.f32 s15, s14 80175a2: eef1 fa10 vmrs APSR_nzcv, fpscr 80175a6: db0a blt.n 80175be 80175a8: 683b ldr r3, [r7, #0] 80175aa: edd3 7a0d vldr s15, [r3, #52] @ 0x34 80175ae: ed9f 7a63 vldr s14, [pc, #396] @ 801773c 80175b2: ee77 7ac7 vsub.f32 s15, s15, s14 80175b6: 683b ldr r3, [r7, #0] 80175b8: edc3 7a0d vstr s15, [r3, #52] @ 0x34 80175bc: e011 b.n 80175e2 else if(Ang->AngleElec < 0) Ang->AngleElec += 360.0f; 80175be: 683b ldr r3, [r7, #0] 80175c0: edd3 7a0d vldr s15, [r3, #52] @ 0x34 80175c4: eef5 7ac0 vcmpe.f32 s15, #0.0 80175c8: eef1 fa10 vmrs APSR_nzcv, fpscr 80175cc: d509 bpl.n 80175e2 80175ce: 683b ldr r3, [r7, #0] 80175d0: edd3 7a0d vldr s15, [r3, #52] @ 0x34 80175d4: ed9f 7a59 vldr s14, [pc, #356] @ 801773c 80175d8: ee77 7a87 vadd.f32 s15, s15, s14 80175dc: 683b ldr r3, [r7, #0] 80175de: edc3 7a0d vstr s15, [r3, #52] @ 0x34 return WP_OK; 80175e2: 2300 movs r3, #0 80175e4: e0c1 b.n 801776a } else if(Mot==MOTOR2) 80175e6: 79fb ldrb r3, [r7, #7] 80175e8: 2b02 cmp r3, #2 80175ea: f040 80bd bne.w 8017768 { Ang->Pulse = __HAL_TIM_GET_COUNTER(&htim4); 80175ee: 4b52 ldr r3, [pc, #328] @ (8017738 ) 80175f0: 681b ldr r3, [r3, #0] 80175f2: 6a5b ldr r3, [r3, #36] @ 0x24 80175f4: b29a uxth r2, r3 80175f6: 683b ldr r3, [r7, #0] 80175f8: 829a strh r2, [r3, #20] // Ang->diffL += ((Ang->Pulse - Ang->PulseOld)<<16)>>16; Ang->diffL += ((Ang->PulseOld - Ang->Pulse)<<16)>>16; 80175fa: 683b ldr r3, [r7, #0] 80175fc: 699a ldr r2, [r3, #24] 80175fe: 683b ldr r3, [r7, #0] 8017600: 8adb ldrh r3, [r3, #22] 8017602: 4619 mov r1, r3 8017604: 683b ldr r3, [r7, #0] 8017606: 8a9b ldrh r3, [r3, #20] 8017608: 1acb subs r3, r1, r3 801760a: 041b lsls r3, r3, #16 801760c: 141b asrs r3, r3, #16 801760e: 441a add r2, r3 8017610: 683b ldr r3, [r7, #0] 8017612: 619a str r2, [r3, #24] // Ang->diffF += (float)(((Ang->Pulse - Ang->PulseOld)<<16)>>16); Ang->diffF += (float)(((Ang->PulseOld - Ang->Pulse)<<16)>>16); 8017614: 683b ldr r3, [r7, #0] 8017616: ed93 7a07 vldr s14, [r3, #28] 801761a: 683b ldr r3, [r7, #0] 801761c: 8adb ldrh r3, [r3, #22] 801761e: 461a mov r2, r3 8017620: 683b ldr r3, [r7, #0] 8017622: 8a9b ldrh r3, [r3, #20] 8017624: 1ad3 subs r3, r2, r3 8017626: 041b lsls r3, r3, #16 8017628: 141b asrs r3, r3, #16 801762a: ee07 3a90 vmov s15, r3 801762e: eef8 7ae7 vcvt.f32.s32 s15, s15 8017632: ee77 7a27 vadd.f32 s15, s14, s15 8017636: 683b ldr r3, [r7, #0] 8017638: edc3 7a07 vstr s15, [r3, #28] if(Ang -> diffL > Ang->EncPulse){ 801763c: 683b ldr r3, [r7, #0] 801763e: 699b ldr r3, [r3, #24] 8017640: 683a ldr r2, [r7, #0] 8017642: 8892 ldrh r2, [r2, #4] 8017644: 4293 cmp r3, r2 8017646: dd07 ble.n 8017658 Ang->diffL = Ang->diffL - Ang->EncPulse; 8017648: 683b ldr r3, [r7, #0] 801764a: 699b ldr r3, [r3, #24] 801764c: 683a ldr r2, [r7, #0] 801764e: 8892 ldrh r2, [r2, #4] 8017650: 1a9a subs r2, r3, r2 8017652: 683b ldr r3, [r7, #0] 8017654: 619a str r2, [r3, #24] 8017656: e00a b.n 801766e } else if(Ang->diffL < 0){ 8017658: 683b ldr r3, [r7, #0] 801765a: 699b ldr r3, [r3, #24] 801765c: 2b00 cmp r3, #0 801765e: da06 bge.n 801766e Ang->diffL = Ang->diffL + Ang->EncPulse; 8017660: 683b ldr r3, [r7, #0] 8017662: 699b ldr r3, [r3, #24] 8017664: 683a ldr r2, [r7, #0] 8017666: 8892 ldrh r2, [r2, #4] 8017668: 441a add r2, r3 801766a: 683b ldr r3, [r7, #0] 801766c: 619a str r2, [r3, #24] } Ang->AngleMech = (float)Ang->diffL * Ang->AngleScale; 801766e: 683b ldr r3, [r7, #0] 8017670: 699b ldr r3, [r3, #24] 8017672: ee07 3a90 vmov s15, r3 8017676: eeb8 7ae7 vcvt.f32.s32 s14, s15 801767a: 683b ldr r3, [r7, #0] 801767c: edd3 7a02 vldr s15, [r3, #8] 8017680: ee67 7a27 vmul.f32 s15, s14, s15 8017684: 683b ldr r3, [r7, #0] 8017686: edc3 7a0b vstr s15, [r3, #44] @ 0x2c Ang->AngleMechAll = Ang->diffF * Ang->AngleScale; 801768a: 683b ldr r3, [r7, #0] 801768c: ed93 7a07 vldr s14, [r3, #28] 8017690: 683b ldr r3, [r7, #0] 8017692: edd3 7a02 vldr s15, [r3, #8] 8017696: ee67 7a27 vmul.f32 s15, s14, s15 801769a: 683b ldr r3, [r7, #0] 801769c: edc3 7a0c vstr s15, [r3, #48] @ 0x30 Ang->PulseOld = Ang->Pulse; 80176a0: 683b ldr r3, [r7, #0] 80176a2: 8a9a ldrh r2, [r3, #20] 80176a4: 683b ldr r3, [r7, #0] 80176a6: 82da strh r2, [r3, #22] Ang->AngleElec = Ang->AngleMech * (float)Ang->PolePair; 80176a8: 683b ldr r3, [r7, #0] 80176aa: ed93 7a0b vldr s14, [r3, #44] @ 0x2c 80176ae: 683b ldr r3, [r7, #0] 80176b0: 7b1b ldrb r3, [r3, #12] 80176b2: ee07 3a90 vmov s15, r3 80176b6: eef8 7a67 vcvt.f32.u32 s15, s15 80176ba: ee67 7a27 vmul.f32 s15, s14, s15 80176be: 683b ldr r3, [r7, #0] 80176c0: edc3 7a0d vstr s15, [r3, #52] @ 0x34 Ang->AngleElec = Ang->AngleElec - (float)((uint16_t)(Ang->AngleElec * MT_1_OVR_360))*360.0f + Ang->AngleElecOffset; 80176c4: 683b ldr r3, [r7, #0] 80176c6: ed93 7a0d vldr s14, [r3, #52] @ 0x34 80176ca: 683b ldr r3, [r7, #0] 80176cc: edd3 7a0d vldr s15, [r3, #52] @ 0x34 80176d0: eddf 6a18 vldr s13, [pc, #96] @ 8017734 80176d4: ee67 7aa6 vmul.f32 s15, s15, s13 80176d8: eefc 7ae7 vcvt.u32.f32 s15, s15 80176dc: ee17 3a90 vmov r3, s15 80176e0: b29b uxth r3, r3 80176e2: ee07 3a90 vmov s15, r3 80176e6: eef8 7a67 vcvt.f32.u32 s15, s15 80176ea: eddf 6a14 vldr s13, [pc, #80] @ 801773c 80176ee: ee67 7aa6 vmul.f32 s15, s15, s13 80176f2: ee37 7a67 vsub.f32 s14, s14, s15 80176f6: 683b ldr r3, [r7, #0] 80176f8: edd3 7a00 vldr s15, [r3] 80176fc: ee77 7a27 vadd.f32 s15, s14, s15 8017700: 683b ldr r3, [r7, #0] 8017702: edc3 7a0d vstr s15, [r3, #52] @ 0x34 if(Ang->AngleElec >= 360.0f) Ang->AngleElec -= 360.0f; 8017706: 683b ldr r3, [r7, #0] 8017708: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801770c: ed9f 7a0b vldr s14, [pc, #44] @ 801773c 8017710: eef4 7ac7 vcmpe.f32 s15, s14 8017714: eef1 fa10 vmrs APSR_nzcv, fpscr 8017718: db12 blt.n 8017740 801771a: 683b ldr r3, [r7, #0] 801771c: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8017720: ed9f 7a06 vldr s14, [pc, #24] @ 801773c 8017724: ee77 7ac7 vsub.f32 s15, s15, s14 8017728: 683b ldr r3, [r7, #0] 801772a: edc3 7a0d vstr s15, [r3, #52] @ 0x34 801772e: e019 b.n 8017764 8017730: 20000db0 .word 0x20000db0 8017734: 3b360b61 .word 0x3b360b61 8017738: 20000df8 .word 0x20000df8 801773c: 43b40000 .word 0x43b40000 else if(Ang->AngleElec < 0) Ang->AngleElec += 360.0f; 8017740: 683b ldr r3, [r7, #0] 8017742: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8017746: eef5 7ac0 vcmpe.f32 s15, #0.0 801774a: eef1 fa10 vmrs APSR_nzcv, fpscr 801774e: d509 bpl.n 8017764 8017750: 683b ldr r3, [r7, #0] 8017752: edd3 7a0d vldr s15, [r3, #52] @ 0x34 8017756: ed1f 7a07 vldr s14, [pc, #-28] @ 801773c 801775a: ee77 7a87 vadd.f32 s15, s15, s14 801775e: 683b ldr r3, [r7, #0] 8017760: edc3 7a0d vstr s15, [r3, #52] @ 0x34 return WP_OK; 8017764: 2300 movs r3, #0 8017766: e000 b.n 801776a } else{ return WP_ERR; 8017768: 2301 movs r3, #1 } } 801776a: 4618 mov r0, r3 801776c: 370c adds r7, #12 801776e: 46bd mov sp, r7 8017770: f85d 7b04 ldr.w r7, [sp], #4 8017774: 4770 bx lr 8017776: bf00 nop 08017778 : inline WP_ErrorStatus WP_EncSpd(uint8_t Mot, WP_MotorAngleTypeDef *Ang) { 8017778: b580 push {r7, lr} 801777a: b084 sub sp, #16 801777c: af00 add r7, sp, #0 801777e: 4603 mov r3, r0 8017780: 6039 str r1, [r7, #0] 8017782: 71fb strb r3, [r7, #7] #if defined(TIM_8KHZ) uint8_t CntRef=8; #elif defined(TIM_10KHZ) uint8_t CntRef=10; 8017784: 230a movs r3, #10 8017786: 73fb strb r3, [r7, #15] uint8_t CntRef=20; #else uint8_t CntRef=10; #endif if(Mot==MOTOR1) 8017788: 79fb ldrb r3, [r7, #7] 801778a: 2b01 cmp r3, #1 801778c: f040 808c bne.w 80178a8 { Ang->_1msCnt++; 8017790: 683b ldr r3, [r7, #0] 8017792: f893 3020 ldrb.w r3, [r3, #32] 8017796: 3301 adds r3, #1 8017798: b2da uxtb r2, r3 801779a: 683b ldr r3, [r7, #0] 801779c: f883 2020 strb.w r2, [r3, #32] if(Ang->_1msCnt > CntRef) 80177a0: 683b ldr r3, [r7, #0] 80177a2: f893 3020 ldrb.w r3, [r3, #32] 80177a6: 7bfa ldrb r2, [r7, #15] 80177a8: 429a cmp r2, r3 80177aa: d27b bcs.n 80178a4 { // Ang->mnew = __HAL_TIM_GET_COUNTER(&htim2); Ang->mnew = -1 * __HAL_TIM_GET_COUNTER(&htim2); 80177ac: 4b8a ldr r3, [pc, #552] @ (80179d8 ) 80177ae: 681b ldr r3, [r3, #0] 80177b0: 6a5b ldr r3, [r3, #36] @ 0x24 80177b2: b29b uxth r3, r3 80177b4: 425b negs r3, r3 80177b6: b29a uxth r2, r3 80177b8: 683b ldr r3, [r7, #0] 80177ba: 845a strh r2, [r3, #34] @ 0x22 // Ang->diffM = ((Ang->mnew - Ang->mold)<<16)>>16; Ang->diffM = ((Ang->mold - Ang->mnew)<<16)>>16; 80177bc: 683b ldr r3, [r7, #0] 80177be: 8c9b ldrh r3, [r3, #36] @ 0x24 80177c0: 461a mov r2, r3 80177c2: 683b ldr r3, [r7, #0] 80177c4: 8c5b ldrh r3, [r3, #34] @ 0x22 80177c6: 1ad3 subs r3, r2, r3 80177c8: 041b lsls r3, r3, #16 80177ca: 141a asrs r2, r3, #16 80177cc: 683b ldr r3, [r7, #0] 80177ce: 629a str r2, [r3, #40] @ 0x28 Ang->Rpm = (float)Ang->diffM * Ang->SpeedScale * 0.3333; // 기어비 반영 80177d0: 683b ldr r3, [r7, #0] 80177d2: 6a9b ldr r3, [r3, #40] @ 0x28 80177d4: ee07 3a90 vmov s15, r3 80177d8: eeb8 7ae7 vcvt.f32.s32 s14, s15 80177dc: 683b ldr r3, [r7, #0] 80177de: edd3 7a04 vldr s15, [r3, #16] 80177e2: ee67 7a27 vmul.f32 s15, s14, s15 80177e6: ee17 0a90 vmov r0, s15 80177ea: f7f8 fddd bl 80103a8 <__aeabi_f2d> 80177ee: a378 add r3, pc, #480 @ (adr r3, 80179d0 ) 80177f0: e9d3 2300 ldrd r2, r3, [r3] 80177f4: f7f8 fe30 bl 8010458 <__aeabi_dmul> 80177f8: 4602 mov r2, r0 80177fa: 460b mov r3, r1 80177fc: 4610 mov r0, r2 80177fe: 4619 mov r1, r3 8017800: f7f9 f8c4 bl 801098c <__aeabi_d2f> 8017804: 4602 mov r2, r0 8017806: 683b ldr r3, [r7, #0] 8017808: 641a str r2, [r3, #64] @ 0x40 Ang->mold = Ang->mnew; 801780a: 683b ldr r3, [r7, #0] 801780c: 8c5a ldrh r2, [r3, #34] @ 0x22 801780e: 683b ldr r3, [r7, #0] 8017810: 849a strh r2, [r3, #36] @ 0x24 LPF(Ang->RpmFil, Ang->Rpm, LpfSpd.fct); 8017812: 683b ldr r3, [r7, #0] 8017814: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8017818: 683b ldr r3, [r7, #0] 801781a: edd3 7a10 vldr s15, [r3, #64] @ 0x40 801781e: ee77 7a67 vsub.f32 s15, s14, s15 8017822: eef5 7ac0 vcmpe.f32 s15, #0.0 8017826: eef1 fa10 vmrs APSR_nzcv, fpscr 801782a: dd12 ble.n 8017852 801782c: 4b6b ldr r3, [pc, #428] @ (80179dc ) 801782e: ed93 7a02 vldr s14, [r3, #8] 8017832: 683b ldr r3, [r7, #0] 8017834: edd3 6a11 vldr s13, [r3, #68] @ 0x44 8017838: 683b ldr r3, [r7, #0] 801783a: edd3 7a10 vldr s15, [r3, #64] @ 0x40 801783e: ee76 7ae7 vsub.f32 s15, s13, s15 8017842: ee27 7a27 vmul.f32 s14, s14, s15 8017846: 683b ldr r3, [r7, #0] 8017848: edd3 7a10 vldr s15, [r3, #64] @ 0x40 801784c: ee77 7a27 vadd.f32 s15, s14, s15 8017850: e013 b.n 801787a 8017852: 4b62 ldr r3, [pc, #392] @ (80179dc ) 8017854: edd3 7a02 vldr s15, [r3, #8] 8017858: eeb1 7a67 vneg.f32 s14, s15 801785c: 683b ldr r3, [r7, #0] 801785e: edd3 6a10 vldr s13, [r3, #64] @ 0x40 8017862: 683b ldr r3, [r7, #0] 8017864: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8017868: ee76 7ae7 vsub.f32 s15, s13, s15 801786c: ee27 7a27 vmul.f32 s14, s14, s15 8017870: 683b ldr r3, [r7, #0] 8017872: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8017876: ee77 7a27 vadd.f32 s15, s14, s15 801787a: 683b ldr r3, [r7, #0] 801787c: edc3 7a11 vstr s15, [r3, #68] @ 0x44 Ang->WeFil = Ang->RpmFil * TR_RPM2RAD; 8017880: 683b ldr r3, [r7, #0] 8017882: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8017886: ed9f 7a56 vldr s14, [pc, #344] @ 80179e0 801788a: ee67 7a87 vmul.f32 s15, s15, s14 801788e: 683b ldr r3, [r7, #0] 8017890: edc3 7a14 vstr s15, [r3, #80] @ 0x50 Ang->_1msCnt = 0; 8017894: 683b ldr r3, [r7, #0] 8017896: 2200 movs r2, #0 8017898: f883 2020 strb.w r2, [r3, #32] Ang->_1msFlg = 1; 801789c: 683b ldr r3, [r7, #0] 801789e: 2201 movs r2, #1 80178a0: f883 2021 strb.w r2, [r3, #33] @ 0x21 } else{} return WP_OK; 80178a4: 2300 movs r3, #0 80178a6: e08e b.n 80179c6 } else if(Mot==MOTOR2) 80178a8: 79fb ldrb r3, [r7, #7] 80178aa: 2b02 cmp r3, #2 80178ac: f040 808a bne.w 80179c4 { Ang->_1msCnt++; 80178b0: 683b ldr r3, [r7, #0] 80178b2: f893 3020 ldrb.w r3, [r3, #32] 80178b6: 3301 adds r3, #1 80178b8: b2da uxtb r2, r3 80178ba: 683b ldr r3, [r7, #0] 80178bc: f883 2020 strb.w r2, [r3, #32] if(Ang->_1msCnt > CntRef) 80178c0: 683b ldr r3, [r7, #0] 80178c2: f893 3020 ldrb.w r3, [r3, #32] 80178c6: 7bfa ldrb r2, [r7, #15] 80178c8: 429a cmp r2, r3 80178ca: d279 bcs.n 80179c0 { Ang->mnew = __HAL_TIM_GET_COUNTER(&htim4); 80178cc: 4b45 ldr r3, [pc, #276] @ (80179e4 ) 80178ce: 681b ldr r3, [r3, #0] 80178d0: 6a5b ldr r3, [r3, #36] @ 0x24 80178d2: b29a uxth r2, r3 80178d4: 683b ldr r3, [r7, #0] 80178d6: 845a strh r2, [r3, #34] @ 0x22 // Ang->diffM = ((Ang->mnew - Ang->mold)<<16)>>16; Ang->diffM = ((Ang->mold - Ang->mnew)<<16)>>16; 80178d8: 683b ldr r3, [r7, #0] 80178da: 8c9b ldrh r3, [r3, #36] @ 0x24 80178dc: 461a mov r2, r3 80178de: 683b ldr r3, [r7, #0] 80178e0: 8c5b ldrh r3, [r3, #34] @ 0x22 80178e2: 1ad3 subs r3, r2, r3 80178e4: 041b lsls r3, r3, #16 80178e6: 141a asrs r2, r3, #16 80178e8: 683b ldr r3, [r7, #0] 80178ea: 629a str r2, [r3, #40] @ 0x28 Ang->Rpm = (float)Ang->diffM * Ang->SpeedScale * 0.3333; // 기어비 반영 80178ec: 683b ldr r3, [r7, #0] 80178ee: 6a9b ldr r3, [r3, #40] @ 0x28 80178f0: ee07 3a90 vmov s15, r3 80178f4: eeb8 7ae7 vcvt.f32.s32 s14, s15 80178f8: 683b ldr r3, [r7, #0] 80178fa: edd3 7a04 vldr s15, [r3, #16] 80178fe: ee67 7a27 vmul.f32 s15, s14, s15 8017902: ee17 0a90 vmov r0, s15 8017906: f7f8 fd4f bl 80103a8 <__aeabi_f2d> 801790a: a331 add r3, pc, #196 @ (adr r3, 80179d0 ) 801790c: e9d3 2300 ldrd r2, r3, [r3] 8017910: f7f8 fda2 bl 8010458 <__aeabi_dmul> 8017914: 4602 mov r2, r0 8017916: 460b mov r3, r1 8017918: 4610 mov r0, r2 801791a: 4619 mov r1, r3 801791c: f7f9 f836 bl 801098c <__aeabi_d2f> 8017920: 4602 mov r2, r0 8017922: 683b ldr r3, [r7, #0] 8017924: 641a str r2, [r3, #64] @ 0x40 Ang->mold = Ang->mnew; 8017926: 683b ldr r3, [r7, #0] 8017928: 8c5a ldrh r2, [r3, #34] @ 0x22 801792a: 683b ldr r3, [r7, #0] 801792c: 849a strh r2, [r3, #36] @ 0x24 LPF(Ang->RpmFil, Ang->Rpm, LpfSpd.fct); 801792e: 683b ldr r3, [r7, #0] 8017930: ed93 7a11 vldr s14, [r3, #68] @ 0x44 8017934: 683b ldr r3, [r7, #0] 8017936: edd3 7a10 vldr s15, [r3, #64] @ 0x40 801793a: ee77 7a67 vsub.f32 s15, s14, s15 801793e: eef5 7ac0 vcmpe.f32 s15, #0.0 8017942: eef1 fa10 vmrs APSR_nzcv, fpscr 8017946: dd12 ble.n 801796e 8017948: 4b24 ldr r3, [pc, #144] @ (80179dc ) 801794a: ed93 7a02 vldr s14, [r3, #8] 801794e: 683b ldr r3, [r7, #0] 8017950: edd3 6a11 vldr s13, [r3, #68] @ 0x44 8017954: 683b ldr r3, [r7, #0] 8017956: edd3 7a10 vldr s15, [r3, #64] @ 0x40 801795a: ee76 7ae7 vsub.f32 s15, s13, s15 801795e: ee27 7a27 vmul.f32 s14, s14, s15 8017962: 683b ldr r3, [r7, #0] 8017964: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8017968: ee77 7a27 vadd.f32 s15, s14, s15 801796c: e013 b.n 8017996 801796e: 4b1b ldr r3, [pc, #108] @ (80179dc ) 8017970: edd3 7a02 vldr s15, [r3, #8] 8017974: eeb1 7a67 vneg.f32 s14, s15 8017978: 683b ldr r3, [r7, #0] 801797a: edd3 6a10 vldr s13, [r3, #64] @ 0x40 801797e: 683b ldr r3, [r7, #0] 8017980: edd3 7a11 vldr s15, [r3, #68] @ 0x44 8017984: ee76 7ae7 vsub.f32 s15, s13, s15 8017988: ee27 7a27 vmul.f32 s14, s14, s15 801798c: 683b ldr r3, [r7, #0] 801798e: edd3 7a10 vldr s15, [r3, #64] @ 0x40 8017992: ee77 7a27 vadd.f32 s15, s14, s15 8017996: 683b ldr r3, [r7, #0] 8017998: edc3 7a11 vstr s15, [r3, #68] @ 0x44 Ang->WeFil = Ang->RpmFil * TR_RPM2RAD; 801799c: 683b ldr r3, [r7, #0] 801799e: edd3 7a11 vldr s15, [r3, #68] @ 0x44 80179a2: ed9f 7a0f vldr s14, [pc, #60] @ 80179e0 80179a6: ee67 7a87 vmul.f32 s15, s15, s14 80179aa: 683b ldr r3, [r7, #0] 80179ac: edc3 7a14 vstr s15, [r3, #80] @ 0x50 Ang->_1msCnt = 0; 80179b0: 683b ldr r3, [r7, #0] 80179b2: 2200 movs r2, #0 80179b4: f883 2020 strb.w r2, [r3, #32] Ang->_1msFlg = 1; 80179b8: 683b ldr r3, [r7, #0] 80179ba: 2201 movs r2, #1 80179bc: f883 2021 strb.w r2, [r3, #33] @ 0x21 } else{} return WP_OK; 80179c0: 2300 movs r3, #0 80179c2: e000 b.n 80179c6 } else{ return WP_ERR; 80179c4: 2301 movs r3, #1 } } 80179c6: 4618 mov r0, r3 80179c8: 3710 adds r7, #16 80179ca: 46bd mov sp, r7 80179cc: bd80 pop {r7, pc} 80179ce: bf00 nop 80179d0: 85f06f69 .word 0x85f06f69 80179d4: 3fd554c9 .word 0x3fd554c9 80179d8: 20000db0 .word 0x20000db0 80179dc: 200008f8 .word 0x200008f8 80179e0: 3dd6773b .word 0x3dd6773b 80179e4: 20000df8 .word 0x20000df8 080179e8 : ADC_HandleTypeDef hadc3; DMA_HandleTypeDef hdma_adc3; /* ADC1 init function */ void MX_ADC1_Init(void) { 80179e8: b580 push {r7, lr} 80179ea: b090 sub sp, #64 @ 0x40 80179ec: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_MultiModeTypeDef multimode = {0}; 80179ee: f107 0334 add.w r3, r7, #52 @ 0x34 80179f2: 2200 movs r2, #0 80179f4: 601a str r2, [r3, #0] 80179f6: 605a str r2, [r3, #4] 80179f8: 609a str r2, [r3, #8] ADC_ChannelConfTypeDef sConfig = {0}; 80179fa: f107 0324 add.w r3, r7, #36 @ 0x24 80179fe: 2200 movs r2, #0 8017a00: 601a str r2, [r3, #0] 8017a02: 605a str r2, [r3, #4] 8017a04: 609a str r2, [r3, #8] 8017a06: 60da str r2, [r3, #12] ADC_InjectionConfTypeDef sConfigInjected = {0}; 8017a08: 1d3b adds r3, r7, #4 8017a0a: 2220 movs r2, #32 8017a0c: 2100 movs r1, #0 8017a0e: 4618 mov r0, r3 8017a10: f010 fd10 bl 8028434 /* USER CODE END ADC1_Init 1 */ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) */ hadc1.Instance = ADC1; 8017a14: 4b4d ldr r3, [pc, #308] @ (8017b4c ) 8017a16: 4a4e ldr r2, [pc, #312] @ (8017b50 ) 8017a18: 601a str r2, [r3, #0] hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; 8017a1a: 4b4c ldr r3, [pc, #304] @ (8017b4c ) 8017a1c: f44f 3280 mov.w r2, #65536 @ 0x10000 8017a20: 605a str r2, [r3, #4] hadc1.Init.Resolution = ADC_RESOLUTION_12B; 8017a22: 4b4a ldr r3, [pc, #296] @ (8017b4c ) 8017a24: 2200 movs r2, #0 8017a26: 609a str r2, [r3, #8] hadc1.Init.ScanConvMode = ENABLE; 8017a28: 4b48 ldr r3, [pc, #288] @ (8017b4c ) 8017a2a: 2201 movs r2, #1 8017a2c: 611a str r2, [r3, #16] hadc1.Init.ContinuousConvMode = DISABLE; 8017a2e: 4b47 ldr r3, [pc, #284] @ (8017b4c ) 8017a30: 2200 movs r2, #0 8017a32: 761a strb r2, [r3, #24] hadc1.Init.DiscontinuousConvMode = DISABLE; 8017a34: 4b45 ldr r3, [pc, #276] @ (8017b4c ) 8017a36: 2200 movs r2, #0 8017a38: f883 2020 strb.w r2, [r3, #32] hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; 8017a3c: 4b43 ldr r3, [pc, #268] @ (8017b4c ) 8017a3e: 2200 movs r2, #0 8017a40: 62da str r2, [r3, #44] @ 0x2c hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8017a42: 4b42 ldr r3, [pc, #264] @ (8017b4c ) 8017a44: 4a43 ldr r2, [pc, #268] @ (8017b54 ) 8017a46: 629a str r2, [r3, #40] @ 0x28 hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8017a48: 4b40 ldr r3, [pc, #256] @ (8017b4c ) 8017a4a: 2200 movs r2, #0 8017a4c: 60da str r2, [r3, #12] hadc1.Init.NbrOfConversion = 1; 8017a4e: 4b3f ldr r3, [pc, #252] @ (8017b4c ) 8017a50: 2201 movs r2, #1 8017a52: 61da str r2, [r3, #28] hadc1.Init.DMAContinuousRequests = DISABLE; 8017a54: 4b3d ldr r3, [pc, #244] @ (8017b4c ) 8017a56: 2200 movs r2, #0 8017a58: f883 2030 strb.w r2, [r3, #48] @ 0x30 hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV; 8017a5c: 4b3b ldr r3, [pc, #236] @ (8017b4c ) 8017a5e: 2200 movs r2, #0 8017a60: 615a str r2, [r3, #20] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8017a62: 483a ldr r0, [pc, #232] @ (8017b4c ) 8017a64: f008 fc30 bl 80202c8 8017a68: 4603 mov r3, r0 8017a6a: 2b00 cmp r3, #0 8017a6c: d001 beq.n 8017a72 { Error_Handler(); 8017a6e: f002 f940 bl 8019cf2 } /** Configure the ADC multi-mode */ multimode.Mode = ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT; 8017a72: 2311 movs r3, #17 8017a74: 637b str r3, [r7, #52] @ 0x34 multimode.DMAAccessMode = ADC_DMAACCESSMODE_DISABLED; 8017a76: 2300 movs r3, #0 8017a78: 63bb str r3, [r7, #56] @ 0x38 multimode.TwoSamplingDelay = ADC_TWOSAMPLINGDELAY_5CYCLES; 8017a7a: 2300 movs r3, #0 8017a7c: 63fb str r3, [r7, #60] @ 0x3c if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) 8017a7e: f107 0334 add.w r3, r7, #52 @ 0x34 8017a82: 4619 mov r1, r3 8017a84: 4831 ldr r0, [pc, #196] @ (8017b4c ) 8017a86: f009 fc27 bl 80212d8 8017a8a: 4603 mov r3, r0 8017a8c: 2b00 cmp r3, #0 8017a8e: d001 beq.n 8017a94 { Error_Handler(); 8017a90: f002 f92f bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_0; 8017a94: 2300 movs r3, #0 8017a96: 627b str r3, [r7, #36] @ 0x24 sConfig.Rank = 1; 8017a98: 2301 movs r3, #1 8017a9a: 62bb str r3, [r7, #40] @ 0x28 sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; 8017a9c: 2300 movs r3, #0 8017a9e: 62fb str r3, [r7, #44] @ 0x2c if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8017aa0: f107 0324 add.w r3, r7, #36 @ 0x24 8017aa4: 4619 mov r1, r3 8017aa6: 4829 ldr r0, [pc, #164] @ (8017b4c ) 8017aa8: f008 fec2 bl 8020830 8017aac: 4603 mov r3, r0 8017aae: 2b00 cmp r3, #0 8017ab0: d001 beq.n 8017ab6 { Error_Handler(); 8017ab2: f002 f91e bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_0; 8017ab6: 2300 movs r3, #0 8017ab8: 607b str r3, [r7, #4] sConfigInjected.InjectedRank = 1; 8017aba: 2301 movs r3, #1 8017abc: 60bb str r3, [r7, #8] sConfigInjected.InjectedNbrOfConversion = 4; 8017abe: 2304 movs r3, #4 8017ac0: 617b str r3, [r7, #20] sConfigInjected.InjectedSamplingTime = ADC_SAMPLETIME_3CYCLES; 8017ac2: 2300 movs r3, #0 8017ac4: 60fb str r3, [r7, #12] sConfigInjected.ExternalTrigInjecConvEdge = ADC_EXTERNALTRIGINJECCONVEDGE_RISING; 8017ac6: f44f 1380 mov.w r3, #1048576 @ 0x100000 8017aca: 623b str r3, [r7, #32] // ↓↓ 이게 ADC1이 TIM4에 트리거 잡혀있다는 의미!! (250703 Claude) sConfigInjected.ExternalTrigInjecConv = ADC_EXTERNALTRIGINJECCONV_T1_CC4; 8017acc: 2300 movs r3, #0 8017ace: 61fb str r3, [r7, #28] sConfigInjected.AutoInjectedConv = DISABLE; 8017ad0: 2300 movs r3, #0 8017ad2: 767b strb r3, [r7, #25] sConfigInjected.InjectedDiscontinuousConvMode = DISABLE; 8017ad4: 2300 movs r3, #0 8017ad6: 763b strb r3, [r7, #24] sConfigInjected.InjectedOffset = 0; 8017ad8: 2300 movs r3, #0 8017ada: 613b str r3, [r7, #16] if (HAL_ADCEx_InjectedConfigChannel(&hadc1, &sConfigInjected) != HAL_OK) 8017adc: 1d3b adds r3, r7, #4 8017ade: 4619 mov r1, r3 8017ae0: 481a ldr r0, [pc, #104] @ (8017b4c ) 8017ae2: f009 fa5f bl 8020fa4 8017ae6: 4603 mov r3, r0 8017ae8: 2b00 cmp r3, #0 8017aea: d001 beq.n 8017af0 { Error_Handler(); 8017aec: f002 f901 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_8; 8017af0: 2308 movs r3, #8 8017af2: 607b str r3, [r7, #4] sConfigInjected.InjectedRank = 2; 8017af4: 2302 movs r3, #2 8017af6: 60bb str r3, [r7, #8] if (HAL_ADCEx_InjectedConfigChannel(&hadc1, &sConfigInjected) != HAL_OK) 8017af8: 1d3b adds r3, r7, #4 8017afa: 4619 mov r1, r3 8017afc: 4813 ldr r0, [pc, #76] @ (8017b4c ) 8017afe: f009 fa51 bl 8020fa4 8017b02: 4603 mov r3, r0 8017b04: 2b00 cmp r3, #0 8017b06: d001 beq.n 8017b0c { Error_Handler(); 8017b08: f002 f8f3 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_3; 8017b0c: 2303 movs r3, #3 8017b0e: 607b str r3, [r7, #4] sConfigInjected.InjectedRank = 3; 8017b10: 2303 movs r3, #3 8017b12: 60bb str r3, [r7, #8] if (HAL_ADCEx_InjectedConfigChannel(&hadc1, &sConfigInjected) != HAL_OK) 8017b14: 1d3b adds r3, r7, #4 8017b16: 4619 mov r1, r3 8017b18: 480c ldr r0, [pc, #48] @ (8017b4c ) 8017b1a: f009 fa43 bl 8020fa4 8017b1e: 4603 mov r3, r0 8017b20: 2b00 cmp r3, #0 8017b22: d001 beq.n 8017b28 { Error_Handler(); 8017b24: f002 f8e5 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_11; 8017b28: 230b movs r3, #11 8017b2a: 607b str r3, [r7, #4] sConfigInjected.InjectedRank = 4; 8017b2c: 2304 movs r3, #4 8017b2e: 60bb str r3, [r7, #8] if (HAL_ADCEx_InjectedConfigChannel(&hadc1, &sConfigInjected) != HAL_OK) 8017b30: 1d3b adds r3, r7, #4 8017b32: 4619 mov r1, r3 8017b34: 4805 ldr r0, [pc, #20] @ (8017b4c ) 8017b36: f009 fa35 bl 8020fa4 8017b3a: 4603 mov r3, r0 8017b3c: 2b00 cmp r3, #0 8017b3e: d001 beq.n 8017b44 { Error_Handler(); 8017b40: f002 f8d7 bl 8019cf2 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8017b44: bf00 nop 8017b46: 3740 adds r7, #64 @ 0x40 8017b48: 46bd mov sp, r7 8017b4a: bd80 pop {r7, pc} 8017b4c: 2000091c .word 0x2000091c 8017b50: 40012000 .word 0x40012000 8017b54: 0f000001 .word 0x0f000001 08017b58 : /* ADC2 init function */ void MX_ADC2_Init(void) { 8017b58: b580 push {r7, lr} 8017b5a: b08c sub sp, #48 @ 0x30 8017b5c: af00 add r7, sp, #0 /* USER CODE BEGIN ADC2_Init 0 */ /* USER CODE END ADC2_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 8017b5e: f107 0320 add.w r3, r7, #32 8017b62: 2200 movs r2, #0 8017b64: 601a str r2, [r3, #0] 8017b66: 605a str r2, [r3, #4] 8017b68: 609a str r2, [r3, #8] 8017b6a: 60da str r2, [r3, #12] ADC_InjectionConfTypeDef sConfigInjected = {0}; 8017b6c: 463b mov r3, r7 8017b6e: 2220 movs r2, #32 8017b70: 2100 movs r1, #0 8017b72: 4618 mov r0, r3 8017b74: f010 fc5e bl 8028434 /* USER CODE END ADC2_Init 1 */ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) */ hadc2.Instance = ADC2; 8017b78: 4b3f ldr r3, [pc, #252] @ (8017c78 ) 8017b7a: 4a40 ldr r2, [pc, #256] @ (8017c7c ) 8017b7c: 601a str r2, [r3, #0] hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; 8017b7e: 4b3e ldr r3, [pc, #248] @ (8017c78 ) 8017b80: f44f 3280 mov.w r2, #65536 @ 0x10000 8017b84: 605a str r2, [r3, #4] hadc2.Init.Resolution = ADC_RESOLUTION_12B; 8017b86: 4b3c ldr r3, [pc, #240] @ (8017c78 ) 8017b88: 2200 movs r2, #0 8017b8a: 609a str r2, [r3, #8] hadc2.Init.ScanConvMode = ENABLE; 8017b8c: 4b3a ldr r3, [pc, #232] @ (8017c78 ) 8017b8e: 2201 movs r2, #1 8017b90: 611a str r2, [r3, #16] hadc2.Init.ContinuousConvMode = DISABLE; 8017b92: 4b39 ldr r3, [pc, #228] @ (8017c78 ) 8017b94: 2200 movs r2, #0 8017b96: 761a strb r2, [r3, #24] hadc2.Init.DiscontinuousConvMode = DISABLE; 8017b98: 4b37 ldr r3, [pc, #220] @ (8017c78 ) 8017b9a: 2200 movs r2, #0 8017b9c: f883 2020 strb.w r2, [r3, #32] hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8017ba0: 4b35 ldr r3, [pc, #212] @ (8017c78 ) 8017ba2: 2200 movs r2, #0 8017ba4: 60da str r2, [r3, #12] hadc2.Init.NbrOfConversion = 1; 8017ba6: 4b34 ldr r3, [pc, #208] @ (8017c78 ) 8017ba8: 2201 movs r2, #1 8017baa: 61da str r2, [r3, #28] hadc2.Init.DMAContinuousRequests = DISABLE; 8017bac: 4b32 ldr r3, [pc, #200] @ (8017c78 ) 8017bae: 2200 movs r2, #0 8017bb0: f883 2030 strb.w r2, [r3, #48] @ 0x30 hadc2.Init.EOCSelection = ADC_EOC_SEQ_CONV; 8017bb4: 4b30 ldr r3, [pc, #192] @ (8017c78 ) 8017bb6: 2200 movs r2, #0 8017bb8: 615a str r2, [r3, #20] if (HAL_ADC_Init(&hadc2) != HAL_OK) 8017bba: 482f ldr r0, [pc, #188] @ (8017c78 ) 8017bbc: f008 fb84 bl 80202c8 8017bc0: 4603 mov r3, r0 8017bc2: 2b00 cmp r3, #0 8017bc4: d001 beq.n 8017bca { Error_Handler(); 8017bc6: f002 f894 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_1; 8017bca: 2301 movs r3, #1 8017bcc: 623b str r3, [r7, #32] sConfig.Rank = 1; 8017bce: 2301 movs r3, #1 8017bd0: 627b str r3, [r7, #36] @ 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; 8017bd2: 2300 movs r3, #0 8017bd4: 62bb str r3, [r7, #40] @ 0x28 if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) 8017bd6: f107 0320 add.w r3, r7, #32 8017bda: 4619 mov r1, r3 8017bdc: 4826 ldr r0, [pc, #152] @ (8017c78 ) 8017bde: f008 fe27 bl 8020830 8017be2: 4603 mov r3, r0 8017be4: 2b00 cmp r3, #0 8017be6: d001 beq.n 8017bec { Error_Handler(); 8017be8: f002 f883 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_1; 8017bec: 2301 movs r3, #1 8017bee: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 1; 8017bf0: 2301 movs r3, #1 8017bf2: 607b str r3, [r7, #4] sConfigInjected.InjectedNbrOfConversion = 4; 8017bf4: 2304 movs r3, #4 8017bf6: 613b str r3, [r7, #16] sConfigInjected.InjectedSamplingTime = ADC_SAMPLETIME_3CYCLES; 8017bf8: 2300 movs r3, #0 8017bfa: 60bb str r3, [r7, #8] sConfigInjected.AutoInjectedConv = ENABLE; 8017bfc: 2301 movs r3, #1 8017bfe: 757b strb r3, [r7, #21] sConfigInjected.InjectedDiscontinuousConvMode = DISABLE; 8017c00: 2300 movs r3, #0 8017c02: 753b strb r3, [r7, #20] sConfigInjected.InjectedOffset = 0; 8017c04: 2300 movs r3, #0 8017c06: 60fb str r3, [r7, #12] if (HAL_ADCEx_InjectedConfigChannel(&hadc2, &sConfigInjected) != HAL_OK) 8017c08: 463b mov r3, r7 8017c0a: 4619 mov r1, r3 8017c0c: 481a ldr r0, [pc, #104] @ (8017c78 ) 8017c0e: f009 f9c9 bl 8020fa4 8017c12: 4603 mov r3, r0 8017c14: 2b00 cmp r3, #0 8017c16: d001 beq.n 8017c1c { Error_Handler(); 8017c18: f002 f86b bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_9; 8017c1c: 2309 movs r3, #9 8017c1e: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 2; 8017c20: 2302 movs r3, #2 8017c22: 607b str r3, [r7, #4] if (HAL_ADCEx_InjectedConfigChannel(&hadc2, &sConfigInjected) != HAL_OK) 8017c24: 463b mov r3, r7 8017c26: 4619 mov r1, r3 8017c28: 4813 ldr r0, [pc, #76] @ (8017c78 ) 8017c2a: f009 f9bb bl 8020fa4 8017c2e: 4603 mov r3, r0 8017c30: 2b00 cmp r3, #0 8017c32: d001 beq.n 8017c38 { Error_Handler(); 8017c34: f002 f85d bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_15; 8017c38: 230f movs r3, #15 8017c3a: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 3; 8017c3c: 2303 movs r3, #3 8017c3e: 607b str r3, [r7, #4] if (HAL_ADCEx_InjectedConfigChannel(&hadc2, &sConfigInjected) != HAL_OK) 8017c40: 463b mov r3, r7 8017c42: 4619 mov r1, r3 8017c44: 480c ldr r0, [pc, #48] @ (8017c78 ) 8017c46: f009 f9ad bl 8020fa4 8017c4a: 4603 mov r3, r0 8017c4c: 2b00 cmp r3, #0 8017c4e: d001 beq.n 8017c54 { Error_Handler(); 8017c50: f002 f84f bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_14; 8017c54: 230e movs r3, #14 8017c56: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 4; 8017c58: 2304 movs r3, #4 8017c5a: 607b str r3, [r7, #4] if (HAL_ADCEx_InjectedConfigChannel(&hadc2, &sConfigInjected) != HAL_OK) 8017c5c: 463b mov r3, r7 8017c5e: 4619 mov r1, r3 8017c60: 4805 ldr r0, [pc, #20] @ (8017c78 ) 8017c62: f009 f99f bl 8020fa4 8017c66: 4603 mov r3, r0 8017c68: 2b00 cmp r3, #0 8017c6a: d001 beq.n 8017c70 { Error_Handler(); 8017c6c: f002 f841 bl 8019cf2 } /* USER CODE BEGIN ADC2_Init 2 */ /* USER CODE END ADC2_Init 2 */ } 8017c70: bf00 nop 8017c72: 3730 adds r7, #48 @ 0x30 8017c74: 46bd mov sp, r7 8017c76: bd80 pop {r7, pc} 8017c78: 20000964 .word 0x20000964 8017c7c: 40012100 .word 0x40012100 08017c80 : /* ADC3 init function */ void MX_ADC3_Init(void) { 8017c80: b580 push {r7, lr} 8017c82: b08c sub sp, #48 @ 0x30 8017c84: af00 add r7, sp, #0 /* USER CODE BEGIN ADC3_Init 0 */ /* USER CODE END ADC3_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 8017c86: f107 0320 add.w r3, r7, #32 8017c8a: 2200 movs r2, #0 8017c8c: 601a str r2, [r3, #0] 8017c8e: 605a str r2, [r3, #4] 8017c90: 609a str r2, [r3, #8] 8017c92: 60da str r2, [r3, #12] ADC_InjectionConfTypeDef sConfigInjected = {0}; 8017c94: 463b mov r3, r7 8017c96: 2220 movs r2, #32 8017c98: 2100 movs r1, #0 8017c9a: 4618 mov r0, r3 8017c9c: f010 fbca bl 8028434 /* USER CODE END ADC3_Init 1 */ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) */ hadc3.Instance = ADC3; 8017ca0: 4b74 ldr r3, [pc, #464] @ (8017e74 ) 8017ca2: 4a75 ldr r2, [pc, #468] @ (8017e78 ) 8017ca4: 601a str r2, [r3, #0] hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; 8017ca6: 4b73 ldr r3, [pc, #460] @ (8017e74 ) 8017ca8: f44f 3280 mov.w r2, #65536 @ 0x10000 8017cac: 605a str r2, [r3, #4] hadc3.Init.Resolution = ADC_RESOLUTION_12B; 8017cae: 4b71 ldr r3, [pc, #452] @ (8017e74 ) 8017cb0: 2200 movs r2, #0 8017cb2: 609a str r2, [r3, #8] hadc3.Init.ScanConvMode = ENABLE; 8017cb4: 4b6f ldr r3, [pc, #444] @ (8017e74 ) 8017cb6: 2201 movs r2, #1 8017cb8: 611a str r2, [r3, #16] hadc3.Init.ContinuousConvMode = ENABLE;//DISABLE; 8017cba: 4b6e ldr r3, [pc, #440] @ (8017e74 ) 8017cbc: 2201 movs r2, #1 8017cbe: 761a strb r2, [r3, #24] hadc3.Init.DiscontinuousConvMode = DISABLE; 8017cc0: 4b6c ldr r3, [pc, #432] @ (8017e74 ) 8017cc2: 2200 movs r2, #0 8017cc4: f883 2020 strb.w r2, [r3, #32] hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8017cc8: 4b6a ldr r3, [pc, #424] @ (8017e74 ) 8017cca: 2200 movs r2, #0 8017ccc: 60da str r2, [r3, #12] hadc3.Init.NbrOfConversion = 8; 8017cce: 4b69 ldr r3, [pc, #420] @ (8017e74 ) 8017cd0: 2208 movs r2, #8 8017cd2: 61da str r2, [r3, #28] hadc3.Init.DMAContinuousRequests = ENABLE; 8017cd4: 4b67 ldr r3, [pc, #412] @ (8017e74 ) 8017cd6: 2201 movs r2, #1 8017cd8: f883 2030 strb.w r2, [r3, #48] @ 0x30 hadc3.Init.EOCSelection = ADC_EOC_SEQ_CONV; 8017cdc: 4b65 ldr r3, [pc, #404] @ (8017e74 ) 8017cde: 2200 movs r2, #0 8017ce0: 615a str r2, [r3, #20] if (HAL_ADC_Init(&hadc3) != HAL_OK) 8017ce2: 4864 ldr r0, [pc, #400] @ (8017e74 ) 8017ce4: f008 faf0 bl 80202c8 8017ce8: 4603 mov r3, r0 8017cea: 2b00 cmp r3, #0 8017cec: d001 beq.n 8017cf2 { Error_Handler(); 8017cee: f002 f800 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_4; 8017cf2: 2304 movs r3, #4 8017cf4: 623b str r3, [r7, #32] sConfig.Rank = 1; 8017cf6: 2301 movs r3, #1 8017cf8: 627b str r3, [r7, #36] @ 0x24 sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; 8017cfa: 2300 movs r3, #0 8017cfc: 62bb str r3, [r7, #40] @ 0x28 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017cfe: f107 0320 add.w r3, r7, #32 8017d02: 4619 mov r1, r3 8017d04: 485b ldr r0, [pc, #364] @ (8017e74 ) 8017d06: f008 fd93 bl 8020830 8017d0a: 4603 mov r3, r0 8017d0c: 2b00 cmp r3, #0 8017d0e: d001 beq.n 8017d14 { Error_Handler(); 8017d10: f001 ffef bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_5; 8017d14: 2305 movs r3, #5 8017d16: 623b str r3, [r7, #32] sConfig.Rank = 2; 8017d18: 2302 movs r3, #2 8017d1a: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017d1c: f107 0320 add.w r3, r7, #32 8017d20: 4619 mov r1, r3 8017d22: 4854 ldr r0, [pc, #336] @ (8017e74 ) 8017d24: f008 fd84 bl 8020830 8017d28: 4603 mov r3, r0 8017d2a: 2b00 cmp r3, #0 8017d2c: d001 beq.n 8017d32 { Error_Handler(); 8017d2e: f001 ffe0 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_6; 8017d32: 2306 movs r3, #6 8017d34: 623b str r3, [r7, #32] sConfig.Rank = 3; 8017d36: 2303 movs r3, #3 8017d38: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017d3a: f107 0320 add.w r3, r7, #32 8017d3e: 4619 mov r1, r3 8017d40: 484c ldr r0, [pc, #304] @ (8017e74 ) 8017d42: f008 fd75 bl 8020830 8017d46: 4603 mov r3, r0 8017d48: 2b00 cmp r3, #0 8017d4a: d001 beq.n 8017d50 { Error_Handler(); 8017d4c: f001 ffd1 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_7; 8017d50: 2307 movs r3, #7 8017d52: 623b str r3, [r7, #32] sConfig.Rank = 4; 8017d54: 2304 movs r3, #4 8017d56: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017d58: f107 0320 add.w r3, r7, #32 8017d5c: 4619 mov r1, r3 8017d5e: 4845 ldr r0, [pc, #276] @ (8017e74 ) 8017d60: f008 fd66 bl 8020830 8017d64: 4603 mov r3, r0 8017d66: 2b00 cmp r3, #0 8017d68: d001 beq.n 8017d6e { Error_Handler(); 8017d6a: f001 ffc2 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_8; 8017d6e: 2308 movs r3, #8 8017d70: 623b str r3, [r7, #32] sConfig.Rank = 5; 8017d72: 2305 movs r3, #5 8017d74: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017d76: f107 0320 add.w r3, r7, #32 8017d7a: 4619 mov r1, r3 8017d7c: 483d ldr r0, [pc, #244] @ (8017e74 ) 8017d7e: f008 fd57 bl 8020830 8017d82: 4603 mov r3, r0 8017d84: 2b00 cmp r3, #0 8017d86: d001 beq.n 8017d8c { Error_Handler(); 8017d88: f001 ffb3 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_9; 8017d8c: 2309 movs r3, #9 8017d8e: 623b str r3, [r7, #32] sConfig.Rank = 6; 8017d90: 2306 movs r3, #6 8017d92: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017d94: f107 0320 add.w r3, r7, #32 8017d98: 4619 mov r1, r3 8017d9a: 4836 ldr r0, [pc, #216] @ (8017e74 ) 8017d9c: f008 fd48 bl 8020830 8017da0: 4603 mov r3, r0 8017da2: 2b00 cmp r3, #0 8017da4: d001 beq.n 8017daa { Error_Handler(); 8017da6: f001 ffa4 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_14; 8017daa: 230e movs r3, #14 8017dac: 623b str r3, [r7, #32] sConfig.Rank = 7; 8017dae: 2307 movs r3, #7 8017db0: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017db2: f107 0320 add.w r3, r7, #32 8017db6: 4619 mov r1, r3 8017db8: 482e ldr r0, [pc, #184] @ (8017e74 ) 8017dba: f008 fd39 bl 8020830 8017dbe: 4603 mov r3, r0 8017dc0: 2b00 cmp r3, #0 8017dc2: d001 beq.n 8017dc8 { Error_Handler(); 8017dc4: f001 ff95 bl 8019cf2 } /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. */ sConfig.Channel = ADC_CHANNEL_15; 8017dc8: 230f movs r3, #15 8017dca: 623b str r3, [r7, #32] sConfig.Rank = 8; 8017dcc: 2308 movs r3, #8 8017dce: 627b str r3, [r7, #36] @ 0x24 if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) 8017dd0: f107 0320 add.w r3, r7, #32 8017dd4: 4619 mov r1, r3 8017dd6: 4827 ldr r0, [pc, #156] @ (8017e74 ) 8017dd8: f008 fd2a bl 8020830 8017ddc: 4603 mov r3, r0 8017dde: 2b00 cmp r3, #0 8017de0: d001 beq.n 8017de6 { Error_Handler(); 8017de2: f001 ff86 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_2; 8017de6: 2302 movs r3, #2 8017de8: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 1; 8017dea: 2301 movs r3, #1 8017dec: 607b str r3, [r7, #4] sConfigInjected.InjectedNbrOfConversion = 4; 8017dee: 2304 movs r3, #4 8017df0: 613b str r3, [r7, #16] sConfigInjected.InjectedSamplingTime = ADC_SAMPLETIME_3CYCLES; 8017df2: 2300 movs r3, #0 8017df4: 60bb str r3, [r7, #8] sConfigInjected.AutoInjectedConv = ENABLE; 8017df6: 2301 movs r3, #1 8017df8: 757b strb r3, [r7, #21] sConfigInjected.InjectedDiscontinuousConvMode = DISABLE; 8017dfa: 2300 movs r3, #0 8017dfc: 753b strb r3, [r7, #20] sConfigInjected.InjectedOffset = 0; 8017dfe: 2300 movs r3, #0 8017e00: 60fb str r3, [r7, #12] if (HAL_ADCEx_InjectedConfigChannel(&hadc3, &sConfigInjected) != HAL_OK) 8017e02: 463b mov r3, r7 8017e04: 4619 mov r1, r3 8017e06: 481b ldr r0, [pc, #108] @ (8017e74 ) 8017e08: f009 f8cc bl 8020fa4 8017e0c: 4603 mov r3, r0 8017e0e: 2b00 cmp r3, #0 8017e10: d001 beq.n 8017e16 { Error_Handler(); 8017e12: f001 ff6e bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_10; 8017e16: 230a movs r3, #10 8017e18: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 2; 8017e1a: 2302 movs r3, #2 8017e1c: 607b str r3, [r7, #4] if (HAL_ADCEx_InjectedConfigChannel(&hadc3, &sConfigInjected) != HAL_OK) 8017e1e: 463b mov r3, r7 8017e20: 4619 mov r1, r3 8017e22: 4814 ldr r0, [pc, #80] @ (8017e74 ) 8017e24: f009 f8be bl 8020fa4 8017e28: 4603 mov r3, r0 8017e2a: 2b00 cmp r3, #0 8017e2c: d001 beq.n 8017e32 { Error_Handler(); 8017e2e: f001 ff60 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_12; 8017e32: 230c movs r3, #12 8017e34: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 3; 8017e36: 2303 movs r3, #3 8017e38: 607b str r3, [r7, #4] if (HAL_ADCEx_InjectedConfigChannel(&hadc3, &sConfigInjected) != HAL_OK) 8017e3a: 463b mov r3, r7 8017e3c: 4619 mov r1, r3 8017e3e: 480d ldr r0, [pc, #52] @ (8017e74 ) 8017e40: f009 f8b0 bl 8020fa4 8017e44: 4603 mov r3, r0 8017e46: 2b00 cmp r3, #0 8017e48: d001 beq.n 8017e4e { Error_Handler(); 8017e4a: f001 ff52 bl 8019cf2 } /** Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time */ sConfigInjected.InjectedChannel = ADC_CHANNEL_13; 8017e4e: 230d movs r3, #13 8017e50: 603b str r3, [r7, #0] sConfigInjected.InjectedRank = 4; 8017e52: 2304 movs r3, #4 8017e54: 607b str r3, [r7, #4] if (HAL_ADCEx_InjectedConfigChannel(&hadc3, &sConfigInjected) != HAL_OK) 8017e56: 463b mov r3, r7 8017e58: 4619 mov r1, r3 8017e5a: 4806 ldr r0, [pc, #24] @ (8017e74 ) 8017e5c: f009 f8a2 bl 8020fa4 8017e60: 4603 mov r3, r0 8017e62: 2b00 cmp r3, #0 8017e64: d001 beq.n 8017e6a { Error_Handler(); 8017e66: f001 ff44 bl 8019cf2 } /* USER CODE BEGIN ADC3_Init 2 */ /* USER CODE END ADC3_Init 2 */ } 8017e6a: bf00 nop 8017e6c: 3730 adds r7, #48 @ 0x30 8017e6e: 46bd mov sp, r7 8017e70: bd80 pop {r7, pc} 8017e72: bf00 nop 8017e74: 200009ac .word 0x200009ac 8017e78: 40012200 .word 0x40012200 08017e7c : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { 8017e7c: b580 push {r7, lr} 8017e7e: b094 sub sp, #80 @ 0x50 8017e80: af00 add r7, sp, #0 8017e82: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8017e84: f107 033c add.w r3, r7, #60 @ 0x3c 8017e88: 2200 movs r2, #0 8017e8a: 601a str r2, [r3, #0] 8017e8c: 605a str r2, [r3, #4] 8017e8e: 609a str r2, [r3, #8] 8017e90: 60da str r2, [r3, #12] 8017e92: 611a str r2, [r3, #16] if(adcHandle->Instance==ADC1) 8017e94: 687b ldr r3, [r7, #4] 8017e96: 681b ldr r3, [r3, #0] 8017e98: 4a68 ldr r2, [pc, #416] @ (801803c ) 8017e9a: 4293 cmp r3, r2 8017e9c: d164 bne.n 8017f68 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8017e9e: 2300 movs r3, #0 8017ea0: 63bb str r3, [r7, #56] @ 0x38 8017ea2: 4b67 ldr r3, [pc, #412] @ (8018040 ) 8017ea4: 6c5b ldr r3, [r3, #68] @ 0x44 8017ea6: 4a66 ldr r2, [pc, #408] @ (8018040 ) 8017ea8: f443 7380 orr.w r3, r3, #256 @ 0x100 8017eac: 6453 str r3, [r2, #68] @ 0x44 8017eae: 4b64 ldr r3, [pc, #400] @ (8018040 ) 8017eb0: 6c5b ldr r3, [r3, #68] @ 0x44 8017eb2: f403 7380 and.w r3, r3, #256 @ 0x100 8017eb6: 63bb str r3, [r7, #56] @ 0x38 8017eb8: 6bbb ldr r3, [r7, #56] @ 0x38 __HAL_RCC_GPIOC_CLK_ENABLE(); 8017eba: 2300 movs r3, #0 8017ebc: 637b str r3, [r7, #52] @ 0x34 8017ebe: 4b60 ldr r3, [pc, #384] @ (8018040 ) 8017ec0: 6b1b ldr r3, [r3, #48] @ 0x30 8017ec2: 4a5f ldr r2, [pc, #380] @ (8018040 ) 8017ec4: f043 0304 orr.w r3, r3, #4 8017ec8: 6313 str r3, [r2, #48] @ 0x30 8017eca: 4b5d ldr r3, [pc, #372] @ (8018040 ) 8017ecc: 6b1b ldr r3, [r3, #48] @ 0x30 8017ece: f003 0304 and.w r3, r3, #4 8017ed2: 637b str r3, [r7, #52] @ 0x34 8017ed4: 6b7b ldr r3, [r7, #52] @ 0x34 __HAL_RCC_GPIOA_CLK_ENABLE(); 8017ed6: 2300 movs r3, #0 8017ed8: 633b str r3, [r7, #48] @ 0x30 8017eda: 4b59 ldr r3, [pc, #356] @ (8018040 ) 8017edc: 6b1b ldr r3, [r3, #48] @ 0x30 8017ede: 4a58 ldr r2, [pc, #352] @ (8018040 ) 8017ee0: f043 0301 orr.w r3, r3, #1 8017ee4: 6313 str r3, [r2, #48] @ 0x30 8017ee6: 4b56 ldr r3, [pc, #344] @ (8018040 ) 8017ee8: 6b1b ldr r3, [r3, #48] @ 0x30 8017eea: f003 0301 and.w r3, r3, #1 8017eee: 633b str r3, [r7, #48] @ 0x30 8017ef0: 6b3b ldr r3, [r7, #48] @ 0x30 __HAL_RCC_GPIOB_CLK_ENABLE(); 8017ef2: 2300 movs r3, #0 8017ef4: 62fb str r3, [r7, #44] @ 0x2c 8017ef6: 4b52 ldr r3, [pc, #328] @ (8018040 ) 8017ef8: 6b1b ldr r3, [r3, #48] @ 0x30 8017efa: 4a51 ldr r2, [pc, #324] @ (8018040 ) 8017efc: f043 0302 orr.w r3, r3, #2 8017f00: 6313 str r3, [r2, #48] @ 0x30 8017f02: 4b4f ldr r3, [pc, #316] @ (8018040 ) 8017f04: 6b1b ldr r3, [r3, #48] @ 0x30 8017f06: f003 0302 and.w r3, r3, #2 8017f0a: 62fb str r3, [r7, #44] @ 0x2c 8017f0c: 6afb ldr r3, [r7, #44] @ 0x2c PC1 ------> ADC1_IN11 PA0-WKUP ------> ADC1_IN0 PA3 ------> ADC1_IN3 PB0 ------> ADC1_IN8 */ GPIO_InitStruct.Pin = GPIO_PIN_1; 8017f0e: 2302 movs r3, #2 8017f10: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8017f12: 2303 movs r3, #3 8017f14: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 8017f16: 2300 movs r3, #0 8017f18: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8017f1a: f107 033c add.w r3, r7, #60 @ 0x3c 8017f1e: 4619 mov r1, r3 8017f20: 4848 ldr r0, [pc, #288] @ (8018044 ) 8017f22: f00a fbb9 bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_3; 8017f26: 2309 movs r3, #9 8017f28: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8017f2a: 2303 movs r3, #3 8017f2c: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 8017f2e: 2300 movs r3, #0 8017f30: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8017f32: f107 033c add.w r3, r7, #60 @ 0x3c 8017f36: 4619 mov r1, r3 8017f38: 4843 ldr r0, [pc, #268] @ (8018048 ) 8017f3a: f00a fbad bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_0; 8017f3e: 2301 movs r3, #1 8017f40: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8017f42: 2303 movs r3, #3 8017f44: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 8017f46: 2300 movs r3, #0 8017f48: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8017f4a: f107 033c add.w r3, r7, #60 @ 0x3c 8017f4e: 4619 mov r1, r3 8017f50: 483e ldr r0, [pc, #248] @ (801804c ) 8017f52: f00a fba1 bl 8022698 /* ADC1 interrupt Init */ HAL_NVIC_SetPriority(ADC_IRQn, 0, 0); 8017f56: 2200 movs r2, #0 8017f58: 2100 movs r1, #0 8017f5a: 2012 movs r0, #18 8017f5c: f009 fb17 bl 802158e HAL_NVIC_EnableIRQ(ADC_IRQn); 8017f60: 2012 movs r0, #18 8017f62: f009 fb30 bl 80215c6 HAL_NVIC_EnableIRQ(ADC_IRQn); /* USER CODE BEGIN ADC3_MspInit 1 */ /* USER CODE END ADC3_MspInit 1 */ } } 8017f66: e111 b.n 801818c else if(adcHandle->Instance==ADC2) 8017f68: 687b ldr r3, [r7, #4] 8017f6a: 681b ldr r3, [r3, #0] 8017f6c: 4a38 ldr r2, [pc, #224] @ (8018050 ) 8017f6e: 4293 cmp r3, r2 8017f70: d170 bne.n 8018054 __HAL_RCC_ADC2_CLK_ENABLE(); 8017f72: 2300 movs r3, #0 8017f74: 62bb str r3, [r7, #40] @ 0x28 8017f76: 4b32 ldr r3, [pc, #200] @ (8018040 ) 8017f78: 6c5b ldr r3, [r3, #68] @ 0x44 8017f7a: 4a31 ldr r2, [pc, #196] @ (8018040 ) 8017f7c: f443 7300 orr.w r3, r3, #512 @ 0x200 8017f80: 6453 str r3, [r2, #68] @ 0x44 8017f82: 4b2f ldr r3, [pc, #188] @ (8018040 ) 8017f84: 6c5b ldr r3, [r3, #68] @ 0x44 8017f86: f403 7300 and.w r3, r3, #512 @ 0x200 8017f8a: 62bb str r3, [r7, #40] @ 0x28 8017f8c: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOA_CLK_ENABLE(); 8017f8e: 2300 movs r3, #0 8017f90: 627b str r3, [r7, #36] @ 0x24 8017f92: 4b2b ldr r3, [pc, #172] @ (8018040 ) 8017f94: 6b1b ldr r3, [r3, #48] @ 0x30 8017f96: 4a2a ldr r2, [pc, #168] @ (8018040 ) 8017f98: f043 0301 orr.w r3, r3, #1 8017f9c: 6313 str r3, [r2, #48] @ 0x30 8017f9e: 4b28 ldr r3, [pc, #160] @ (8018040 ) 8017fa0: 6b1b ldr r3, [r3, #48] @ 0x30 8017fa2: f003 0301 and.w r3, r3, #1 8017fa6: 627b str r3, [r7, #36] @ 0x24 8017fa8: 6a7b ldr r3, [r7, #36] @ 0x24 __HAL_RCC_GPIOC_CLK_ENABLE(); 8017faa: 2300 movs r3, #0 8017fac: 623b str r3, [r7, #32] 8017fae: 4b24 ldr r3, [pc, #144] @ (8018040 ) 8017fb0: 6b1b ldr r3, [r3, #48] @ 0x30 8017fb2: 4a23 ldr r2, [pc, #140] @ (8018040 ) 8017fb4: f043 0304 orr.w r3, r3, #4 8017fb8: 6313 str r3, [r2, #48] @ 0x30 8017fba: 4b21 ldr r3, [pc, #132] @ (8018040 ) 8017fbc: 6b1b ldr r3, [r3, #48] @ 0x30 8017fbe: f003 0304 and.w r3, r3, #4 8017fc2: 623b str r3, [r7, #32] 8017fc4: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOB_CLK_ENABLE(); 8017fc6: 2300 movs r3, #0 8017fc8: 61fb str r3, [r7, #28] 8017fca: 4b1d ldr r3, [pc, #116] @ (8018040 ) 8017fcc: 6b1b ldr r3, [r3, #48] @ 0x30 8017fce: 4a1c ldr r2, [pc, #112] @ (8018040 ) 8017fd0: f043 0302 orr.w r3, r3, #2 8017fd4: 6313 str r3, [r2, #48] @ 0x30 8017fd6: 4b1a ldr r3, [pc, #104] @ (8018040 ) 8017fd8: 6b1b ldr r3, [r3, #48] @ 0x30 8017fda: f003 0302 and.w r3, r3, #2 8017fde: 61fb str r3, [r7, #28] 8017fe0: 69fb ldr r3, [r7, #28] GPIO_InitStruct.Pin = GPIO_PIN_1; 8017fe2: 2302 movs r3, #2 8017fe4: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8017fe6: 2303 movs r3, #3 8017fe8: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 8017fea: 2300 movs r3, #0 8017fec: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8017fee: f107 033c add.w r3, r7, #60 @ 0x3c 8017ff2: 4619 mov r1, r3 8017ff4: 4814 ldr r0, [pc, #80] @ (8018048 ) 8017ff6: f00a fb4f bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 8017ffa: 2330 movs r3, #48 @ 0x30 8017ffc: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8017ffe: 2303 movs r3, #3 8018000: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018002: 2300 movs r3, #0 8018004: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8018006: f107 033c add.w r3, r7, #60 @ 0x3c 801800a: 4619 mov r1, r3 801800c: 480d ldr r0, [pc, #52] @ (8018044 ) 801800e: f00a fb43 bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_1; 8018012: 2302 movs r3, #2 8018014: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8018016: 2303 movs r3, #3 8018018: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 801801a: 2300 movs r3, #0 801801c: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 801801e: f107 033c add.w r3, r7, #60 @ 0x3c 8018022: 4619 mov r1, r3 8018024: 4809 ldr r0, [pc, #36] @ (801804c ) 8018026: f00a fb37 bl 8022698 HAL_NVIC_SetPriority(ADC_IRQn, 0, 0); 801802a: 2200 movs r2, #0 801802c: 2100 movs r1, #0 801802e: 2012 movs r0, #18 8018030: f009 faad bl 802158e HAL_NVIC_EnableIRQ(ADC_IRQn); 8018034: 2012 movs r0, #18 8018036: f009 fac6 bl 80215c6 } 801803a: e0a7 b.n 801818c 801803c: 40012000 .word 0x40012000 8018040: 40023800 .word 0x40023800 8018044: 40020800 .word 0x40020800 8018048: 40020000 .word 0x40020000 801804c: 40020400 .word 0x40020400 8018050: 40012100 .word 0x40012100 else if(adcHandle->Instance==ADC3) 8018054: 687b ldr r3, [r7, #4] 8018056: 681b ldr r3, [r3, #0] 8018058: 4a4e ldr r2, [pc, #312] @ (8018194 ) 801805a: 4293 cmp r3, r2 801805c: f040 8096 bne.w 801818c __HAL_RCC_ADC3_CLK_ENABLE(); 8018060: 2300 movs r3, #0 8018062: 61bb str r3, [r7, #24] 8018064: 4b4c ldr r3, [pc, #304] @ (8018198 ) 8018066: 6c5b ldr r3, [r3, #68] @ 0x44 8018068: 4a4b ldr r2, [pc, #300] @ (8018198 ) 801806a: f443 6380 orr.w r3, r3, #1024 @ 0x400 801806e: 6453 str r3, [r2, #68] @ 0x44 8018070: 4b49 ldr r3, [pc, #292] @ (8018198 ) 8018072: 6c5b ldr r3, [r3, #68] @ 0x44 8018074: f403 6380 and.w r3, r3, #1024 @ 0x400 8018078: 61bb str r3, [r7, #24] 801807a: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOF_CLK_ENABLE(); 801807c: 2300 movs r3, #0 801807e: 617b str r3, [r7, #20] 8018080: 4b45 ldr r3, [pc, #276] @ (8018198 ) 8018082: 6b1b ldr r3, [r3, #48] @ 0x30 8018084: 4a44 ldr r2, [pc, #272] @ (8018198 ) 8018086: f043 0320 orr.w r3, r3, #32 801808a: 6313 str r3, [r2, #48] @ 0x30 801808c: 4b42 ldr r3, [pc, #264] @ (8018198 ) 801808e: 6b1b ldr r3, [r3, #48] @ 0x30 8018090: f003 0320 and.w r3, r3, #32 8018094: 617b str r3, [r7, #20] 8018096: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOC_CLK_ENABLE(); 8018098: 2300 movs r3, #0 801809a: 613b str r3, [r7, #16] 801809c: 4b3e ldr r3, [pc, #248] @ (8018198 ) 801809e: 6b1b ldr r3, [r3, #48] @ 0x30 80180a0: 4a3d ldr r2, [pc, #244] @ (8018198 ) 80180a2: f043 0304 orr.w r3, r3, #4 80180a6: 6313 str r3, [r2, #48] @ 0x30 80180a8: 4b3b ldr r3, [pc, #236] @ (8018198 ) 80180aa: 6b1b ldr r3, [r3, #48] @ 0x30 80180ac: f003 0304 and.w r3, r3, #4 80180b0: 613b str r3, [r7, #16] 80180b2: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80180b4: 2300 movs r3, #0 80180b6: 60fb str r3, [r7, #12] 80180b8: 4b37 ldr r3, [pc, #220] @ (8018198 ) 80180ba: 6b1b ldr r3, [r3, #48] @ 0x30 80180bc: 4a36 ldr r2, [pc, #216] @ (8018198 ) 80180be: f043 0301 orr.w r3, r3, #1 80180c2: 6313 str r3, [r2, #48] @ 0x30 80180c4: 4b34 ldr r3, [pc, #208] @ (8018198 ) 80180c6: 6b1b ldr r3, [r3, #48] @ 0x30 80180c8: f003 0301 and.w r3, r3, #1 80180cc: 60fb str r3, [r7, #12] 80180ce: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6 80180d0: f44f 63ff mov.w r3, #2040 @ 0x7f8 80180d4: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80180d6: 2303 movs r3, #3 80180d8: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 80180da: 2300 movs r3, #0 80180dc: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 80180de: f107 033c add.w r3, r7, #60 @ 0x3c 80180e2: 4619 mov r1, r3 80180e4: 482d ldr r0, [pc, #180] @ (801819c ) 80180e6: f00a fad7 bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3; 80180ea: 230d movs r3, #13 80180ec: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80180ee: 2303 movs r3, #3 80180f0: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 80180f2: 2300 movs r3, #0 80180f4: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80180f6: f107 033c add.w r3, r7, #60 @ 0x3c 80180fa: 4619 mov r1, r3 80180fc: 4828 ldr r0, [pc, #160] @ (80181a0 ) 80180fe: f00a facb bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_2; 8018102: 2304 movs r3, #4 8018104: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8018106: 2303 movs r3, #3 8018108: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Pull = GPIO_NOPULL; 801810a: 2300 movs r3, #0 801810c: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 801810e: f107 033c add.w r3, r7, #60 @ 0x3c 8018112: 4619 mov r1, r3 8018114: 4823 ldr r0, [pc, #140] @ (80181a4 ) 8018116: f00a fabf bl 8022698 hdma_adc3.Instance = DMA2_Stream0; 801811a: 4b23 ldr r3, [pc, #140] @ (80181a8 ) 801811c: 4a23 ldr r2, [pc, #140] @ (80181ac ) 801811e: 601a str r2, [r3, #0] hdma_adc3.Init.Channel = DMA_CHANNEL_2; 8018120: 4b21 ldr r3, [pc, #132] @ (80181a8 ) 8018122: f04f 6280 mov.w r2, #67108864 @ 0x4000000 8018126: 605a str r2, [r3, #4] hdma_adc3.Init.Direction = DMA_PERIPH_TO_MEMORY; 8018128: 4b1f ldr r3, [pc, #124] @ (80181a8 ) 801812a: 2200 movs r2, #0 801812c: 609a str r2, [r3, #8] hdma_adc3.Init.PeriphInc = DMA_PINC_DISABLE; 801812e: 4b1e ldr r3, [pc, #120] @ (80181a8 ) 8018130: 2200 movs r2, #0 8018132: 60da str r2, [r3, #12] hdma_adc3.Init.MemInc = DMA_MINC_ENABLE; 8018134: 4b1c ldr r3, [pc, #112] @ (80181a8 ) 8018136: f44f 6280 mov.w r2, #1024 @ 0x400 801813a: 611a str r2, [r3, #16] hdma_adc3.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 801813c: 4b1a ldr r3, [pc, #104] @ (80181a8 ) 801813e: f44f 6200 mov.w r2, #2048 @ 0x800 8018142: 615a str r2, [r3, #20] hdma_adc3.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8018144: 4b18 ldr r3, [pc, #96] @ (80181a8 ) 8018146: f44f 5200 mov.w r2, #8192 @ 0x2000 801814a: 619a str r2, [r3, #24] hdma_adc3.Init.Mode = DMA_CIRCULAR; 801814c: 4b16 ldr r3, [pc, #88] @ (80181a8 ) 801814e: f44f 7280 mov.w r2, #256 @ 0x100 8018152: 61da str r2, [r3, #28] hdma_adc3.Init.Priority = DMA_PRIORITY_LOW; 8018154: 4b14 ldr r3, [pc, #80] @ (80181a8 ) 8018156: 2200 movs r2, #0 8018158: 621a str r2, [r3, #32] hdma_adc3.Init.FIFOMode = DMA_FIFOMODE_DISABLE; 801815a: 4b13 ldr r3, [pc, #76] @ (80181a8 ) 801815c: 2200 movs r2, #0 801815e: 625a str r2, [r3, #36] @ 0x24 if (HAL_DMA_Init(&hdma_adc3) != HAL_OK) 8018160: 4811 ldr r0, [pc, #68] @ (80181a8 ) 8018162: f009 fb43 bl 80217ec 8018166: 4603 mov r3, r0 8018168: 2b00 cmp r3, #0 801816a: d001 beq.n 8018170 Error_Handler(); 801816c: f001 fdc1 bl 8019cf2 __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc3); 8018170: 687b ldr r3, [r7, #4] 8018172: 4a0d ldr r2, [pc, #52] @ (80181a8 ) 8018174: 639a str r2, [r3, #56] @ 0x38 8018176: 4a0c ldr r2, [pc, #48] @ (80181a8 ) 8018178: 687b ldr r3, [r7, #4] 801817a: 6393 str r3, [r2, #56] @ 0x38 HAL_NVIC_SetPriority(ADC_IRQn, 0, 0); 801817c: 2200 movs r2, #0 801817e: 2100 movs r1, #0 8018180: 2012 movs r0, #18 8018182: f009 fa04 bl 802158e HAL_NVIC_EnableIRQ(ADC_IRQn); 8018186: 2012 movs r0, #18 8018188: f009 fa1d bl 80215c6 } 801818c: bf00 nop 801818e: 3750 adds r7, #80 @ 0x50 8018190: 46bd mov sp, r7 8018192: bd80 pop {r7, pc} 8018194: 40012200 .word 0x40012200 8018198: 40023800 .word 0x40023800 801819c: 40021400 .word 0x40021400 80181a0: 40020800 .word 0x40020800 80181a4: 40020000 .word 0x40020000 80181a8: 200009f4 .word 0x200009f4 80181ac: 40026410 .word 0x40026410 080181b0 : void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle) { 80181b0: b580 push {r7, lr} 80181b2: b082 sub sp, #8 80181b4: af00 add r7, sp, #0 80181b6: 6078 str r0, [r7, #4] if(adcHandle->Instance==ADC1) 80181b8: 687b ldr r3, [r7, #4] 80181ba: 681b ldr r3, [r3, #0] 80181bc: 4a2b ldr r2, [pc, #172] @ (801826c ) 80181be: 4293 cmp r3, r2 80181c0: d115 bne.n 80181ee { /* USER CODE BEGIN ADC1_MspDeInit 0 */ /* USER CODE END ADC1_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_ADC1_CLK_DISABLE(); 80181c2: 4b2b ldr r3, [pc, #172] @ (8018270 ) 80181c4: 6c5b ldr r3, [r3, #68] @ 0x44 80181c6: 4a2a ldr r2, [pc, #168] @ (8018270 ) 80181c8: f423 7380 bic.w r3, r3, #256 @ 0x100 80181cc: 6453 str r3, [r2, #68] @ 0x44 PC1 ------> ADC1_IN11 PA0-WKUP ------> ADC1_IN0 PA3 ------> ADC1_IN3 PB0 ------> ADC1_IN8 */ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1); 80181ce: 2102 movs r1, #2 80181d0: 4828 ldr r0, [pc, #160] @ (8018274 ) 80181d2: f00a fbf5 bl 80229c0 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_3); 80181d6: 2109 movs r1, #9 80181d8: 4827 ldr r0, [pc, #156] @ (8018278 ) 80181da: f00a fbf1 bl 80229c0 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0); 80181de: 2101 movs r1, #1 80181e0: 4826 ldr r0, [pc, #152] @ (801827c ) 80181e2: f00a fbed bl 80229c0 /* USER CODE BEGIN ADC1:ADC_IRQn disable */ /** * Uncomment the line below to disable the "ADC_IRQn" interrupt * Be aware, disabling shared interrupt may affect other IPs */ HAL_NVIC_DisableIRQ(ADC_IRQn); 80181e6: 2012 movs r0, #18 80181e8: f009 f9fb bl 80215e2 /* USER CODE BEGIN ADC3_MspDeInit 1 */ /* USER CODE END ADC3_MspDeInit 1 */ } } 80181ec: e03a b.n 8018264 else if(adcHandle->Instance==ADC2) 80181ee: 687b ldr r3, [r7, #4] 80181f0: 681b ldr r3, [r3, #0] 80181f2: 4a23 ldr r2, [pc, #140] @ (8018280 ) 80181f4: 4293 cmp r3, r2 80181f6: d115 bne.n 8018224 __HAL_RCC_ADC2_CLK_DISABLE(); 80181f8: 4b1d ldr r3, [pc, #116] @ (8018270 ) 80181fa: 6c5b ldr r3, [r3, #68] @ 0x44 80181fc: 4a1c ldr r2, [pc, #112] @ (8018270 ) 80181fe: f423 7300 bic.w r3, r3, #512 @ 0x200 8018202: 6453 str r3, [r2, #68] @ 0x44 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1); 8018204: 2102 movs r1, #2 8018206: 481c ldr r0, [pc, #112] @ (8018278 ) 8018208: f00a fbda bl 80229c0 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4|GPIO_PIN_5); 801820c: 2130 movs r1, #48 @ 0x30 801820e: 4819 ldr r0, [pc, #100] @ (8018274 ) 8018210: f00a fbd6 bl 80229c0 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_1); 8018214: 2102 movs r1, #2 8018216: 4819 ldr r0, [pc, #100] @ (801827c ) 8018218: f00a fbd2 bl 80229c0 HAL_NVIC_DisableIRQ(ADC_IRQn); 801821c: 2012 movs r0, #18 801821e: f009 f9e0 bl 80215e2 } 8018222: e01f b.n 8018264 else if(adcHandle->Instance==ADC3) 8018224: 687b ldr r3, [r7, #4] 8018226: 681b ldr r3, [r3, #0] 8018228: 4a16 ldr r2, [pc, #88] @ (8018284 ) 801822a: 4293 cmp r3, r2 801822c: d11a bne.n 8018264 __HAL_RCC_ADC3_CLK_DISABLE(); 801822e: 4b10 ldr r3, [pc, #64] @ (8018270 ) 8018230: 6c5b ldr r3, [r3, #68] @ 0x44 8018232: 4a0f ldr r2, [pc, #60] @ (8018270 ) 8018234: f423 6380 bic.w r3, r3, #1024 @ 0x400 8018238: 6453 str r3, [r2, #68] @ 0x44 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6 801823a: f44f 61ff mov.w r1, #2040 @ 0x7f8 801823e: 4812 ldr r0, [pc, #72] @ (8018288 ) 8018240: f00a fbbe bl 80229c0 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3); 8018244: 210d movs r1, #13 8018246: 480b ldr r0, [pc, #44] @ (8018274 ) 8018248: f00a fbba bl 80229c0 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2); 801824c: 2104 movs r1, #4 801824e: 480a ldr r0, [pc, #40] @ (8018278 ) 8018250: f00a fbb6 bl 80229c0 HAL_DMA_DeInit(adcHandle->DMA_Handle); 8018254: 687b ldr r3, [r7, #4] 8018256: 6b9b ldr r3, [r3, #56] @ 0x38 8018258: 4618 mov r0, r3 801825a: f009 fb75 bl 8021948 HAL_NVIC_DisableIRQ(ADC_IRQn); 801825e: 2012 movs r0, #18 8018260: f009 f9bf bl 80215e2 } 8018264: bf00 nop 8018266: 3708 adds r7, #8 8018268: 46bd mov sp, r7 801826a: bd80 pop {r7, pc} 801826c: 40012000 .word 0x40012000 8018270: 40023800 .word 0x40023800 8018274: 40020800 .word 0x40020800 8018278: 40020000 .word 0x40020000 801827c: 40020400 .word 0x40020400 8018280: 40012100 .word 0x40012100 8018284: 40012200 .word 0x40012200 8018288: 40021400 .word 0x40021400 0801828c : /* USER CODE BEGIN 1 */ uint16_t ADC_Buffer[8]={0}; uint16_t ADC_Inject[3][4]={0}; void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) { 801828c: b580 push {r7, lr} 801828e: b084 sub sp, #16 8018290: af00 add r7, sp, #0 8018292: 6078 str r0, [r7, #4] if(hadc==&hadc1) { 8018294: 687b ldr r3, [r7, #4] 8018296: 4a97 ldr r2, [pc, #604] @ (80184f4 ) 8018298: 4293 cmp r3, r2 801829a: f040 8127 bne.w 80184ec // [v1.0.2] ISR 수행시간 측정 시작 uint32_t _isr_start = DWT->CYCCNT; 801829e: 4b96 ldr r3, [pc, #600] @ (80184f8 ) 80182a0: 685b ldr r3, [r3, #4] 80182a2: 60fb str r3, [r7, #12] ADC_Inject[0][0]=HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_1); 80182a4: 2101 movs r1, #1 80182a6: 4893 ldr r0, [pc, #588] @ (80184f4 ) 80182a8: f008 fe44 bl 8020f34 80182ac: 4603 mov r3, r0 80182ae: b29a uxth r2, r3 80182b0: 4b92 ldr r3, [pc, #584] @ (80184fc ) 80182b2: 801a strh r2, [r3, #0] ADC_Inject[0][1]=HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_2); 80182b4: 2102 movs r1, #2 80182b6: 488f ldr r0, [pc, #572] @ (80184f4 ) 80182b8: f008 fe3c bl 8020f34 80182bc: 4603 mov r3, r0 80182be: b29a uxth r2, r3 80182c0: 4b8e ldr r3, [pc, #568] @ (80184fc ) 80182c2: 805a strh r2, [r3, #2] ADC_Inject[0][2]=HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_3); 80182c4: 2103 movs r1, #3 80182c6: 488b ldr r0, [pc, #556] @ (80184f4 ) 80182c8: f008 fe34 bl 8020f34 80182cc: 4603 mov r3, r0 80182ce: b29a uxth r2, r3 80182d0: 4b8a ldr r3, [pc, #552] @ (80184fc ) 80182d2: 809a strh r2, [r3, #4] ADC_Inject[0][3]=HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_4); 80182d4: 2104 movs r1, #4 80182d6: 4887 ldr r0, [pc, #540] @ (80184f4 ) 80182d8: f008 fe2c bl 8020f34 80182dc: 4603 mov r3, r0 80182de: b29a uxth r2, r3 80182e0: 4b86 ldr r3, [pc, #536] @ (80184fc ) 80182e2: 80da strh r2, [r3, #6] ADC_Inject[1][0]=HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_1); 80182e4: 2101 movs r1, #1 80182e6: 4886 ldr r0, [pc, #536] @ (8018500 ) 80182e8: f008 fe24 bl 8020f34 80182ec: 4603 mov r3, r0 80182ee: b29a uxth r2, r3 80182f0: 4b82 ldr r3, [pc, #520] @ (80184fc ) 80182f2: 811a strh r2, [r3, #8] ADC_Inject[1][1]=HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_2); 80182f4: 2102 movs r1, #2 80182f6: 4882 ldr r0, [pc, #520] @ (8018500 ) 80182f8: f008 fe1c bl 8020f34 80182fc: 4603 mov r3, r0 80182fe: b29a uxth r2, r3 8018300: 4b7e ldr r3, [pc, #504] @ (80184fc ) 8018302: 815a strh r2, [r3, #10] ADC_Inject[1][2]=HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_3); 8018304: 2103 movs r1, #3 8018306: 487e ldr r0, [pc, #504] @ (8018500 ) 8018308: f008 fe14 bl 8020f34 801830c: 4603 mov r3, r0 801830e: b29a uxth r2, r3 8018310: 4b7a ldr r3, [pc, #488] @ (80184fc ) 8018312: 819a strh r2, [r3, #12] ADC_Inject[1][3]=HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_4); 8018314: 2104 movs r1, #4 8018316: 487a ldr r0, [pc, #488] @ (8018500 ) 8018318: f008 fe0c bl 8020f34 801831c: 4603 mov r3, r0 801831e: b29a uxth r2, r3 8018320: 4b76 ldr r3, [pc, #472] @ (80184fc ) 8018322: 81da strh r2, [r3, #14] ADC_Inject[2][0]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_1); 8018324: 2101 movs r1, #1 8018326: 4877 ldr r0, [pc, #476] @ (8018504 ) 8018328: f008 fe04 bl 8020f34 801832c: 4603 mov r3, r0 801832e: b29a uxth r2, r3 8018330: 4b72 ldr r3, [pc, #456] @ (80184fc ) 8018332: 821a strh r2, [r3, #16] ADC_Inject[2][1]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_2); 8018334: 2102 movs r1, #2 8018336: 4873 ldr r0, [pc, #460] @ (8018504 ) 8018338: f008 fdfc bl 8020f34 801833c: 4603 mov r3, r0 801833e: b29a uxth r2, r3 8018340: 4b6e ldr r3, [pc, #440] @ (80184fc ) 8018342: 825a strh r2, [r3, #18] ADC_Inject[2][2]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_3); 8018344: 2103 movs r1, #3 8018346: 486f ldr r0, [pc, #444] @ (8018504 ) 8018348: f008 fdf4 bl 8020f34 801834c: 4603 mov r3, r0 801834e: b29a uxth r2, r3 8018350: 4b6a ldr r3, [pc, #424] @ (80184fc ) 8018352: 829a strh r2, [r3, #20] ADC_Inject[2][3]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_4); 8018354: 2104 movs r1, #4 8018356: 486b ldr r0, [pc, #428] @ (8018504 ) 8018358: f008 fdec bl 8020f34 801835c: 4603 mov r3, r0 801835e: b29a uxth r2, r3 8018360: 4b66 ldr r3, [pc, #408] @ (80184fc ) 8018362: 82da strh r2, [r3, #22] ///somebp 2024.02.07 //from ADC_IRQHandler() in stm32f4xx_it.c #if ANGLE_MODE == ANGLE_ENC WP_CtrlErr.Motor1.Angle = WP_EncPos(MOTOR1, &Motor1_Ang); 8018364: 4968 ldr r1, [pc, #416] @ (8018508 ) 8018366: 2001 movs r0, #1 8018368: f7ff f87c bl 8017464 801836c: 4603 mov r3, r0 801836e: 461a mov r2, r3 8018370: 4b66 ldr r3, [pc, #408] @ (801850c ) 8018372: 73da strb r2, [r3, #15] WP_CtrlErr.Motor2.Angle = WP_EncPos(MOTOR2, &Motor2_Ang); 8018374: 4966 ldr r1, [pc, #408] @ (8018510 ) 8018376: 2002 movs r0, #2 8018378: f7ff f874 bl 8017464 801837c: 4603 mov r3, r0 801837e: 461a mov r2, r3 8018380: 4b62 ldr r3, [pc, #392] @ (801850c ) 8018382: f883 2021 strb.w r2, [r3, #33] @ 0x21 #endif if(Debug_HilMode) 8018386: 4b63 ldr r3, [pc, #396] @ (8018514 ) 8018388: 781b ldrb r3, [r3, #0] 801838a: 2b00 cmp r3, #0 801838c: d002 beq.n 8018394 ConvAng2Pos_HIL(); 801838e: f7fa ffb5 bl 80132fc 8018392: e001 b.n 8018398 else ConvAng2Pos(); // 이 타이밍도 모터 제어랑 더 붙일 필요가 있을지도? WeightManager, 정확하게는 WeightController (Region)랑도 밀접함. 8018394: f7fa fe30 bl 8012ff8 // cnt_ConvAng++; switch (Drive_Status) { 8018398: 4b5f ldr r3, [pc, #380] @ (8018518 ) 801839a: 781b ldrb r3, [r3, #0] 801839c: 2b03 cmp r3, #3 801839e: d006 beq.n 80183ae 80183a0: 2b03 cmp r3, #3 80183a2: dc73 bgt.n 801848c 80183a4: 2b01 cmp r3, #1 80183a6: d043 beq.n 8018430 80183a8: 2b02 cmp r3, #2 80183aa: d003 beq.n 80183b4 break; // case Debug: // break; default : // WeightManager(); break; 80183ac: e06e b.n 801848c WeightManager(); 80183ae: f7f9 f903 bl 80115b8 break; 80183b2: e070 b.n 8018496 if(Active_ForcedCalib){ 80183b4: 4b59 ldr r3, [pc, #356] @ (801851c ) 80183b6: 681b ldr r3, [r3, #0] 80183b8: 2b00 cmp r3, #0 80183ba: d002 beq.n 80183c2 ForcedCalibration(); 80183bc: f7fb ffcc bl 8014358 80183c0: e028 b.n 8018414 } else if(!Active_ForcedCalib) { // 초기 부팅시 스킵할 경우. 250705 현재 이 방식. 80183c2: 4b56 ldr r3, [pc, #344] @ (801851c ) 80183c4: 681b ldr r3, [r3, #0] 80183c6: 2b00 cmp r3, #0 80183c8: d124 bne.n 8018414 Motor1.Cmd.Icmd.q = Motor2.Cmd.Icmd.q = 0.0f; 80183ca: 4b55 ldr r3, [pc, #340] @ (8018520 ) 80183cc: f04f 0200 mov.w r2, #0 80183d0: 605a str r2, [r3, #4] 80183d2: 4b53 ldr r3, [pc, #332] @ (8018520 ) 80183d4: 685b ldr r3, [r3, #4] 80183d6: 4a53 ldr r2, [pc, #332] @ (8018524 ) 80183d8: 6053 str r3, [r2, #4] Motor1.Cmd.Icmd.d = Motor2.Cmd.Icmd.d = 0.0f; 80183da: 4b51 ldr r3, [pc, #324] @ (8018520 ) 80183dc: f04f 0200 mov.w r2, #0 80183e0: 601a str r2, [r3, #0] 80183e2: 4b4f ldr r3, [pc, #316] @ (8018520 ) 80183e4: 681b ldr r3, [r3, #0] 80183e6: 4a4f ldr r2, [pc, #316] @ (8018524 ) 80183e8: 6013 str r3, [r2, #0] WP_Ctrl.Mode = Inv_Off; 80183ea: 4b4f ldr r3, [pc, #316] @ (8018528 ) 80183ec: 2200 movs r2, #0 80183ee: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_NoMotor; // 이게 맞나? 80183f0: 4b4e ldr r3, [pc, #312] @ (801852c ) 80183f2: 2200 movs r2, #0 80183f4: 701a strb r2, [r3, #0] WP_Ctrl.ActiveMotor = Drv_NoMotor; 80183f6: 4b4c ldr r3, [pc, #304] @ (8018528 ) 80183f8: 2200 movs r2, #0 80183fa: 705a strb r2, [r3, #1] Debug_UART3_printf("Forced Calibration Inactive (Skip)\r\n"); 80183fc: 484c ldr r0, [pc, #304] @ (8018530 ) 80183fe: f007 fcd9 bl 801fdb4 WP_ForcedCali.Flag = Done; 8018402: 4b4c ldr r3, [pc, #304] @ (8018534 ) 8018404: 2201 movs r2, #1 8018406: 701a strb r2, [r3, #0] Drive_Status = RunGym; 8018408: 4b43 ldr r3, [pc, #268] @ (8018518 ) 801840a: 2203 movs r2, #3 801840c: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_BothMotor; 801840e: 4b47 ldr r3, [pc, #284] @ (801852c ) 8018410: 2203 movs r2, #3 8018412: 701a strb r2, [r3, #0] if(cnt_LED_Calib_Err == 0 && WP_ForcedCali.Flag == Error) { // 에러 LED 8018414: 4b48 ldr r3, [pc, #288] @ (8018538 ) 8018416: 681b ldr r3, [r3, #0] 8018418: 2b00 cmp r3, #0 801841a: d139 bne.n 8018490 801841c: 4b45 ldr r3, [pc, #276] @ (8018534 ) 801841e: 781b ldrb r3, [r3, #0] 8018420: 2b09 cmp r3, #9 8018422: d135 bne.n 8018490 LED_On_ALL(35, 10, 2); 8018424: 2202 movs r2, #2 8018426: 210a movs r1, #10 8018428: 2023 movs r0, #35 @ 0x23 801842a: f000 ffbf bl 80193ac break; 801842e: e02f b.n 8018490 if(MotorInitStart == 1 && WP_Ctrl.AdOffsetFlg == 1 && WP_Ctrl.Mode >= Inv_Ready && !Debug_SkipEncInit) { 8018430: 4b42 ldr r3, [pc, #264] @ (801853c ) 8018432: 781b ldrb r3, [r3, #0] 8018434: 2b01 cmp r3, #1 8018436: d10d bne.n 8018454 8018438: 4b3b ldr r3, [pc, #236] @ (8018528 ) 801843a: 789b ldrb r3, [r3, #2] 801843c: 2b01 cmp r3, #1 801843e: d109 bne.n 8018454 8018440: 4b39 ldr r3, [pc, #228] @ (8018528 ) 8018442: 781b ldrb r3, [r3, #0] 8018444: 2b01 cmp r3, #1 8018446: d905 bls.n 8018454 8018448: 4b3d ldr r3, [pc, #244] @ (8018540 ) 801844a: 781b ldrb r3, [r3, #0] 801844c: 2b00 cmp r3, #0 801844e: d101 bne.n 8018454 Init_Encoder_v3(); 8018450: f7fb fb0a bl 8013a68 if(cnt_LED_EncInit == 0) { // 진입 LED 8018454: 4b3b ldr r3, [pc, #236] @ (8018544 ) 8018456: 681b ldr r3, [r3, #0] 8018458: 2b00 cmp r3, #0 801845a: d109 bne.n 8018470 LED_On_ALL(9, 14, 3); 801845c: 2203 movs r2, #3 801845e: 210e movs r1, #14 8018460: 2009 movs r0, #9 8018462: f000 ffa3 bl 80193ac cnt_LED_EncInit++; 8018466: 4b37 ldr r3, [pc, #220] @ (8018544 ) 8018468: 681b ldr r3, [r3, #0] 801846a: 3301 adds r3, #1 801846c: 4a35 ldr r2, [pc, #212] @ (8018544 ) 801846e: 6013 str r3, [r2, #0] if(cnt_LED_EncInit_Err == 0 && WP_EncInit.Flag == Error) { // 에러 LED 8018470: 4b35 ldr r3, [pc, #212] @ (8018548 ) 8018472: 681b ldr r3, [r3, #0] 8018474: 2b00 cmp r3, #0 8018476: d10d bne.n 8018494 8018478: 4b34 ldr r3, [pc, #208] @ (801854c ) 801847a: 781b ldrb r3, [r3, #0] 801847c: 2b09 cmp r3, #9 801847e: d109 bne.n 8018494 LED_On_ALL(40, 3, 1); 8018480: 2201 movs r2, #1 8018482: 2103 movs r1, #3 8018484: 2028 movs r0, #40 @ 0x28 8018486: f000 ff91 bl 80193ac break; 801848a: e003 b.n 8018494 break; 801848c: bf00 nop 801848e: e002 b.n 8018496 break; 8018490: bf00 nop 8018492: e000 b.n 8018496 break; 8018494: bf00 nop } WESPION_MotorControl(); // 이건 기본으로 실행해주고, 내부에서 상태 변수들로 구동 조건을 건드리는 게 적절 (250702) 8018496: f7fc fa89 bl 80149ac // [v1.0.2] ISR 수행시간 측정 종료 { uint32_t _isr_cycles = DWT->CYCCNT - _isr_start; 801849a: 4b17 ldr r3, [pc, #92] @ (80184f8 ) 801849c: 685a ldr r2, [r3, #4] 801849e: 68fb ldr r3, [r7, #12] 80184a0: 1ad3 subs r3, r2, r3 80184a2: 60bb str r3, [r7, #8] ISR_Profile.last = _isr_cycles; 80184a4: 4a2a ldr r2, [pc, #168] @ (8018550 ) 80184a6: 68bb ldr r3, [r7, #8] 80184a8: 6013 str r3, [r2, #0] if(_isr_cycles > ISR_Profile.max) ISR_Profile.max = _isr_cycles; 80184aa: 4b29 ldr r3, [pc, #164] @ (8018550 ) 80184ac: 685b ldr r3, [r3, #4] 80184ae: 68ba ldr r2, [r7, #8] 80184b0: 429a cmp r2, r3 80184b2: d902 bls.n 80184ba 80184b4: 4a26 ldr r2, [pc, #152] @ (8018550 ) 80184b6: 68bb ldr r3, [r7, #8] 80184b8: 6053 str r3, [r2, #4] // 이동평균: avg = avg + (new - avg) / 16 — signed로 계산 (underflow 방지) if(ISR_Profile.count == 0) { 80184ba: 4b25 ldr r3, [pc, #148] @ (8018550 ) 80184bc: 68db ldr r3, [r3, #12] 80184be: 2b00 cmp r3, #0 80184c0: d103 bne.n 80184ca ISR_Profile.avg = _isr_cycles; // 첫 측정값으로 초기화 80184c2: 4a23 ldr r2, [pc, #140] @ (8018550 ) 80184c4: 68bb ldr r3, [r7, #8] 80184c6: 6093 str r3, [r2, #8] 80184c8: e00b b.n 80184e2 } else { ISR_Profile.avg = (uint32_t)((int32_t)ISR_Profile.avg + (((int32_t)_isr_cycles - (int32_t)ISR_Profile.avg) >> 4)); 80184ca: 4b21 ldr r3, [pc, #132] @ (8018550 ) 80184cc: 689b ldr r3, [r3, #8] 80184ce: 4619 mov r1, r3 80184d0: 68bb ldr r3, [r7, #8] 80184d2: 4a1f ldr r2, [pc, #124] @ (8018550 ) 80184d4: 6892 ldr r2, [r2, #8] 80184d6: 1a9b subs r3, r3, r2 80184d8: 111b asrs r3, r3, #4 80184da: 440b add r3, r1 80184dc: 461a mov r2, r3 80184de: 4b1c ldr r3, [pc, #112] @ (8018550 ) 80184e0: 609a str r2, [r3, #8] } ISR_Profile.count++; 80184e2: 4b1b ldr r3, [pc, #108] @ (8018550 ) 80184e4: 68db ldr r3, [r3, #12] 80184e6: 3301 adds r3, #1 80184e8: 4a19 ldr r2, [pc, #100] @ (8018550 ) 80184ea: 60d3 str r3, [r2, #12] // ADC_Inject[2][0]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_1); // ADC_Inject[2][1]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_2); // ADC_Inject[2][2]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_3); // ADC_Inject[2][3]=HAL_ADCEx_InjectedGetValue(&hadc3, ADC_INJECTED_RANK_4); } } 80184ec: bf00 nop 80184ee: 3710 adds r7, #16 80184f0: 46bd mov sp, r7 80184f2: bd80 pop {r7, pc} 80184f4: 2000091c .word 0x2000091c 80184f8: e0001000 .word 0xe0001000 80184fc: 20000a64 .word 0x20000a64 8018500: 20000964 .word 0x20000964 8018504: 200009ac .word 0x200009ac 8018508: 2000047c .word 0x2000047c 801850c: 200003b8 .word 0x200003b8 8018510: 200004f8 .word 0x200004f8 8018514: 20000372 .word 0x20000372 8018518: 20000018 .word 0x20000018 801851c: 20000394 .word 0x20000394 8018520: 20000704 .word 0x20000704 8018524: 20000574 .word 0x20000574 8018528: 200003ac .word 0x200003ac 801852c: 20000c04 .word 0x20000c04 8018530: 0802a530 .word 0x0802a530 8018534: 200000e0 .word 0x200000e0 8018538: 20000390 .word 0x20000390 801853c: 20000c12 .word 0x20000c12 8018540: 20000c05 .word 0x20000c05 8018544: 20000384 .word 0x20000384 8018548: 20000388 .word 0x20000388 801854c: 200000b8 .word 0x200000b8 8018550: 20000330 .word 0x20000330 08018554 : void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { 8018554: b480 push {r7} 8018556: b083 sub sp, #12 8018558: af00 add r7, sp, #0 801855a: 6078 str r0, [r7, #4] } if(hadc==&hadc3) { // HAL_ADC_Start_DMA(&hadc3, (uint32_t*)ADC_Buffer, 8); // Inverter_CommEnable(); } } 801855c: bf00 nop 801855e: 370c adds r7, #12 8018560: 46bd mov sp, r7 8018562: f85d 7b04 ldr.w r7, [sp], #4 8018566: 4770 bx lr 08018568 : } ADC_OFFSET_IDC = offset_sum / NUM_OFFSET_SAMPLES; } float Get_IDC(void) { 8018568: b480 push {r7} 801856a: b083 sub sp, #12 801856c: af00 add r7, sp, #0 // float i = (ADC_Buffer[4]-ADC_MAX/2)/ADC_1A; float i = (ADC_Buffer[4] - ADC_OFFSET_IDC - ADC_MAX/2)/ADC_1A; 801856e: 4b0f ldr r3, [pc, #60] @ (80185ac ) 8018570: 891b ldrh r3, [r3, #8] 8018572: ee07 3a90 vmov s15, r3 8018576: eeb8 7ae7 vcvt.f32.s32 s14, s15 801857a: 4b0d ldr r3, [pc, #52] @ (80185b0 ) 801857c: edd3 7a00 vldr s15, [r3] 8018580: ee77 7a67 vsub.f32 s15, s14, s15 8018584: ed9f 7a0b vldr s14, [pc, #44] @ 80185b4 8018588: ee37 7ac7 vsub.f32 s14, s15, s14 801858c: eddf 6a0a vldr s13, [pc, #40] @ 80185b8 8018590: eec7 7a26 vdiv.f32 s15, s14, s13 8018594: edc7 7a01 vstr s15, [r7, #4] return i; 8018598: 687b ldr r3, [r7, #4] 801859a: ee07 3a90 vmov s15, r3 } 801859e: eeb0 0a67 vmov.f32 s0, s15 80185a2: 370c adds r7, #12 80185a4: 46bd mov sp, r7 80185a6: f85d 7b04 ldr.w r7, [sp], #4 80185aa: 4770 bx lr 80185ac: 20000a54 .word 0x20000a54 80185b0: 20000a7c .word 0x20000a7c 80185b4: 44ffe000 .word 0x44ffe000 80185b8: 41c68ba4 .word 0x41c68ba4 080185bc : } ADC_OFFSET_I_CHG = offset_sum / NUM_OFFSET_SAMPLES; } float Get_I_CHG(void) { 80185bc: b480 push {r7} 80185be: b083 sub sp, #12 80185c0: af00 add r7, sp, #0 float i = (ADC_Buffer[5] - ADC_OFFSET_I_CHG - ADC_MAX/2)/ADC_1A; 80185c2: 4b0f ldr r3, [pc, #60] @ (8018600 ) 80185c4: 895b ldrh r3, [r3, #10] 80185c6: ee07 3a90 vmov s15, r3 80185ca: eeb8 7ae7 vcvt.f32.s32 s14, s15 80185ce: 4b0d ldr r3, [pc, #52] @ (8018604 ) 80185d0: edd3 7a00 vldr s15, [r3] 80185d4: ee77 7a67 vsub.f32 s15, s14, s15 80185d8: ed9f 7a0b vldr s14, [pc, #44] @ 8018608 80185dc: ee37 7ac7 vsub.f32 s14, s15, s14 80185e0: eddf 6a0a vldr s13, [pc, #40] @ 801860c 80185e4: eec7 7a26 vdiv.f32 s15, s14, s13 80185e8: edc7 7a01 vstr s15, [r7, #4] return i; 80185ec: 687b ldr r3, [r7, #4] 80185ee: ee07 3a90 vmov s15, r3 } 80185f2: eeb0 0a67 vmov.f32 s0, s15 80185f6: 370c adds r7, #12 80185f8: 46bd mov sp, r7 80185fa: f85d 7b04 ldr.w r7, [sp], #4 80185fe: 4770 bx lr 8018600: 20000a54 .word 0x20000a54 8018604: 20000a80 .word 0x20000a80 8018608: 44ffe000 .word 0x44ffe000 801860c: 41c68ba4 .word 0x41c68ba4 08018610 : DAC_HandleTypeDef hdac; /* DAC init function */ void MX_DAC_Init(void) { 8018610: b580 push {r7, lr} 8018612: b082 sub sp, #8 8018614: af00 add r7, sp, #0 /* USER CODE BEGIN DAC_Init 0 */ /* USER CODE END DAC_Init 0 */ DAC_ChannelConfTypeDef sConfig = {0}; 8018616: 463b mov r3, r7 8018618: 2200 movs r2, #0 801861a: 601a str r2, [r3, #0] 801861c: 605a str r2, [r3, #4] /* USER CODE END DAC_Init 1 */ /** DAC Initialization */ hdac.Instance = DAC; 801861e: 4b14 ldr r3, [pc, #80] @ (8018670 ) 8018620: 4a14 ldr r2, [pc, #80] @ (8018674 ) 8018622: 601a str r2, [r3, #0] if (HAL_DAC_Init(&hdac) != HAL_OK) 8018624: 4812 ldr r0, [pc, #72] @ (8018670 ) 8018626: f009 f800 bl 802162a 801862a: 4603 mov r3, r0 801862c: 2b00 cmp r3, #0 801862e: d001 beq.n 8018634 { Error_Handler(); 8018630: f001 fb5f bl 8019cf2 } /** DAC channel OUT1 config */ sConfig.DAC_Trigger = DAC_TRIGGER_NONE; 8018634: 2300 movs r3, #0 8018636: 603b str r3, [r7, #0] sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; 8018638: 2300 movs r3, #0 801863a: 607b str r3, [r7, #4] if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1) != HAL_OK) 801863c: 463b mov r3, r7 801863e: 2200 movs r2, #0 8018640: 4619 mov r1, r3 8018642: 480b ldr r0, [pc, #44] @ (8018670 ) 8018644: f009 f882 bl 802174c 8018648: 4603 mov r3, r0 801864a: 2b00 cmp r3, #0 801864c: d001 beq.n 8018652 { Error_Handler(); 801864e: f001 fb50 bl 8019cf2 } /** DAC channel OUT2 config */ if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_2) != HAL_OK) 8018652: 463b mov r3, r7 8018654: 2210 movs r2, #16 8018656: 4619 mov r1, r3 8018658: 4805 ldr r0, [pc, #20] @ (8018670 ) 801865a: f009 f877 bl 802174c 801865e: 4603 mov r3, r0 8018660: 2b00 cmp r3, #0 8018662: d001 beq.n 8018668 { Error_Handler(); 8018664: f001 fb45 bl 8019cf2 } /* USER CODE BEGIN DAC_Init 2 */ /* USER CODE END DAC_Init 2 */ } 8018668: bf00 nop 801866a: 3708 adds r7, #8 801866c: 46bd mov sp, r7 801866e: bd80 pop {r7, pc} 8018670: 20000a84 .word 0x20000a84 8018674: 40007400 .word 0x40007400 08018678 : void HAL_DAC_MspInit(DAC_HandleTypeDef* dacHandle) { 8018678: b580 push {r7, lr} 801867a: b08a sub sp, #40 @ 0x28 801867c: af00 add r7, sp, #0 801867e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8018680: f107 0314 add.w r3, r7, #20 8018684: 2200 movs r2, #0 8018686: 601a str r2, [r3, #0] 8018688: 605a str r2, [r3, #4] 801868a: 609a str r2, [r3, #8] 801868c: 60da str r2, [r3, #12] 801868e: 611a str r2, [r3, #16] if(dacHandle->Instance==DAC) 8018690: 687b ldr r3, [r7, #4] 8018692: 681b ldr r3, [r3, #0] 8018694: 4a17 ldr r2, [pc, #92] @ (80186f4 ) 8018696: 4293 cmp r3, r2 8018698: d127 bne.n 80186ea { /* USER CODE BEGIN DAC_MspInit 0 */ /* USER CODE END DAC_MspInit 0 */ /* DAC clock enable */ __HAL_RCC_DAC_CLK_ENABLE(); 801869a: 2300 movs r3, #0 801869c: 613b str r3, [r7, #16] 801869e: 4b16 ldr r3, [pc, #88] @ (80186f8 ) 80186a0: 6c1b ldr r3, [r3, #64] @ 0x40 80186a2: 4a15 ldr r2, [pc, #84] @ (80186f8 ) 80186a4: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 80186a8: 6413 str r3, [r2, #64] @ 0x40 80186aa: 4b13 ldr r3, [pc, #76] @ (80186f8 ) 80186ac: 6c1b ldr r3, [r3, #64] @ 0x40 80186ae: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 80186b2: 613b str r3, [r7, #16] 80186b4: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80186b6: 2300 movs r3, #0 80186b8: 60fb str r3, [r7, #12] 80186ba: 4b0f ldr r3, [pc, #60] @ (80186f8 ) 80186bc: 6b1b ldr r3, [r3, #48] @ 0x30 80186be: 4a0e ldr r2, [pc, #56] @ (80186f8 ) 80186c0: f043 0301 orr.w r3, r3, #1 80186c4: 6313 str r3, [r2, #48] @ 0x30 80186c6: 4b0c ldr r3, [pc, #48] @ (80186f8 ) 80186c8: 6b1b ldr r3, [r3, #48] @ 0x30 80186ca: f003 0301 and.w r3, r3, #1 80186ce: 60fb str r3, [r7, #12] 80186d0: 68fb ldr r3, [r7, #12] /**DAC GPIO Configuration PA4 ------> DAC_OUT1 PA5 ------> DAC_OUT2 */ GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 80186d2: 2330 movs r3, #48 @ 0x30 80186d4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80186d6: 2303 movs r3, #3 80186d8: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 80186da: 2300 movs r3, #0 80186dc: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80186de: f107 0314 add.w r3, r7, #20 80186e2: 4619 mov r1, r3 80186e4: 4805 ldr r0, [pc, #20] @ (80186fc ) 80186e6: f009 ffd7 bl 8022698 /* USER CODE BEGIN DAC_MspInit 1 */ /* USER CODE END DAC_MspInit 1 */ } } 80186ea: bf00 nop 80186ec: 3728 adds r7, #40 @ 0x28 80186ee: 46bd mov sp, r7 80186f0: bd80 pop {r7, pc} 80186f2: bf00 nop 80186f4: 40007400 .word 0x40007400 80186f8: 40023800 .word 0x40023800 80186fc: 40020000 .word 0x40020000 08018700 : void HAL_DAC_MspDeInit(DAC_HandleTypeDef* dacHandle) { 8018700: b580 push {r7, lr} 8018702: b082 sub sp, #8 8018704: af00 add r7, sp, #0 8018706: 6078 str r0, [r7, #4] if(dacHandle->Instance==DAC) 8018708: 687b ldr r3, [r7, #4] 801870a: 681b ldr r3, [r3, #0] 801870c: 4a08 ldr r2, [pc, #32] @ (8018730 ) 801870e: 4293 cmp r3, r2 8018710: d109 bne.n 8018726 { /* USER CODE BEGIN DAC_MspDeInit 0 */ /* USER CODE END DAC_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_DAC_CLK_DISABLE(); 8018712: 4b08 ldr r3, [pc, #32] @ (8018734 ) 8018714: 6c1b ldr r3, [r3, #64] @ 0x40 8018716: 4a07 ldr r2, [pc, #28] @ (8018734 ) 8018718: f023 5300 bic.w r3, r3, #536870912 @ 0x20000000 801871c: 6413 str r3, [r2, #64] @ 0x40 /**DAC GPIO Configuration PA4 ------> DAC_OUT1 PA5 ------> DAC_OUT2 */ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5); 801871e: 2130 movs r1, #48 @ 0x30 8018720: 4805 ldr r0, [pc, #20] @ (8018738 ) 8018722: f00a f94d bl 80229c0 /* USER CODE BEGIN DAC_MspDeInit 1 */ /* USER CODE END DAC_MspDeInit 1 */ } } 8018726: bf00 nop 8018728: 3708 adds r7, #8 801872a: 46bd mov sp, r7 801872c: bd80 pop {r7, pc} 801872e: bf00 nop 8018730: 40007400 .word 0x40007400 8018734: 40023800 .word 0x40023800 8018738: 40020000 .word 0x40020000 0801873c : /** * Enable DMA controller clock */ void MX_DMA_Init(void) { 801873c: b580 push {r7, lr} 801873e: b082 sub sp, #8 8018740: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA2_CLK_ENABLE(); 8018742: 2300 movs r3, #0 8018744: 607b str r3, [r7, #4] 8018746: 4b0c ldr r3, [pc, #48] @ (8018778 ) 8018748: 6b1b ldr r3, [r3, #48] @ 0x30 801874a: 4a0b ldr r2, [pc, #44] @ (8018778 ) 801874c: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8018750: 6313 str r3, [r2, #48] @ 0x30 8018752: 4b09 ldr r3, [pc, #36] @ (8018778 ) 8018754: 6b1b ldr r3, [r3, #48] @ 0x30 8018756: f403 0380 and.w r3, r3, #4194304 @ 0x400000 801875a: 607b str r3, [r7, #4] 801875c: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA2_Stream0_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); 801875e: 2200 movs r2, #0 8018760: 2100 movs r1, #0 8018762: 2038 movs r0, #56 @ 0x38 8018764: f008 ff13 bl 802158e HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); 8018768: 2038 movs r0, #56 @ 0x38 801876a: f008 ff2c bl 80215c6 } 801876e: bf00 nop 8018770: 3708 adds r7, #8 8018772: 46bd mov sp, r7 8018774: bd80 pop {r7, pc} 8018776: bf00 nop 8018778: 40023800 .word 0x40023800 0801877c : Data_Form_RAM RAM_Data; void Flash_Init(void) { 801877c: b580 push {r7, lr} 801877e: b084 sub sp, #16 8018780: af00 add r7, sp, #0 uint8_t i; uint32_t *ram_data,*source_data; ram_data=(uint32_t*)&RAM_Data; 8018782: 4b2d ldr r3, [pc, #180] @ (8018838 ) 8018784: 60bb str r3, [r7, #8] if(Origin_Data.check==FLASH_VALID_CODE) { 8018786: 4a2d ldr r2, [pc, #180] @ (801883c ) 8018788: 4b2c ldr r3, [pc, #176] @ (801883c ) 801878a: 429a cmp r2, r3 801878c: d119 bne.n 80187c2 source_data=(uint32_t*)&Origin_Data; 801878e: 4b2c ldr r3, [pc, #176] @ (8018840 ) 8018790: 607b str r3, [r7, #4] for(i=0; i *ram_data++=*source_data++; 8018798: 687a ldr r2, [r7, #4] 801879a: 1d13 adds r3, r2, #4 801879c: 607b str r3, [r7, #4] 801879e: 68bb ldr r3, [r7, #8] 80187a0: 1d19 adds r1, r3, #4 80187a2: 60b9 str r1, [r7, #8] 80187a4: 6812 ldr r2, [r2, #0] 80187a6: 601a str r2, [r3, #0] for(i=0; i } //write backup Flash_Write(FLASH_BACKUP_SECTOR); 80187b4: 2003 movs r0, #3 80187b6: f000 f871 bl 801889c Flash_Write(FLASH_BACKUP_SECTOR); 80187ba: 2003 movs r0, #3 80187bc: f000 f86e bl 801889c } //write origin Flash_Write(FLASH_ORIGIN_SECTOR); Flash_Write(FLASH_ORIGIN_SECTOR); } } 80187c0: e036 b.n 8018830 else if(Backup_Data.check==FLASH_VALID_CODE) { 80187c2: 4a1e ldr r2, [pc, #120] @ (801883c ) 80187c4: 4b1d ldr r3, [pc, #116] @ (801883c ) 80187c6: 429a cmp r2, r3 80187c8: d119 bne.n 80187fe source_data=(uint32_t*)&Backup_Data; 80187ca: 4b1e ldr r3, [pc, #120] @ (8018844 ) 80187cc: 607b str r3, [r7, #4] for(i=0; i *ram_data++=*source_data++; 80187d4: 687a ldr r2, [r7, #4] 80187d6: 1d13 adds r3, r2, #4 80187d8: 607b str r3, [r7, #4] 80187da: 68bb ldr r3, [r7, #8] 80187dc: 1d19 adds r1, r3, #4 80187de: 60b9 str r1, [r7, #8] 80187e0: 6812 ldr r2, [r2, #0] 80187e2: 601a str r2, [r3, #0] for(i=0; i Flash_Write(FLASH_ORIGIN_SECTOR); 80187f0: 2002 movs r0, #2 80187f2: f000 f853 bl 801889c Flash_Write(FLASH_ORIGIN_SECTOR); 80187f6: 2002 movs r0, #2 80187f8: f000 f850 bl 801889c } 80187fc: e018 b.n 8018830 source_data=(uint32_t*)&Defualt_RAM_Data; 80187fe: 4b12 ldr r3, [pc, #72] @ (8018848 ) 8018800: 607b str r3, [r7, #4] for(i=0; i *ram_data++=*source_data++; 8018808: 687a ldr r2, [r7, #4] 801880a: 1d13 adds r3, r2, #4 801880c: 607b str r3, [r7, #4] 801880e: 68bb ldr r3, [r7, #8] 8018810: 1d19 adds r1, r3, #4 8018812: 60b9 str r1, [r7, #8] 8018814: 6812 ldr r2, [r2, #0] 8018816: 601a str r2, [r3, #0] for(i=0; i Flash_Write(FLASH_ORIGIN_SECTOR); 8018824: 2002 movs r0, #2 8018826: f000 f839 bl 801889c Flash_Write(FLASH_ORIGIN_SECTOR); 801882a: 2002 movs r0, #2 801882c: f000 f836 bl 801889c } 8018830: bf00 nop 8018832: 3710 adds r7, #16 8018834: 46bd mov sp, r7 8018836: bd80 pop {r7, pc} 8018838: 20000a98 .word 0x20000a98 801883c: 12345678 .word 0x12345678 8018840: 08008000 .word 0x08008000 8018844: 0800c000 .word 0x0800c000 8018848: 0802d150 .word 0x0802d150 0801884c : HAL_StatusTypeDef Flash_Erase(uint32_t sector) { 801884c: b580 push {r7, lr} 801884e: b088 sub sp, #32 8018850: af00 add r7, sp, #0 8018852: 6078 str r0, [r7, #4] uint32_t SectorError=0; 8018854: 2300 movs r3, #0 8018856: 61fb str r3, [r7, #28] HAL_FLASH_Unlock(); 8018858: f009 fc8a bl 8022170 FLASH_EraseInitTypeDef EraseInitStruct; EraseInitStruct.TypeErase=FLASH_TYPEERASE_SECTORS; 801885c: 2300 movs r3, #0 801885e: 60bb str r3, [r7, #8] EraseInitStruct.Sector=sector; 8018860: 687b ldr r3, [r7, #4] 8018862: 613b str r3, [r7, #16] EraseInitStruct.NbSectors=1; 8018864: 2301 movs r3, #1 8018866: 617b str r3, [r7, #20] EraseInitStruct.VoltageRange=FLASH_VOLTAGE_RANGE_3; 8018868: 2302 movs r3, #2 801886a: 61bb str r3, [r7, #24] if(HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError)!=HAL_OK){ 801886c: f107 021c add.w r2, r7, #28 8018870: f107 0308 add.w r3, r7, #8 8018874: 4611 mov r1, r2 8018876: 4618 mov r0, r3 8018878: f009 fdec bl 8022454 801887c: 4603 mov r3, r0 801887e: 2b00 cmp r3, #0 8018880: d001 beq.n 8018886 return HAL_ERROR; 8018882: 2301 movs r3, #1 8018884: e005 b.n 8018892 } HAL_FLASH_Lock(); 8018886: f009 fc95 bl 80221b4 Delay_msec(10); 801888a: 2009 movs r0, #9 801888c: f007 fcd8 bl 8020240 return HAL_OK; 8018890: 2300 movs r3, #0 } 8018892: 4618 mov r0, r3 8018894: 3720 adds r7, #32 8018896: 46bd mov sp, r7 8018898: bd80 pop {r7, pc} ... 0801889c : * @arg FLASH_ORIGIN_SECTOR * @arg FLASH_BACKUP_SECTOR * @retval HAL status */ HAL_StatusTypeDef Flash_Write(uint8_t sector) { 801889c: e92d 43b0 stmdb sp!, {r4, r5, r7, r8, r9, lr} 80188a0: b086 sub sp, #24 80188a2: af00 add r7, sp, #0 80188a4: 4603 mov r3, r0 80188a6: 71fb strb r3, [r7, #7] uint8_t i; const uint32_t t=sizeof(Data_Form_RAM)/4; 80188a8: 2340 movs r3, #64 @ 0x40 80188aa: 60bb str r3, [r7, #8] uint32_t *ram_data,*flash_data; ram_data=(uint32_t*)&RAM_Data; 80188ac: 4b58 ldr r3, [pc, #352] @ (8018a10 ) 80188ae: 613b str r3, [r7, #16] if(sector==FLASH_ORIGIN_SECTOR){//origin 80188b0: 79fb ldrb r3, [r7, #7] 80188b2: 2b02 cmp r3, #2 80188b4: d151 bne.n 801895a flash_data=(uint32_t*)&Origin_Data; 80188b6: 4b57 ldr r3, [pc, #348] @ (8018a14 ) 80188b8: 60fb str r3, [r7, #12] for(i=0; i if(*ram_data++!=*flash_data++) break; 80188c0: 693b ldr r3, [r7, #16] 80188c2: 1d1a adds r2, r3, #4 80188c4: 613a str r2, [r7, #16] 80188c6: 681a ldr r2, [r3, #0] 80188c8: 68fb ldr r3, [r7, #12] 80188ca: 1d19 adds r1, r3, #4 80188cc: 60f9 str r1, [r7, #12] 80188ce: 681b ldr r3, [r3, #0] 80188d0: 429a cmp r2, r3 80188d2: d107 bne.n 80188e4 for(i=0; i 80188e2: e000 b.n 80188e6 if(*ram_data++!=*flash_data++) break; 80188e4: bf00 nop } if(i==t) return HAL_OK; 80188e6: 7dfb ldrb r3, [r7, #23] 80188e8: 68ba ldr r2, [r7, #8] 80188ea: 429a cmp r2, r3 80188ec: d101 bne.n 80188f2 80188ee: 2300 movs r3, #0 80188f0: e089 b.n 8018a06 ram_data=(uint32_t*)&RAM_Data; 80188f2: 4b47 ldr r3, [pc, #284] @ (8018a10 ) 80188f4: 613b str r3, [r7, #16] flash_data=(uint32_t*)&Origin_Data; //target 80188f6: 4b47 ldr r3, [pc, #284] @ (8018a14 ) 80188f8: 60fb str r3, [r7, #12] //Erase HAL_FLASH_Unlock(); 80188fa: f009 fc39 bl 8022170 Flash_Erase(FLASH_ORIGIN_SECTOR); 80188fe: 2002 movs r0, #2 8018900: f7ff ffa4 bl 801884c HAL_FLASH_Lock(); 8018904: f009 fc56 bl 80221b4 Delay_msec(10); 8018908: 2009 movs r0, #9 801890a: f007 fc99 bl 8020240 //Write HAL_FLASH_Unlock(); 801890e: f009 fc2f bl 8022170 for(i=0; i if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)flash_data++, *ram_data++)!=HAL_OK) { 8018918: 68fb ldr r3, [r7, #12] 801891a: 1d1a adds r2, r3, #4 801891c: 60fa str r2, [r7, #12] 801891e: 4619 mov r1, r3 8018920: 693b ldr r3, [r7, #16] 8018922: 1d1a adds r2, r3, #4 8018924: 613a str r2, [r7, #16] 8018926: 681b ldr r3, [r3, #0] 8018928: 2200 movs r2, #0 801892a: 4698 mov r8, r3 801892c: 4691 mov r9, r2 801892e: 4642 mov r2, r8 8018930: 464b mov r3, r9 8018932: 2002 movs r0, #2 8018934: f009 fbc8 bl 80220c8 8018938: 4603 mov r3, r0 801893a: 2b00 cmp r3, #0 801893c: d001 beq.n 8018942 return HAL_ERROR; 801893e: 2301 movs r3, #1 8018940: e061 b.n 8018a06 for(i=0; i } } Delay_msec(10); 8018950: 2009 movs r0, #9 8018952: f007 fc75 bl 8020240 HAL_FLASH_Lock(); 8018956: f009 fc2d bl 80221b4 } if(sector==FLASH_BACKUP_SECTOR){//backup 801895a: 79fb ldrb r3, [r7, #7] 801895c: 2b03 cmp r3, #3 801895e: d151 bne.n 8018a04 flash_data=(uint32_t*)&Backup_Data; 8018960: 4b2d ldr r3, [pc, #180] @ (8018a18 ) 8018962: 60fb str r3, [r7, #12] for(i=0; i if(*ram_data++!=*flash_data++) break; 801896a: 693b ldr r3, [r7, #16] 801896c: 1d1a adds r2, r3, #4 801896e: 613a str r2, [r7, #16] 8018970: 681a ldr r2, [r3, #0] 8018972: 68fb ldr r3, [r7, #12] 8018974: 1d19 adds r1, r3, #4 8018976: 60f9 str r1, [r7, #12] 8018978: 681b ldr r3, [r3, #0] 801897a: 429a cmp r2, r3 801897c: d107 bne.n 801898e for(i=0; i 801898c: e000 b.n 8018990 if(*ram_data++!=*flash_data++) break; 801898e: bf00 nop } if(i==t) return HAL_OK; 8018990: 7dfb ldrb r3, [r7, #23] 8018992: 68ba ldr r2, [r7, #8] 8018994: 429a cmp r2, r3 8018996: d101 bne.n 801899c 8018998: 2300 movs r3, #0 801899a: e034 b.n 8018a06 ram_data=(uint32_t*)&RAM_Data; 801899c: 4b1c ldr r3, [pc, #112] @ (8018a10 ) 801899e: 613b str r3, [r7, #16] flash_data=(uint32_t*)&Backup_Data; //target 80189a0: 4b1d ldr r3, [pc, #116] @ (8018a18 ) 80189a2: 60fb str r3, [r7, #12] //Erase HAL_FLASH_Unlock(); 80189a4: f009 fbe4 bl 8022170 Flash_Erase(FLASH_BACKUP_SECTOR); 80189a8: 2003 movs r0, #3 80189aa: f7ff ff4f bl 801884c HAL_FLASH_Lock(); 80189ae: f009 fc01 bl 80221b4 Delay_msec(10); 80189b2: 2009 movs r0, #9 80189b4: f007 fc44 bl 8020240 //Write HAL_FLASH_Unlock(); 80189b8: f009 fbda bl 8022170 for(i=0; i if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)flash_data++, *ram_data++)!=HAL_OK) { 80189c2: 68fb ldr r3, [r7, #12] 80189c4: 1d1a adds r2, r3, #4 80189c6: 60fa str r2, [r7, #12] 80189c8: 4619 mov r1, r3 80189ca: 693b ldr r3, [r7, #16] 80189cc: 1d1a adds r2, r3, #4 80189ce: 613a str r2, [r7, #16] 80189d0: 681b ldr r3, [r3, #0] 80189d2: 2200 movs r2, #0 80189d4: 461c mov r4, r3 80189d6: 4615 mov r5, r2 80189d8: 4622 mov r2, r4 80189da: 462b mov r3, r5 80189dc: 2002 movs r0, #2 80189de: f009 fb73 bl 80220c8 80189e2: 4603 mov r3, r0 80189e4: 2b00 cmp r3, #0 80189e6: d001 beq.n 80189ec return HAL_ERROR; 80189e8: 2301 movs r3, #1 80189ea: e00c b.n 8018a06 for(i=0; i } } Delay_msec(10); 80189fa: 2009 movs r0, #9 80189fc: f007 fc20 bl 8020240 HAL_FLASH_Lock(); 8018a00: f009 fbd8 bl 80221b4 } return HAL_OK; 8018a04: 2300 movs r3, #0 } 8018a06: 4618 mov r0, r3 8018a08: 3718 adds r7, #24 8018a0a: 46bd mov sp, r7 8018a0c: e8bd 83b0 ldmia.w sp!, {r4, r5, r7, r8, r9, pc} 8018a10: 20000a98 .word 0x20000a98 8018a14: 08008000 .word 0x08008000 8018a18: 0800c000 .word 0x0800c000 08018a1c : { 0, 0}, //143 { 0, 0}, //144 }; void pinMode(uint8_t pin, int8_t mode) { 8018a1c: b5b0 push {r4, r5, r7, lr} 8018a1e: b096 sub sp, #88 @ 0x58 8018a20: af00 add r7, sp, #0 8018a22: 4603 mov r3, r0 8018a24: 460a mov r2, r1 8018a26: 71fb strb r3, [r7, #7] 8018a28: 4613 mov r3, r2 8018a2a: 71bb strb r3, [r7, #6] const struct { uint32_t Mode; uint32_t Pull; } GPIO_Mode[] = { 8018a2c: 4b2d ldr r3, [pc, #180] @ (8018ae4 ) 8018a2e: f107 0420 add.w r4, r7, #32 8018a32: 461d mov r5, r3 8018a34: cd0f ldmia r5!, {r0, r1, r2, r3} 8018a36: c40f stmia r4!, {r0, r1, r2, r3} 8018a38: cd0f ldmia r5!, {r0, r1, r2, r3} 8018a3a: c40f stmia r4!, {r0, r1, r2, r3} 8018a3c: cd0f ldmia r5!, {r0, r1, r2, r3} 8018a3e: c40f stmia r4!, {r0, r1, r2, r3} 8018a40: e895 0003 ldmia.w r5, {r0, r1} 8018a44: e884 0003 stmia.w r4, {r0, r1} {GPIO_MODE_OUTPUT_OD, GPIO_PULLUP}, //OUTPUT_PULLUP {GPIO_MODE_OUTPUT_PP, GPIO_PULLDOWN}, //OUTPUT_PULLDOWN {GPIO_MODE_OUTPUT_OD, GPIO_NOPULL}, //OUTPUT_OPENDRAIN }; GPIO_InitTypeDef GPIO_InitStruct = {0}; 8018a48: f107 030c add.w r3, r7, #12 8018a4c: 2200 movs r2, #0 8018a4e: 601a str r2, [r3, #0] 8018a50: 605a str r2, [r3, #4] 8018a52: 609a str r2, [r3, #8] 8018a54: 60da str r2, [r3, #12] 8018a56: 611a str r2, [r3, #16] if(pin<=GPIO_MAX_PIN && GPIO_Pin[pin].port!=0) { 8018a58: 79fb ldrb r3, [r7, #7] 8018a5a: 2b90 cmp r3, #144 @ 0x90 8018a5c: d83e bhi.n 8018adc 8018a5e: 79fb ldrb r3, [r7, #7] 8018a60: 4a21 ldr r2, [pc, #132] @ (8018ae8 ) 8018a62: f852 3033 ldr.w r3, [r2, r3, lsl #3] 8018a66: 2b00 cmp r3, #0 8018a68: d038 beq.n 8018adc if(mode != MODE_OFF && mode <= LAST_MODE) { 8018a6a: f997 3006 ldrsb.w r3, [r7, #6] 8018a6e: f1b3 3fff cmp.w r3, #4294967295 8018a72: d026 beq.n 8018ac2 8018a74: f997 3006 ldrsb.w r3, [r7, #6] 8018a78: 2b06 cmp r3, #6 8018a7a: dc22 bgt.n 8018ac2 GPIO_InitStruct.Pin = GPIO_Pin[pin].pin; 8018a7c: 79fb ldrb r3, [r7, #7] 8018a7e: 4a1a ldr r2, [pc, #104] @ (8018ae8 ) 8018a80: 00db lsls r3, r3, #3 8018a82: 4413 add r3, r2 8018a84: 889b ldrh r3, [r3, #4] 8018a86: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_Mode[mode].Mode; 8018a88: f997 3006 ldrsb.w r3, [r7, #6] 8018a8c: 00db lsls r3, r3, #3 8018a8e: 3358 adds r3, #88 @ 0x58 8018a90: 443b add r3, r7 8018a92: f853 3c38 ldr.w r3, [r3, #-56] 8018a96: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_Mode[mode].Pull; 8018a98: f997 3006 ldrsb.w r3, [r7, #6] 8018a9c: 00db lsls r3, r3, #3 8018a9e: 3358 adds r3, #88 @ 0x58 8018aa0: 443b add r3, r7 8018aa2: f853 3c34 ldr.w r3, [r3, #-52] 8018aa6: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8018aa8: 2300 movs r3, #0 8018aaa: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIO_Pin[pin].port, &GPIO_InitStruct); 8018aac: 79fb ldrb r3, [r7, #7] 8018aae: 4a0e ldr r2, [pc, #56] @ (8018ae8 ) 8018ab0: f852 3033 ldr.w r3, [r2, r3, lsl #3] 8018ab4: f107 020c add.w r2, r7, #12 8018ab8: 4611 mov r1, r2 8018aba: 4618 mov r0, r3 8018abc: f009 fdec bl 8022698 } else { HAL_GPIO_DeInit(GPIO_Pin[pin].port, GPIO_Pin[pin].pin); } } } 8018ac0: e00c b.n 8018adc HAL_GPIO_DeInit(GPIO_Pin[pin].port, GPIO_Pin[pin].pin); 8018ac2: 79fb ldrb r3, [r7, #7] 8018ac4: 4a08 ldr r2, [pc, #32] @ (8018ae8 ) 8018ac6: f852 2033 ldr.w r2, [r2, r3, lsl #3] 8018aca: 79fb ldrb r3, [r7, #7] 8018acc: 4906 ldr r1, [pc, #24] @ (8018ae8 ) 8018ace: 00db lsls r3, r3, #3 8018ad0: 440b add r3, r1 8018ad2: 889b ldrh r3, [r3, #4] 8018ad4: 4619 mov r1, r3 8018ad6: 4610 mov r0, r2 8018ad8: f009 ff72 bl 80229c0 } 8018adc: bf00 nop 8018ade: 3758 adds r7, #88 @ 0x58 8018ae0: 46bd mov sp, r7 8018ae2: bdb0 pop {r4, r5, r7, pc} 8018ae4: 0802a558 .word 0x0802a558 8018ae8: 0802d250 .word 0x0802d250 08018aec : GPIO_PinState digitalRead(uint8_t pin) { 8018aec: b580 push {r7, lr} 8018aee: b082 sub sp, #8 8018af0: af00 add r7, sp, #0 8018af2: 4603 mov r3, r0 8018af4: 71fb strb r3, [r7, #7] if(pin<=GPIO_MAX_PIN && GPIO_Pin[pin].port!=0) { 8018af6: 79fb ldrb r3, [r7, #7] 8018af8: 2b90 cmp r3, #144 @ 0x90 8018afa: d814 bhi.n 8018b26 8018afc: 79fb ldrb r3, [r7, #7] 8018afe: 4a0c ldr r2, [pc, #48] @ (8018b30 ) 8018b00: f852 3033 ldr.w r3, [r2, r3, lsl #3] 8018b04: 2b00 cmp r3, #0 8018b06: d00e beq.n 8018b26 return HAL_GPIO_ReadPin(GPIO_Pin[pin].port, GPIO_Pin[pin].pin); 8018b08: 79fb ldrb r3, [r7, #7] 8018b0a: 4a09 ldr r2, [pc, #36] @ (8018b30 ) 8018b0c: f852 2033 ldr.w r2, [r2, r3, lsl #3] 8018b10: 79fb ldrb r3, [r7, #7] 8018b12: 4907 ldr r1, [pc, #28] @ (8018b30 ) 8018b14: 00db lsls r3, r3, #3 8018b16: 440b add r3, r1 8018b18: 889b ldrh r3, [r3, #4] 8018b1a: 4619 mov r1, r3 8018b1c: 4610 mov r0, r2 8018b1e: f00a f843 bl 8022ba8 8018b22: 4603 mov r3, r0 8018b24: e000 b.n 8018b28 } return GPIO_PIN_RESET; 8018b26: 2300 movs r3, #0 } 8018b28: 4618 mov r0, r3 8018b2a: 3708 adds r7, #8 8018b2c: 46bd mov sp, r7 8018b2e: bd80 pop {r7, pc} 8018b30: 0802d250 .word 0x0802d250 08018b34 : void digitalWrite(uint8_t pin, int8_t state) { 8018b34: b580 push {r7, lr} 8018b36: b082 sub sp, #8 8018b38: af00 add r7, sp, #0 8018b3a: 4603 mov r3, r0 8018b3c: 460a mov r2, r1 8018b3e: 71fb strb r3, [r7, #7] 8018b40: 4613 mov r3, r2 8018b42: 71bb strb r3, [r7, #6] if(pin<=GPIO_MAX_PIN && GPIO_Pin[pin].port!=0) { 8018b44: 79fb ldrb r3, [r7, #7] 8018b46: 2b90 cmp r3, #144 @ 0x90 8018b48: d82a bhi.n 8018ba0 8018b4a: 79fb ldrb r3, [r7, #7] 8018b4c: 4a16 ldr r2, [pc, #88] @ (8018ba8 ) 8018b4e: f852 3033 ldr.w r3, [r2, r3, lsl #3] 8018b52: 2b00 cmp r3, #0 8018b54: d024 beq.n 8018ba0 if(state<0) HAL_GPIO_TogglePin(GPIO_Pin[pin].port, GPIO_Pin[pin].pin); 8018b56: f997 3006 ldrsb.w r3, [r7, #6] 8018b5a: 2b00 cmp r3, #0 8018b5c: da0d bge.n 8018b7a 8018b5e: 79fb ldrb r3, [r7, #7] 8018b60: 4a11 ldr r2, [pc, #68] @ (8018ba8 ) 8018b62: f852 2033 ldr.w r2, [r2, r3, lsl #3] 8018b66: 79fb ldrb r3, [r7, #7] 8018b68: 490f ldr r1, [pc, #60] @ (8018ba8 ) 8018b6a: 00db lsls r3, r3, #3 8018b6c: 440b add r3, r1 8018b6e: 889b ldrh r3, [r3, #4] 8018b70: 4619 mov r1, r3 8018b72: 4610 mov r0, r2 8018b74: f00a f849 bl 8022c0a else HAL_GPIO_WritePin (GPIO_Pin[pin].port, GPIO_Pin[pin].pin, (state==0)?GPIO_PIN_RESET:GPIO_PIN_SET); } } 8018b78: e012 b.n 8018ba0 else HAL_GPIO_WritePin (GPIO_Pin[pin].port, GPIO_Pin[pin].pin, (state==0)?GPIO_PIN_RESET:GPIO_PIN_SET); 8018b7a: 79fb ldrb r3, [r7, #7] 8018b7c: 4a0a ldr r2, [pc, #40] @ (8018ba8 ) 8018b7e: f852 0033 ldr.w r0, [r2, r3, lsl #3] 8018b82: 79fb ldrb r3, [r7, #7] 8018b84: 4a08 ldr r2, [pc, #32] @ (8018ba8 ) 8018b86: 00db lsls r3, r3, #3 8018b88: 4413 add r3, r2 8018b8a: 8899 ldrh r1, [r3, #4] 8018b8c: f997 3006 ldrsb.w r3, [r7, #6] 8018b90: 2b00 cmp r3, #0 8018b92: bf14 ite ne 8018b94: 2301 movne r3, #1 8018b96: 2300 moveq r3, #0 8018b98: b2db uxtb r3, r3 8018b9a: 461a mov r2, r3 8018b9c: f00a f81c bl 8022bd8 } 8018ba0: bf00 nop 8018ba2: 3708 adds r7, #8 8018ba4: 46bd mov sp, r7 8018ba6: bd80 pop {r7, pc} 8018ba8: 0802d250 .word 0x0802d250 08018bac : PA10 ------> USB_OTG_FS_ID PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ void MX_GPIO_Init(void) { 8018bac: b580 push {r7, lr} 8018bae: b08e sub sp, #56 @ 0x38 8018bb0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8018bb2: f107 0324 add.w r3, r7, #36 @ 0x24 8018bb6: 2200 movs r2, #0 8018bb8: 601a str r2, [r3, #0] 8018bba: 605a str r2, [r3, #4] 8018bbc: 609a str r2, [r3, #8] 8018bbe: 60da str r2, [r3, #12] 8018bc0: 611a str r2, [r3, #16] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8018bc2: 2300 movs r3, #0 8018bc4: 623b str r3, [r7, #32] 8018bc6: 4b96 ldr r3, [pc, #600] @ (8018e20 ) 8018bc8: 6b1b ldr r3, [r3, #48] @ 0x30 8018bca: 4a95 ldr r2, [pc, #596] @ (8018e20 ) 8018bcc: f043 0310 orr.w r3, r3, #16 8018bd0: 6313 str r3, [r2, #48] @ 0x30 8018bd2: 4b93 ldr r3, [pc, #588] @ (8018e20 ) 8018bd4: 6b1b ldr r3, [r3, #48] @ 0x30 8018bd6: f003 0310 and.w r3, r3, #16 8018bda: 623b str r3, [r7, #32] 8018bdc: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOC_CLK_ENABLE(); 8018bde: 2300 movs r3, #0 8018be0: 61fb str r3, [r7, #28] 8018be2: 4b8f ldr r3, [pc, #572] @ (8018e20 ) 8018be4: 6b1b ldr r3, [r3, #48] @ 0x30 8018be6: 4a8e ldr r2, [pc, #568] @ (8018e20 ) 8018be8: f043 0304 orr.w r3, r3, #4 8018bec: 6313 str r3, [r2, #48] @ 0x30 8018bee: 4b8c ldr r3, [pc, #560] @ (8018e20 ) 8018bf0: 6b1b ldr r3, [r3, #48] @ 0x30 8018bf2: f003 0304 and.w r3, r3, #4 8018bf6: 61fb str r3, [r7, #28] 8018bf8: 69fb ldr r3, [r7, #28] __HAL_RCC_GPIOF_CLK_ENABLE(); 8018bfa: 2300 movs r3, #0 8018bfc: 61bb str r3, [r7, #24] 8018bfe: 4b88 ldr r3, [pc, #544] @ (8018e20 ) 8018c00: 6b1b ldr r3, [r3, #48] @ 0x30 8018c02: 4a87 ldr r2, [pc, #540] @ (8018e20 ) 8018c04: f043 0320 orr.w r3, r3, #32 8018c08: 6313 str r3, [r2, #48] @ 0x30 8018c0a: 4b85 ldr r3, [pc, #532] @ (8018e20 ) 8018c0c: 6b1b ldr r3, [r3, #48] @ 0x30 8018c0e: f003 0320 and.w r3, r3, #32 8018c12: 61bb str r3, [r7, #24] 8018c14: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOH_CLK_ENABLE(); 8018c16: 2300 movs r3, #0 8018c18: 617b str r3, [r7, #20] 8018c1a: 4b81 ldr r3, [pc, #516] @ (8018e20 ) 8018c1c: 6b1b ldr r3, [r3, #48] @ 0x30 8018c1e: 4a80 ldr r2, [pc, #512] @ (8018e20 ) 8018c20: f043 0380 orr.w r3, r3, #128 @ 0x80 8018c24: 6313 str r3, [r2, #48] @ 0x30 8018c26: 4b7e ldr r3, [pc, #504] @ (8018e20 ) 8018c28: 6b1b ldr r3, [r3, #48] @ 0x30 8018c2a: f003 0380 and.w r3, r3, #128 @ 0x80 8018c2e: 617b str r3, [r7, #20] 8018c30: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8018c32: 2300 movs r3, #0 8018c34: 613b str r3, [r7, #16] 8018c36: 4b7a ldr r3, [pc, #488] @ (8018e20 ) 8018c38: 6b1b ldr r3, [r3, #48] @ 0x30 8018c3a: 4a79 ldr r2, [pc, #484] @ (8018e20 ) 8018c3c: f043 0301 orr.w r3, r3, #1 8018c40: 6313 str r3, [r2, #48] @ 0x30 8018c42: 4b77 ldr r3, [pc, #476] @ (8018e20 ) 8018c44: 6b1b ldr r3, [r3, #48] @ 0x30 8018c46: f003 0301 and.w r3, r3, #1 8018c4a: 613b str r3, [r7, #16] 8018c4c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8018c4e: 2300 movs r3, #0 8018c50: 60fb str r3, [r7, #12] 8018c52: 4b73 ldr r3, [pc, #460] @ (8018e20 ) 8018c54: 6b1b ldr r3, [r3, #48] @ 0x30 8018c56: 4a72 ldr r2, [pc, #456] @ (8018e20 ) 8018c58: f043 0302 orr.w r3, r3, #2 8018c5c: 6313 str r3, [r2, #48] @ 0x30 8018c5e: 4b70 ldr r3, [pc, #448] @ (8018e20 ) 8018c60: 6b1b ldr r3, [r3, #48] @ 0x30 8018c62: f003 0302 and.w r3, r3, #2 8018c66: 60fb str r3, [r7, #12] 8018c68: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); 8018c6a: 2300 movs r3, #0 8018c6c: 60bb str r3, [r7, #8] 8018c6e: 4b6c ldr r3, [pc, #432] @ (8018e20 ) 8018c70: 6b1b ldr r3, [r3, #48] @ 0x30 8018c72: 4a6b ldr r2, [pc, #428] @ (8018e20 ) 8018c74: f043 0308 orr.w r3, r3, #8 8018c78: 6313 str r3, [r2, #48] @ 0x30 8018c7a: 4b69 ldr r3, [pc, #420] @ (8018e20 ) 8018c7c: 6b1b ldr r3, [r3, #48] @ 0x30 8018c7e: f003 0308 and.w r3, r3, #8 8018c82: 60bb str r3, [r7, #8] 8018c84: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOG_CLK_ENABLE(); 8018c86: 2300 movs r3, #0 8018c88: 607b str r3, [r7, #4] 8018c8a: 4b65 ldr r3, [pc, #404] @ (8018e20 ) 8018c8c: 6b1b ldr r3, [r3, #48] @ 0x30 8018c8e: 4a64 ldr r2, [pc, #400] @ (8018e20 ) 8018c90: f043 0340 orr.w r3, r3, #64 @ 0x40 8018c94: 6313 str r3, [r2, #48] @ 0x30 8018c96: 4b62 ldr r3, [pc, #392] @ (8018e20 ) 8018c98: 6b1b ldr r3, [r3, #48] @ 0x30 8018c9a: f003 0340 and.w r3, r3, #64 @ 0x40 8018c9e: 607b str r3, [r7, #4] 8018ca0: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_SET); 8018ca2: 2201 movs r2, #1 8018ca4: 2104 movs r1, #4 8018ca6: 485f ldr r0, [pc, #380] @ (8018e24 ) 8018ca8: f009 ff96 bl 8022bd8 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2, GPIO_PIN_RESET); 8018cac: 2200 movs r2, #0 8018cae: 2107 movs r1, #7 8018cb0: 485d ldr r0, [pc, #372] @ (8018e28 ) 8018cb2: f009 ff91 bl 8022bd8 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOF, GPIO_PIN_12, GPIO_PIN_SET); 8018cb6: 2201 movs r2, #1 8018cb8: f44f 5180 mov.w r1, #4096 @ 0x1000 8018cbc: 485a ldr r0, [pc, #360] @ (8018e28 ) 8018cbe: f009 ff8b bl 8022bd8 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET); 8018cc2: 2200 movs r2, #0 8018cc4: f44f 5180 mov.w r1, #4096 @ 0x1000 8018cc8: 4858 ldr r0, [pc, #352] @ (8018e2c ) 8018cca: f009 ff85 bl 8022bd8 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET); 8018cce: 2200 movs r2, #0 8018cd0: 2102 movs r1, #2 8018cd2: 4857 ldr r0, [pc, #348] @ (8018e30 ) 8018cd4: f009 ff80 bl 8022bd8 /*Configure GPIO pin : PE2 */ GPIO_InitStruct.Pin = GPIO_PIN_2; 8018cd8: 2304 movs r3, #4 8018cda: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8018cdc: 2301 movs r3, #1 8018cde: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_PULLUP; 8018ce0: 2301 movs r3, #1 8018ce2: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8018ce4: 2302 movs r3, #2 8018ce6: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8018ce8: f107 0324 add.w r3, r7, #36 @ 0x24 8018cec: 4619 mov r1, r3 8018cee: 484d ldr r0, [pc, #308] @ (8018e24 ) 8018cf0: f009 fcd2 bl 8022698 /*Configure GPIO pin : PC13 */ GPIO_InitStruct.Pin = GPIO_PIN_13; 8018cf4: f44f 5300 mov.w r3, #8192 @ 0x2000 8018cf8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 8018cfa: f44f 1388 mov.w r3, #1114112 @ 0x110000 8018cfe: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018d00: 2300 movs r3, #0 8018d02: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8018d04: f107 0324 add.w r3, r7, #36 @ 0x24 8018d08: 4619 mov r1, r3 8018d0a: 484a ldr r0, [pc, #296] @ (8018e34 ) 8018d0c: f009 fcc4 bl 8022698 /*Configure GPIO pins : PF0 PF1 PF2 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2; 8018d10: 2307 movs r3, #7 8018d12: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8018d14: 2301 movs r3, #1 8018d16: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018d18: 2300 movs r3, #0 8018d1a: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8018d1c: 2300 movs r3, #0 8018d1e: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8018d20: f107 0324 add.w r3, r7, #36 @ 0x24 8018d24: 4619 mov r1, r3 8018d26: 4840 ldr r0, [pc, #256] @ (8018e28 ) 8018d28: f009 fcb6 bl 8022698 /*Configure GPIO pin : PF12 */ GPIO_InitStruct.Pin = GPIO_PIN_12; 8018d2c: f44f 5380 mov.w r3, #4096 @ 0x1000 8018d30: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8018d32: 2301 movs r3, #1 8018d34: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_PULLUP; 8018d36: 2301 movs r3, #1 8018d38: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8018d3a: 2302 movs r3, #2 8018d3c: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8018d3e: f107 0324 add.w r3, r7, #36 @ 0x24 8018d42: 4619 mov r1, r3 8018d44: 4838 ldr r0, [pc, #224] @ (8018e28 ) 8018d46: f009 fca7 bl 8022698 /*Configure GPIO pin : PB12 */ GPIO_InitStruct.Pin = GPIO_PIN_12; 8018d4a: f44f 5380 mov.w r3, #4096 @ 0x1000 8018d4e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8018d50: 2301 movs r3, #1 8018d52: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018d54: 2300 movs r3, #0 8018d56: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8018d58: 2300 movs r3, #0 8018d5a: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8018d5c: f107 0324 add.w r3, r7, #36 @ 0x24 8018d60: 4619 mov r1, r3 8018d62: 4832 ldr r0, [pc, #200] @ (8018e2c ) 8018d64: f009 fc98 bl 8022698 /*Configure GPIO pin : PD15 */ GPIO_InitStruct.Pin = GPIO_PIN_15; 8018d68: f44f 4300 mov.w r3, #32768 @ 0x8000 8018d6c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 8018d6e: f44f 1388 mov.w r3, #1114112 @ 0x110000 8018d72: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018d74: 2300 movs r3, #0 8018d76: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8018d78: f107 0324 add.w r3, r7, #36 @ 0x24 8018d7c: 4619 mov r1, r3 8018d7e: 482c ldr r0, [pc, #176] @ (8018e30 ) 8018d80: f009 fc8a bl 8022698 /*Configure GPIO pin : PA9 */ GPIO_InitStruct.Pin = GPIO_PIN_9; 8018d84: f44f 7300 mov.w r3, #512 @ 0x200 8018d88: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8018d8a: 2300 movs r3, #0 8018d8c: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018d8e: 2300 movs r3, #0 8018d90: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8018d92: f107 0324 add.w r3, r7, #36 @ 0x24 8018d96: 4619 mov r1, r3 8018d98: 4827 ldr r0, [pc, #156] @ (8018e38 ) 8018d9a: f009 fc7d bl 8022698 /*Configure GPIO pins : PA10 PA11 PA12 */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12; 8018d9e: f44f 53e0 mov.w r3, #7168 @ 0x1c00 8018da2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8018da4: 2302 movs r3, #2 8018da6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018da8: 2300 movs r3, #0 8018daa: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8018dac: 2303 movs r3, #3 8018dae: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; 8018db0: 230a movs r3, #10 8018db2: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8018db4: f107 0324 add.w r3, r7, #36 @ 0x24 8018db8: 4619 mov r1, r3 8018dba: 481f ldr r0, [pc, #124] @ (8018e38 ) 8018dbc: f009 fc6c bl 8022698 /*Configure GPIO pin : PD1 */ GPIO_InitStruct.Pin = GPIO_PIN_1; 8018dc0: 2302 movs r3, #2 8018dc2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8018dc4: 2301 movs r3, #1 8018dc6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018dc8: 2300 movs r3, #0 8018dca: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8018dcc: 2300 movs r3, #0 8018dce: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8018dd0: f107 0324 add.w r3, r7, #36 @ 0x24 8018dd4: 4619 mov r1, r3 8018dd6: 4816 ldr r0, [pc, #88] @ (8018e30 ) 8018dd8: f009 fc5e bl 8022698 /*Configure GPIO pin : PE0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8018ddc: 2301 movs r3, #1 8018dde: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 8018de0: f44f 1388 mov.w r3, #1114112 @ 0x110000 8018de4: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8018de6: 2300 movs r3, #0 8018de8: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8018dea: f107 0324 add.w r3, r7, #36 @ 0x24 8018dee: 4619 mov r1, r3 8018df0: 480c ldr r0, [pc, #48] @ (8018e24 ) 8018df2: f009 fc51 bl 8022698 /* EXTI interrupt init*/ HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0); 8018df6: 2200 movs r2, #0 8018df8: 2100 movs r1, #0 8018dfa: 2006 movs r0, #6 8018dfc: f008 fbc7 bl 802158e HAL_NVIC_EnableIRQ(EXTI0_IRQn); 8018e00: 2006 movs r0, #6 8018e02: f008 fbe0 bl 80215c6 HAL_NVIC_SetPriority(EXTI15_10_IRQn, 0, 0); 8018e06: 2200 movs r2, #0 8018e08: 2100 movs r1, #0 8018e0a: 2028 movs r0, #40 @ 0x28 8018e0c: f008 fbbf bl 802158e HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); 8018e10: 2028 movs r0, #40 @ 0x28 8018e12: f008 fbd8 bl 80215c6 } 8018e16: bf00 nop 8018e18: 3738 adds r7, #56 @ 0x38 8018e1a: 46bd mov sp, r7 8018e1c: bd80 pop {r7, pc} 8018e1e: bf00 nop 8018e20: 40023800 .word 0x40023800 8018e24: 40021000 .word 0x40021000 8018e28: 40021400 .word 0x40021400 8018e2c: 40020400 .word 0x40020400 8018e30: 40020c00 .word 0x40020c00 8018e34: 40020800 .word 0x40020800 8018e38: 40020000 .word 0x40020000 08018e3c : /* USER CODE BEGIN 2 */ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) // 엔코더 방식에서 Z펄스로 절대위치 초기화하는 함수!! { 8018e3c: b480 push {r7} 8018e3e: b083 sub sp, #12 8018e40: af00 add r7, sp, #0 8018e42: 4603 mov r3, r0 8018e44: 80fb strh r3, [r7, #6] if(GPIO_Pin==GPIO_PIN_15){ 8018e46: 88fb ldrh r3, [r7, #6] 8018e48: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8018e4c: d10a bne.n 8018e64 Motor2_Ang.diffL = 0; 8018e4e: 4b0f ldr r3, [pc, #60] @ (8018e8c ) 8018e50: 2200 movs r2, #0 8018e52: 619a str r2, [r3, #24] if(WP_EncInit.Status[R] != Done){ 8018e54: 4b0e ldr r3, [pc, #56] @ (8018e90 ) 8018e56: 789b ldrb r3, [r3, #2] 8018e58: 2b01 cmp r3, #1 8018e5a: d010 beq.n 8018e7e WP_EncInit.Status[R] = Done; // (250703 추가 for Init_Encoder) 8018e5c: 4b0c ldr r3, [pc, #48] @ (8018e90 ) 8018e5e: 2201 movs r2, #1 8018e60: 709a strb r2, [r3, #2] if(WP_EncInit.Status[L] != Done) { WP_EncInit.Status[L] = Done; // (250703 추가 for Init_Encoder) } // TestVari1++; } } 8018e62: e00c b.n 8018e7e else if(GPIO_Pin==GPIO_PIN_0){ 8018e64: 88fb ldrh r3, [r7, #6] 8018e66: 2b01 cmp r3, #1 8018e68: d109 bne.n 8018e7e Motor1_Ang.diffL = 0; 8018e6a: 4b0a ldr r3, [pc, #40] @ (8018e94 ) 8018e6c: 2200 movs r2, #0 8018e6e: 619a str r2, [r3, #24] if(WP_EncInit.Status[L] != Done) { 8018e70: 4b07 ldr r3, [pc, #28] @ (8018e90 ) 8018e72: 785b ldrb r3, [r3, #1] 8018e74: 2b01 cmp r3, #1 8018e76: d002 beq.n 8018e7e WP_EncInit.Status[L] = Done; // (250703 추가 for Init_Encoder) 8018e78: 4b05 ldr r3, [pc, #20] @ (8018e90 ) 8018e7a: 2201 movs r2, #1 8018e7c: 705a strb r2, [r3, #1] } 8018e7e: bf00 nop 8018e80: 370c adds r7, #12 8018e82: 46bd mov sp, r7 8018e84: f85d 7b04 ldr.w r7, [sp], #4 8018e88: 4770 bx lr 8018e8a: bf00 nop 8018e8c: 200004f8 .word 0x200004f8 8018e90: 200000b8 .word 0x200000b8 8018e94: 2000047c .word 0x2000047c 08018e98 : I2C_HandleTypeDef hi2c1; /* I2C1 init function */ void MX_I2C1_Init(void) { 8018e98: b580 push {r7, lr} 8018e9a: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; 8018e9c: 4b12 ldr r3, [pc, #72] @ (8018ee8 ) 8018e9e: 4a13 ldr r2, [pc, #76] @ (8018eec ) 8018ea0: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; 8018ea2: 4b11 ldr r3, [pc, #68] @ (8018ee8 ) 8018ea4: 4a12 ldr r2, [pc, #72] @ (8018ef0 ) 8018ea6: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; 8018ea8: 4b0f ldr r3, [pc, #60] @ (8018ee8 ) 8018eaa: 2200 movs r2, #0 8018eac: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; 8018eae: 4b0e ldr r3, [pc, #56] @ (8018ee8 ) 8018eb0: 2200 movs r2, #0 8018eb2: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8018eb4: 4b0c ldr r3, [pc, #48] @ (8018ee8 ) 8018eb6: f44f 4280 mov.w r2, #16384 @ 0x4000 8018eba: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8018ebc: 4b0a ldr r3, [pc, #40] @ (8018ee8 ) 8018ebe: 2200 movs r2, #0 8018ec0: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; 8018ec2: 4b09 ldr r3, [pc, #36] @ (8018ee8 ) 8018ec4: 2200 movs r2, #0 8018ec6: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8018ec8: 4b07 ldr r3, [pc, #28] @ (8018ee8 ) 8018eca: 2200 movs r2, #0 8018ecc: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8018ece: 4b06 ldr r3, [pc, #24] @ (8018ee8 ) 8018ed0: 2200 movs r2, #0 8018ed2: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) 8018ed4: 4804 ldr r0, [pc, #16] @ (8018ee8 ) 8018ed6: f009 fecb bl 8022c70 8018eda: 4603 mov r3, r0 8018edc: 2b00 cmp r3, #0 8018ede: d001 beq.n 8018ee4 { Error_Handler(); 8018ee0: f000 ff07 bl 8019cf2 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } 8018ee4: bf00 nop 8018ee6: bd80 pop {r7, pc} 8018ee8: 20000b98 .word 0x20000b98 8018eec: 40005400 .word 0x40005400 8018ef0: 000186a0 .word 0x000186a0 08018ef4 : void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { 8018ef4: b580 push {r7, lr} 8018ef6: b08a sub sp, #40 @ 0x28 8018ef8: af00 add r7, sp, #0 8018efa: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8018efc: f107 0314 add.w r3, r7, #20 8018f00: 2200 movs r2, #0 8018f02: 601a str r2, [r3, #0] 8018f04: 605a str r2, [r3, #4] 8018f06: 609a str r2, [r3, #8] 8018f08: 60da str r2, [r3, #12] 8018f0a: 611a str r2, [r3, #16] if(i2cHandle->Instance==I2C1) 8018f0c: 687b ldr r3, [r7, #4] 8018f0e: 681b ldr r3, [r3, #0] 8018f10: 4a21 ldr r2, [pc, #132] @ (8018f98 ) 8018f12: 4293 cmp r3, r2 8018f14: d13b bne.n 8018f8e { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8018f16: 2300 movs r3, #0 8018f18: 613b str r3, [r7, #16] 8018f1a: 4b20 ldr r3, [pc, #128] @ (8018f9c ) 8018f1c: 6b1b ldr r3, [r3, #48] @ 0x30 8018f1e: 4a1f ldr r2, [pc, #124] @ (8018f9c ) 8018f20: f043 0302 orr.w r3, r3, #2 8018f24: 6313 str r3, [r2, #48] @ 0x30 8018f26: 4b1d ldr r3, [pc, #116] @ (8018f9c ) 8018f28: 6b1b ldr r3, [r3, #48] @ 0x30 8018f2a: f003 0302 and.w r3, r3, #2 8018f2e: 613b str r3, [r7, #16] 8018f30: 693b ldr r3, [r7, #16] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8018f32: 23c0 movs r3, #192 @ 0xc0 8018f34: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8018f36: 2312 movs r3, #18 8018f38: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8018f3a: 2300 movs r3, #0 8018f3c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8018f3e: 2303 movs r3, #3 8018f40: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 8018f42: 2304 movs r3, #4 8018f44: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8018f46: f107 0314 add.w r3, r7, #20 8018f4a: 4619 mov r1, r3 8018f4c: 4814 ldr r0, [pc, #80] @ (8018fa0 ) 8018f4e: f009 fba3 bl 8022698 /* I2C1 clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); 8018f52: 2300 movs r3, #0 8018f54: 60fb str r3, [r7, #12] 8018f56: 4b11 ldr r3, [pc, #68] @ (8018f9c ) 8018f58: 6c1b ldr r3, [r3, #64] @ 0x40 8018f5a: 4a10 ldr r2, [pc, #64] @ (8018f9c ) 8018f5c: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8018f60: 6413 str r3, [r2, #64] @ 0x40 8018f62: 4b0e ldr r3, [pc, #56] @ (8018f9c ) 8018f64: 6c1b ldr r3, [r3, #64] @ 0x40 8018f66: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8018f6a: 60fb str r3, [r7, #12] 8018f6c: 68fb ldr r3, [r7, #12] /* I2C1 interrupt Init */ HAL_NVIC_SetPriority(I2C1_EV_IRQn, 10, 0); 8018f6e: 2200 movs r2, #0 8018f70: 210a movs r1, #10 8018f72: 201f movs r0, #31 8018f74: f008 fb0b bl 802158e HAL_NVIC_EnableIRQ(I2C1_EV_IRQn); 8018f78: 201f movs r0, #31 8018f7a: f008 fb24 bl 80215c6 HAL_NVIC_SetPriority(I2C1_ER_IRQn, 10, 0); 8018f7e: 2200 movs r2, #0 8018f80: 210a movs r1, #10 8018f82: 2020 movs r0, #32 8018f84: f008 fb03 bl 802158e HAL_NVIC_EnableIRQ(I2C1_ER_IRQn); 8018f88: 2020 movs r0, #32 8018f8a: f008 fb1c bl 80215c6 /* USER CODE BEGIN I2C1_MspInit 1 */ /* USER CODE END I2C1_MspInit 1 */ } } 8018f8e: bf00 nop 8018f90: 3728 adds r7, #40 @ 0x28 8018f92: 46bd mov sp, r7 8018f94: bd80 pop {r7, pc} 8018f96: bf00 nop 8018f98: 40005400 .word 0x40005400 8018f9c: 40023800 .word 0x40023800 8018fa0: 40020400 .word 0x40020400 08018fa4 : uint8_t* LED_Stream_; #define LED_Stream(i, j) (*(LED_Stream_+(i)*(LED_PACKET_SIZE+1)+(j))) void LED_Send(uint8_t n, uint8_t red, uint8_t green, uint8_t blue, uint8_t red2, uint8_t green2, uint8_t blue2) { 8018fa4: b590 push {r4, r7, lr} 8018fa6: b085 sub sp, #20 8018fa8: af00 add r7, sp, #0 8018faa: 4604 mov r4, r0 8018fac: 4608 mov r0, r1 8018fae: 4611 mov r1, r2 8018fb0: 461a mov r2, r3 8018fb2: 4623 mov r3, r4 8018fb4: 71fb strb r3, [r7, #7] 8018fb6: 4603 mov r3, r0 8018fb8: 71bb strb r3, [r7, #6] 8018fba: 460b mov r3, r1 8018fbc: 717b strb r3, [r7, #5] 8018fbe: 4613 mov r3, r2 8018fc0: 713b strb r3, [r7, #4] uint8_t buffer[LED_PACKET_SIZE] = {n, red, green, blue, red2, green2, blue2}; 8018fc2: 79fb ldrb r3, [r7, #7] 8018fc4: 723b strb r3, [r7, #8] 8018fc6: 79bb ldrb r3, [r7, #6] 8018fc8: 727b strb r3, [r7, #9] 8018fca: 797b ldrb r3, [r7, #5] 8018fcc: 72bb strb r3, [r7, #10] 8018fce: 793b ldrb r3, [r7, #4] 8018fd0: 72fb strb r3, [r7, #11] 8018fd2: f897 3020 ldrb.w r3, [r7, #32] 8018fd6: 733b strb r3, [r7, #12] 8018fd8: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 8018fdc: 737b strb r3, [r7, #13] 8018fde: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 8018fe2: 73bb strb r3, [r7, #14] Stop_LED_Task(); 8018fe4: f000 f80e bl 8019004 LED_PutData(buffer); 8018fe8: f107 0308 add.w r3, r7, #8 8018fec: 2207 movs r2, #7 8018fee: 4619 mov r1, r3 8018ff0: 4803 ldr r0, [pc, #12] @ (8019000 ) 8018ff2: f006 fc99 bl 801f928 LED_Buffer[com][6] = blue2; Stop_LED_Task(); LED_PutData(LED_Buffer[com]); */ } 8018ff6: bf00 nop 8018ff8: 3714 adds r7, #20 8018ffa: 46bd mov sp, r7 8018ffc: bd90 pop {r4, r7, pc} 8018ffe: bf00 nop 8019000: 200053a8 .word 0x200053a8 08019004 : Task_Start_10ms(LED_Task); Flag_LED_Task = 1; } void Stop_LED_Task(void) { 8019004: b580 push {r7, lr} 8019006: af00 add r7, sp, #0 if(Flag_LED_Task) { 8019008: 4b05 ldr r3, [pc, #20] @ (8019020 ) 801900a: 781b ldrb r3, [r3, #0] 801900c: 2b00 cmp r3, #0 801900e: d004 beq.n 801901a Flag_LED_Task = 0; 8019010: 4b03 ldr r3, [pc, #12] @ (8019020 ) 8019012: 2200 movs r2, #0 8019014: 701a strb r2, [r3, #0] Task_Stop_10ms(); 8019016: f004 ff1f bl 801de58 } } 801901a: bf00 nop 801901c: bd80 pop {r7, pc} 801901e: bf00 nop 8019020: 20000bec .word 0x20000bec 08019024 : } #define POSITION_DIFF (POSITION_MAX-POSITION_MIN) int check_LvDisplay1,check_LvDisplay2,check_LvDisplay3; // HSW (24.02.09) void LED_Display_Level(int8_t mode, int16_t position_left, int16_t position_right, uint8_t r1, uint8_t g1, uint8_t b1, uint8_t r2, uint8_t g2, uint8_t b2) { 8019024: b590 push {r4, r7, lr} 8019026: b089 sub sp, #36 @ 0x24 8019028: af04 add r7, sp, #16 801902a: 4604 mov r4, r0 801902c: 4608 mov r0, r1 801902e: 4611 mov r1, r2 8019030: 461a mov r2, r3 8019032: 4623 mov r3, r4 8019034: 71fb strb r3, [r7, #7] 8019036: 4603 mov r3, r0 8019038: 80bb strh r3, [r7, #4] 801903a: 460b mov r3, r1 801903c: 807b strh r3, [r7, #2] 801903e: 4613 mov r3, r2 8019040: 71bb strb r3, [r7, #6] static uint8_t led_full = 0; //Previous static uint8_t led_left = 0; // static uint8_t led_right= 0; // uint8_t n; uint8_t flag = 0; 8019042: 2300 movs r3, #0 8019044: 73bb strb r3, [r7, #14] if(mode <= LED_MODE_FULL_LEFT) { //Full Mode 8019046: f997 3007 ldrsb.w r3, [r7, #7] 801904a: 2b00 cmp r3, #0 801904c: dc71 bgt.n 8019132 check_LvDisplay1++; 801904e: 4b9e ldr r3, [pc, #632] @ (80192c8 ) 8019050: 681b ldr r3, [r3, #0] 8019052: 3301 adds r3, #1 8019054: 4a9c ldr r2, [pc, #624] @ (80192c8 ) 8019056: 6013 str r3, [r2, #0] int16_t position = (position_left + position_right)/2; 8019058: f9b7 2004 ldrsh.w r2, [r7, #4] 801905c: f9b7 3002 ldrsh.w r3, [r7, #2] 8019060: 4413 add r3, r2 8019062: 0fda lsrs r2, r3, #31 8019064: 4413 add r3, r2 8019066: 105b asrs r3, r3, #1 8019068: 81bb strh r3, [r7, #12] // int16_t position = position_left; // int16_t position = position_right; if(position>=POSITION_MAX) n = LED_NUMBER; 801906a: f9b7 300c ldrsh.w r3, [r7, #12] 801906e: f5b3 6fe1 cmp.w r3, #1800 @ 0x708 8019072: db02 blt.n 801907a 8019074: 233c movs r3, #60 @ 0x3c 8019076: 73fb strb r3, [r7, #15] 8019078: e014 b.n 80190a4 else if(position<=0) n = 0; 801907a: f9b7 300c ldrsh.w r3, [r7, #12] 801907e: 2b00 cmp r3, #0 8019080: dc02 bgt.n 8019088 8019082: 2300 movs r3, #0 8019084: 73fb strb r3, [r7, #15] 8019086: e00d b.n 80190a4 else n = (position-POSITION_MIN)*LED_NUMBER/(POSITION_DIFF+1); 8019088: f9b7 300c ldrsh.w r3, [r7, #12] 801908c: 1e9a subs r2, r3, #2 801908e: 4613 mov r3, r2 8019090: 011b lsls r3, r3, #4 8019092: 1a9b subs r3, r3, r2 8019094: 009b lsls r3, r3, #2 8019096: 4a8d ldr r2, [pc, #564] @ (80192cc ) 8019098: fb82 1203 smull r1, r2, r2, r3 801909c: 1252 asrs r2, r2, #9 801909e: 17db asrs r3, r3, #31 80190a0: 1ad3 subs r3, r2, r3 80190a2: 73fb strb r3, [r7, #15] if(led_full != n) { 80190a4: 4b8a ldr r3, [pc, #552] @ (80192d0 ) 80190a6: 781b ldrb r3, [r3, #0] 80190a8: 7bfa ldrb r2, [r7, #15] 80190aa: 429a cmp r2, r3 80190ac: f000 8107 beq.w 80192be led_full = n; 80190b0: 4a87 ldr r2, [pc, #540] @ (80192d0 ) 80190b2: 7bfb ldrb r3, [r7, #15] 80190b4: 7013 strb r3, [r2, #0] led_left = led_right = 0; 80190b6: 4b87 ldr r3, [pc, #540] @ (80192d4 ) 80190b8: 2200 movs r2, #0 80190ba: 701a strb r2, [r3, #0] 80190bc: 4b85 ldr r3, [pc, #532] @ (80192d4 ) 80190be: 781a ldrb r2, [r3, #0] 80190c0: 4b85 ldr r3, [pc, #532] @ (80192d8 ) 80190c2: 701a strb r2, [r3, #0] if(mode==LED_MODE_FULL_LEFT) LED_Send_All(n,r1,g1,b1,r2,g2,b2); 80190c4: f997 3007 ldrsb.w r3, [r7, #7] 80190c8: 2b00 cmp r3, #0 80190ca: d117 bne.n 80190fc 80190cc: 7bfb ldrb r3, [r7, #15] 80190ce: f003 033f and.w r3, r3, #63 @ 0x3f 80190d2: b2db uxtb r3, r3 80190d4: 3340 adds r3, #64 @ 0x40 80190d6: b2d8 uxtb r0, r3 80190d8: f897 4024 ldrb.w r4, [r7, #36] @ 0x24 80190dc: f897 2020 ldrb.w r2, [r7, #32] 80190e0: 79b9 ldrb r1, [r7, #6] 80190e2: f897 3030 ldrb.w r3, [r7, #48] @ 0x30 80190e6: 9302 str r3, [sp, #8] 80190e8: f897 302c ldrb.w r3, [r7, #44] @ 0x2c 80190ec: 9301 str r3, [sp, #4] 80190ee: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 80190f2: 9300 str r3, [sp, #0] 80190f4: 4623 mov r3, r4 80190f6: f7ff ff55 bl 8018fa4 if(mode==LED_MODE_HALF_SIDE) LED_Send_Right(n,r1,g1,b1,r2,g2,b2); else LED_Send_Right(LED_HALF_NUMBER-n,r2,g2,b2,r1,g1,b1); } } } } 80190fa: e0e0 b.n 80192be else LED_Send_All(LED_NUMBER-n,r2,g2,b2,r1,g1,b1); 80190fc: 7bfb ldrb r3, [r7, #15] 80190fe: f1c3 033c rsb r3, r3, #60 @ 0x3c 8019102: b2db uxtb r3, r3 8019104: f003 033f and.w r3, r3, #63 @ 0x3f 8019108: b2db uxtb r3, r3 801910a: 3340 adds r3, #64 @ 0x40 801910c: b2d8 uxtb r0, r3 801910e: f897 4030 ldrb.w r4, [r7, #48] @ 0x30 8019112: f897 202c ldrb.w r2, [r7, #44] @ 0x2c 8019116: f897 1028 ldrb.w r1, [r7, #40] @ 0x28 801911a: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 801911e: 9302 str r3, [sp, #8] 8019120: f897 3020 ldrb.w r3, [r7, #32] 8019124: 9301 str r3, [sp, #4] 8019126: 79bb ldrb r3, [r7, #6] 8019128: 9300 str r3, [sp, #0] 801912a: 4623 mov r3, r4 801912c: f7ff ff3a bl 8018fa4 } 8019130: e0c5 b.n 80192be if(position_left>=POSITION_MAX) n = LED_HALF_NUMBER; 8019132: f9b7 3004 ldrsh.w r3, [r7, #4] 8019136: f5b3 6fe1 cmp.w r3, #1800 @ 0x708 801913a: db02 blt.n 8019142 801913c: 231e movs r3, #30 801913e: 73fb strb r3, [r7, #15] 8019140: e014 b.n 801916c else if(position_left<=0) n = 0; 8019142: f9b7 3004 ldrsh.w r3, [r7, #4] 8019146: 2b00 cmp r3, #0 8019148: dc02 bgt.n 8019150 801914a: 2300 movs r3, #0 801914c: 73fb strb r3, [r7, #15] 801914e: e00d b.n 801916c else n = (position_left-POSITION_MIN)*LED_HALF_NUMBER/(POSITION_DIFF+1); 8019150: f9b7 3004 ldrsh.w r3, [r7, #4] 8019154: 1e9a subs r2, r3, #2 8019156: 4613 mov r3, r2 8019158: 011b lsls r3, r3, #4 801915a: 1a9b subs r3, r3, r2 801915c: 005b lsls r3, r3, #1 801915e: 4a5b ldr r2, [pc, #364] @ (80192cc ) 8019160: fb82 1203 smull r1, r2, r2, r3 8019164: 1252 asrs r2, r2, #9 8019166: 17db asrs r3, r3, #31 8019168: 1ad3 subs r3, r2, r3 801916a: 73fb strb r3, [r7, #15] if(led_left != n) { 801916c: 4b5a ldr r3, [pc, #360] @ (80192d8 ) 801916e: 781b ldrb r3, [r3, #0] 8019170: 7bfa ldrb r2, [r7, #15] 8019172: 429a cmp r2, r3 8019174: d03e beq.n 80191f4 led_left = n; 8019176: 4a58 ldr r2, [pc, #352] @ (80192d8 ) 8019178: 7bfb ldrb r3, [r7, #15] 801917a: 7013 strb r3, [r2, #0] led_full = 0; 801917c: 4b54 ldr r3, [pc, #336] @ (80192d0 ) 801917e: 2200 movs r2, #0 8019180: 701a strb r2, [r3, #0] if(mode==LED_MODE_HALF_SIDE) LED_Send_Left(n,r1,g1,b1,r2,g2,b2); 8019182: f997 3007 ldrsb.w r3, [r7, #7] 8019186: 2b02 cmp r3, #2 8019188: d117 bne.n 80191ba 801918a: 7bfb ldrb r3, [r7, #15] 801918c: f003 033f and.w r3, r3, #63 @ 0x3f 8019190: b2db uxtb r3, r3 8019192: 3b80 subs r3, #128 @ 0x80 8019194: b2d8 uxtb r0, r3 8019196: f897 4024 ldrb.w r4, [r7, #36] @ 0x24 801919a: f897 2020 ldrb.w r2, [r7, #32] 801919e: 79b9 ldrb r1, [r7, #6] 80191a0: f897 3030 ldrb.w r3, [r7, #48] @ 0x30 80191a4: 9302 str r3, [sp, #8] 80191a6: f897 302c ldrb.w r3, [r7, #44] @ 0x2c 80191aa: 9301 str r3, [sp, #4] 80191ac: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 80191b0: 9300 str r3, [sp, #0] 80191b2: 4623 mov r3, r4 80191b4: f7ff fef6 bl 8018fa4 80191b8: e019 b.n 80191ee else LED_Send_Left(LED_HALF_NUMBER-n,r2,g2,b2,r1,g1,b1); 80191ba: 7bfb ldrb r3, [r7, #15] 80191bc: f1c3 031e rsb r3, r3, #30 80191c0: b2db uxtb r3, r3 80191c2: f003 033f and.w r3, r3, #63 @ 0x3f 80191c6: b2db uxtb r3, r3 80191c8: 3b80 subs r3, #128 @ 0x80 80191ca: b2d8 uxtb r0, r3 80191cc: f897 4030 ldrb.w r4, [r7, #48] @ 0x30 80191d0: f897 202c ldrb.w r2, [r7, #44] @ 0x2c 80191d4: f897 1028 ldrb.w r1, [r7, #40] @ 0x28 80191d8: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 80191dc: 9302 str r3, [sp, #8] 80191de: f897 3020 ldrb.w r3, [r7, #32] 80191e2: 9301 str r3, [sp, #4] 80191e4: 79bb ldrb r3, [r7, #6] 80191e6: 9300 str r3, [sp, #0] 80191e8: 4623 mov r3, r4 80191ea: f7ff fedb bl 8018fa4 flag++; 80191ee: 7bbb ldrb r3, [r7, #14] 80191f0: 3301 adds r3, #1 80191f2: 73bb strb r3, [r7, #14] if(position_right>=POSITION_MAX) n = LED_HALF_NUMBER; 80191f4: f9b7 3002 ldrsh.w r3, [r7, #2] 80191f8: f5b3 6fe1 cmp.w r3, #1800 @ 0x708 80191fc: db02 blt.n 8019204 80191fe: 231e movs r3, #30 8019200: 73fb strb r3, [r7, #15] 8019202: e014 b.n 801922e else if(position_right<=0) n = 0; 8019204: f9b7 3002 ldrsh.w r3, [r7, #2] 8019208: 2b00 cmp r3, #0 801920a: dc02 bgt.n 8019212 801920c: 2300 movs r3, #0 801920e: 73fb strb r3, [r7, #15] 8019210: e00d b.n 801922e else n = (position_right-POSITION_MIN)*LED_HALF_NUMBER/(POSITION_DIFF+1); 8019212: f9b7 3002 ldrsh.w r3, [r7, #2] 8019216: 1e9a subs r2, r3, #2 8019218: 4613 mov r3, r2 801921a: 011b lsls r3, r3, #4 801921c: 1a9b subs r3, r3, r2 801921e: 005b lsls r3, r3, #1 8019220: 4a2a ldr r2, [pc, #168] @ (80192cc ) 8019222: fb82 1203 smull r1, r2, r2, r3 8019226: 1252 asrs r2, r2, #9 8019228: 17db asrs r3, r3, #31 801922a: 1ad3 subs r3, r2, r3 801922c: 73fb strb r3, [r7, #15] if(led_right != n) { 801922e: 4b29 ldr r3, [pc, #164] @ (80192d4 ) 8019230: 781b ldrb r3, [r3, #0] 8019232: 7bfa ldrb r2, [r7, #15] 8019234: 429a cmp r2, r3 8019236: d042 beq.n 80192be led_right = n; 8019238: 4a26 ldr r2, [pc, #152] @ (80192d4 ) 801923a: 7bfb ldrb r3, [r7, #15] 801923c: 7013 strb r3, [r2, #0] led_full = 0; 801923e: 4b24 ldr r3, [pc, #144] @ (80192d0 ) 8019240: 2200 movs r2, #0 8019242: 701a strb r2, [r3, #0] if(flag!=0) delay_msec(4); 8019244: 7bbb ldrb r3, [r7, #14] 8019246: 2b00 cmp r3, #0 8019248: d003 beq.n 8019252 801924a: f24d 20f0 movw r0, #54000 @ 0xd2f0 801924e: f004 fc63 bl 801db18 <_delay> if(mode==LED_MODE_HALF_SIDE) LED_Send_Right(n,r1,g1,b1,r2,g2,b2); 8019252: f997 3007 ldrsb.w r3, [r7, #7] 8019256: 2b02 cmp r3, #2 8019258: d117 bne.n 801928a 801925a: 7bfb ldrb r3, [r7, #15] 801925c: f003 033f and.w r3, r3, #63 @ 0x3f 8019260: b2db uxtb r3, r3 8019262: 3b40 subs r3, #64 @ 0x40 8019264: b2d8 uxtb r0, r3 8019266: f897 4024 ldrb.w r4, [r7, #36] @ 0x24 801926a: f897 2020 ldrb.w r2, [r7, #32] 801926e: 79b9 ldrb r1, [r7, #6] 8019270: f897 3030 ldrb.w r3, [r7, #48] @ 0x30 8019274: 9302 str r3, [sp, #8] 8019276: f897 302c ldrb.w r3, [r7, #44] @ 0x2c 801927a: 9301 str r3, [sp, #4] 801927c: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 8019280: 9300 str r3, [sp, #0] 8019282: 4623 mov r3, r4 8019284: f7ff fe8e bl 8018fa4 } 8019288: e019 b.n 80192be else LED_Send_Right(LED_HALF_NUMBER-n,r2,g2,b2,r1,g1,b1); 801928a: 7bfb ldrb r3, [r7, #15] 801928c: f1c3 031e rsb r3, r3, #30 8019290: b2db uxtb r3, r3 8019292: f003 033f and.w r3, r3, #63 @ 0x3f 8019296: b2db uxtb r3, r3 8019298: 3b40 subs r3, #64 @ 0x40 801929a: b2d8 uxtb r0, r3 801929c: f897 4030 ldrb.w r4, [r7, #48] @ 0x30 80192a0: f897 202c ldrb.w r2, [r7, #44] @ 0x2c 80192a4: f897 1028 ldrb.w r1, [r7, #40] @ 0x28 80192a8: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 80192ac: 9302 str r3, [sp, #8] 80192ae: f897 3020 ldrb.w r3, [r7, #32] 80192b2: 9301 str r3, [sp, #4] 80192b4: 79bb ldrb r3, [r7, #6] 80192b6: 9300 str r3, [sp, #0] 80192b8: 4623 mov r3, r4 80192ba: f7ff fe73 bl 8018fa4 } 80192be: bf00 nop 80192c0: 3714 adds r7, #20 80192c2: 46bd mov sp, r7 80192c4: bd90 pop {r4, r7, pc} 80192c6: bf00 nop 80192c8: 20000bf0 .word 0x20000bf0 80192cc: 48dbb693 .word 0x48dbb693 80192d0: 20000bfc .word 0x20000bfc 80192d4: 20000bfd .word 0x20000bfd 80192d8: 20000bfe .word 0x20000bfe 080192dc : void LED_Blink_ALL(int R, int G, int B, int period_msec) { 80192dc: b590 push {r4, r7, lr} 80192de: b08b sub sp, #44 @ 0x2c 80192e0: af04 add r7, sp, #16 80192e2: 60f8 str r0, [r7, #12] 80192e4: 60b9 str r1, [r7, #8] 80192e6: 607a str r2, [r7, #4] 80192e8: 603b str r3, [r7, #0] if(period_msec <=10) period_msec = 15; 80192ea: 683b ldr r3, [r7, #0] 80192ec: 2b0a cmp r3, #10 80192ee: dc01 bgt.n 80192f4 80192f0: 230f movs r3, #15 80192f2: 603b str r3, [r7, #0] for(int i=1; i LED_Send_Wait(i,R,G,B); 80192fa: 697b ldr r3, [r7, #20] 80192fc: b2db uxtb r3, r3 80192fe: f003 033f and.w r3, r3, #63 @ 0x3f 8019302: b2d8 uxtb r0, r3 8019304: 68fb ldr r3, [r7, #12] 8019306: b2d9 uxtb r1, r3 8019308: 68bb ldr r3, [r7, #8] 801930a: b2da uxtb r2, r3 801930c: 687b ldr r3, [r7, #4] 801930e: b2db uxtb r3, r3 8019310: 24ff movs r4, #255 @ 0xff 8019312: 9402 str r4, [sp, #8] 8019314: 24ff movs r4, #255 @ 0xff 8019316: 9401 str r4, [sp, #4] 8019318: 24ff movs r4, #255 @ 0xff 801931a: 9400 str r4, [sp, #0] 801931c: f7ff fe42 bl 8018fa4 for(int i=1; i } LED_Send_Now(LED_NUMBER,R,G,B); 801932c: 68fb ldr r3, [r7, #12] 801932e: b2d9 uxtb r1, r3 8019330: 68bb ldr r3, [r7, #8] 8019332: b2da uxtb r2, r3 8019334: 687b ldr r3, [r7, #4] 8019336: b2db uxtb r3, r3 8019338: 2000 movs r0, #0 801933a: 9002 str r0, [sp, #8] 801933c: 2000 movs r0, #0 801933e: 9001 str r0, [sp, #4] 8019340: 2000 movs r0, #0 8019342: 9000 str r0, [sp, #0] 8019344: 203c movs r0, #60 @ 0x3c 8019346: f7ff fe2d bl 8018fa4 delay_msec(period_msec); 801934a: 683b ldr r3, [r7, #0] 801934c: f243 42bc movw r2, #13500 @ 0x34bc 8019350: fb02 f303 mul.w r3, r2, r3 8019354: 4618 mov r0, r3 8019356: f004 fbdf bl 801db18 <_delay> for(int i=1; i LED_Send_Wait(i,3,3,3); // 향후엔 머신 통합 default color로 바꾸기 (파라미터 연동) 8019360: 693b ldr r3, [r7, #16] 8019362: b2db uxtb r3, r3 8019364: f003 033f and.w r3, r3, #63 @ 0x3f 8019368: b2d8 uxtb r0, r3 801936a: 23ff movs r3, #255 @ 0xff 801936c: 9302 str r3, [sp, #8] 801936e: 23ff movs r3, #255 @ 0xff 8019370: 9301 str r3, [sp, #4] 8019372: 23ff movs r3, #255 @ 0xff 8019374: 9300 str r3, [sp, #0] 8019376: 2303 movs r3, #3 8019378: 2203 movs r2, #3 801937a: 2103 movs r1, #3 801937c: f7ff fe12 bl 8018fa4 for(int i=1; i } LED_Send_Now(LED_NUMBER,3,3,3); 801938c: 2300 movs r3, #0 801938e: 9302 str r3, [sp, #8] 8019390: 2300 movs r3, #0 8019392: 9301 str r3, [sp, #4] 8019394: 2300 movs r3, #0 8019396: 9300 str r3, [sp, #0] 8019398: 2303 movs r3, #3 801939a: 2203 movs r2, #3 801939c: 2103 movs r1, #3 801939e: 203c movs r0, #60 @ 0x3c 80193a0: f7ff fe00 bl 8018fa4 } 80193a4: bf00 nop 80193a6: 371c adds r7, #28 80193a8: 46bd mov sp, r7 80193aa: bd90 pop {r4, r7, pc} 080193ac : void LED_On_ALL(int R, int G, int B) { 80193ac: b590 push {r4, r7, lr} 80193ae: b08b sub sp, #44 @ 0x2c 80193b0: af04 add r7, sp, #16 80193b2: 60f8 str r0, [r7, #12] 80193b4: 60b9 str r1, [r7, #8] 80193b6: 607a str r2, [r7, #4] for(int i=1; i LED_Send_Wait(i,R,G,B); 80193be: 697b ldr r3, [r7, #20] 80193c0: b2db uxtb r3, r3 80193c2: f003 033f and.w r3, r3, #63 @ 0x3f 80193c6: b2d8 uxtb r0, r3 80193c8: 68fb ldr r3, [r7, #12] 80193ca: b2d9 uxtb r1, r3 80193cc: 68bb ldr r3, [r7, #8] 80193ce: b2da uxtb r2, r3 80193d0: 687b ldr r3, [r7, #4] 80193d2: b2db uxtb r3, r3 80193d4: 24ff movs r4, #255 @ 0xff 80193d6: 9402 str r4, [sp, #8] 80193d8: 24ff movs r4, #255 @ 0xff 80193da: 9401 str r4, [sp, #4] 80193dc: 24ff movs r4, #255 @ 0xff 80193de: 9400 str r4, [sp, #0] 80193e0: f7ff fde0 bl 8018fa4 for(int i=1; i } LED_Send_Now(LED_NUMBER,R,G,B); 80193f0: 68fb ldr r3, [r7, #12] 80193f2: b2d9 uxtb r1, r3 80193f4: 68bb ldr r3, [r7, #8] 80193f6: b2da uxtb r2, r3 80193f8: 687b ldr r3, [r7, #4] 80193fa: b2db uxtb r3, r3 80193fc: 2000 movs r0, #0 80193fe: 9002 str r0, [sp, #8] 8019400: 2000 movs r0, #0 8019402: 9001 str r0, [sp, #4] 8019404: 2000 movs r0, #0 8019406: 9000 str r0, [sp, #0] 8019408: 203c movs r0, #60 @ 0x3c 801940a: f7ff fdcb bl 8018fa4 } 801940e: bf00 nop 8019410: 371c adds r7, #28 8019412: 46bd mov sp, r7 8019414: bd90 pop {r4, r7, pc} ... 08019418 : uint8_t status_LED_Welcome=0; uint8_t cnt_LED_Welcome=0; void LED_Welcome(void) { 8019418: b580 push {r7, lr} 801941a: b08a sub sp, #40 @ 0x28 801941c: af04 add r7, sp, #16 status_LED_Welcome = 1; 801941e: 4b5d ldr r3, [pc, #372] @ (8019594 ) 8019420: 2201 movs r2, #1 8019422: 701a strb r2, [r3, #0] for(int i=1; i<=LED_NUMBER; i++) { 8019424: 2301 movs r3, #1 8019426: 617b str r3, [r7, #20] 8019428: e015 b.n 8019456 LED_Send_Now(i,3,3,51); 801942a: 697b ldr r3, [r7, #20] 801942c: b2db uxtb r3, r3 801942e: f003 033f and.w r3, r3, #63 @ 0x3f 8019432: b2d8 uxtb r0, r3 8019434: 2300 movs r3, #0 8019436: 9302 str r3, [sp, #8] 8019438: 2300 movs r3, #0 801943a: 9301 str r3, [sp, #4] 801943c: 2300 movs r3, #0 801943e: 9300 str r3, [sp, #0] 8019440: 2333 movs r3, #51 @ 0x33 8019442: 2203 movs r2, #3 8019444: 2103 movs r1, #3 8019446: f7ff fdad bl 8018fa4 Delay_msec(6); 801944a: 2005 movs r0, #5 801944c: f006 fef8 bl 8020240 for(int i=1; i<=LED_NUMBER; i++) { 8019450: 697b ldr r3, [r7, #20] 8019452: 3301 adds r3, #1 8019454: 617b str r3, [r7, #20] 8019456: 697b ldr r3, [r7, #20] 8019458: 2b3c cmp r3, #60 @ 0x3c 801945a: dde6 ble.n 801942a } for(int i=LED_NUMBER; i>0; i--) { 801945c: 233c movs r3, #60 @ 0x3c 801945e: 613b str r3, [r7, #16] 8019460: e015 b.n 801948e LED_Send_Now(i,16,16,102); 8019462: 693b ldr r3, [r7, #16] 8019464: b2db uxtb r3, r3 8019466: f003 033f and.w r3, r3, #63 @ 0x3f 801946a: b2d8 uxtb r0, r3 801946c: 2300 movs r3, #0 801946e: 9302 str r3, [sp, #8] 8019470: 2300 movs r3, #0 8019472: 9301 str r3, [sp, #4] 8019474: 2300 movs r3, #0 8019476: 9300 str r3, [sp, #0] 8019478: 2366 movs r3, #102 @ 0x66 801947a: 2210 movs r2, #16 801947c: 2110 movs r1, #16 801947e: f7ff fd91 bl 8018fa4 Delay_msec(4); 8019482: 2003 movs r0, #3 8019484: f006 fedc bl 8020240 for(int i=LED_NUMBER; i>0; i--) { 8019488: 693b ldr r3, [r7, #16] 801948a: 3b01 subs r3, #1 801948c: 613b str r3, [r7, #16] 801948e: 693b ldr r3, [r7, #16] 8019490: 2b00 cmp r3, #0 8019492: dce6 bgt.n 8019462 } for(int i=1; i<=LED_NUMBER; i++) { 8019494: 2301 movs r3, #1 8019496: 60fb str r3, [r7, #12] 8019498: e015 b.n 80194c6 LED_Send_Now(i,29,29,153); 801949a: 68fb ldr r3, [r7, #12] 801949c: b2db uxtb r3, r3 801949e: f003 033f and.w r3, r3, #63 @ 0x3f 80194a2: b2d8 uxtb r0, r3 80194a4: 2300 movs r3, #0 80194a6: 9302 str r3, [sp, #8] 80194a8: 2300 movs r3, #0 80194aa: 9301 str r3, [sp, #4] 80194ac: 2300 movs r3, #0 80194ae: 9300 str r3, [sp, #0] 80194b0: 2399 movs r3, #153 @ 0x99 80194b2: 221d movs r2, #29 80194b4: 211d movs r1, #29 80194b6: f7ff fd75 bl 8018fa4 Delay_msec(5); 80194ba: 2004 movs r0, #4 80194bc: f006 fec0 bl 8020240 for(int i=1; i<=LED_NUMBER; i++) { 80194c0: 68fb ldr r3, [r7, #12] 80194c2: 3301 adds r3, #1 80194c4: 60fb str r3, [r7, #12] 80194c6: 68fb ldr r3, [r7, #12] 80194c8: 2b3c cmp r3, #60 @ 0x3c 80194ca: dde6 ble.n 801949a } for(int i=LED_NUMBER; i>0; i--) { 80194cc: 233c movs r3, #60 @ 0x3c 80194ce: 60bb str r3, [r7, #8] 80194d0: e015 b.n 80194fe LED_Send_Now(i,42,42,204); 80194d2: 68bb ldr r3, [r7, #8] 80194d4: b2db uxtb r3, r3 80194d6: f003 033f and.w r3, r3, #63 @ 0x3f 80194da: b2d8 uxtb r0, r3 80194dc: 2300 movs r3, #0 80194de: 9302 str r3, [sp, #8] 80194e0: 2300 movs r3, #0 80194e2: 9301 str r3, [sp, #4] 80194e4: 2300 movs r3, #0 80194e6: 9300 str r3, [sp, #0] 80194e8: 23cc movs r3, #204 @ 0xcc 80194ea: 222a movs r2, #42 @ 0x2a 80194ec: 212a movs r1, #42 @ 0x2a 80194ee: f7ff fd59 bl 8018fa4 Delay_msec(4); 80194f2: 2003 movs r0, #3 80194f4: f006 fea4 bl 8020240 for(int i=LED_NUMBER; i>0; i--) { 80194f8: 68bb ldr r3, [r7, #8] 80194fa: 3b01 subs r3, #1 80194fc: 60bb str r3, [r7, #8] 80194fe: 68bb ldr r3, [r7, #8] 8019500: 2b00 cmp r3, #0 8019502: dce6 bgt.n 80194d2 } for(int i=1; i<=LED_NUMBER; i++) { 8019504: 2301 movs r3, #1 8019506: 607b str r3, [r7, #4] 8019508: e015 b.n 8019536 LED_Send_Now(i,55,55,255); 801950a: 687b ldr r3, [r7, #4] 801950c: b2db uxtb r3, r3 801950e: f003 033f and.w r3, r3, #63 @ 0x3f 8019512: b2d8 uxtb r0, r3 8019514: 2300 movs r3, #0 8019516: 9302 str r3, [sp, #8] 8019518: 2300 movs r3, #0 801951a: 9301 str r3, [sp, #4] 801951c: 2300 movs r3, #0 801951e: 9300 str r3, [sp, #0] 8019520: 23ff movs r3, #255 @ 0xff 8019522: 2237 movs r2, #55 @ 0x37 8019524: 2137 movs r1, #55 @ 0x37 8019526: f7ff fd3d bl 8018fa4 Delay_msec(4); 801952a: 2003 movs r0, #3 801952c: f006 fe88 bl 8020240 for(int i=1; i<=LED_NUMBER; i++) { 8019530: 687b ldr r3, [r7, #4] 8019532: 3301 adds r3, #1 8019534: 607b str r3, [r7, #4] 8019536: 687b ldr r3, [r7, #4] 8019538: 2b3c cmp r3, #60 @ 0x3c 801953a: dde6 ble.n 801950a } for(int i=LED_NUMBER; i>0; i--) { 801953c: 233c movs r3, #60 @ 0x3c 801953e: 603b str r3, [r7, #0] 8019540: e015 b.n 801956e LED_Send_Now(i,3,3,3); 8019542: 683b ldr r3, [r7, #0] 8019544: b2db uxtb r3, r3 8019546: f003 033f and.w r3, r3, #63 @ 0x3f 801954a: b2d8 uxtb r0, r3 801954c: 2300 movs r3, #0 801954e: 9302 str r3, [sp, #8] 8019550: 2300 movs r3, #0 8019552: 9301 str r3, [sp, #4] 8019554: 2300 movs r3, #0 8019556: 9300 str r3, [sp, #0] 8019558: 2303 movs r3, #3 801955a: 2203 movs r2, #3 801955c: 2103 movs r1, #3 801955e: f7ff fd21 bl 8018fa4 Delay_msec(4); 8019562: 2003 movs r0, #3 8019564: f006 fe6c bl 8020240 for(int i=LED_NUMBER; i>0; i--) { 8019568: 683b ldr r3, [r7, #0] 801956a: 3b01 subs r3, #1 801956c: 603b str r3, [r7, #0] 801956e: 683b ldr r3, [r7, #0] 8019570: 2b00 cmp r3, #0 8019572: dce6 bgt.n 8019542 } status_LED_Welcome=0; 8019574: 4b07 ldr r3, [pc, #28] @ (8019594 ) 8019576: 2200 movs r2, #0 8019578: 701a strb r2, [r3, #0] cnt_LED_Welcome++; 801957a: 4b07 ldr r3, [pc, #28] @ (8019598 ) 801957c: 781b ldrb r3, [r3, #0] 801957e: 3301 adds r3, #1 8019580: b2da uxtb r2, r3 8019582: 4b05 ldr r3, [pc, #20] @ (8019598 ) 8019584: 701a strb r2, [r3, #0] InitialPosCali = 1; 8019586: 4b05 ldr r3, [pc, #20] @ (801959c ) 8019588: 2201 movs r2, #1 801958a: 701a strb r2, [r3, #0] } 801958c: bf00 nop 801958e: 3718 adds r7, #24 8019590: 46bd mov sp, r7 8019592: bd80 pop {r7, pc} 8019594: 20000bf4 .word 0x20000bf4 8019598: 20000bf5 .word 0x20000bf5 801959c: 20000c11 .word 0x20000c11 080195a0 : // 임의 위치에서 호출해서 QUEUE에 넣고 싶은 LED 출력 함수는 led.h에서 생성할 것! /* LED_Controller v1.0.0 코드 백업 */ void LED_Controller(void){ 80195a0: b5b0 push {r4, r5, r7, lr} 80195a2: b088 sub sp, #32 80195a4: af06 add r7, sp, #24 if(cnt_LED_Welcome < 1) { 80195a6: 4b60 ldr r3, [pc, #384] @ (8019728 ) 80195a8: 781b ldrb r3, [r3, #0] 80195aa: 2b00 cmp r3, #0 80195ac: f000 80b6 beq.w 801971c return; } if(WP_LEDCtrl.MotionAutoWeight > 0) { // AutoOn 발동시 +N으로 설정하고 있음 at MotionAutoWeight() in WESPION_App.c 80195b0: 4b5e ldr r3, [pc, #376] @ (801972c ) 80195b2: f993 3003 ldrsb.w r3, [r3, #3] 80195b6: 2b00 cmp r3, #0 80195b8: dd0f ble.n 80195da LED_Blink_ALL(5, 50, 50, 20); 80195ba: 2314 movs r3, #20 80195bc: 2232 movs r2, #50 @ 0x32 80195be: 2132 movs r1, #50 @ 0x32 80195c0: 2005 movs r0, #5 80195c2: f7ff fe8b bl 80192dc WP_LEDCtrl.MotionAutoWeight--; 80195c6: 4b59 ldr r3, [pc, #356] @ (801972c ) 80195c8: f993 3003 ldrsb.w r3, [r3, #3] 80195cc: b2db uxtb r3, r3 80195ce: 3b01 subs r3, #1 80195d0: b2db uxtb r3, r3 80195d2: b25a sxtb r2, r3 80195d4: 4b55 ldr r3, [pc, #340] @ (801972c ) 80195d6: 70da strb r2, [r3, #3] 80195d8: e073 b.n 80196c2 } else if (WP_LEDCtrl.MotionAutoWeight < 0) { // AutoOff 발동시 -N으로 설정하고 있음 at MotionAutoWeight() in WESPION_App.c 80195da: 4b54 ldr r3, [pc, #336] @ (801972c ) 80195dc: f993 3003 ldrsb.w r3, [r3, #3] 80195e0: 2b00 cmp r3, #0 80195e2: da0f bge.n 8019604 LED_Blink_ALL(80, 20, 5, 20); 80195e4: 2314 movs r3, #20 80195e6: 2205 movs r2, #5 80195e8: 2114 movs r1, #20 80195ea: 2050 movs r0, #80 @ 0x50 80195ec: f7ff fe76 bl 80192dc WP_LEDCtrl.MotionAutoWeight++; 80195f0: 4b4e ldr r3, [pc, #312] @ (801972c ) 80195f2: f993 3003 ldrsb.w r3, [r3, #3] 80195f6: b2db uxtb r3, r3 80195f8: 3301 adds r3, #1 80195fa: b2db uxtb r3, r3 80195fc: b25a sxtb r2, r3 80195fe: 4b4b ldr r3, [pc, #300] @ (801972c ) 8019600: 70da strb r2, [r3, #3] 8019602: e05e b.n 80196c2 } else { if(WP_Weight.Ctrl.OnOffScale[L] >= 1.0f){ // 완전히 On인 경우에만 위치에 수행 8019604: 4b4a ldr r3, [pc, #296] @ (8019730 ) 8019606: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 801960a: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 801960e: eef4 7ac7 vcmpe.f32 s15, s14 8019612: eef1 fa10 vmrs APSR_nzcv, fpscr 8019616: db1c blt.n 8019652 cnt_Off = 0; 8019618: 4b46 ldr r3, [pc, #280] @ (8019734 ) 801961a: 2200 movs r2, #0 801961c: 601a str r2, [r3, #0] LED_Display_Level(LED_MODE_HALF_CENTER, WP_Gym.Position[R], WP_Gym.Position[L], WP_LEDCtrl.R, WP_LEDCtrl.G, WP_LEDCtrl.B, 3, 3, 3); 801961e: 4b46 ldr r3, [pc, #280] @ (8019738 ) 8019620: f9b3 1016 ldrsh.w r1, [r3, #22] 8019624: 4b44 ldr r3, [pc, #272] @ (8019738 ) 8019626: f9b3 0014 ldrsh.w r0, [r3, #20] 801962a: 4b40 ldr r3, [pc, #256] @ (801972c ) 801962c: 781c ldrb r4, [r3, #0] 801962e: 4b3f ldr r3, [pc, #252] @ (801972c ) 8019630: 785b ldrb r3, [r3, #1] 8019632: 4a3e ldr r2, [pc, #248] @ (801972c ) 8019634: 7892 ldrb r2, [r2, #2] 8019636: 2503 movs r5, #3 8019638: 9504 str r5, [sp, #16] 801963a: 2503 movs r5, #3 801963c: 9503 str r5, [sp, #12] 801963e: 2503 movs r5, #3 8019640: 9502 str r5, [sp, #8] 8019642: 9201 str r2, [sp, #4] 8019644: 9300 str r3, [sp, #0] 8019646: 4623 mov r3, r4 8019648: 4602 mov r2, r0 801964a: 2003 movs r0, #3 801964c: f7ff fcea bl 8019024 8019650: e037 b.n 80196c2 // LED_Display_Level(LED_MODE_FULL_LEFT, WP_Gym.Position[R], WP_Gym.Position[L], LED_Weight_R, LED_Weight_G, LED_Weight_B, 3, 3, 3); } else if(WP_Weight.Ctrl.OnOffScale[L] <= 0.1f && cnt_Off == 0){ 8019652: 4b37 ldr r3, [pc, #220] @ (8019730 ) 8019654: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 8019658: ed9f 7a38 vldr s14, [pc, #224] @ 801973c 801965c: eef4 7ac7 vcmpe.f32 s15, s14 8019660: eef1 fa10 vmrs APSR_nzcv, fpscr 8019664: d82d bhi.n 80196c2 8019666: 4b33 ldr r3, [pc, #204] @ (8019734 ) 8019668: 681b ldr r3, [r3, #0] 801966a: 2b00 cmp r3, #0 801966c: d129 bne.n 80196c2 for(int i=1; i LED_Send_Wait(i,3,3,3); 8019674: 687b ldr r3, [r7, #4] 8019676: b2db uxtb r3, r3 8019678: f003 033f and.w r3, r3, #63 @ 0x3f 801967c: b2d8 uxtb r0, r3 801967e: 23ff movs r3, #255 @ 0xff 8019680: 9302 str r3, [sp, #8] 8019682: 23ff movs r3, #255 @ 0xff 8019684: 9301 str r3, [sp, #4] 8019686: 23ff movs r3, #255 @ 0xff 8019688: 9300 str r3, [sp, #0] 801968a: 2303 movs r3, #3 801968c: 2203 movs r2, #3 801968e: 2103 movs r1, #3 8019690: f7ff fc88 bl 8018fa4 for(int i=1; i } LED_Send_Now(LED_NUMBER,3,3,3); 80196a0: 2300 movs r3, #0 80196a2: 9302 str r3, [sp, #8] 80196a4: 2300 movs r3, #0 80196a6: 9301 str r3, [sp, #4] 80196a8: 2300 movs r3, #0 80196aa: 9300 str r3, [sp, #0] 80196ac: 2303 movs r3, #3 80196ae: 2203 movs r2, #3 80196b0: 2103 movs r1, #3 80196b2: 203c movs r0, #60 @ 0x3c 80196b4: f7ff fc76 bl 8018fa4 cnt_Off++; 80196b8: 4b1e ldr r3, [pc, #120] @ (8019734 ) 80196ba: 681b ldr r3, [r3, #0] 80196bc: 3301 adds r3, #1 80196be: 4a1d ldr r2, [pc, #116] @ (8019734 ) 80196c0: 6013 str r3, [r2, #0] } } // BLE 해제됨 if(WP_LEDCtrl.BLEDisconnection>0){ 80196c2: 4b1a ldr r3, [pc, #104] @ (801972c ) 80196c4: f993 3004 ldrsb.w r3, [r3, #4] 80196c8: 2b00 cmp r3, #0 80196ca: dd0e ble.n 80196ea LED_Blink_ALL(80, 20, 5, 30); 80196cc: 231e movs r3, #30 80196ce: 2205 movs r2, #5 80196d0: 2114 movs r1, #20 80196d2: 2050 movs r0, #80 @ 0x50 80196d4: f7ff fe02 bl 80192dc WP_LEDCtrl.BLEDisconnection--; 80196d8: 4b14 ldr r3, [pc, #80] @ (801972c ) 80196da: f993 3004 ldrsb.w r3, [r3, #4] 80196de: b2db uxtb r3, r3 80196e0: 3b01 subs r3, #1 80196e2: b2db uxtb r3, r3 80196e4: b25a sxtb r2, r3 80196e6: 4b11 ldr r3, [pc, #68] @ (801972c ) 80196e8: 711a strb r2, [r3, #4] } if(status_LED_Welcome) { 80196ea: 4b15 ldr r3, [pc, #84] @ (8019740 ) 80196ec: 781b ldrb r3, [r3, #0] 80196ee: 2b00 cmp r3, #0 80196f0: d116 bne.n 8019720 return; } // BLE 연결됨 if(WP_LEDCtrl.BLEDisconnection < 0){ 80196f2: 4b0e ldr r3, [pc, #56] @ (801972c ) 80196f4: f993 3004 ldrsb.w r3, [r3, #4] 80196f8: 2b00 cmp r3, #0 80196fa: da12 bge.n 8019722 // LED_Blink_ALL(5, 15, 30, 30); LED_Blink_ALL(5, 20, 25, 50); 80196fc: 2332 movs r3, #50 @ 0x32 80196fe: 2219 movs r2, #25 8019700: 2114 movs r1, #20 8019702: 2005 movs r0, #5 8019704: f7ff fdea bl 80192dc WP_LEDCtrl.BLEDisconnection++; 8019708: 4b08 ldr r3, [pc, #32] @ (801972c ) 801970a: f993 3004 ldrsb.w r3, [r3, #4] 801970e: b2db uxtb r3, r3 8019710: 3301 adds r3, #1 8019712: b2db uxtb r3, r3 8019714: b25a sxtb r2, r3 8019716: 4b05 ldr r3, [pc, #20] @ (801972c ) 8019718: 711a strb r2, [r3, #4] return; 801971a: e002 b.n 8019722 return; 801971c: bf00 nop 801971e: e000 b.n 8019722 return; 8019720: bf00 nop } } 8019722: 3708 adds r7, #8 8019724: 46bd mov sp, r7 8019726: bdb0 pop {r4, r5, r7, pc} 8019728: 20000bf5 .word 0x20000bf5 801972c: 20000328 .word 0x20000328 8019730: 200001d8 .word 0x200001d8 8019734: 20000bf8 .word 0x20000bf8 8019738: 20000148 .word 0x20000148 801973c: 3dcccccd .word 0x3dcccccd 8019740: 20000bf4 .word 0x20000bf4 08019744 : /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ //uint32_t Dac1, Dac2; //stm32f4xx_hal.c HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8019744: b580 push {r7, lr} 8019746: b082 sub sp, #8 8019748: af00 add r7, sp, #0 801974a: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 801974c: 4b12 ldr r3, [pc, #72] @ (8019798 ) 801974e: 681a ldr r2, [r3, #0] 8019750: 4b12 ldr r3, [pc, #72] @ (801979c ) 8019752: 781b ldrb r3, [r3, #0] 8019754: 4619 mov r1, r3 8019756: f44f 737a mov.w r3, #1000 @ 0x3e8 801975a: fbb3 f3f1 udiv r3, r3, r1 801975e: fbb2 f3f3 udiv r3, r2, r3 8019762: 4618 mov r0, r3 8019764: f007 ff4f bl 8021606 8019768: 4603 mov r3, r0 801976a: 2b00 cmp r3, #0 801976c: d001 beq.n 8019772 { return HAL_ERROR; 801976e: 2301 movs r3, #1 8019770: e00e b.n 8019790 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8019772: 687b ldr r3, [r7, #4] 8019774: 2b0f cmp r3, #15 8019776: d80a bhi.n 801978e { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8019778: 2200 movs r2, #0 801977a: 6879 ldr r1, [r7, #4] 801977c: f04f 30ff mov.w r0, #4294967295 8019780: f007 ff05 bl 802158e uwTickPrio = TickPriority; 8019784: 4a06 ldr r2, [pc, #24] @ (80197a0 ) 8019786: 687b ldr r3, [r7, #4] 8019788: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 801978a: 2300 movs r3, #0 801978c: e000 b.n 8019790 return HAL_ERROR; 801978e: 2301 movs r3, #1 } 8019790: 4618 mov r0, r3 8019792: 3708 adds r7, #8 8019794: 46bd mov sp, r7 8019796: bd80 pop {r7, pc} 8019798: 20000024 .word 0x20000024 801979c: 20000040 .word 0x20000040 80197a0: 2000003c .word 0x2000003c 080197a4
: /** * @brief The application entry point. * @retval int */ int main(void) { 80197a4: b5b0 push {r4, r5, r7, lr} 80197a6: b086 sub sp, #24 80197a8: af04 add r7, sp, #16 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 80197aa: f006 fd07 bl 80201bc /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 80197ae: f000 fa13 bl 8019bd8 /* Configure the peripherals common clocks */ PeriphCommonClock_Config(); 80197b2: f000 fa83 bl 8019cbc /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 80197b6: f7ff f9f9 bl 8018bac MX_DMA_Init(); 80197ba: f7fe ffbf bl 801873c MX_DAC_Init(); 80197be: f7fe ff27 bl 8018610 MX_I2C1_Init(); 80197c2: f7ff fb69 bl 8018e98 MX_SPI1_Init(); 80197c6: f004 fbd1 bl 801df6c MX_SPI4_Init(); 80197ca: f004 fc05 bl 801dfd8 MX_TIM1_Init(); 80197ce: f004 febf bl 801e550 MX_TIM4_Init(); 80197d2: f004 ffdb bl 801e78c MX_TIM8_Init(); 80197d6: f005 f885 bl 801e8e4 MX_TIM9_Init(); 80197da: f005 f93d bl 801ea58 MX_USART2_UART_Init(); 80197de: f005 ff79 bl 801f6d4 MX_USART3_UART_Init(); 80197e2: f005 ffab bl 801f73c MX_ADC3_Init(); 80197e6: f7fe fa4b bl 8017c80 MX_ADC1_Init(); 80197ea: f7fe f8fd bl 80179e8 MX_ADC2_Init(); 80197ee: f7fe f9b3 bl 8017b58 MX_TIM2_Init(); 80197f2: f004 ff77 bl 801e6e4 MX_USB_OTG_FS_USB_Init(); 80197f6: f006 fcaf bl 8020158 MX_TIM5_Init(); 80197fa: f005 f81b bl 801e834 /* USER CODE BEGIN 2 */ Regen_Resistor_Init(); ///somebp 2024.02.02 80197fe: f005 fc97 bl 801f130 //System_Wakeup(); //for Wake-up from Sleep mode //not necessary DAC1_Start(); 8019802: 2100 movs r1, #0 8019804: 48a5 ldr r0, [pc, #660] @ (8019a9c ) 8019806: f007 ff4f bl 80216a8 DAC2_Start(); 801980a: 2110 movs r1, #16 801980c: 48a3 ldr r0, [pc, #652] @ (8019a9c ) 801980e: f007 ff4b bl 80216a8 ADC_Start_DMA(); // 덜 중요 8019812: 2208 movs r2, #8 8019814: 49a2 ldr r1, [pc, #648] @ (8019aa0 ) 8019816: 48a3 ldr r0, [pc, #652] @ (8019aa4 ) 8019818: f006 fedc bl 80205d4 // ADC_SWStart(); //Start Trigger ADC1_InjectedStart_IT(); // 중요 -> 전류 제어 관련 (전류 센싱, DC전압,위치), 3상 전류 하이 로우 6개 + 위치 2*2개 + DC전압 + 여분1개 801981c: 48a2 ldr r0, [pc, #648] @ (8019aa8 ) 801981e: f007 fab7 bl 8020d90 ADC2_InjectedStart_IT(); // 주석 처리하는 게 맞아 보임!!! 8019822: 48a2 ldr r0, [pc, #648] @ (8019aac ) 8019824: f007 fab4 bl 8020d90 ADC3_InjectedStart_IT(); // 1,2와 달리 3은 인젝티트 모드가 아니라 폴링으로 도는 (덜 중요한) 채널이 같이 있어서, DMA로 도는... (이해 어려움) 8019828: 489e ldr r0, [pc, #632] @ (8019aa4 ) 801982a: f007 fab1 bl 8020d90 // Init_ADC_IDC(); // HAL_TIM_Encoder_Start_IT(&htim4, TIM_CHANNEL_ALL); // HAL_TIM_Encoder_Start_IT(&htim2, TIM_CHANNEL_ALL); HAL_TIM_Encoder_Start(&htim2, TIM_CHANNEL_ALL); 801982e: 213c movs r1, #60 @ 0x3c 8019830: 489f ldr r0, [pc, #636] @ (8019ab0 ) 8019832: f00c fe63 bl 80264fc HAL_TIM_Encoder_Start(&htim4, TIM_CHANNEL_ALL); 8019836: 213c movs r1, #60 @ 0x3c 8019838: 489e ldr r0, [pc, #632] @ (8019ab4 ) 801983a: f00c fe5f bl 80264fc // TIM1_PWM_Start_IT(TIM_CHANNEL_3); // // TIM1_PWMN_Start_IT(TIM_CHANNEL_1); // TIM1_PWMN_Start_IT(TIM_CHANNEL_2); // TIM1_PWMN_Start_IT(TIM_CHANNEL_3); TIM1_PWM_Start_IT(TIM_CHANNEL_4); 801983e: 210c movs r1, #12 8019840: 489d ldr r0, [pc, #628] @ (8019ab8 ) 8019842: f00c fc5b bl 80260fc TIM1_PWMN_Start_IT(TIM_CHANNEL_4); 8019846: 210c movs r1, #12 8019848: 489b ldr r0, [pc, #620] @ (8019ab8 ) 801984a: f00d fc91 bl 8027170 // TIM1_Enable_IT(TIM_IT_UPDATE); TIM1_Stop(); 801984e: 4b9a ldr r3, [pc, #616] @ (8019ab8 ) 8019850: 681b ldr r3, [r3, #0] 8019852: 681a ldr r2, [r3, #0] 8019854: 4b98 ldr r3, [pc, #608] @ (8019ab8 ) 8019856: 681b ldr r3, [r3, #0] 8019858: f022 0201 bic.w r2, r2, #1 801985c: 601a str r2, [r3, #0] // TIM8_PWM_Start_IT(TIM_CHANNEL_3); // // TIM8_PWMN_Start_IT(TIM_CHANNEL_1); // TIM8_PWMN_Start_IT(TIM_CHANNEL_2); // TIM8_PWMN_Start_IT(TIM_CHANNEL_3); // TIM8_Enable_IT(TIM_IT_UPDATE); TIM8_Stop(); 801985e: 4b97 ldr r3, [pc, #604] @ (8019abc ) 8019860: 681b ldr r3, [r3, #0] 8019862: 681a ldr r2, [r3, #0] 8019864: 4b95 ldr r3, [pc, #596] @ (8019abc ) 8019866: 681b ldr r3, [r3, #0] 8019868: f022 0201 bic.w r2, r2, #1 801986c: 601a str r2, [r3, #0] HAL_TIM_PWM_Start(&htim9, TIM_CHANNEL_1); 801986e: 2100 movs r1, #0 8019870: 4893 ldr r0, [pc, #588] @ (8019ac0 ) 8019872: f00c fb7b bl 8025f6c HAL_TIM_PWM_Start(&htim5,TIM_CHANNEL_1); 8019876: 2100 movs r1, #0 8019878: 4892 ldr r0, [pc, #584] @ (8019ac4 ) 801987a: f00c fb77 bl 8025f6c HAL_NVIC_DisableIRQ(DMA2_Stream0_IRQn); 801987e: 2038 movs r0, #56 @ 0x38 8019880: f007 feaf bl 80215e2 // ※※ 아래 구문이 시작되면서 핵심 수행 주기가 돌아감 !! - HAL_ADCEx_InjectedConvCpltCallback TIM1_Start(); // 완전 동시에 맞춘 상태는 아니고 거의 동시 8019884: 4b8c ldr r3, [pc, #560] @ (8019ab8 ) 8019886: 681b ldr r3, [r3, #0] 8019888: 681a ldr r2, [r3, #0] 801988a: 4b8b ldr r3, [pc, #556] @ (8019ab8 ) 801988c: 681b ldr r3, [r3, #0] 801988e: f042 0201 orr.w r2, r2, #1 8019892: 601a str r2, [r3, #0] TIM8_Start(); 8019894: 4b89 ldr r3, [pc, #548] @ (8019abc ) 8019896: 681b ldr r3, [r3, #0] 8019898: 681a ldr r2, [r3, #0] 801989a: 4b88 ldr r3, [pc, #544] @ (8019abc ) 801989c: 681b ldr r3, [r3, #0] 801989e: f042 0201 orr.w r2, r2, #1 80198a2: 601a str r2, [r3, #0] Motor1Ctrl_PwmStart(); 80198a4: f7fd f8a8 bl 80169f8 Motor2Ctrl_PwmStart(); 80198a8: f7fd f8d8 bl 8016a5c // 여기까지 지나면 모터제어 준비가 완전히 준비 완료!!! (ADC 오프셋 캘리브레이션 Flash_Init(); //Backup or Restore 80198ac: f7fe ff66 bl 801877c // BLE_Rename(BLE_NAME); //MUST run only ONE time. LED_Send_All(60, 0,0,0, 0,0,0); //Addressable LED turn OFF 80198b0: 2300 movs r3, #0 80198b2: 9302 str r3, [sp, #8] 80198b4: 2300 movs r3, #0 80198b6: 9301 str r3, [sp, #4] 80198b8: 2300 movs r3, #0 80198ba: 9300 str r3, [sp, #0] 80198bc: 2300 movs r3, #0 80198be: 2200 movs r2, #0 80198c0: 2100 movs r1, #0 80198c2: 207c movs r0, #124 @ 0x7c 80198c4: f7ff fb6e bl 8018fa4 Delay_msec(110); //somebp 2024.02.08 80198c8: 206d movs r0, #109 @ 0x6d 80198ca: f006 fcb9 bl 8020240 // LED_Send_All(60, 26, 13, 8, 10, 10, 10); // 부팅 시 EncInit 단계를 시각화 // Delay_msec(110); Initialize_WESPION(); 80198ce: f7f7 fa25 bl 8010d1c Delay_msec(100); 80198d2: 2063 movs r0, #99 @ 0x63 80198d4: f006 fcb4 bl 8020240 MotorInitStart = 1; // 이제 EncInit 시작! 80198d8: 4b7b ldr r3, [pc, #492] @ (8019ac8 ) 80198da: 2201 movs r2, #1 80198dc: 701a strb r2, [r3, #0] if(DebugingPrintActive == 0) { 80198de: 4b7b ldr r3, [pc, #492] @ (8019acc ) 80198e0: 781b ldrb r3, [r3, #0] 80198e2: 2b00 cmp r3, #0 80198e4: d122 bne.n 801992c DebugingPrintActive = 1; 80198e6: 4b79 ldr r3, [pc, #484] @ (8019acc ) 80198e8: 2201 movs r2, #1 80198ea: 701a strb r2, [r3, #0] Debug_UART3_printf("\r\n---------- ---------- ----------\r\nRoomFit On!\r\n"); 80198ec: 4878 ldr r0, [pc, #480] @ (8019ad0 ) 80198ee: f006 fa61 bl 801fdb4 Debug_UART3_printf("FW v%d.%d.%d (%04d.%02d.%02d)\r\n",WespionVer.VerMajer,WespionVer.VerMiner,WespionVer.VerSub,WespionVer.VerYear,WespionVer.VerMonth,WespionVer.VerDate);///somebp 2024.02.08 80198f2: 4b78 ldr r3, [pc, #480] @ (8019ad4 ) 80198f4: 781b ldrb r3, [r3, #0] 80198f6: 4618 mov r0, r3 80198f8: 4b76 ldr r3, [pc, #472] @ (8019ad4 ) 80198fa: 785b ldrb r3, [r3, #1] 80198fc: 461c mov r4, r3 80198fe: 4b75 ldr r3, [pc, #468] @ (8019ad4 ) 8019900: 789b ldrb r3, [r3, #2] 8019902: 461d mov r5, r3 8019904: 4b73 ldr r3, [pc, #460] @ (8019ad4 ) 8019906: 889b ldrh r3, [r3, #4] 8019908: 461a mov r2, r3 801990a: 4b72 ldr r3, [pc, #456] @ (8019ad4 ) 801990c: 799b ldrb r3, [r3, #6] 801990e: 4619 mov r1, r3 8019910: 4b70 ldr r3, [pc, #448] @ (8019ad4 ) 8019912: 79db ldrb r3, [r3, #7] 8019914: 9302 str r3, [sp, #8] 8019916: 9101 str r1, [sp, #4] 8019918: 9200 str r2, [sp, #0] 801991a: 462b mov r3, r5 801991c: 4622 mov r2, r4 801991e: 4601 mov r1, r0 8019920: 486d ldr r0, [pc, #436] @ (8019ad8 ) 8019922: f006 fa47 bl 801fdb4 DebugingPrintActive = 0; 8019926: 4b69 ldr r3, [pc, #420] @ (8019acc ) 8019928: 2200 movs r2, #0 801992a: 701a strb r2, [r3, #0] } // LED_Welcome(); // 이걸 Init_AngleElec 성공 직후로 옮기는 게 적절!! // Task_Start_1ms(Task1ms); ISR_Profile_Init(); // [v1.0.2] DWT Cycle Counter 활성화 801992c: f7f7 fcde bl 80112ec Task_Start_5ms(ISR_DeferredNotify); // [v1.0.2] ISR 지연 알림 처리 (UART/BLE 전송) 8019930: 486a ldr r0, [pc, #424] @ (8019adc ) 8019932: f004 fa31 bl 801dd98 // [v1.0.4] Debug Report는 Task50ms()에서 100ms 주기로 호출 (스케줄러 슬롯 충돌 방지) Task_Start_50ms(Task50ms); 8019936: 486a ldr r0, [pc, #424] @ (8019ae0 ) 8019938: f004 fa4e bl 801ddd8 Task_Start_100ms(Task100ms); // LED_Dispaly_Level 801993c: 4869 ldr r0, [pc, #420] @ (8019ae4 ) 801993e: f004 fa6b bl 801de18 Task_Start_60s(Report_Vdc); // Voltage Report - Periodic 8019942: 4869 ldr r0, [pc, #420] @ (8019ae8 ) 8019944: f004 fa78 bl 801de38 Task_Start_100ms(LED_Controller); 8019948: 4868 ldr r0, [pc, #416] @ (8019aec ) 801994a: f004 fa65 bl 801de18 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ int32_t LED_Period = 500; // [msec] 801994e: f44f 73fa mov.w r3, #500 @ 0x1f4 8019952: 607b str r3, [r7, #4] int8_t NumSequence = 5; 8019954: 2305 movs r3, #5 8019956: 70fb strb r3, [r7, #3] // DAC->DHR12R1 = dac_value; // DAC->SWTRIGR |= DAC_SWTRIGR_SWTRIG1; // 소프트웨어 트리거 (출력 반영) // Regen_Resistor_Control(); ///somebp 2024.02.02 Regen_Resistor_Control_HSW(); // 수행시간 부족 유발로 수행 위치 이동 테스트 중 -> 스케쥴러 시도 (2/27) 8019958: f005 fc02 bl 801f160 // Derating_Control(L); // Derating_Control(R); Protocol_Receive_Task_Uart3(); // BLE Protocol is more important than being in this location.... (24.02.09) 801995c: f000 ff70 bl 801a840 Check_BLE_Status(); 8019960: f006 fb92 bl 8020088 Time = Get_Time(); 8019964: f006 fc60 bl 8020228 8019968: 4603 mov r3, r0 801996a: 461a mov r2, r3 801996c: 4b60 ldr r3, [pc, #384] @ (8019af0 ) 801996e: 601a str r2, [r3, #0] /* 부팅 후 영점 조정이랑 부팅 후 첫 캘리를 통합하는 게 더 완벽하겠다 (너무 많이 풀려있으면 웰컴라이트가 먼저 끝나서 당길 수 있음) * 아 근데 그럼 어차피 감기고 있는 걸 인지할 수 있긴 함!! 일단 나중에 하자.. */ /* 부팅 후 최초 영점 조정 - 강제 캘리 스킵할 경우 대비 */\ // LED_Welcome 마지막에 InitialPosCali를 1로 갱신하고 있음 if(Active_ForcedCalib == 0 && InitialPosCali == 1 && Drive_Status == RunGym 8019970: 4b60 ldr r3, [pc, #384] @ (8019af4 ) 8019972: 681b ldr r3, [r3, #0] 8019974: 2b00 cmp r3, #0 8019976: d124 bne.n 80199c2 8019978: 4b5f ldr r3, [pc, #380] @ (8019af8 ) 801997a: 781b ldrb r3, [r3, #0] 801997c: 2b01 cmp r3, #1 801997e: d120 bne.n 80199c2 8019980: 4b5e ldr r3, [pc, #376] @ (8019afc ) 8019982: 781b ldrb r3, [r3, #0] 8019984: 2b03 cmp r3, #3 8019986: d11c bne.n 80199c2 && Motor1_Ang.RpmFil < 5.0f && Motor2_Ang.RpmFil < 5.0f) { 8019988: 4b5d ldr r3, [pc, #372] @ (8019b00 ) 801998a: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801998e: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 8019992: eef4 7ac7 vcmpe.f32 s15, s14 8019996: eef1 fa10 vmrs APSR_nzcv, fpscr 801999a: d512 bpl.n 80199c2 801999c: 4b59 ldr r3, [pc, #356] @ (8019b04 ) 801999e: edd3 7a11 vldr s15, [r3, #68] @ 0x44 80199a2: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 80199a6: eef4 7ac7 vcmpe.f32 s15, s14 80199aa: eef1 fa10 vmrs APSR_nzcv, fpscr 80199ae: d508 bpl.n 80199c2 PositionCalibrate(LR); 80199b0: 2002 movs r0, #2 80199b2: f7f9 fcd5 bl 8013360 InitialPosCali++; 80199b6: 4b50 ldr r3, [pc, #320] @ (8019af8 ) 80199b8: 781b ldrb r3, [r3, #0] 80199ba: 3301 adds r3, #1 80199bc: b2da uxtb r2, r3 80199be: 4b4e ldr r3, [pc, #312] @ (8019af8 ) 80199c0: 701a strb r2, [r3, #0] } /* (통합 전)엔코더 초기화, 강제 캘리(스킵) 완료 후 메세지 & 웰컴 라이트 */ if(WP_ForcedCali.Flag == Done && cnt_LED_Welcome ==0 && status_LED_Welcome == 0) { 80199c2: 4b51 ldr r3, [pc, #324] @ (8019b08 ) 80199c4: 781b ldrb r3, [r3, #0] 80199c6: 2b01 cmp r3, #1 80199c8: d116 bne.n 80199f8 80199ca: 4b50 ldr r3, [pc, #320] @ (8019b0c ) 80199cc: 781b ldrb r3, [r3, #0] 80199ce: 2b00 cmp r3, #0 80199d0: d112 bne.n 80199f8 80199d2: 4b4f ldr r3, [pc, #316] @ (8019b10 ) 80199d4: 781b ldrb r3, [r3, #0] 80199d6: 2b00 cmp r3, #0 80199d8: d10e bne.n 80199f8 if(DebugingPrintActive == 0) { 80199da: 4b3c ldr r3, [pc, #240] @ (8019acc ) 80199dc: 781b ldrb r3, [r3, #0] 80199de: 2b00 cmp r3, #0 80199e0: d108 bne.n 80199f4 DebugingPrintActive = 1; 80199e2: 4b3a ldr r3, [pc, #232] @ (8019acc ) 80199e4: 2201 movs r2, #1 80199e6: 701a strb r2, [r3, #0] Debug_UART3_printf("\r\n - Motor Ready, Let's move out! \r\n"); 80199e8: 484a ldr r0, [pc, #296] @ (8019b14 ) 80199ea: f006 f9e3 bl 801fdb4 DebugingPrintActive = 0; 80199ee: 4b37 ldr r3, [pc, #220] @ (8019acc ) 80199f0: 2200 movs r2, #0 80199f2: 701a strb r2, [r3, #0] } LED_Welcome(); 80199f4: f7ff fd10 bl 8019418 } /* 유저 요청에 의한 강제 캘리 */ if(ReStart_ForcedCalib){ 80199f8: 4b47 ldr r3, [pc, #284] @ (8019b18 ) 80199fa: 681b ldr r3, [r3, #0] 80199fc: 2b00 cmp r3, #0 80199fe: d022 beq.n 8019a46 cnt_LED_Calib = 0; 8019a00: 4b46 ldr r3, [pc, #280] @ (8019b1c ) 8019a02: 2200 movs r2, #0 8019a04: 601a str r2, [r3, #0] cnt_LED_Calib_Err = 0; 8019a06: 4b46 ldr r3, [pc, #280] @ (8019b20 ) 8019a08: 2200 movs r2, #0 8019a0a: 601a str r2, [r3, #0] cnt_LED_Welcome = 0; 8019a0c: 4b3f ldr r3, [pc, #252] @ (8019b0c ) 8019a0e: 2200 movs r2, #0 8019a10: 701a strb r2, [r3, #0] Active_ForcedCalib = 1; 8019a12: 4b38 ldr r3, [pc, #224] @ (8019af4 ) 8019a14: 2201 movs r2, #1 8019a16: 601a str r2, [r3, #0] WP_ForcedCali.Flag = NotDone; 8019a18: 4b3b ldr r3, [pc, #236] @ (8019b08 ) 8019a1a: 2200 movs r2, #0 8019a1c: 701a strb r2, [r3, #0] WP_ForcedCali.Status[L] = WP_ForcedCali.Status[R] = 0; 8019a1e: 4b3a ldr r3, [pc, #232] @ (8019b08 ) 8019a20: 2200 movs r2, #0 8019a22: 709a strb r2, [r3, #2] 8019a24: 4b38 ldr r3, [pc, #224] @ (8019b08 ) 8019a26: 789a ldrb r2, [r3, #2] 8019a28: 4b37 ldr r3, [pc, #220] @ (8019b08 ) 8019a2a: 705a strb r2, [r3, #1] WP_ForcedCali.Step[L] = WP_ForcedCali.Step[R] = 0; 8019a2c: 4b36 ldr r3, [pc, #216] @ (8019b08 ) 8019a2e: 2200 movs r2, #0 8019a30: 711a strb r2, [r3, #4] 8019a32: 4b35 ldr r3, [pc, #212] @ (8019b08 ) 8019a34: 791a ldrb r2, [r3, #4] 8019a36: 4b34 ldr r3, [pc, #208] @ (8019b08 ) 8019a38: 70da strb r2, [r3, #3] Drive_Status = Calibration; 8019a3a: 4b30 ldr r3, [pc, #192] @ (8019afc ) 8019a3c: 2202 movs r2, #2 8019a3e: 701a strb r2, [r3, #0] ReStart_ForcedCalib = 0; 8019a40: 4b35 ldr r3, [pc, #212] @ (8019b18 ) 8019a42: 2200 movs r2, #0 8019a44: 601a str r2, [r3, #0] // if(debug_LED_Color) { // LED_On_ALL(debug_LED_R,debug_LED_G,debug_LED_B); // Delay_msec(110) // } check_While++; 8019a46: 4b37 ldr r3, [pc, #220] @ (8019b24 ) 8019a48: 681b ldr r3, [r3, #0] 8019a4a: 3301 adds r3, #1 8019a4c: 4a35 ldr r2, [pc, #212] @ (8019b24 ) 8019a4e: 6013 str r3, [r2, #0] // break; // // } // } I_CHG = Get_I_CHG(); 8019a50: f7fe fdb4 bl 80185bc 8019a54: eef0 7a40 vmov.f32 s15, s0 8019a58: 4b33 ldr r3, [pc, #204] @ (8019b28 ) 8019a5a: edc3 7a00 vstr s15, [r3] // DAC1_SetValue(Dac1); // DAC2_SetValue(Dac2); // check_Dac++; //other Tasks Inverter_Comm(); // (25.05.05) 주요하지 않은 ADC 변수들 일괄로 불러오고 후처리 하는 코드로 보임 8019a5e: f7fc fa8f bl 8015f80 // } // } ////////////////////////////////////////////////////////////////////// // 디버깅용 - 영점 캘리브레이션 if(Debug_Calib != 0) { 8019a62: 4b32 ldr r3, [pc, #200] @ (8019b2c ) 8019a64: 681b ldr r3, [r3, #0] 8019a66: 2b00 cmp r3, #0 8019a68: d069 beq.n 8019b3e switch (Debug_Calib) { 8019a6a: 4b30 ldr r3, [pc, #192] @ (8019b2c ) 8019a6c: 681b ldr r3, [r3, #0] 8019a6e: 2b03 cmp r3, #3 8019a70: d05e beq.n 8019b30 8019a72: 2b03 cmp r3, #3 8019a74: dc63 bgt.n 8019b3e 8019a76: 2b01 cmp r3, #1 8019a78: d002 beq.n 8019a80 8019a7a: 2b02 cmp r3, #2 8019a7c: d007 beq.n 8019a8e 8019a7e: e05e b.n 8019b3e case 1: PositionCalibrate(L); 8019a80: 2000 movs r0, #0 8019a82: f7f9 fc6d bl 8013360 Debug_Calib=0; 8019a86: 4b29 ldr r3, [pc, #164] @ (8019b2c ) 8019a88: 2200 movs r2, #0 8019a8a: 601a str r2, [r3, #0] break; 8019a8c: e057 b.n 8019b3e case 2: PositionCalibrate(R); 8019a8e: 2001 movs r0, #1 8019a90: f7f9 fc66 bl 8013360 Debug_Calib=0; 8019a94: 4b25 ldr r3, [pc, #148] @ (8019b2c ) 8019a96: 2200 movs r2, #0 8019a98: 601a str r2, [r3, #0] break; 8019a9a: e050 b.n 8019b3e 8019a9c: 20000a84 .word 0x20000a84 8019aa0: 20000a54 .word 0x20000a54 8019aa4: 200009ac .word 0x200009ac 8019aa8: 2000091c .word 0x2000091c 8019aac: 20000964 .word 0x20000964 8019ab0: 20000db0 .word 0x20000db0 8019ab4: 20000df8 .word 0x20000df8 8019ab8: 20000d68 .word 0x20000d68 8019abc: 20000e88 .word 0x20000e88 8019ac0: 20000ed0 .word 0x20000ed0 8019ac4: 20000e40 .word 0x20000e40 8019ac8: 20000c12 .word 0x20000c12 8019acc: 20000c10 .word 0x20000c10 8019ad0: 0802a590 .word 0x0802a590 8019ad4: 200000b0 .word 0x200000b0 8019ad8: 0802a5c4 .word 0x0802a5c4 8019adc: 0801153d .word 0x0801153d 8019ae0: 0801df11 .word 0x0801df11 8019ae4: 0801df31 .word 0x0801df31 8019ae8: 0801a511 .word 0x0801a511 8019aec: 080195a1 .word 0x080195a1 8019af0: 20000c08 .word 0x20000c08 8019af4: 20000394 .word 0x20000394 8019af8: 20000c11 .word 0x20000c11 8019afc: 20000018 .word 0x20000018 8019b00: 2000047c .word 0x2000047c 8019b04: 200004f8 .word 0x200004f8 8019b08: 200000e0 .word 0x200000e0 8019b0c: 20000bf5 .word 0x20000bf5 8019b10: 20000bf4 .word 0x20000bf4 8019b14: 0802a5e4 .word 0x0802a5e4 8019b18: 20000398 .word 0x20000398 8019b1c: 2000038c .word 0x2000038c 8019b20: 20000390 .word 0x20000390 8019b24: 20000c00 .word 0x20000c00 8019b28: 20000c0c .word 0x20000c0c 8019b2c: 20000020 .word 0x20000020 case 3: PositionCalibrate(LR); 8019b30: 2002 movs r0, #2 8019b32: f7f9 fc15 bl 8013360 Debug_Calib=0; 8019b36: 4b26 ldr r3, [pc, #152] @ (8019bd0 ) 8019b38: 2200 movs r2, #0 8019b3a: 601a str r2, [r3, #0] break; 8019b3c: bf00 nop // Debug_ATCommand = 99; // break; // } // LED는 진짜 제일 필요 없으니 맨 마지막. 배포 시엔 아예 끄는 게 지구에 도움될 지도 (250702) if(Time % LED_Period == 0) { 8019b3e: 4b25 ldr r3, [pc, #148] @ (8019bd4 ) 8019b40: 681b ldr r3, [r3, #0] 8019b42: 687a ldr r2, [r7, #4] 8019b44: fb93 f2f2 sdiv r2, r3, r2 8019b48: 6879 ldr r1, [r7, #4] 8019b4a: fb01 f202 mul.w r2, r1, r2 8019b4e: 1a9b subs r3, r3, r2 8019b50: 2b00 cmp r3, #0 8019b52: d10c bne.n 8019b6e digitalWrite(56, 1); 8019b54: 2101 movs r1, #1 8019b56: 2038 movs r0, #56 @ 0x38 8019b58: f7fe ffec bl 8018b34 digitalWrite(57, 1); 8019b5c: 2101 movs r1, #1 8019b5e: 2039 movs r0, #57 @ 0x39 8019b60: f7fe ffe8 bl 8018b34 digitalWrite(87, 1); 8019b64: 2101 movs r1, #1 8019b66: 2057 movs r0, #87 @ 0x57 8019b68: f7fe ffe4 bl 8018b34 8019b6c: e6f4 b.n 8019958 // digitalWrite(88, 1); // digitalWrite(89, 1); // digitalWrite(90, 1); } else if (Time % LED_Period == LED_Period/NumSequence*1) { 8019b6e: 4b19 ldr r3, [pc, #100] @ (8019bd4 ) 8019b70: 681b ldr r3, [r3, #0] 8019b72: 687a ldr r2, [r7, #4] 8019b74: fb93 f2f2 sdiv r2, r3, r2 8019b78: 6879 ldr r1, [r7, #4] 8019b7a: fb01 f202 mul.w r2, r1, r2 8019b7e: 1a9a subs r2, r3, r2 8019b80: f997 3003 ldrsb.w r3, [r7, #3] 8019b84: 6879 ldr r1, [r7, #4] 8019b86: fb91 f3f3 sdiv r3, r1, r3 8019b8a: 429a cmp r2, r3 8019b8c: f43f aee4 beq.w 8019958 // digitalWrite(56, 0); // digitalWrite(88, 0); } else if (Time % LED_Period == LED_Period/NumSequence*2) { 8019b90: 4b10 ldr r3, [pc, #64] @ (8019bd4 ) 8019b92: 681b ldr r3, [r3, #0] 8019b94: 687a ldr r2, [r7, #4] 8019b96: fb93 f2f2 sdiv r2, r3, r2 8019b9a: 6879 ldr r1, [r7, #4] 8019b9c: fb01 f202 mul.w r2, r1, r2 8019ba0: 1a9a subs r2, r3, r2 8019ba2: f997 3003 ldrsb.w r3, [r7, #3] 8019ba6: 6879 ldr r1, [r7, #4] 8019ba8: fb91 f3f3 sdiv r3, r1, r3 8019bac: 005b lsls r3, r3, #1 8019bae: 429a cmp r2, r3 8019bb0: f47f aed2 bne.w 8019958 digitalWrite(57, 0); 8019bb4: 2100 movs r1, #0 8019bb6: 2039 movs r0, #57 @ 0x39 8019bb8: f7fe ffbc bl 8018b34 digitalWrite(56, 0); 8019bbc: 2100 movs r1, #0 8019bbe: 2038 movs r0, #56 @ 0x38 8019bc0: f7fe ffb8 bl 8018b34 digitalWrite(87, 0); 8019bc4: 2100 movs r1, #0 8019bc6: 2057 movs r0, #87 @ 0x57 8019bc8: f7fe ffb4 bl 8018b34 Regen_Resistor_Control_HSW(); // 수행시간 부족 유발로 수행 위치 이동 테스트 중 -> 스케쥴러 시도 (2/27) 8019bcc: e6c4 b.n 8019958 8019bce: bf00 nop 8019bd0: 20000020 .word 0x20000020 8019bd4: 20000c08 .word 0x20000c08 08019bd8 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8019bd8: b580 push {r7, lr} 8019bda: b094 sub sp, #80 @ 0x50 8019bdc: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8019bde: f107 031c add.w r3, r7, #28 8019be2: 2234 movs r2, #52 @ 0x34 8019be4: 2100 movs r1, #0 8019be6: 4618 mov r0, r3 8019be8: f00e fc24 bl 8028434 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8019bec: f107 0308 add.w r3, r7, #8 8019bf0: 2200 movs r2, #0 8019bf2: 601a str r2, [r3, #0] 8019bf4: 605a str r2, [r3, #4] 8019bf6: 609a str r2, [r3, #8] 8019bf8: 60da str r2, [r3, #12] 8019bfa: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); 8019bfc: 2300 movs r3, #0 8019bfe: 607b str r3, [r7, #4] 8019c00: 4b2c ldr r3, [pc, #176] @ (8019cb4 ) 8019c02: 6c1b ldr r3, [r3, #64] @ 0x40 8019c04: 4a2b ldr r2, [pc, #172] @ (8019cb4 ) 8019c06: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8019c0a: 6413 str r3, [r2, #64] @ 0x40 8019c0c: 4b29 ldr r3, [pc, #164] @ (8019cb4 ) 8019c0e: 6c1b ldr r3, [r3, #64] @ 0x40 8019c10: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8019c14: 607b str r3, [r7, #4] 8019c16: 687b ldr r3, [r7, #4] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 8019c18: 2300 movs r3, #0 8019c1a: 603b str r3, [r7, #0] 8019c1c: 4b26 ldr r3, [pc, #152] @ (8019cb8 ) 8019c1e: 681b ldr r3, [r3, #0] 8019c20: 4a25 ldr r2, [pc, #148] @ (8019cb8 ) 8019c22: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8019c26: 6013 str r3, [r2, #0] 8019c28: 4b23 ldr r3, [pc, #140] @ (8019cb8 ) 8019c2a: 681b ldr r3, [r3, #0] 8019c2c: f403 4340 and.w r3, r3, #49152 @ 0xc000 8019c30: 603b str r3, [r7, #0] 8019c32: 683b ldr r3, [r7, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8019c34: 2301 movs r3, #1 8019c36: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8019c38: f44f 3380 mov.w r3, #65536 @ 0x10000 8019c3c: 623b str r3, [r7, #32] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8019c3e: 2302 movs r3, #2 8019c40: 637b str r3, [r7, #52] @ 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8019c42: f44f 0380 mov.w r3, #4194304 @ 0x400000 8019c46: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLM = 6; 8019c48: 2306 movs r3, #6 8019c4a: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLN = 180; 8019c4c: 23b4 movs r3, #180 @ 0xb4 8019c4e: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 8019c50: 2302 movs r3, #2 8019c52: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLQ = 2; 8019c54: 2302 movs r3, #2 8019c56: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLR = 2; 8019c58: 2302 movs r3, #2 8019c5a: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8019c5c: f107 031c add.w r3, r7, #28 8019c60: 4618 mov r0, r3 8019c62: f00b fc57 bl 8025514 8019c66: 4603 mov r3, r0 8019c68: 2b00 cmp r3, #0 8019c6a: d001 beq.n 8019c70 { Error_Handler(); 8019c6c: f000 f841 bl 8019cf2 } /** Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) 8019c70: f00a fe12 bl 8024898 8019c74: 4603 mov r3, r0 8019c76: 2b00 cmp r3, #0 8019c78: d001 beq.n 8019c7e { Error_Handler(); 8019c7a: f000 f83a bl 8019cf2 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8019c7e: 230f movs r3, #15 8019c80: 60bb str r3, [r7, #8] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8019c82: 2302 movs r3, #2 8019c84: 60fb str r3, [r7, #12] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8019c86: 2300 movs r3, #0 8019c88: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 8019c8a: f44f 53a0 mov.w r3, #5120 @ 0x1400 8019c8e: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 8019c90: f44f 5380 mov.w r3, #4096 @ 0x1000 8019c94: 61bb str r3, [r7, #24] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) 8019c96: f107 0308 add.w r3, r7, #8 8019c9a: 2105 movs r1, #5 8019c9c: 4618 mov r0, r3 8019c9e: f00a fe4b bl 8024938 8019ca2: 4603 mov r3, r0 8019ca4: 2b00 cmp r3, #0 8019ca6: d001 beq.n 8019cac { Error_Handler(); 8019ca8: f000 f823 bl 8019cf2 } } 8019cac: bf00 nop 8019cae: 3750 adds r7, #80 @ 0x50 8019cb0: 46bd mov sp, r7 8019cb2: bd80 pop {r7, pc} 8019cb4: 40023800 .word 0x40023800 8019cb8: 40007000 .word 0x40007000 08019cbc : /** * @brief Peripherals Common Clock Configuration * @retval None */ void PeriphCommonClock_Config(void) { 8019cbc: b580 push {r7, lr} 8019cbe: b098 sub sp, #96 @ 0x60 8019cc0: af00 add r7, sp, #0 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8019cc2: 1d3b adds r3, r7, #4 8019cc4: 225c movs r2, #92 @ 0x5c 8019cc6: 2100 movs r1, #0 8019cc8: 4618 mov r0, r3 8019cca: f00e fbb3 bl 8028434 /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_TIM; 8019cce: 2310 movs r3, #16 8019cd0: 607b str r3, [r7, #4] PeriphClkInitStruct.TIMPresSelection = RCC_TIMPRES_ACTIVATED; 8019cd2: 2301 movs r3, #1 8019cd4: f887 305c strb.w r3, [r7, #92] @ 0x5c if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8019cd8: 1d3b adds r3, r7, #4 8019cda: 4618 mov r0, r3 8019cdc: f00a ff46 bl 8024b6c 8019ce0: 4603 mov r3, r0 8019ce2: 2b00 cmp r3, #0 8019ce4: d001 beq.n 8019cea { Error_Handler(); 8019ce6: f000 f804 bl 8019cf2 } } 8019cea: bf00 nop 8019cec: 3760 adds r7, #96 @ 0x60 8019cee: 46bd mov sp, r7 8019cf0: bd80 pop {r7, pc} 08019cf2 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8019cf2: b480 push {r7} 8019cf4: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8019cf6: b672 cpsid i } 8019cf8: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8019cfa: bf00 nop 8019cfc: e7fd b.n 8019cfa ... 08019d00 : uint32_t Error_Flag = 0; uint8_t Error_Flag_Enable = 0; //0:Disable, 1:Enable // Ȳ���� �߰� �� ���� (Uart2, Uart3 ���� �۽� �� ���ο���) void Return_LineEnding(void) { 8019d00: b580 push {r7, lr} 8019d02: b082 sub sp, #8 8019d04: af00 add r7, sp, #0 uint8_t MessageEnd[2] = {13,10}; 8019d06: f640 230d movw r3, #2573 @ 0xa0d 8019d0a: 80bb strh r3, [r7, #4] UART3_PutData(MessageEnd,2); 8019d0c: 1d3b adds r3, r7, #4 8019d0e: 2202 movs r2, #2 8019d10: 4619 mov r1, r3 8019d12: 4803 ldr r0, [pc, #12] @ (8019d20 ) 8019d14: f005 fe08 bl 801f928 } 8019d18: bf00 nop 8019d1a: 3708 adds r7, #8 8019d1c: 46bd mov sp, r7 8019d1e: bd80 pop {r7, pc} 8019d20: 200053ec .word 0x200053ec 08019d24 : void Return_0byte(uint8_t com) { 8019d24: b580 push {r7, lr} 8019d26: b084 sub sp, #16 8019d28: af00 add r7, sp, #0 8019d2a: 4603 mov r3, r0 8019d2c: 71fb strb r3, [r7, #7] uint8_t return_data[3+2]; return_data[0]=0xFF; 8019d2e: 23ff movs r3, #255 @ 0xff 8019d30: 723b strb r3, [r7, #8] return_data[1]=0xFF; 8019d32: 23ff movs r3, #255 @ 0xff 8019d34: 727b strb r3, [r7, #9] return_data[2]=sizeof(return_data)-3; //size 8019d36: 2302 movs r3, #2 8019d38: 72bb strb r3, [r7, #10] return_data[3]=com; 8019d3a: 79fb ldrb r3, [r7, #7] 8019d3c: 72fb strb r3, [r7, #11] return_data[sizeof(return_data)-1]=0; //checksum 8019d3e: 2300 movs r3, #0 8019d40: 733b strb r3, [r7, #12] for(uint8_t i=0; i return_data[sizeof(return_data)-1]+=return_data[i]; 8019d48: 7b3a ldrb r2, [r7, #12] 8019d4a: 7bfb ldrb r3, [r7, #15] 8019d4c: 3310 adds r3, #16 8019d4e: 443b add r3, r7 8019d50: f813 3c08 ldrb.w r3, [r3, #-8] 8019d54: 4413 add r3, r2 8019d56: b2db uxtb r3, r3 8019d58: 733b strb r3, [r7, #12] for(uint8_t i=0; i } return_data[sizeof(return_data)-1]=-return_data[sizeof(return_data)-1]; 8019d66: 7b3b ldrb r3, [r7, #12] 8019d68: 425b negs r3, r3 8019d6a: b2db uxtb r3, r3 8019d6c: 733b strb r3, [r7, #12] UART3_PutData(return_data, sizeof(return_data)); 8019d6e: f107 0308 add.w r3, r7, #8 8019d72: 2205 movs r2, #5 8019d74: 4619 mov r1, r3 8019d76: 4804 ldr r0, [pc, #16] @ (8019d88 ) 8019d78: f005 fdd6 bl 801f928 Return_LineEnding(); 8019d7c: f7ff ffc0 bl 8019d00 } 8019d80: bf00 nop 8019d82: 3710 adds r7, #16 8019d84: 46bd mov sp, r7 8019d86: bd80 pop {r7, pc} 8019d88: 200053ec .word 0x200053ec 08019d8c : void Return_1byte(uint8_t com, uint8_t data) { 8019d8c: b580 push {r7, lr} 8019d8e: b084 sub sp, #16 8019d90: af00 add r7, sp, #0 8019d92: 4603 mov r3, r0 8019d94: 460a mov r2, r1 8019d96: 71fb strb r3, [r7, #7] 8019d98: 4613 mov r3, r2 8019d9a: 71bb strb r3, [r7, #6] uint8_t return_data[3+3]; return_data[0]=0xFF; 8019d9c: 23ff movs r3, #255 @ 0xff 8019d9e: 723b strb r3, [r7, #8] return_data[1]=0xFF; 8019da0: 23ff movs r3, #255 @ 0xff 8019da2: 727b strb r3, [r7, #9] return_data[2]=sizeof(return_data)-3; //size 8019da4: 2303 movs r3, #3 8019da6: 72bb strb r3, [r7, #10] return_data[3]=com; 8019da8: 79fb ldrb r3, [r7, #7] 8019daa: 72fb strb r3, [r7, #11] return_data[4]=data; 8019dac: 79bb ldrb r3, [r7, #6] 8019dae: 733b strb r3, [r7, #12] return_data[sizeof(return_data)-1]=0; //checksum 8019db0: 2300 movs r3, #0 8019db2: 737b strb r3, [r7, #13] for(uint8_t i=0; i return_data[sizeof(return_data)-1]+=return_data[i]; 8019dba: 7b7a ldrb r2, [r7, #13] 8019dbc: 7bfb ldrb r3, [r7, #15] 8019dbe: 3310 adds r3, #16 8019dc0: 443b add r3, r7 8019dc2: f813 3c08 ldrb.w r3, [r3, #-8] 8019dc6: 4413 add r3, r2 8019dc8: b2db uxtb r3, r3 8019dca: 737b strb r3, [r7, #13] for(uint8_t i=0; i } return_data[sizeof(return_data)-1]=-return_data[sizeof(return_data)-1]; 8019dd8: 7b7b ldrb r3, [r7, #13] 8019dda: 425b negs r3, r3 8019ddc: b2db uxtb r3, r3 8019dde: 737b strb r3, [r7, #13] UART3_PutData(return_data, sizeof(return_data)); 8019de0: f107 0308 add.w r3, r7, #8 8019de4: 2206 movs r2, #6 8019de6: 4619 mov r1, r3 8019de8: 4804 ldr r0, [pc, #16] @ (8019dfc ) 8019dea: f005 fd9d bl 801f928 Return_LineEnding(); 8019dee: f7ff ff87 bl 8019d00 } 8019df2: bf00 nop 8019df4: 3710 adds r7, #16 8019df6: 46bd mov sp, r7 8019df8: bd80 pop {r7, pc} 8019dfa: bf00 nop 8019dfc: 200053ec .word 0x200053ec 08019e00 : void Return_2byte(uint8_t com, uint16_t data) { 8019e00: b580 push {r7, lr} 8019e02: b084 sub sp, #16 8019e04: af00 add r7, sp, #0 8019e06: 4603 mov r3, r0 8019e08: 460a mov r2, r1 8019e0a: 71fb strb r3, [r7, #7] 8019e0c: 4613 mov r3, r2 8019e0e: 80bb strh r3, [r7, #4] uint8_t return_data[3+4]; return_data[0]=0xFF; 8019e10: 23ff movs r3, #255 @ 0xff 8019e12: 723b strb r3, [r7, #8] return_data[1]=0xFF; 8019e14: 23ff movs r3, #255 @ 0xff 8019e16: 727b strb r3, [r7, #9] return_data[2]=sizeof(return_data)-3; //size 8019e18: 2304 movs r3, #4 8019e1a: 72bb strb r3, [r7, #10] return_data[3]=com; 8019e1c: 79fb ldrb r3, [r7, #7] 8019e1e: 72fb strb r3, [r7, #11] return_data[4]=(uint8_t)(data>>8); //data 8019e20: 88bb ldrh r3, [r7, #4] 8019e22: 0a1b lsrs r3, r3, #8 8019e24: b29b uxth r3, r3 8019e26: b2db uxtb r3, r3 8019e28: 733b strb r3, [r7, #12] return_data[5]=(uint8_t)data; 8019e2a: 88bb ldrh r3, [r7, #4] 8019e2c: b2db uxtb r3, r3 8019e2e: 737b strb r3, [r7, #13] return_data[sizeof(return_data)-1]=0; //checksum 8019e30: 2300 movs r3, #0 8019e32: 73bb strb r3, [r7, #14] for(uint8_t i=0; i return_data[sizeof(return_data)-1]+=return_data[i]; 8019e3a: 7bba ldrb r2, [r7, #14] 8019e3c: 7bfb ldrb r3, [r7, #15] 8019e3e: 3310 adds r3, #16 8019e40: 443b add r3, r7 8019e42: f813 3c08 ldrb.w r3, [r3, #-8] 8019e46: 4413 add r3, r2 8019e48: b2db uxtb r3, r3 8019e4a: 73bb strb r3, [r7, #14] for(uint8_t i=0; i } return_data[sizeof(return_data)-1]=-return_data[sizeof(return_data)-1]; 8019e58: 7bbb ldrb r3, [r7, #14] 8019e5a: 425b negs r3, r3 8019e5c: b2db uxtb r3, r3 8019e5e: 73bb strb r3, [r7, #14] UART3_PutData(return_data, sizeof(return_data)); 8019e60: f107 0308 add.w r3, r7, #8 8019e64: 2207 movs r2, #7 8019e66: 4619 mov r1, r3 8019e68: 4804 ldr r0, [pc, #16] @ (8019e7c ) 8019e6a: f005 fd5d bl 801f928 Return_LineEnding(); 8019e6e: f7ff ff47 bl 8019d00 } 8019e72: bf00 nop 8019e74: 3710 adds r7, #16 8019e76: 46bd mov sp, r7 8019e78: bd80 pop {r7, pc} 8019e7a: bf00 nop 8019e7c: 200053ec .word 0x200053ec 08019e80 : void Return_4byte(uint8_t com, uint32_t data) { 8019e80: b580 push {r7, lr} 8019e82: b086 sub sp, #24 8019e84: af00 add r7, sp, #0 8019e86: 4603 mov r3, r0 8019e88: 6039 str r1, [r7, #0] 8019e8a: 71fb strb r3, [r7, #7] uint8_t return_data[3+6]; return_data[0]=0xFF; 8019e8c: 23ff movs r3, #255 @ 0xff 8019e8e: 733b strb r3, [r7, #12] return_data[1]=0xFF; 8019e90: 23ff movs r3, #255 @ 0xff 8019e92: 737b strb r3, [r7, #13] return_data[2]=sizeof(return_data)-3; //size 8019e94: 2306 movs r3, #6 8019e96: 73bb strb r3, [r7, #14] return_data[3]=com; 8019e98: 79fb ldrb r3, [r7, #7] 8019e9a: 73fb strb r3, [r7, #15] return_data[4]=(uint8_t)(data>>24); //data 8019e9c: 683b ldr r3, [r7, #0] 8019e9e: 0e1b lsrs r3, r3, #24 8019ea0: b2db uxtb r3, r3 8019ea2: 743b strb r3, [r7, #16] return_data[5]=(uint8_t)(data>>16); 8019ea4: 683b ldr r3, [r7, #0] 8019ea6: 0c1b lsrs r3, r3, #16 8019ea8: b2db uxtb r3, r3 8019eaa: 747b strb r3, [r7, #17] return_data[6]=(uint8_t)(data>>8); 8019eac: 683b ldr r3, [r7, #0] 8019eae: 0a1b lsrs r3, r3, #8 8019eb0: b2db uxtb r3, r3 8019eb2: 74bb strb r3, [r7, #18] return_data[7]=(uint8_t)data; 8019eb4: 683b ldr r3, [r7, #0] 8019eb6: b2db uxtb r3, r3 8019eb8: 74fb strb r3, [r7, #19] return_data[sizeof(return_data)-1]=0; //checksum 8019eba: 2300 movs r3, #0 8019ebc: 753b strb r3, [r7, #20] for(uint8_t i=0; i return_data[sizeof(return_data)-1]+=return_data[i]; 8019ec4: 7d3a ldrb r2, [r7, #20] 8019ec6: 7dfb ldrb r3, [r7, #23] 8019ec8: 3318 adds r3, #24 8019eca: 443b add r3, r7 8019ecc: f813 3c0c ldrb.w r3, [r3, #-12] 8019ed0: 4413 add r3, r2 8019ed2: b2db uxtb r3, r3 8019ed4: 753b strb r3, [r7, #20] for(uint8_t i=0; i } return_data[sizeof(return_data)-1]=-return_data[sizeof(return_data)-1]; 8019ee2: 7d3b ldrb r3, [r7, #20] 8019ee4: 425b negs r3, r3 8019ee6: b2db uxtb r3, r3 8019ee8: 753b strb r3, [r7, #20] UART3_PutData(return_data, sizeof(return_data)); 8019eea: f107 030c add.w r3, r7, #12 8019eee: 2209 movs r2, #9 8019ef0: 4619 mov r1, r3 8019ef2: 4804 ldr r0, [pc, #16] @ (8019f04 ) 8019ef4: f005 fd18 bl 801f928 Return_LineEnding(); 8019ef8: f7ff ff02 bl 8019d00 } 8019efc: bf00 nop 8019efe: 3718 adds r7, #24 8019f00: 46bd mov sp, r7 8019f02: bd80 pop {r7, pc} 8019f04: 200053ec .word 0x200053ec 08019f08 : UART3_PutData(return_data, sizeof(return_data)); Return_LineEnding(); } void Return_2x1byte(uint8_t com, uint16_t data1, uint16_t data2) { 8019f08: b580 push {r7, lr} 8019f0a: b086 sub sp, #24 8019f0c: af00 add r7, sp, #0 8019f0e: 4603 mov r3, r0 8019f10: 71fb strb r3, [r7, #7] 8019f12: 460b mov r3, r1 8019f14: 80bb strh r3, [r7, #4] 8019f16: 4613 mov r3, r2 8019f18: 807b strh r3, [r7, #2] uint8_t return_data[3+6]; return_data[0]=0xFF; 8019f1a: 23ff movs r3, #255 @ 0xff 8019f1c: 733b strb r3, [r7, #12] return_data[1]=0xFF; 8019f1e: 23ff movs r3, #255 @ 0xff 8019f20: 737b strb r3, [r7, #13] return_data[2]=sizeof(return_data)-3; //size 8019f22: 2306 movs r3, #6 8019f24: 73bb strb r3, [r7, #14] return_data[3]=com; 8019f26: 79fb ldrb r3, [r7, #7] 8019f28: 73fb strb r3, [r7, #15] return_data[4]=(uint8_t)data1; //data1 8019f2a: 88bb ldrh r3, [r7, #4] 8019f2c: b2db uxtb r3, r3 8019f2e: 743b strb r3, [r7, #16] return_data[5]=(uint8_t)data2; 8019f30: 887b ldrh r3, [r7, #2] 8019f32: b2db uxtb r3, r3 8019f34: 747b strb r3, [r7, #17] return_data[sizeof(return_data)-1]=0; //checksum 8019f36: 2300 movs r3, #0 8019f38: 753b strb r3, [r7, #20] for(uint8_t i=0; i return_data[sizeof(return_data)-1]+=return_data[i]; 8019f40: 7d3a ldrb r2, [r7, #20] 8019f42: 7dfb ldrb r3, [r7, #23] 8019f44: 3318 adds r3, #24 8019f46: 443b add r3, r7 8019f48: f813 3c0c ldrb.w r3, [r3, #-12] 8019f4c: 4413 add r3, r2 8019f4e: b2db uxtb r3, r3 8019f50: 753b strb r3, [r7, #20] for(uint8_t i=0; i } return_data[sizeof(return_data)-1]=-return_data[sizeof(return_data)-1]; 8019f5e: 7d3b ldrb r3, [r7, #20] 8019f60: 425b negs r3, r3 8019f62: b2db uxtb r3, r3 8019f64: 753b strb r3, [r7, #20] UART3_PutData(return_data, sizeof(return_data)); 8019f66: f107 030c add.w r3, r7, #12 8019f6a: 2209 movs r2, #9 8019f6c: 4619 mov r1, r3 8019f6e: 4804 ldr r0, [pc, #16] @ (8019f80 ) 8019f70: f005 fcda bl 801f928 Return_LineEnding(); 8019f74: f7ff fec4 bl 8019d00 } 8019f78: bf00 nop 8019f7a: 3718 adds r7, #24 8019f7c: 46bd mov sp, r7 8019f7e: bd80 pop {r7, pc} 8019f80: 200053ec .word 0x200053ec 08019f84 : void Return_4x1byte(uint8_t com, uint16_t data1, uint16_t data2, uint16_t data3, uint16_t data4) { 8019f84: b590 push {r4, r7, lr} 8019f86: b087 sub sp, #28 8019f88: af00 add r7, sp, #0 8019f8a: 4604 mov r4, r0 8019f8c: 4608 mov r0, r1 8019f8e: 4611 mov r1, r2 8019f90: 461a mov r2, r3 8019f92: 4623 mov r3, r4 8019f94: 71fb strb r3, [r7, #7] 8019f96: 4603 mov r3, r0 8019f98: 80bb strh r3, [r7, #4] 8019f9a: 460b mov r3, r1 8019f9c: 807b strh r3, [r7, #2] 8019f9e: 4613 mov r3, r2 8019fa0: 803b strh r3, [r7, #0] uint8_t return_data[3+8]; // 데이터 사이즈 틀린듯? - 3/19 발견 return_data[0]=0xFF; 8019fa2: 23ff movs r3, #255 @ 0xff 8019fa4: 733b strb r3, [r7, #12] return_data[1]=0xFF; 8019fa6: 23ff movs r3, #255 @ 0xff 8019fa8: 737b strb r3, [r7, #13] return_data[2]=sizeof(return_data)-3; //size 8019faa: 2308 movs r3, #8 8019fac: 73bb strb r3, [r7, #14] return_data[3]=com; 8019fae: 79fb ldrb r3, [r7, #7] 8019fb0: 73fb strb r3, [r7, #15] return_data[4]=(uint8_t)data1; //data1 8019fb2: 88bb ldrh r3, [r7, #4] 8019fb4: b2db uxtb r3, r3 8019fb6: 743b strb r3, [r7, #16] return_data[5]=(uint8_t)data2; 8019fb8: 887b ldrh r3, [r7, #2] 8019fba: b2db uxtb r3, r3 8019fbc: 747b strb r3, [r7, #17] return_data[6]=(uint8_t)data3; 8019fbe: 883b ldrh r3, [r7, #0] 8019fc0: b2db uxtb r3, r3 8019fc2: 74bb strb r3, [r7, #18] return_data[7]=(uint8_t)data4; 8019fc4: 8d3b ldrh r3, [r7, #40] @ 0x28 8019fc6: b2db uxtb r3, r3 8019fc8: 74fb strb r3, [r7, #19] return_data[sizeof(return_data)-1]=0; //checksum 8019fca: 2300 movs r3, #0 8019fcc: 75bb strb r3, [r7, #22] for(uint8_t i=0; i return_data[sizeof(return_data)-1]+=return_data[i]; 8019fd4: 7dba ldrb r2, [r7, #22] 8019fd6: 7dfb ldrb r3, [r7, #23] 8019fd8: 3318 adds r3, #24 8019fda: 443b add r3, r7 8019fdc: f813 3c0c ldrb.w r3, [r3, #-12] 8019fe0: 4413 add r3, r2 8019fe2: b2db uxtb r3, r3 8019fe4: 75bb strb r3, [r7, #22] for(uint8_t i=0; i } return_data[sizeof(return_data)-1]=-return_data[sizeof(return_data)-1]; 8019ff2: 7dbb ldrb r3, [r7, #22] 8019ff4: 425b negs r3, r3 8019ff6: b2db uxtb r3, r3 8019ff8: 75bb strb r3, [r7, #22] UART3_PutData(return_data, sizeof(return_data)); 8019ffa: f107 030c add.w r3, r7, #12 8019ffe: 220b movs r2, #11 801a000: 4619 mov r1, r3 801a002: 4804 ldr r0, [pc, #16] @ (801a014 ) 801a004: f005 fc90 bl 801f928 Return_LineEnding(); 801a008: f7ff fe7a bl 8019d00 } 801a00c: bf00 nop 801a00e: 371c adds r7, #28 801a010: 46bd mov sp, r7 801a012: bd90 pop {r4, r7, pc} 801a014: 200053ec .word 0x200053ec 0801a018 : extern float DevReport_Accel[2]; extern uint8_t DevReport_Region[2]; uint8_t DevReport_Active = 0; // 0=v3, 1=dev void Return_Report_Task_dev(void) { 801a018: b580 push {r7, lr} 801a01a: b094 sub sp, #80 @ 0x50 801a01c: af00 add r7, sp, #0 uint8_t d[3+38]; // 41바이트 총 uint16_t cnt = (uint16_t)(Get_Time()/50); 801a01e: f006 f903 bl 8020228 801a022: 4603 mov r3, r0 801a024: 4ac0 ldr r2, [pc, #768] @ (801a328 ) 801a026: fba2 2303 umull r2, r3, r2, r3 801a02a: 091b lsrs r3, r3, #4 801a02c: f8a7 304c strh.w r3, [r7, #76] @ 0x4c int16_t posL = (int16_t)WP_Gym.PositionFine[L]; 801a030: 4bbe ldr r3, [pc, #760] @ (801a32c ) 801a032: 699b ldr r3, [r3, #24] 801a034: f8a7 304a strh.w r3, [r7, #74] @ 0x4a int16_t posR = (int16_t)WP_Gym.PositionFine[R]; 801a038: 4bbc ldr r3, [pc, #752] @ (801a32c ) 801a03a: 69db ldr r3, [r3, #28] 801a03c: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 int16_t spdL = (int16_t)WP_Gym.Speed[L]; 801a040: 4bba ldr r3, [pc, #744] @ (801a32c ) 801a042: edd3 7a15 vldr s15, [r3, #84] @ 0x54 801a046: eefd 7ae7 vcvt.s32.f32 s15, s15 801a04a: ee17 3a90 vmov r3, s15 801a04e: f8a7 3046 strh.w r3, [r7, #70] @ 0x46 int16_t spdR = (int16_t)WP_Gym.Speed[R]; 801a052: 4bb6 ldr r3, [pc, #728] @ (801a32c ) 801a054: edd3 7a16 vldr s15, [r3, #88] @ 0x58 801a058: eefd 7ae7 vcvt.s32.f32 s15, s15 801a05c: ee17 3a90 vmov r3, s15 801a060: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 int16_t accL = (int16_t)DevReport_Accel[L]; 801a064: 4bb2 ldr r3, [pc, #712] @ (801a330 ) 801a066: edd3 7a00 vldr s15, [r3] 801a06a: eefd 7ae7 vcvt.s32.f32 s15, s15 801a06e: ee17 3a90 vmov r3, s15 801a072: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 int16_t accR = (int16_t)DevReport_Accel[R]; 801a076: 4bae ldr r3, [pc, #696] @ (801a330 ) 801a078: edd3 7a01 vldr s15, [r3, #4] 801a07c: eefd 7ae7 vcvt.s32.f32 s15, s15 801a080: ee17 3a90 vmov r3, s15 801a084: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 int16_t icmdL = (int16_t)(Motor1.Cmd.Icmd.q * 1000); 801a088: 4baa ldr r3, [pc, #680] @ (801a334 ) 801a08a: edd3 7a01 vldr s15, [r3, #4] 801a08e: ed9f 7aaa vldr s14, [pc, #680] @ 801a338 801a092: ee67 7a87 vmul.f32 s15, s15, s14 801a096: eefd 7ae7 vcvt.s32.f32 s15, s15 801a09a: ee17 3a90 vmov r3, s15 801a09e: 87fb strh r3, [r7, #62] @ 0x3e int16_t icmdR = (int16_t)(Motor2.Cmd.Icmd.q * 1000); 801a0a0: 4ba6 ldr r3, [pc, #664] @ (801a33c ) 801a0a2: edd3 7a01 vldr s15, [r3, #4] 801a0a6: ed9f 7aa4 vldr s14, [pc, #656] @ 801a338 801a0aa: ee67 7a87 vmul.f32 s15, s15, s14 801a0ae: eefd 7ae7 vcvt.s32.f32 s15, s15 801a0b2: ee17 3a90 vmov r3, s15 801a0b6: 87bb strh r3, [r7, #60] @ 0x3c int16_t ifbL = (int16_t)(Motor1.Fb.Ie.q * 1000); 801a0b8: 4b9e ldr r3, [pc, #632] @ (801a334 ) 801a0ba: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801a0be: ed9f 7a9e vldr s14, [pc, #632] @ 801a338 801a0c2: ee67 7a87 vmul.f32 s15, s15, s14 801a0c6: eefd 7ae7 vcvt.s32.f32 s15, s15 801a0ca: ee17 3a90 vmov r3, s15 801a0ce: 877b strh r3, [r7, #58] @ 0x3a int16_t ifbR = (int16_t)(Motor2.Fb.Ie.q * 1000); 801a0d0: 4b9a ldr r3, [pc, #616] @ (801a33c ) 801a0d2: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801a0d6: ed9f 7a98 vldr s14, [pc, #608] @ 801a338 801a0da: ee67 7a87 vmul.f32 s15, s15, s14 801a0de: eefd 7ae7 vcvt.s32.f32 s15, s15 801a0e2: ee17 3a90 vmov r3, s15 801a0e6: 873b strh r3, [r7, #56] @ 0x38 int16_t fldL = (int16_t)(DevReport_FLoad[L] * 100); 801a0e8: 4b95 ldr r3, [pc, #596] @ (801a340 ) 801a0ea: edd3 7a00 vldr s15, [r3] 801a0ee: ed9f 7a95 vldr s14, [pc, #596] @ 801a344 801a0f2: ee67 7a87 vmul.f32 s15, s15, s14 801a0f6: eefd 7ae7 vcvt.s32.f32 s15, s15 801a0fa: ee17 3a90 vmov r3, s15 801a0fe: 86fb strh r3, [r7, #54] @ 0x36 int16_t fldR = (int16_t)(DevReport_FLoad[R] * 100); 801a100: 4b8f ldr r3, [pc, #572] @ (801a340 ) 801a102: edd3 7a01 vldr s15, [r3, #4] 801a106: ed9f 7a8f vldr s14, [pc, #572] @ 801a344 801a10a: ee67 7a87 vmul.f32 s15, s15, s14 801a10e: eefd 7ae7 vcvt.s32.f32 s15, s15 801a112: ee17 3a90 vmov r3, s15 801a116: 86bb strh r3, [r7, #52] @ 0x34 uint16_t vdc = (uint16_t)(Inv.Ctrl.Vdc * 100); 801a118: 4b8b ldr r3, [pc, #556] @ (801a348 ) 801a11a: edd3 7a00 vldr s15, [r3] 801a11e: ed9f 7a89 vldr s14, [pc, #548] @ 801a344 801a122: ee67 7a87 vmul.f32 s15, s15, s14 801a126: eefc 7ae7 vcvt.u32.f32 s15, s15 801a12a: ee17 3a90 vmov r3, s15 801a12e: 867b strh r3, [r7, #50] @ 0x32 int16_t wsetL = (int16_t)(WP_Gym.WeightSet[L] * 100); 801a130: 4b7e ldr r3, [pc, #504] @ (801a32c ) 801a132: edd3 7a03 vldr s15, [r3, #12] 801a136: ed9f 7a83 vldr s14, [pc, #524] @ 801a344 801a13a: ee67 7a87 vmul.f32 s15, s15, s14 801a13e: eefd 7ae7 vcvt.s32.f32 s15, s15 801a142: ee17 3a90 vmov r3, s15 801a146: 863b strh r3, [r7, #48] @ 0x30 int16_t wsetR = (int16_t)(WP_Gym.WeightSet[R] * 100); 801a148: 4b78 ldr r3, [pc, #480] @ (801a32c ) 801a14a: edd3 7a04 vldr s15, [r3, #16] 801a14e: ed9f 7a7d vldr s14, [pc, #500] @ 801a344 801a152: ee67 7a87 vmul.f32 s15, s15, s14 801a156: eefd 7ae7 vcvt.s32.f32 s15, s15 801a15a: ee17 3a90 vmov r3, s15 801a15e: 85fb strh r3, [r7, #46] @ 0x2e d[0]=0xFF; d[1]=0xFF; 801a160: 23ff movs r3, #255 @ 0xff 801a162: 713b strb r3, [r7, #4] 801a164: 23ff movs r3, #255 @ 0xff 801a166: 717b strb r3, [r7, #5] d[2]=sizeof(d)-3; // size = 38 801a168: 2326 movs r3, #38 @ 0x26 801a16a: 71bb strb r3, [r7, #6] d[3]=START_REPORT; // 같은 cmd 코드 — 패킷 길이로 구분 801a16c: 2341 movs r3, #65 @ 0x41 801a16e: 71fb strb r3, [r7, #7] d[4]=(uint8_t)(cnt>>8); d[5]=(uint8_t)cnt; 801a170: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 801a174: 0a1b lsrs r3, r3, #8 801a176: b29b uxth r3, r3 801a178: b2db uxtb r3, r3 801a17a: 723b strb r3, [r7, #8] 801a17c: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 801a180: b2db uxtb r3, r3 801a182: 727b strb r3, [r7, #9] d[6]=(uint8_t)(posL>>8); d[7]=(uint8_t)posL; 801a184: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 801a188: 121b asrs r3, r3, #8 801a18a: b21b sxth r3, r3 801a18c: b2db uxtb r3, r3 801a18e: 72bb strb r3, [r7, #10] 801a190: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 801a194: b2db uxtb r3, r3 801a196: 72fb strb r3, [r7, #11] d[8]=(uint8_t)(posR>>8); d[9]=(uint8_t)posR; 801a198: f9b7 3048 ldrsh.w r3, [r7, #72] @ 0x48 801a19c: 121b asrs r3, r3, #8 801a19e: b21b sxth r3, r3 801a1a0: b2db uxtb r3, r3 801a1a2: 733b strb r3, [r7, #12] 801a1a4: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48 801a1a8: b2db uxtb r3, r3 801a1aa: 737b strb r3, [r7, #13] d[10]=(uint8_t)(spdL>>8); d[11]=(uint8_t)spdL; 801a1ac: f9b7 3046 ldrsh.w r3, [r7, #70] @ 0x46 801a1b0: 121b asrs r3, r3, #8 801a1b2: b21b sxth r3, r3 801a1b4: b2db uxtb r3, r3 801a1b6: 73bb strb r3, [r7, #14] 801a1b8: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46 801a1bc: b2db uxtb r3, r3 801a1be: 73fb strb r3, [r7, #15] d[12]=(uint8_t)(spdR>>8); d[13]=(uint8_t)spdR; 801a1c0: f9b7 3044 ldrsh.w r3, [r7, #68] @ 0x44 801a1c4: 121b asrs r3, r3, #8 801a1c6: b21b sxth r3, r3 801a1c8: b2db uxtb r3, r3 801a1ca: 743b strb r3, [r7, #16] 801a1cc: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 801a1d0: b2db uxtb r3, r3 801a1d2: 747b strb r3, [r7, #17] d[14]=(uint8_t)(accL>>8); d[15]=(uint8_t)accL; 801a1d4: f9b7 3042 ldrsh.w r3, [r7, #66] @ 0x42 801a1d8: 121b asrs r3, r3, #8 801a1da: b21b sxth r3, r3 801a1dc: b2db uxtb r3, r3 801a1de: 74bb strb r3, [r7, #18] 801a1e0: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 801a1e4: b2db uxtb r3, r3 801a1e6: 74fb strb r3, [r7, #19] d[16]=(uint8_t)(accR>>8); d[17]=(uint8_t)accR; 801a1e8: f9b7 3040 ldrsh.w r3, [r7, #64] @ 0x40 801a1ec: 121b asrs r3, r3, #8 801a1ee: b21b sxth r3, r3 801a1f0: b2db uxtb r3, r3 801a1f2: 753b strb r3, [r7, #20] 801a1f4: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 801a1f8: b2db uxtb r3, r3 801a1fa: 757b strb r3, [r7, #21] d[18]=(uint8_t)(icmdL>>8); d[19]=(uint8_t)icmdL; 801a1fc: f9b7 303e ldrsh.w r3, [r7, #62] @ 0x3e 801a200: 121b asrs r3, r3, #8 801a202: b21b sxth r3, r3 801a204: b2db uxtb r3, r3 801a206: 75bb strb r3, [r7, #22] 801a208: 8ffb ldrh r3, [r7, #62] @ 0x3e 801a20a: b2db uxtb r3, r3 801a20c: 75fb strb r3, [r7, #23] d[20]=(uint8_t)(icmdR>>8); d[21]=(uint8_t)icmdR; 801a20e: f9b7 303c ldrsh.w r3, [r7, #60] @ 0x3c 801a212: 121b asrs r3, r3, #8 801a214: b21b sxth r3, r3 801a216: b2db uxtb r3, r3 801a218: 763b strb r3, [r7, #24] 801a21a: 8fbb ldrh r3, [r7, #60] @ 0x3c 801a21c: b2db uxtb r3, r3 801a21e: 767b strb r3, [r7, #25] d[22]=(uint8_t)(ifbL>>8); d[23]=(uint8_t)ifbL; 801a220: f9b7 303a ldrsh.w r3, [r7, #58] @ 0x3a 801a224: 121b asrs r3, r3, #8 801a226: b21b sxth r3, r3 801a228: b2db uxtb r3, r3 801a22a: 76bb strb r3, [r7, #26] 801a22c: 8f7b ldrh r3, [r7, #58] @ 0x3a 801a22e: b2db uxtb r3, r3 801a230: 76fb strb r3, [r7, #27] d[24]=(uint8_t)(ifbR>>8); d[25]=(uint8_t)ifbR; 801a232: f9b7 3038 ldrsh.w r3, [r7, #56] @ 0x38 801a236: 121b asrs r3, r3, #8 801a238: b21b sxth r3, r3 801a23a: b2db uxtb r3, r3 801a23c: 773b strb r3, [r7, #28] 801a23e: 8f3b ldrh r3, [r7, #56] @ 0x38 801a240: b2db uxtb r3, r3 801a242: 777b strb r3, [r7, #29] d[26]=(uint8_t)(fldL>>8); d[27]=(uint8_t)fldL; 801a244: f9b7 3036 ldrsh.w r3, [r7, #54] @ 0x36 801a248: 121b asrs r3, r3, #8 801a24a: b21b sxth r3, r3 801a24c: b2db uxtb r3, r3 801a24e: 77bb strb r3, [r7, #30] 801a250: 8efb ldrh r3, [r7, #54] @ 0x36 801a252: b2db uxtb r3, r3 801a254: 77fb strb r3, [r7, #31] d[28]=(uint8_t)(fldR>>8); d[29]=(uint8_t)fldR; 801a256: f9b7 3034 ldrsh.w r3, [r7, #52] @ 0x34 801a25a: 121b asrs r3, r3, #8 801a25c: b21b sxth r3, r3 801a25e: b2db uxtb r3, r3 801a260: f887 3020 strb.w r3, [r7, #32] 801a264: 8ebb ldrh r3, [r7, #52] @ 0x34 801a266: b2db uxtb r3, r3 801a268: f887 3021 strb.w r3, [r7, #33] @ 0x21 d[30]=(uint8_t)(vdc>>8); d[31]=(uint8_t)vdc; 801a26c: 8e7b ldrh r3, [r7, #50] @ 0x32 801a26e: 0a1b lsrs r3, r3, #8 801a270: b29b uxth r3, r3 801a272: b2db uxtb r3, r3 801a274: f887 3022 strb.w r3, [r7, #34] @ 0x22 801a278: 8e7b ldrh r3, [r7, #50] @ 0x32 801a27a: b2db uxtb r3, r3 801a27c: f887 3023 strb.w r3, [r7, #35] @ 0x23 d[32]=WP_Gym.WeightMode[L]; d[33]=WP_Gym.WeightMode[R]; 801a280: 4b2a ldr r3, [pc, #168] @ (801a32c ) 801a282: 781b ldrb r3, [r3, #0] 801a284: f887 3024 strb.w r3, [r7, #36] @ 0x24 801a288: 4b28 ldr r3, [pc, #160] @ (801a32c ) 801a28a: 785b ldrb r3, [r3, #1] 801a28c: f887 3025 strb.w r3, [r7, #37] @ 0x25 d[34]=DevReport_Region[L]; d[35]=DevReport_Region[R]; 801a290: 4b2e ldr r3, [pc, #184] @ (801a34c ) 801a292: 781b ldrb r3, [r3, #0] 801a294: f887 3026 strb.w r3, [r7, #38] @ 0x26 801a298: 4b2c ldr r3, [pc, #176] @ (801a34c ) 801a29a: 785b ldrb r3, [r3, #1] 801a29c: f887 3027 strb.w r3, [r7, #39] @ 0x27 d[36]=(uint8_t)(wsetL>>8); d[37]=(uint8_t)wsetL; 801a2a0: f9b7 3030 ldrsh.w r3, [r7, #48] @ 0x30 801a2a4: 121b asrs r3, r3, #8 801a2a6: b21b sxth r3, r3 801a2a8: b2db uxtb r3, r3 801a2aa: f887 3028 strb.w r3, [r7, #40] @ 0x28 801a2ae: 8e3b ldrh r3, [r7, #48] @ 0x30 801a2b0: b2db uxtb r3, r3 801a2b2: f887 3029 strb.w r3, [r7, #41] @ 0x29 d[38]=(uint8_t)(wsetR>>8); d[39]=(uint8_t)wsetR; 801a2b6: f9b7 302e ldrsh.w r3, [r7, #46] @ 0x2e 801a2ba: 121b asrs r3, r3, #8 801a2bc: b21b sxth r3, r3 801a2be: b2db uxtb r3, r3 801a2c0: f887 302a strb.w r3, [r7, #42] @ 0x2a 801a2c4: 8dfb ldrh r3, [r7, #46] @ 0x2e 801a2c6: b2db uxtb r3, r3 801a2c8: f887 302b strb.w r3, [r7, #43] @ 0x2b d[40]=0; 801a2cc: 2300 movs r3, #0 801a2ce: f887 302c strb.w r3, [r7, #44] @ 0x2c for(uint8_t i=0; i 801a2da: f897 202c ldrb.w r2, [r7, #44] @ 0x2c 801a2de: f897 304f ldrb.w r3, [r7, #79] @ 0x4f 801a2e2: 3350 adds r3, #80 @ 0x50 801a2e4: 443b add r3, r7 801a2e6: f813 3c4c ldrb.w r3, [r3, #-76] 801a2ea: 4413 add r3, r2 801a2ec: b2db uxtb r3, r3 801a2ee: f887 302c strb.w r3, [r7, #44] @ 0x2c 801a2f2: f897 304f ldrb.w r3, [r7, #79] @ 0x4f 801a2f6: 3301 adds r3, #1 801a2f8: f887 304f strb.w r3, [r7, #79] @ 0x4f 801a2fc: f897 304f ldrb.w r3, [r7, #79] @ 0x4f 801a300: 2b27 cmp r3, #39 @ 0x27 801a302: d9ea bls.n 801a2da d[40]=-d[40]; 801a304: f897 302c ldrb.w r3, [r7, #44] @ 0x2c 801a308: 425b negs r3, r3 801a30a: b2db uxtb r3, r3 801a30c: f887 302c strb.w r3, [r7, #44] @ 0x2c UART3_PutData(d, sizeof(d)); 801a310: 1d3b adds r3, r7, #4 801a312: 2229 movs r2, #41 @ 0x29 801a314: 4619 mov r1, r3 801a316: 480e ldr r0, [pc, #56] @ (801a350 ) 801a318: f005 fb06 bl 801f928 Return_LineEnding(); 801a31c: f7ff fcf0 bl 8019d00 } 801a320: bf00 nop 801a322: 3750 adds r7, #80 @ 0x50 801a324: 46bd mov sp, r7 801a326: bd80 pop {r7, pc} 801a328: 51eb851f .word 0x51eb851f 801a32c: 20000148 .word 0x20000148 801a330: 20000360 .word 0x20000360 801a334: 20000574 .word 0x20000574 801a338: 447a0000 .word 0x447a0000 801a33c: 20000704 .word 0x20000704 801a340: 20000358 .word 0x20000358 801a344: 42c80000 .word 0x42c80000 801a348: 20000400 .word 0x20000400 801a34c: 20000370 .word 0x20000370 801a350: 200053ec .word 0x200053ec 0801a354 : int check_ReportV3; void Return_Report_Task_v3(void) { 801a354: b580 push {r7, lr} 801a356: b088 sub sp, #32 801a358: af00 add r7, sp, #0 // UART3_Puts("Reportv2\r\n"); check_ReportV3++; 801a35a: 4b64 ldr r3, [pc, #400] @ (801a4ec ) 801a35c: 681b ldr r3, [r3, #0] 801a35e: 3301 adds r3, #1 801a360: 4a62 ldr r2, [pc, #392] @ (801a4ec ) 801a362: 6013 str r3, [r2, #0] // Debug Report는 50ms_1 슬롯으로 분리됨 (20Hz, 10ms offset) uint8_t return_data[3+14]; uint16_t report_cnt = (uint16_t)(Get_Time()/50); //50msec 801a364: f005 ff60 bl 8020228 801a368: 4603 mov r3, r0 801a36a: 4a61 ldr r2, [pc, #388] @ (801a4f0 ) 801a36c: fba2 2303 umull r2, r3, r2, r3 801a370: 091b lsrs r3, r3, #4 801a372: 83bb strh r3, [r7, #28] // Return_2x2byte(GET_POSITION, (uint16_t)WP_GymManager.CurrentPosition_L, (uint16_t)WP_GymManager.CurrentPosition_R); return_data[0]=0xFF; 801a374: 23ff movs r3, #255 @ 0xff 801a376: 723b strb r3, [r7, #8] return_data[1]=0xFF; 801a378: 23ff movs r3, #255 @ 0xff 801a37a: 727b strb r3, [r7, #9] return_data[2]=sizeof(return_data)-3; //size 801a37c: 230e movs r3, #14 801a37e: 72bb strb r3, [r7, #10] return_data[3]=START_REPORT; //res 801a380: 2341 movs r3, #65 @ 0x41 801a382: 72fb strb r3, [r7, #11] return_data[4]=(uint8_t) (report_cnt>>8); 801a384: 8bbb ldrh r3, [r7, #28] 801a386: 0a1b lsrs r3, r3, #8 801a388: b29b uxth r3, r3 801a38a: b2db uxtb r3, r3 801a38c: 733b strb r3, [r7, #12] return_data[5]=(uint8_t) report_cnt; 801a38e: 8bbb ldrh r3, [r7, #28] 801a390: b2db uxtb r3, r3 801a392: 737b strb r3, [r7, #13] return_data[6]=(uint8_t) ((uint16_t)(WP_Gym.PositionFine[L]) >>8); // PositionFine : 0.05mm 단위 801a394: 4b57 ldr r3, [pc, #348] @ (801a4f4 ) 801a396: 699b ldr r3, [r3, #24] 801a398: b29b uxth r3, r3 801a39a: 0a1b lsrs r3, r3, #8 801a39c: b29b uxth r3, r3 801a39e: b2db uxtb r3, r3 801a3a0: 73bb strb r3, [r7, #14] return_data[7]=(uint8_t) ((uint16_t) (WP_Gym.PositionFine[L])); 801a3a2: 4b54 ldr r3, [pc, #336] @ (801a4f4 ) 801a3a4: 699b ldr r3, [r3, #24] 801a3a6: b2db uxtb r3, r3 801a3a8: 73fb strb r3, [r7, #15] return_data[8]=(uint8_t) ((uint16_t)(WP_Gym.PositionFine[R]) >>8); 801a3aa: 4b52 ldr r3, [pc, #328] @ (801a4f4 ) 801a3ac: 69db ldr r3, [r3, #28] 801a3ae: b29b uxth r3, r3 801a3b0: 0a1b lsrs r3, r3, #8 801a3b2: b29b uxth r3, r3 801a3b4: b2db uxtb r3, r3 801a3b6: 743b strb r3, [r7, #16] return_data[9]=(uint8_t) ((uint16_t) (WP_Gym.PositionFine[R])); 801a3b8: 4b4e ldr r3, [pc, #312] @ (801a4f4 ) 801a3ba: 69db ldr r3, [r3, #28] 801a3bc: b2db uxtb r3, r3 801a3be: 747b strb r3, [r7, #17] // return_data[6]=(uint8_t) ((uint16_t) (WP_Gym.Position[L] *0.1) >>8); // 원래 mm 단위인데, App에 cm 단위로 보내주는 중 // return_data[7]=(uint8_t) (WP_Gym.Position[L] *0.1); // return_data[8]=(uint8_t) ((uint16_t) (WP_Gym.Position[R] *0.1) >>8); // return_data[9]=(uint8_t) (WP_Gym.Position[R] *0.1); //(아래) 원래 A 단위인데, kg/A 환산하고, 0.01단위로 보내주는 중 return_data[10]=(uint8_t) ((uint16_t) (Motor1.Cmd.Icmd.q * WP_Machine.Scale_Current2Weight *100) >>8); 801a3c0: 4b4d ldr r3, [pc, #308] @ (801a4f8 ) 801a3c2: ed93 7a01 vldr s14, [r3, #4] 801a3c6: 4b4d ldr r3, [pc, #308] @ (801a4fc ) 801a3c8: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801a3cc: ee67 7a27 vmul.f32 s15, s14, s15 801a3d0: ed9f 7a4b vldr s14, [pc, #300] @ 801a500 801a3d4: ee67 7a87 vmul.f32 s15, s15, s14 801a3d8: eefc 7ae7 vcvt.u32.f32 s15, s15 801a3dc: ee17 3a90 vmov r3, s15 801a3e0: b29b uxth r3, r3 801a3e2: 0a1b lsrs r3, r3, #8 801a3e4: b29b uxth r3, r3 801a3e6: b2db uxtb r3, r3 801a3e8: 74bb strb r3, [r7, #18] return_data[11]=(uint8_t) (Motor1.Cmd.Icmd.q * WP_Machine.Scale_Current2Weight *100); 801a3ea: 4b43 ldr r3, [pc, #268] @ (801a4f8 ) 801a3ec: ed93 7a01 vldr s14, [r3, #4] 801a3f0: 4b42 ldr r3, [pc, #264] @ (801a4fc ) 801a3f2: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801a3f6: ee67 7a27 vmul.f32 s15, s14, s15 801a3fa: ed9f 7a41 vldr s14, [pc, #260] @ 801a500 801a3fe: ee67 7a87 vmul.f32 s15, s15, s14 801a402: eefc 7ae7 vcvt.u32.f32 s15, s15 801a406: edc7 7a01 vstr s15, [r7, #4] 801a40a: 793b ldrb r3, [r7, #4] 801a40c: b2db uxtb r3, r3 801a40e: 74fb strb r3, [r7, #19] return_data[12]=(uint8_t) ((uint16_t) (Motor2.Cmd.Icmd.q * WP_Machine.Scale_Current2Weight *100) >>8); 801a410: 4b3c ldr r3, [pc, #240] @ (801a504 ) 801a412: ed93 7a01 vldr s14, [r3, #4] 801a416: 4b39 ldr r3, [pc, #228] @ (801a4fc ) 801a418: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801a41c: ee67 7a27 vmul.f32 s15, s14, s15 801a420: ed9f 7a37 vldr s14, [pc, #220] @ 801a500 801a424: ee67 7a87 vmul.f32 s15, s15, s14 801a428: eefc 7ae7 vcvt.u32.f32 s15, s15 801a42c: ee17 3a90 vmov r3, s15 801a430: b29b uxth r3, r3 801a432: 0a1b lsrs r3, r3, #8 801a434: b29b uxth r3, r3 801a436: b2db uxtb r3, r3 801a438: 753b strb r3, [r7, #20] return_data[13]=(uint8_t) (Motor2.Cmd.Icmd.q * WP_Machine.Scale_Current2Weight *100); 801a43a: 4b32 ldr r3, [pc, #200] @ (801a504 ) 801a43c: ed93 7a01 vldr s14, [r3, #4] 801a440: 4b2e ldr r3, [pc, #184] @ (801a4fc ) 801a442: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801a446: ee67 7a27 vmul.f32 s15, s14, s15 801a44a: ed9f 7a2d vldr s14, [pc, #180] @ 801a500 801a44e: ee67 7a87 vmul.f32 s15, s15, s14 801a452: eefc 7ae7 vcvt.u32.f32 s15, s15 801a456: edc7 7a01 vstr s15, [r7, #4] 801a45a: 793b ldrb r3, [r7, #4] 801a45c: b2db uxtb r3, r3 801a45e: 757b strb r3, [r7, #21] return_data[14]=(uint8_t) ((uint16_t) (Inv.Ctrl.Vdc * 100) >>8);; 801a460: 4b29 ldr r3, [pc, #164] @ (801a508 ) 801a462: edd3 7a00 vldr s15, [r3] 801a466: ed9f 7a26 vldr s14, [pc, #152] @ 801a500 801a46a: ee67 7a87 vmul.f32 s15, s15, s14 801a46e: eefc 7ae7 vcvt.u32.f32 s15, s15 801a472: ee17 3a90 vmov r3, s15 801a476: b29b uxth r3, r3 801a478: 0a1b lsrs r3, r3, #8 801a47a: b29b uxth r3, r3 801a47c: b2db uxtb r3, r3 801a47e: 75bb strb r3, [r7, #22] return_data[15]=(uint8_t) (Inv.Ctrl.Vdc * 100);; 801a480: 4b21 ldr r3, [pc, #132] @ (801a508 ) 801a482: edd3 7a00 vldr s15, [r3] 801a486: ed9f 7a1e vldr s14, [pc, #120] @ 801a500 801a48a: ee67 7a87 vmul.f32 s15, s15, s14 801a48e: eefc 7ae7 vcvt.u32.f32 s15, s15 801a492: edc7 7a01 vstr s15, [r7, #4] 801a496: 793b ldrb r3, [r7, #4] 801a498: b2db uxtb r3, r3 801a49a: 75fb strb r3, [r7, #23] return_data[16]=0; 801a49c: 2300 movs r3, #0 801a49e: 763b strb r3, [r7, #24] for(uint8_t i=0; i return_data[16]+=return_data[i]; 801a4a6: 7e3a ldrb r2, [r7, #24] 801a4a8: 7ffb ldrb r3, [r7, #31] 801a4aa: 3318 adds r3, #24 801a4ac: f107 0108 add.w r1, r7, #8 801a4b0: 440b add r3, r1 801a4b2: f813 3c18 ldrb.w r3, [r3, #-24] 801a4b6: 4413 add r3, r2 801a4b8: b2db uxtb r3, r3 801a4ba: 763b strb r3, [r7, #24] for(uint8_t i=0; i } return_data[16]=-return_data[16]; 801a4c8: 7e3b ldrb r3, [r7, #24] 801a4ca: 425b negs r3, r3 801a4cc: b2db uxtb r3, r3 801a4ce: 763b strb r3, [r7, #24] UART3_PutData(return_data, sizeof(return_data)); 801a4d0: f107 0308 add.w r3, r7, #8 801a4d4: 2211 movs r2, #17 801a4d6: 4619 mov r1, r3 801a4d8: 480c ldr r0, [pc, #48] @ (801a50c ) 801a4da: f005 fa25 bl 801f928 Return_LineEnding(); 801a4de: f7ff fc0f bl 8019d00 } 801a4e2: bf00 nop 801a4e4: 3720 adds r7, #32 801a4e6: 46bd mov sp, r7 801a4e8: bd80 pop {r7, pc} 801a4ea: bf00 nop 801a4ec: 20000c1c .word 0x20000c1c 801a4f0: 51eb851f .word 0x51eb851f 801a4f4: 20000148 .word 0x20000148 801a4f8: 20000574 .word 0x20000574 801a4fc: 20000110 .word 0x20000110 801a500: 42c80000 .word 0x42c80000 801a504: 20000704 .word 0x20000704 801a508: 20000400 .word 0x20000400 801a50c: 200053ec .word 0x200053ec 0801a510 : uint16_t Vdc100; void Report_Vdc(void) { 801a510: b580 push {r7, lr} 801a512: af00 add r7, sp, #0 Debug_UART3_printf("Voltage: "); 801a514: 4813 ldr r0, [pc, #76] @ (801a564 ) 801a516: f005 fc4d bl 801fdb4 Debug_UART3_printf(Float2String(Inv.Ctrl.Vdc,2)); 801a51a: 4b13 ldr r3, [pc, #76] @ (801a568 ) 801a51c: edd3 7a00 vldr s15, [r3] 801a520: 2002 movs r0, #2 801a522: eeb0 0a67 vmov.f32 s0, s15 801a526: f005 fd3f bl 801ffa8 801a52a: 4603 mov r3, r0 801a52c: 4618 mov r0, r3 801a52e: f005 fc41 bl 801fdb4 Debug_UART3_printf(" [Vdc]\r\n"); 801a532: 480e ldr r0, [pc, #56] @ (801a56c ) 801a534: f005 fc3e bl 801fdb4 Vdc100 = Inv.Ctrl.Vdc * 100; 801a538: 4b0b ldr r3, [pc, #44] @ (801a568 ) 801a53a: edd3 7a00 vldr s15, [r3] 801a53e: ed9f 7a0c vldr s14, [pc, #48] @ 801a570 801a542: ee67 7a87 vmul.f32 s15, s15, s14 801a546: eefc 7ae7 vcvt.u32.f32 s15, s15 801a54a: ee17 3a90 vmov r3, s15 801a54e: b29a uxth r2, r3 801a550: 4b08 ldr r3, [pc, #32] @ (801a574 ) 801a552: 801a strh r2, [r3, #0] // Vdc100 = 50 * 100; // test kit 환경에서 전압값 우회 (25.07.01) Return_2byte(GET_VOLTAGE, Vdc100); 801a554: 4b07 ldr r3, [pc, #28] @ (801a574 ) 801a556: 881b ldrh r3, [r3, #0] 801a558: 4619 mov r1, r3 801a55a: 2005 movs r0, #5 801a55c: f7ff fc50 bl 8019e00 } 801a560: bf00 nop 801a562: bd80 pop {r7, pc} 801a564: 0802a60c .word 0x0802a60c 801a568: 20000400 .word 0x20000400 801a56c: 0802a618 .word 0x0802a618 801a570: 42c80000 .word 0x42c80000 801a574: 20000c20 .word 0x20000c20 0801a578 : //--------------------- void Start_Report(void) { 801a578: b580 push {r7, lr} 801a57a: af00 add r7, sp, #0 if (DevReport_Active) { 801a57c: 4b07 ldr r3, [pc, #28] @ (801a59c ) 801a57e: 781b ldrb r3, [r3, #0] 801a580: 2b00 cmp r3, #0 801a582: d003 beq.n 801a58c Task_Start_50ms(Return_Report_Task_dev); 801a584: 4806 ldr r0, [pc, #24] @ (801a5a0 ) 801a586: f003 fc27 bl 801ddd8 801a58a: e002 b.n 801a592 } else { Task_Start_50ms(Return_Report_Task_v3); 801a58c: 4805 ldr r0, [pc, #20] @ (801a5a4 ) 801a58e: f003 fc23 bl 801ddd8 } Task_Start_50ms_1(Return_Debug_Report); // Debug Report 20Hz (50ms_1 슬롯) 801a592: 4805 ldr r0, [pc, #20] @ (801a5a8 ) 801a594: f003 fc30 bl 801ddf8 } 801a598: bf00 nop 801a59a: bd80 pop {r7, pc} 801a59c: 20000c19 .word 0x20000c19 801a5a0: 0801a019 .word 0x0801a019 801a5a4: 0801a355 .word 0x0801a355 801a5a8: 08011321 .word 0x08011321 0801a5ac : void Stop_Report(void) { 801a5ac: b580 push {r7, lr} 801a5ae: af00 add r7, sp, #0 //Task_Stop_100ms(); Task_Stop_50ms(); 801a5b0: f003 fc5e bl 801de70 Task_Stop_50ms_1(); 801a5b4: f003 fc74 bl 801dea0 } 801a5b8: bf00 nop 801a5ba: bd80 pop {r7, pc} 0801a5bc : int Status_VoltRprt; void VoltRprtToggle(void) { 801a5bc: b580 push {r7, lr} 801a5be: af00 add r7, sp, #0 switch (Status_VoltRprt){ 801a5c0: 4b0c ldr r3, [pc, #48] @ (801a5f4 ) 801a5c2: 681b ldr r3, [r3, #0] 801a5c4: 2b00 cmp r3, #0 801a5c6: d00a beq.n 801a5de 801a5c8: 2b01 cmp r3, #1 801a5ca: d111 bne.n 801a5f0 case ON: UART3_Puts("\r\n Volt Report Stop \r\n"); 801a5cc: 2200 movs r2, #0 801a5ce: 490a ldr r1, [pc, #40] @ (801a5f8 ) 801a5d0: 480a ldr r0, [pc, #40] @ (801a5fc ) 801a5d2: f005 f9a9 bl 801f928 Status_VoltRprt = OFF; 801a5d6: 4b07 ldr r3, [pc, #28] @ (801a5f4 ) 801a5d8: 2200 movs r2, #0 801a5da: 601a str r2, [r3, #0] break; 801a5dc: e008 b.n 801a5f0 case OFF: UART3_Puts("\r\n Volt Report Start \r\n"); 801a5de: 2200 movs r2, #0 801a5e0: 4907 ldr r1, [pc, #28] @ (801a600 ) 801a5e2: 4806 ldr r0, [pc, #24] @ (801a5fc ) 801a5e4: f005 f9a0 bl 801f928 Status_VoltRprt = ON; 801a5e8: 4b02 ldr r3, [pc, #8] @ (801a5f4 ) 801a5ea: 2201 movs r2, #1 801a5ec: 601a str r2, [r3, #0] break; 801a5ee: bf00 nop } } 801a5f0: bf00 nop 801a5f2: bd80 pop {r7, pc} 801a5f4: 20000c24 .word 0x20000c24 801a5f8: 0802a624 .word 0x0802a624 801a5fc: 200053ec .word 0x200053ec 801a600: 0802a63c .word 0x0802a63c 0801a604 : void Save_Data_to_Flash(void) { 801a604: b580 push {r7, lr} 801a606: af00 add r7, sp, #0 Flash_Write(FLASH_ORIGIN_SECTOR); 801a608: 2002 movs r0, #2 801a60a: f7fe f947 bl 801889c Flash_Write(FLASH_ORIGIN_SECTOR); 801a60e: 2002 movs r0, #2 801a610: f7fe f944 bl 801889c } 801a614: bf00 nop 801a616: bd80 pop {r7, pc} 0801a618 : void Factory_Reset(void) { 801a618: b580 push {r7, lr} 801a61a: b084 sub sp, #16 801a61c: af00 add r7, sp, #0 uint8_t i; uint32_t *ram_data,*source_data; ram_data=(uint32_t*)&RAM_Data; 801a61e: 4b0d ldr r3, [pc, #52] @ (801a654 ) 801a620: 60bb str r3, [r7, #8] source_data=(uint32_t*)&Defualt_RAM_Data; 801a622: 4b0d ldr r3, [pc, #52] @ (801a658 ) 801a624: 607b str r3, [r7, #4] for(i=0; i *ram_data++=*source_data++; 801a62c: 687a ldr r2, [r7, #4] 801a62e: 1d13 adds r3, r2, #4 801a630: 607b str r3, [r7, #4] 801a632: 68bb ldr r3, [r7, #8] 801a634: 1d19 adds r1, r3, #4 801a636: 60b9 str r1, [r7, #8] 801a638: 6812 ldr r2, [r2, #0] 801a63a: 601a str r2, [r3, #0] for(i=0; i } Save_Data_to_Flash(); 801a648: f7ff ffdc bl 801a604 } 801a64c: bf00 nop 801a64e: 3710 adds r7, #16 801a650: 46bd mov sp, r7 801a652: bd80 pop {r7, pc} 801a654: 20000a98 .word 0x20000a98 801a658: 0802d150 .word 0x0802d150 0801a65c : void System_Reboot(void) { 801a65c: b580 push {r7, lr} 801a65e: b082 sub sp, #8 801a660: af00 add r7, sp, #0 Save_Data_to_Flash(); 801a662: f7ff ffcf bl 801a604 Delay_sec(0.1); 801a666: 2063 movs r0, #99 @ 0x63 801a668: f005 fdea bl 8020240 ////////////////////////////////////////////////////////////////////// DEBUG_printf("REBOOT MODE is ON\r\n"); 801a66c: 480c ldr r0, [pc, #48] @ (801a6a0 ) 801a66e: f005 fbcf bl 801fe10 for(uint8_t i=0; i<5; i++) { 801a672: 2300 movs r3, #0 801a674: 71fb strb r3, [r7, #7] 801a676: e009 b.n 801a68c HAL_GPIO_TogglePin(GPIOF, GPIO_PIN_2); 801a678: 2104 movs r1, #4 801a67a: 480a ldr r0, [pc, #40] @ (801a6a4 ) 801a67c: f008 fac5 bl 8022c0a HAL_Delay(200); 801a680: 20c8 movs r0, #200 @ 0xc8 801a682: f005 fddd bl 8020240 for(uint8_t i=0; i<5; i++) { 801a686: 79fb ldrb r3, [r7, #7] 801a688: 3301 adds r3, #1 801a68a: 71fb strb r3, [r7, #7] 801a68c: 79fb ldrb r3, [r7, #7] 801a68e: 2b04 cmp r3, #4 801a690: d9f2 bls.n 801a678 } ////////////////////////////////////////////////////////////////////// HAL_NVIC_SystemReset(); 801a692: f006 ffb4 bl 80215fe } 801a696: bf00 nop 801a698: 3708 adds r7, #8 801a69a: 46bd mov sp, r7 801a69c: bd80 pop {r7, pc} 801a69e: bf00 nop 801a6a0: 0802a654 .word 0x0802a654 801a6a4: 40021400 .word 0x40021400 0801a6a8 : } } ///somebp 2024.02.02 void System_Sleep(void) { 801a6a8: b580 push {r7, lr} 801a6aa: b088 sub sp, #32 801a6ac: af04 add r7, sp, #16 Save_Data_to_Flash(); 801a6ae: f7ff ffa9 bl 801a604 ////////////////////////////////////////////////////////////////////// DEBUG_printf("SLEEP MODE is ON\r\n"); 801a6b2: 4854 ldr r0, [pc, #336] @ (801a804 ) 801a6b4: f005 fbac bl 801fe10 LED_Send_All(60, 0,0,0, 0,0,0); //Addressable LED turn OFF while Sleeping 801a6b8: 2300 movs r3, #0 801a6ba: 9302 str r3, [sp, #8] 801a6bc: 2300 movs r3, #0 801a6be: 9301 str r3, [sp, #4] 801a6c0: 2300 movs r3, #0 801a6c2: 9300 str r3, [sp, #0] 801a6c4: 2300 movs r3, #0 801a6c6: 2200 movs r2, #0 801a6c8: 2100 movs r1, #0 801a6ca: 207c movs r0, #124 @ 0x7c 801a6cc: f7fe fc6a bl 8018fa4 //LED_Send_All(60, 1,0,0, 0,0,0); //Addressable LED turn RED while Sleeping Motor1En(WP_Gate_DIS); //Disable Motor Gate Driver 801a6d0: 2101 movs r1, #1 801a6d2: 2001 movs r0, #1 801a6d4: f7fe fa2e bl 8018b34 Motor2En(WP_Gate_DIS); // 801a6d8: 2101 movs r1, #1 801a6da: 2002 movs r0, #2 801a6dc: f7fe fa2a bl 8018b34 for(int i=0; i<6; i++) { 801a6e0: 2300 movs r3, #0 801a6e2: 60fb str r3, [r7, #12] 801a6e4: e00b b.n 801a6fe digitalWrite(56, GPIO_PIN_TOGGLE); //LED1 801a6e6: f04f 31ff mov.w r1, #4294967295 801a6ea: 2038 movs r0, #56 @ 0x38 801a6ec: f7fe fa22 bl 8018b34 Delay_sec(0.3); 801a6f0: f240 102b movw r0, #299 @ 0x12b 801a6f4: f005 fda4 bl 8020240 for(int i=0; i<6; i++) { 801a6f8: 68fb ldr r3, [r7, #12] 801a6fa: 3301 adds r3, #1 801a6fc: 60fb str r3, [r7, #12] 801a6fe: 68fb ldr r3, [r7, #12] 801a700: 2b05 cmp r3, #5 801a702: ddf0 ble.n 801a6e6 } digitalWrite(56, GPIO_PIN_SET); //Off while Sleeping 801a704: 2101 movs r1, #1 801a706: 2038 movs r0, #56 @ 0x38 801a708: f7fe fa14 bl 8018b34 //digitalWrite(56, GPIO_PIN_RESET); //On while Sleeping // // To Do // ////////////////////////////////////////////////////////////////////// Delay_sec(0.1); 801a70c: 2063 movs r0, #99 @ 0x63 801a70e: f005 fd97 bl 8020240 HAL_SuspendTick(); 801a712: f005 fdb9 bl 8020288 HAL_ADC_DeInit(&hadc1); 801a716: 483c ldr r0, [pc, #240] @ (801a808 ) 801a718: f005 fe19 bl 802034e HAL_ADC_DeInit(&hadc2); 801a71c: 483b ldr r0, [pc, #236] @ (801a80c ) 801a71e: f005 fe16 bl 802034e HAL_ADC_DeInit(&hadc3); 801a722: 483b ldr r0, [pc, #236] @ (801a810 ) 801a724: f005 fe13 bl 802034e HAL_ADC_MspDeInit(&hadc1); 801a728: 4837 ldr r0, [pc, #220] @ (801a808 ) 801a72a: f7fd fd41 bl 80181b0 HAL_ADC_MspDeInit(&hadc2); 801a72e: 4837 ldr r0, [pc, #220] @ (801a80c ) 801a730: f7fd fd3e bl 80181b0 HAL_ADC_MspDeInit(&hadc3); 801a734: 4836 ldr r0, [pc, #216] @ (801a810 ) 801a736: f7fd fd3b bl 80181b0 HAL_DAC_DeInit(&hdac); 801a73a: 4836 ldr r0, [pc, #216] @ (801a814 ) 801a73c: f006 ff97 bl 802166e HAL_DAC_MspDeInit(&hdac); 801a740: 4834 ldr r0, [pc, #208] @ (801a814 ) 801a742: f7fd ffdd bl 8018700 HAL_TIM_PWM_DeInit(&htim1); 801a746: 4834 ldr r0, [pc, #208] @ (801a818 ) 801a748: f00b fbbc bl 8025ec4 HAL_TIM_PWM_DeInit(&htim8); 801a74c: 4833 ldr r0, [pc, #204] @ (801a81c ) 801a74e: f00b fbb9 bl 8025ec4 HAL_TIM_PWM_DeInit(&htim5); 801a752: 4833 ldr r0, [pc, #204] @ (801a820 ) 801a754: f00b fbb6 bl 8025ec4 HAL_TIM_PWM_DeInit(&htim9); 801a758: 4832 ldr r0, [pc, #200] @ (801a824 ) 801a75a: f00b fbb3 bl 8025ec4 HAL_TIM_Encoder_DeInit(&htim2); 801a75e: 4832 ldr r0, [pc, #200] @ (801a828 ) 801a760: f00b fe88 bl 8026474 HAL_TIM_Encoder_DeInit(&htim4); 801a764: 4831 ldr r0, [pc, #196] @ (801a82c ) 801a766: f00b fe85 bl 8026474 HAL_TIM_Base_MspDeInit(&htim1); 801a76a: 482b ldr r0, [pc, #172] @ (801a818 ) 801a76c: f004 fc28 bl 801efc0 HAL_TIM_Base_MspDeInit(&htim8); 801a770: 482a ldr r0, [pc, #168] @ (801a81c ) 801a772: f004 fc25 bl 801efc0 HAL_TIM_PWM_MspDeInit(&htim5); 801a776: 482a ldr r0, [pc, #168] @ (801a820 ) 801a778: f004 fcb2 bl 801f0e0 HAL_TIM_PWM_MspDeInit(&htim9); 801a77c: 4829 ldr r0, [pc, #164] @ (801a824 ) 801a77e: f004 fcaf bl 801f0e0 HAL_TIM_Encoder_MspDeInit(&htim2); 801a782: 4829 ldr r0, [pc, #164] @ (801a828 ) 801a784: f004 fc74 bl 801f070 HAL_TIM_Encoder_MspDeInit(&htim4); 801a788: 4828 ldr r0, [pc, #160] @ (801a82c ) 801a78a: f004 fc71 bl 801f070 HAL_UART_DeInit(&huart2); 801a78e: 4828 ldr r0, [pc, #160] @ (801a830 ) 801a790: f00c ff2a bl 80275e8 HAL_UART_MspDeInit(&huart2); 801a794: 4826 ldr r0, [pc, #152] @ (801a830 ) 801a796: f005 f891 bl 801f8bc __HAL_RCC_PWR_CLK_ENABLE(); 801a79a: 2300 movs r3, #0 801a79c: 607b str r3, [r7, #4] 801a79e: 4b25 ldr r3, [pc, #148] @ (801a834 ) 801a7a0: 6c1b ldr r3, [r3, #64] @ 0x40 801a7a2: 4a24 ldr r2, [pc, #144] @ (801a834 ) 801a7a4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 801a7a8: 6413 str r3, [r2, #64] @ 0x40 801a7aa: 4b22 ldr r3, [pc, #136] @ (801a834 ) 801a7ac: 6c1b ldr r3, [r3, #64] @ 0x40 801a7ae: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801a7b2: 607b str r3, [r7, #4] 801a7b4: 687b ldr r3, [r7, #4] HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); 801a7b6: 2101 movs r1, #1 801a7b8: 2000 movs r0, #0 801a7ba: f00a f851 bl 8024860 // Wake-up state HAL_ResumeTick(); 801a7be: f005 fd73 bl 80202a8 if(__HAL_UART_GET_IT_SOURCE(&huart3,UART_IT_RXNE)) 801a7c2: 4b1d ldr r3, [pc, #116] @ (801a838 ) 801a7c4: 681b ldr r3, [r3, #0] 801a7c6: 68db ldr r3, [r3, #12] 801a7c8: f003 0320 and.w r3, r3, #32 801a7cc: 2b00 cmp r3, #0 801a7ce: d013 beq.n 801a7f8 { ////////////////////////////////////////////////////////////////////// DEBUG_printf("Wake-up from the SLEEP MODE\r\n"); 801a7d0: 481a ldr r0, [pc, #104] @ (801a83c ) 801a7d2: f005 fb1d bl 801fe10 for(int i=0; i<6; i++) { 801a7d6: 2300 movs r3, #0 801a7d8: 60bb str r3, [r7, #8] 801a7da: e00a b.n 801a7f2 digitalWrite(56, GPIO_PIN_TOGGLE); //LED1 801a7dc: f04f 31ff mov.w r1, #4294967295 801a7e0: 2038 movs r0, #56 @ 0x38 801a7e2: f7fe f9a7 bl 8018b34 Delay_sec(0.1); 801a7e6: 2063 movs r0, #99 @ 0x63 801a7e8: f005 fd2a bl 8020240 for(int i=0; i<6; i++) { 801a7ec: 68bb ldr r3, [r7, #8] 801a7ee: 3301 adds r3, #1 801a7f0: 60bb str r3, [r7, #8] 801a7f2: 68bb ldr r3, [r7, #8] 801a7f4: 2b05 cmp r3, #5 801a7f6: ddf1 ble.n 801a7dc // // To Do // ////////////////////////////////////////////////////////////////////// } HAL_NVIC_SystemReset(); 801a7f8: f006 ff01 bl 80215fe } 801a7fc: bf00 nop 801a7fe: 3710 adds r7, #16 801a800: 46bd mov sp, r7 801a802: bd80 pop {r7, pc} 801a804: 0802a6a0 .word 0x0802a6a0 801a808: 2000091c .word 0x2000091c 801a80c: 20000964 .word 0x20000964 801a810: 200009ac .word 0x200009ac 801a814: 20000a84 .word 0x20000a84 801a818: 20000d68 .word 0x20000d68 801a81c: 20000e88 .word 0x20000e88 801a820: 20000e40 .word 0x20000e40 801a824: 20000ed0 .word 0x20000ed0 801a828: 20000db0 .word 0x20000db0 801a82c: 20000df8 .word 0x20000df8 801a830: 200053a8 .word 0x200053a8 801a834: 40023800 .word 0x40023800 801a838: 200053ec .word 0x200053ec 801a83c: 0802a6b4 .word 0x0802a6b4 0801a840 : int check_Chksum = 0; int check_Pinst = 0; uint8_t pinst; void Protocol_Receive_Task_Uart3(void) { 801a840: b5f0 push {r4, r5, r6, r7, lr} 801a842: b0b7 sub sp, #220 @ 0xdc 801a844: af04 add r7, sp, #16 check_ProtocolRx++; 801a846: 4b89 ldr r3, [pc, #548] @ (801aa6c ) 801a848: 681b ldr r3, [r3, #0] 801a84a: 3301 adds r3, #1 801a84c: 4a87 ldr r2, [pc, #540] @ (801aa6c ) 801a84e: 6013 str r3, [r2, #0] ///somebp 2024.02.19 #define TIMEOUT 100 static uint16_t old_available = 0; { uint16_t available = UART3_Available(); 801a850: 4887 ldr r0, [pc, #540] @ (801aa70 ) 801a852: f005 fa53 bl 801fcfc 801a856: 4603 mov r3, r0 801a858: f8a7 30b6 strh.w r3, [r7, #182] @ 0xb6 if(available==0) { 801a85c: f8b7 30b6 ldrh.w r3, [r7, #182] @ 0xb6 801a860: 2b00 cmp r3, #0 801a862: d103 bne.n 801a86c old_available = 0; 801a864: 4b83 ldr r3, [pc, #524] @ (801aa74 ) 801a866: 2200 movs r2, #0 801a868: 801a strh r2, [r3, #0] 801a86a: e02c b.n 801a8c6 } else { static uint32_t old_time = 0; if(old_available != available) { 801a86c: 4b81 ldr r3, [pc, #516] @ (801aa74 ) 801a86e: 881b ldrh r3, [r3, #0] 801a870: f8b7 20b6 ldrh.w r2, [r7, #182] @ 0xb6 801a874: 429a cmp r2, r3 801a876: d009 beq.n 801a88c old_available = available; 801a878: 4a7e ldr r2, [pc, #504] @ (801aa74 ) 801a87a: f8b7 30b6 ldrh.w r3, [r7, #182] @ 0xb6 801a87e: 8013 strh r3, [r2, #0] old_time = Get_Time(); 801a880: f005 fcd2 bl 8020228 801a884: 4603 mov r3, r0 801a886: 4a7c ldr r2, [pc, #496] @ (801aa78 ) 801a888: 6013 str r3, [r2, #0] 801a88a: e01c b.n 801a8c6 } else { uint32_t new_time=Get_Time(); 801a88c: f005 fccc bl 8020228 801a890: f8c7 00b0 str.w r0, [r7, #176] @ 0xb0 if(new_time - old_time > TIMEOUT) { 801a894: 4b78 ldr r3, [pc, #480] @ (801aa78 ) 801a896: 681b ldr r3, [r3, #0] 801a898: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 801a89c: 1ad3 subs r3, r2, r3 801a89e: 2b64 cmp r3, #100 @ 0x64 801a8a0: d911 bls.n 801a8c6 UART3_Clear_Buffer(available); 801a8a2: f8b7 30b6 ldrh.w r3, [r7, #182] @ 0xb6 801a8a6: 4619 mov r1, r3 801a8a8: 4871 ldr r0, [pc, #452] @ (801aa70 ) 801a8aa: f005 fb0f bl 801fecc old_available = 0; 801a8ae: 4b71 ldr r3, [pc, #452] @ (801aa74 ) 801a8b0: 2200 movs r2, #0 801a8b2: 801a strh r2, [r3, #0] psize = 0; 801a8b4: 4b71 ldr r3, [pc, #452] @ (801aa7c ) 801a8b6: 2200 movs r2, #0 801a8b8: 701a strb r2, [r3, #0] DEBUG_printf("\r\n[TIMEOUT] Buffer Clear:%d\r\n", available); 801a8ba: f8b7 30b6 ldrh.w r3, [r7, #182] @ 0xb6 801a8be: 4619 mov r1, r3 801a8c0: 486f ldr r0, [pc, #444] @ (801aa80 ) 801a8c2: f005 faa5 bl 801fe10 } } } ///somebp 2024.02.19 if(psize==0) { 801a8c6: 4b6d ldr r3, [pc, #436] @ (801aa7c ) 801a8c8: 781b ldrb r3, [r3, #0] 801a8ca: 2b00 cmp r3, #0 801a8cc: d153 bne.n 801a976 if(UART3_Available()>=3) { 801a8ce: 4868 ldr r0, [pc, #416] @ (801aa70 ) 801a8d0: f005 fa14 bl 801fcfc 801a8d4: 4603 mov r3, r0 801a8d6: 2b02 cmp r3, #2 801a8d8: f243 810a bls.w 801daf0 if( UART3_Getc_NoClear(0)==0xFF && UART3_Getc_NoClear(1)==0xFF 801a8dc: 2100 movs r1, #0 801a8de: 4864 ldr r0, [pc, #400] @ (801aa70 ) 801a8e0: f005 faa0 bl 801fe24 801a8e4: 4603 mov r3, r0 801a8e6: 2bff cmp r3, #255 @ 0xff 801a8e8: d138 bne.n 801a95c 801a8ea: 2101 movs r1, #1 801a8ec: 4860 ldr r0, [pc, #384] @ (801aa70 ) 801a8ee: f005 fa99 bl 801fe24 801a8f2: 4603 mov r3, r0 801a8f4: 2bff cmp r3, #255 @ 0xff 801a8f6: d131 bne.n 801a95c && UART3_Getc_NoClear(2)!=0xFF && UART3_Getc_NoClear(2)>0x01) { 801a8f8: 2102 movs r1, #2 801a8fa: 485d ldr r0, [pc, #372] @ (801aa70 ) 801a8fc: f005 fa92 bl 801fe24 801a900: 4603 mov r3, r0 801a902: 2bff cmp r3, #255 @ 0xff 801a904: d02a beq.n 801a95c 801a906: 2102 movs r1, #2 801a908: 4859 ldr r0, [pc, #356] @ (801aa70 ) 801a90a: f005 fa8b bl 801fe24 801a90e: 4603 mov r3, r0 801a910: 2b01 cmp r3, #1 801a912: dd23 ble.n 801a95c psize=UART3_Getc_NoClear(2); 801a914: 2102 movs r1, #2 801a916: 4856 ldr r0, [pc, #344] @ (801aa70 ) 801a918: f005 fa84 bl 801fe24 801a91c: 4603 mov r3, r0 801a91e: b2da uxtb r2, r3 801a920: 4b56 ldr r3, [pc, #344] @ (801aa7c ) 801a922: 701a strb r2, [r3, #0] checksum=(uint8_t)(0xFF + 0xFF + psize); 801a924: 4b55 ldr r3, [pc, #340] @ (801aa7c ) 801a926: 781b ldrb r3, [r3, #0] 801a928: 3b02 subs r3, #2 801a92a: b2da uxtb r2, r3 801a92c: 4b55 ldr r3, [pc, #340] @ (801aa84 ) 801a92e: 701a strb r2, [r3, #0] UART3_Clear_Buffer(3); 801a930: 2103 movs r1, #3 801a932: 484f ldr r0, [pc, #316] @ (801aa70 ) 801a934: f005 faca bl 801fecc old_available=UART3_Available(); ///somebp 2024.02.19 801a938: 484d ldr r0, [pc, #308] @ (801aa70 ) 801a93a: f005 f9df bl 801fcfc 801a93e: 4603 mov r3, r0 801a940: 461a mov r2, r3 801a942: 4b4c ldr r3, [pc, #304] @ (801aa74 ) 801a944: 801a strh r2, [r3, #0] DEBUG_printf("\r\n1. Size:0x%02X\tChecksum:0x%02X\r\n", psize, checksum); 801a946: 4b4d ldr r3, [pc, #308] @ (801aa7c ) 801a948: 781b ldrb r3, [r3, #0] 801a94a: 4619 mov r1, r3 801a94c: 4b4d ldr r3, [pc, #308] @ (801aa84 ) 801a94e: 781b ldrb r3, [r3, #0] 801a950: 461a mov r2, r3 801a952: 484d ldr r0, [pc, #308] @ (801aa88 ) 801a954: f005 fa5c bl 801fe10 801a958: f003 b8ca b.w 801daf0 } else { UART3_Clear_Buffer(1); 801a95c: 2101 movs r1, #1 801a95e: 4844 ldr r0, [pc, #272] @ (801aa70 ) 801a960: f005 fab4 bl 801fecc old_available=UART3_Available(); ///somebp 2024.02.19 801a964: 4842 ldr r0, [pc, #264] @ (801aa70 ) 801a966: f005 f9c9 bl 801fcfc 801a96a: 4603 mov r3, r0 801a96c: 461a mov r2, r3 801a96e: 4b41 ldr r3, [pc, #260] @ (801aa74 ) 801a970: 801a strh r2, [r3, #0] 801a972: f003 b8bd b.w 801daf0 } } } else { if(UART3_Available()>=psize) { 801a976: 483e ldr r0, [pc, #248] @ (801aa70 ) 801a978: f005 f9c0 bl 801fcfc 801a97c: 4603 mov r3, r0 801a97e: 461a mov r2, r3 801a980: 4b3e ldr r3, [pc, #248] @ (801aa7c ) 801a982: 781b ldrb r3, [r3, #0] 801a984: 429a cmp r2, r3 801a986: f0c3 80b3 bcc.w 801daf0 // uint8_t pinst; // 디버깅 편의를 위해 전역화 -> 상단 외부로 위치 이동 (25.05.01) for(int i=0; i checksum += UART3_Getc_NoClear(i); 801a992: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 801a996: b29b uxth r3, r3 801a998: 4619 mov r1, r3 801a99a: 4835 ldr r0, [pc, #212] @ (801aa70 ) 801a99c: f005 fa42 bl 801fe24 801a9a0: 4603 mov r3, r0 801a9a2: b2da uxtb r2, r3 801a9a4: 4b37 ldr r3, [pc, #220] @ (801aa84 ) 801a9a6: 781b ldrb r3, [r3, #0] 801a9a8: 4413 add r3, r2 801a9aa: b2da uxtb r2, r3 801a9ac: 4b35 ldr r3, [pc, #212] @ (801aa84 ) 801a9ae: 701a strb r2, [r3, #0] DEBUG_printf("%02X\t", UART3_Getc_NoClear(i)); 801a9b0: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 801a9b4: b29b uxth r3, r3 801a9b6: 4619 mov r1, r3 801a9b8: 482d ldr r0, [pc, #180] @ (801aa70 ) 801a9ba: f005 fa33 bl 801fe24 801a9be: 4603 mov r3, r0 801a9c0: 4619 mov r1, r3 801a9c2: 4832 ldr r0, [pc, #200] @ (801aa8c ) 801a9c4: f005 fa24 bl 801fe10 for(int i=0; i) 801a9d4: 781b ldrb r3, [r3, #0] 801a9d6: 461a mov r2, r3 801a9d8: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 801a9dc: 4293 cmp r3, r2 801a9de: dbd8 blt.n 801a992 } if(checksum != 0) { 801a9e0: 4b28 ldr r3, [pc, #160] @ (801aa84 ) 801a9e2: 781b ldrb r3, [r3, #0] 801a9e4: 2b00 cmp r3, #0 801a9e6: d026 beq.n 801aa36 DEBUG_printf("\r\nChecksum ERROR: 0x%02X\r\n", checksum); 801a9e8: 4b26 ldr r3, [pc, #152] @ (801aa84 ) 801a9ea: 781b ldrb r3, [r3, #0] 801a9ec: 4619 mov r1, r3 801a9ee: 4828 ldr r0, [pc, #160] @ (801aa90 ) 801a9f0: f005 fa0e bl 801fe10 check_Chksum++; 801a9f4: 4b27 ldr r3, [pc, #156] @ (801aa94 ) 801a9f6: 681b ldr r3, [r3, #0] 801a9f8: 3301 adds r3, #1 801a9fa: 4a26 ldr r2, [pc, #152] @ (801aa94 ) 801a9fc: 6013 str r3, [r2, #0] UART3_Puts("\r\nChecksum Error"); 801a9fe: 2200 movs r2, #0 801aa00: 4925 ldr r1, [pc, #148] @ (801aa98 ) 801aa02: 481b ldr r0, [pc, #108] @ (801aa70 ) 801aa04: f004 ff90 bl 801f928 if(UART3_Getc_NoClear(0)!=0xFF) UART3_Clear_Buffer(1); 801aa08: 2100 movs r1, #0 801aa0a: 4819 ldr r0, [pc, #100] @ (801aa70 ) 801aa0c: f005 fa0a bl 801fe24 801aa10: 4603 mov r3, r0 801aa12: 2bff cmp r3, #255 @ 0xff 801aa14: d003 beq.n 801aa1e 801aa16: 2101 movs r1, #1 801aa18: 4815 ldr r0, [pc, #84] @ (801aa70 ) 801aa1a: f005 fa57 bl 801fecc old_available=UART3_Available(); ///somebp 2024.02.19 801aa1e: 4814 ldr r0, [pc, #80] @ (801aa70 ) 801aa20: f005 f96c bl 801fcfc 801aa24: 4603 mov r3, r0 801aa26: 461a mov r2, r3 801aa28: 4b12 ldr r3, [pc, #72] @ (801aa74 ) 801aa2a: 801a strh r2, [r3, #0] psize = 0; 801aa2c: 4b13 ldr r3, [pc, #76] @ (801aa7c ) 801aa2e: 2200 movs r2, #0 801aa30: 701a strb r2, [r3, #0] return; 801aa32: f003 b85d b.w 801daf0 } pinst=UART3_Getc_NoClear(0); 801aa36: 2100 movs r1, #0 801aa38: 480d ldr r0, [pc, #52] @ (801aa70 ) 801aa3a: f005 f9f3 bl 801fe24 801aa3e: 4603 mov r3, r0 801aa40: b2da uxtb r2, r3 801aa42: 4b16 ldr r3, [pc, #88] @ (801aa9c ) 801aa44: 701a strb r2, [r3, #0] DEBUG_printf("\r\n2. pinst:0x%02X\r\n",pinst); 801aa46: 4b15 ldr r3, [pc, #84] @ (801aa9c ) 801aa48: 781b ldrb r3, [r3, #0] 801aa4a: 4619 mov r1, r3 801aa4c: 4814 ldr r0, [pc, #80] @ (801aaa0 ) 801aa4e: f005 f9df bl 801fe10 switch(UART3_Getc_NoClear(0)) { // �ν�Ʈ���ǿ� ���� �ش��ϴ� ��� ���� 801aa52: 2100 movs r1, #0 801aa54: 4806 ldr r0, [pc, #24] @ (801aa70 ) 801aa56: f005 f9e5 bl 801fe24 801aa5a: 4603 mov r3, r0 801aa5c: 2b07 cmp r3, #7 801aa5e: f300 81b7 bgt.w 801add0 801aa62: 2b04 cmp r3, #4 801aa64: f280 81a4 bge.w 801adb0 801aa68: f003 b832 b.w 801dad0 801aa6c: 20000c28 .word 0x20000c28 801aa70: 200053ec .word 0x200053ec 801aa74: 20000c36 .word 0x20000c36 801aa78: 20000c38 .word 0x20000c38 801aa7c: 20000c3c .word 0x20000c3c 801aa80: 0802a6d4 .word 0x0802a6d4 801aa84: 20000c3d .word 0x20000c3d 801aa88: 0802a6f4 .word 0x0802a6f4 801aa8c: 0802a718 .word 0x0802a718 801aa90: 0802a720 .word 0x0802a720 801aa94: 20000c30 .word 0x20000c30 801aa98: 0802a73c .word 0x0802a73c 801aa9c: 20000c34 .word 0x20000c34 801aaa0: 0802a750 .word 0x0802a750 801aaa4: 3b41 subs r3, #65 @ 0x41 801aaa6: 2bbe cmp r3, #190 @ 0xbe 801aaa8: f203 8012 bhi.w 801dad0 801aaac: a201 add r2, pc, #4 @ (adr r2, 801aab4 ) 801aaae: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801aab2: bf00 nop 801aab4: 0801afa1 .word 0x0801afa1 801aab8: 0801afaf .word 0x0801afaf 801aabc: 0801afbd .word 0x0801afbd 801aac0: 0801dad1 .word 0x0801dad1 801aac4: 0801dad1 .word 0x0801dad1 801aac8: 0801dad1 .word 0x0801dad1 801aacc: 0801dad1 .word 0x0801dad1 801aad0: 0801dad1 .word 0x0801dad1 801aad4: 0801dad1 .word 0x0801dad1 801aad8: 0801dad1 .word 0x0801dad1 801aadc: 0801dad1 .word 0x0801dad1 801aae0: 0801dad1 .word 0x0801dad1 801aae4: 0801dad1 .word 0x0801dad1 801aae8: 0801dad1 .word 0x0801dad1 801aaec: 0801dad1 .word 0x0801dad1 801aaf0: 0801dad1 .word 0x0801dad1 801aaf4: 0801dad1 .word 0x0801dad1 801aaf8: 0801dad1 .word 0x0801dad1 801aafc: 0801dad1 .word 0x0801dad1 801ab00: 0801dad1 .word 0x0801dad1 801ab04: 0801dad1 .word 0x0801dad1 801ab08: 0801dad1 .word 0x0801dad1 801ab0c: 0801dad1 .word 0x0801dad1 801ab10: 0801dad1 .word 0x0801dad1 801ab14: 0801dad1 .word 0x0801dad1 801ab18: 0801dad1 .word 0x0801dad1 801ab1c: 0801dad1 .word 0x0801dad1 801ab20: 0801dad1 .word 0x0801dad1 801ab24: 0801dad1 .word 0x0801dad1 801ab28: 0801dad1 .word 0x0801dad1 801ab2c: 0801dad1 .word 0x0801dad1 801ab30: 0801dad1 .word 0x0801dad1 801ab34: 0801afc5 .word 0x0801afc5 801ab38: 0801b219 .word 0x0801b219 801ab3c: 0801b5bd .word 0x0801b5bd 801ab40: 0801b61d .word 0x0801b61d 801ab44: 0801b961 .word 0x0801b961 801ab48: 0801b9e5 .word 0x0801b9e5 801ab4c: 0801bdb9 .word 0x0801bdb9 801ab50: 0801c08f .word 0x0801c08f 801ab54: 0801c2a1 .word 0x0801c2a1 801ab58: 0801dad1 .word 0x0801dad1 801ab5c: 0801dad1 .word 0x0801dad1 801ab60: 0801dad1 .word 0x0801dad1 801ab64: 0801dad1 .word 0x0801dad1 801ab68: 0801dad1 .word 0x0801dad1 801ab6c: 0801dad1 .word 0x0801dad1 801ab70: 0801dad1 .word 0x0801dad1 801ab74: 0801dad1 .word 0x0801dad1 801ab78: 0801b4c7 .word 0x0801b4c7 801ab7c: 0801b571 .word 0x0801b571 801ab80: 0801dad1 .word 0x0801dad1 801ab84: 0801dad1 .word 0x0801dad1 801ab88: 0801dad1 .word 0x0801dad1 801ab8c: 0801dad1 .word 0x0801dad1 801ab90: 0801dad1 .word 0x0801dad1 801ab94: 0801dad1 .word 0x0801dad1 801ab98: 0801dad1 .word 0x0801dad1 801ab9c: 0801dad1 .word 0x0801dad1 801aba0: 0801dad1 .word 0x0801dad1 801aba4: 0801dad1 .word 0x0801dad1 801aba8: 0801dad1 .word 0x0801dad1 801abac: 0801dad1 .word 0x0801dad1 801abb0: 0801dad1 .word 0x0801dad1 801abb4: 0801c3e5 .word 0x0801c3e5 801abb8: 0801dad1 .word 0x0801dad1 801abbc: 0801dad1 .word 0x0801dad1 801abc0: 0801c409 .word 0x0801c409 801abc4: 0801dad1 .word 0x0801dad1 801abc8: 0801dad1 .word 0x0801dad1 801abcc: 0801dad1 .word 0x0801dad1 801abd0: 0801dad1 .word 0x0801dad1 801abd4: 0801dad1 .word 0x0801dad1 801abd8: 0801dad1 .word 0x0801dad1 801abdc: 0801dad1 .word 0x0801dad1 801abe0: 0801dad1 .word 0x0801dad1 801abe4: 0801dad1 .word 0x0801dad1 801abe8: 0801dad1 .word 0x0801dad1 801abec: 0801dad1 .word 0x0801dad1 801abf0: 0801dad1 .word 0x0801dad1 801abf4: 0801c447 .word 0x0801c447 801abf8: 0801dad1 .word 0x0801dad1 801abfc: 0801dad1 .word 0x0801dad1 801ac00: 0801dad1 .word 0x0801dad1 801ac04: 0801dad1 .word 0x0801dad1 801ac08: 0801dad1 .word 0x0801dad1 801ac0c: 0801dad1 .word 0x0801dad1 801ac10: 0801dad1 .word 0x0801dad1 801ac14: 0801dad1 .word 0x0801dad1 801ac18: 0801dad1 .word 0x0801dad1 801ac1c: 0801dad1 .word 0x0801dad1 801ac20: 0801dad1 .word 0x0801dad1 801ac24: 0801dad1 .word 0x0801dad1 801ac28: 0801dad1 .word 0x0801dad1 801ac2c: 0801dad1 .word 0x0801dad1 801ac30: 0801dad1 .word 0x0801dad1 801ac34: 0801dad1 .word 0x0801dad1 801ac38: 0801dad1 .word 0x0801dad1 801ac3c: 0801dad1 .word 0x0801dad1 801ac40: 0801dad1 .word 0x0801dad1 801ac44: 0801dad1 .word 0x0801dad1 801ac48: 0801dad1 .word 0x0801dad1 801ac4c: 0801dad1 .word 0x0801dad1 801ac50: 0801dad1 .word 0x0801dad1 801ac54: 0801dad1 .word 0x0801dad1 801ac58: 0801dad1 .word 0x0801dad1 801ac5c: 0801dad1 .word 0x0801dad1 801ac60: 0801dad1 .word 0x0801dad1 801ac64: 0801dad1 .word 0x0801dad1 801ac68: 0801dad1 .word 0x0801dad1 801ac6c: 0801dad1 .word 0x0801dad1 801ac70: 0801dad1 .word 0x0801dad1 801ac74: 0801dad1 .word 0x0801dad1 801ac78: 0801dad1 .word 0x0801dad1 801ac7c: 0801dad1 .word 0x0801dad1 801ac80: 0801dad1 .word 0x0801dad1 801ac84: 0801dad1 .word 0x0801dad1 801ac88: 0801dad1 .word 0x0801dad1 801ac8c: 0801dad1 .word 0x0801dad1 801ac90: 0801dad1 .word 0x0801dad1 801ac94: 0801dad1 .word 0x0801dad1 801ac98: 0801dad1 .word 0x0801dad1 801ac9c: 0801dad1 .word 0x0801dad1 801aca0: 0801dad1 .word 0x0801dad1 801aca4: 0801dad1 .word 0x0801dad1 801aca8: 0801dad1 .word 0x0801dad1 801acac: 0801dad1 .word 0x0801dad1 801acb0: 0801dad1 .word 0x0801dad1 801acb4: 0801dad1 .word 0x0801dad1 801acb8: 0801dad1 .word 0x0801dad1 801acbc: 0801dad1 .word 0x0801dad1 801acc0: 0801dad1 .word 0x0801dad1 801acc4: 0801dad1 .word 0x0801dad1 801acc8: 0801dad1 .word 0x0801dad1 801accc: 0801dad1 .word 0x0801dad1 801acd0: 0801dad1 .word 0x0801dad1 801acd4: 0801dad1 .word 0x0801dad1 801acd8: 0801dad1 .word 0x0801dad1 801acdc: 0801dad1 .word 0x0801dad1 801ace0: 0801dad1 .word 0x0801dad1 801ace4: 0801dad1 .word 0x0801dad1 801ace8: 0801dad1 .word 0x0801dad1 801acec: 0801dad1 .word 0x0801dad1 801acf0: 0801dad1 .word 0x0801dad1 801acf4: 0801dad1 .word 0x0801dad1 801acf8: 0801dad1 .word 0x0801dad1 801acfc: 0801dad1 .word 0x0801dad1 801ad00: 0801dad1 .word 0x0801dad1 801ad04: 0801dad1 .word 0x0801dad1 801ad08: 0801dad1 .word 0x0801dad1 801ad0c: 0801dad1 .word 0x0801dad1 801ad10: 0801dad1 .word 0x0801dad1 801ad14: 0801dad1 .word 0x0801dad1 801ad18: 0801dad1 .word 0x0801dad1 801ad1c: 0801dad1 .word 0x0801dad1 801ad20: 0801dad1 .word 0x0801dad1 801ad24: 0801dad1 .word 0x0801dad1 801ad28: 0801dad1 .word 0x0801dad1 801ad2c: 0801dad1 .word 0x0801dad1 801ad30: 0801dad1 .word 0x0801dad1 801ad34: 0801dad1 .word 0x0801dad1 801ad38: 0801dad1 .word 0x0801dad1 801ad3c: 0801dad1 .word 0x0801dad1 801ad40: 0801dad1 .word 0x0801dad1 801ad44: 0801dad1 .word 0x0801dad1 801ad48: 0801dad1 .word 0x0801dad1 801ad4c: 0801dad1 .word 0x0801dad1 801ad50: 0801dad1 .word 0x0801dad1 801ad54: 0801dad1 .word 0x0801dad1 801ad58: 0801dad1 .word 0x0801dad1 801ad5c: 0801dad1 .word 0x0801dad1 801ad60: 0801dad1 .word 0x0801dad1 801ad64: 0801dad1 .word 0x0801dad1 801ad68: 0801dad1 .word 0x0801dad1 801ad6c: 0801dad1 .word 0x0801dad1 801ad70: 0801c4d1 .word 0x0801c4d1 801ad74: 0801c587 .word 0x0801c587 801ad78: 0801c6b1 .word 0x0801c6b1 801ad7c: 0801c6d1 .word 0x0801c6d1 801ad80: 0801dad1 .word 0x0801dad1 801ad84: 0801c741 .word 0x0801c741 801ad88: 0801dad1 .word 0x0801dad1 801ad8c: 0801dad1 .word 0x0801dad1 801ad90: 0801dad1 .word 0x0801dad1 801ad94: 0801dad1 .word 0x0801dad1 801ad98: 0801c70f .word 0x0801c70f 801ad9c: 0801dad1 .word 0x0801dad1 801ada0: 0801c725 .word 0x0801c725 801ada4: 0801dad1 .word 0x0801dad1 801ada8: 0801c733 .word 0x0801c733 801adac: 0801cd71 .word 0x0801cd71 801adb0: 3b04 subs r3, #4 801adb2: 2b03 cmp r3, #3 801adb4: f202 868c bhi.w 801dad0 801adb8: a201 add r2, pc, #4 @ (adr r2, 801adc0 ) 801adba: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801adbe: bf00 nop 801adc0: 0801ade1 .word 0x0801ade1 801adc4: 0801ae59 .word 0x0801ae59 801adc8: 0801ae97 .word 0x0801ae97 801adcc: 0801af41 .word 0x0801af41 801add0: 2bff cmp r3, #255 @ 0xff 801add2: f302 867d bgt.w 801dad0 801add6: 2b41 cmp r3, #65 @ 0x41 801add8: f6bf ae64 bge.w 801aaa4 801addc: f002 be78 b.w 801dad0 case GET_POSITION: DEBUG_printf("\r\n Get Position\r\n"); 801ade0: 48a4 ldr r0, [pc, #656] @ (801b074 ) 801ade2: f005 f815 bl 801fe10 float send_Pos_L = WP_Gym.Position[L]; 801ade6: 4ba4 ldr r3, [pc, #656] @ (801b078 ) 801ade8: f9b3 3014 ldrsh.w r3, [r3, #20] 801adec: ee07 3a90 vmov s15, r3 801adf0: eef8 7ae7 vcvt.f32.s32 s15, s15 801adf4: edc7 7a23 vstr s15, [r7, #140] @ 0x8c float send_Pos_R = WP_Gym.Position[R]; 801adf8: 4b9f ldr r3, [pc, #636] @ (801b078 ) 801adfa: f9b3 3016 ldrsh.w r3, [r3, #22] 801adfe: ee07 3a90 vmov s15, r3 801ae02: eef8 7ae7 vcvt.f32.s32 s15, s15 801ae06: edc7 7a22 vstr s15, [r7, #136] @ 0x88 UART3_Puts("Position(L/R): "); 801ae0a: 2200 movs r2, #0 801ae0c: 499b ldr r1, [pc, #620] @ (801b07c ) 801ae0e: 489c ldr r0, [pc, #624] @ (801b080 ) 801ae10: f004 fd8a bl 801f928 UART3_Puts(Float2String(send_Pos_L,0)); 801ae14: 2000 movs r0, #0 801ae16: ed97 0a23 vldr s0, [r7, #140] @ 0x8c 801ae1a: f005 f8c5 bl 801ffa8 801ae1e: 4603 mov r3, r0 801ae20: 2200 movs r2, #0 801ae22: 4619 mov r1, r3 801ae24: 4896 ldr r0, [pc, #600] @ (801b080 ) 801ae26: f004 fd7f bl 801f928 UART3_Puts(" / "); 801ae2a: 2200 movs r2, #0 801ae2c: 4995 ldr r1, [pc, #596] @ (801b084 ) 801ae2e: 4894 ldr r0, [pc, #592] @ (801b080 ) 801ae30: f004 fd7a bl 801f928 UART3_Puts(Float2String(send_Pos_R,0)); 801ae34: 2000 movs r0, #0 801ae36: ed97 0a22 vldr s0, [r7, #136] @ 0x88 801ae3a: f005 f8b5 bl 801ffa8 801ae3e: 4603 mov r3, r0 801ae40: 2200 movs r2, #0 801ae42: 4619 mov r1, r3 801ae44: 488e ldr r0, [pc, #568] @ (801b080 ) 801ae46: f004 fd6f bl 801f928 UART3_Puts(" [mm]\r\n"); 801ae4a: 2200 movs r2, #0 801ae4c: 498e ldr r1, [pc, #568] @ (801b088 ) 801ae4e: 488c ldr r0, [pc, #560] @ (801b080 ) 801ae50: f004 fd6a bl 801f928 // Return_2x2byte(GET_POSITION, 0x111, 0x222); // Return_2x2byte(GET_POSITION, (uint16_t)Motor1_Ang.AngleMech, (uint16_t)Motor1_Ang.AngleMechAll); // Return_2x2byte(GET_POSITION, (uint16_t)WP_GymManager.Position_L, (uint16_t)WP_GymManager.Position_R); break; 801ae54: f002 be3c b.w 801dad0 case GET_VOLTAGE: DEBUG_printf("\r\n Get Voltage\r\n"); 801ae58: 488c ldr r0, [pc, #560] @ (801b08c ) 801ae5a: f004 ffd9 bl 801fe10 // Return_1byte(GET_VOLTAGE, 0xAA); UART3_Puts("Voltage: "); 801ae5e: 2200 movs r2, #0 801ae60: 498b ldr r1, [pc, #556] @ (801b090 ) 801ae62: 4887 ldr r0, [pc, #540] @ (801b080 ) 801ae64: f004 fd60 bl 801f928 UART3_Puts(Float2String(Inv.Ctrl.Vdc,2)); 801ae68: 4b8a ldr r3, [pc, #552] @ (801b094 ) 801ae6a: edd3 7a00 vldr s15, [r3] 801ae6e: 2002 movs r0, #2 801ae70: eeb0 0a67 vmov.f32 s0, s15 801ae74: f005 f898 bl 801ffa8 801ae78: 4603 mov r3, r0 801ae7a: 2200 movs r2, #0 801ae7c: 4619 mov r1, r3 801ae7e: 4880 ldr r0, [pc, #512] @ (801b080 ) 801ae80: f004 fd52 bl 801f928 UART3_Puts(" [Vdc]\r\n"); 801ae84: 2200 movs r2, #0 801ae86: 4984 ldr r1, [pc, #528] @ (801b098 ) 801ae88: 487d ldr r0, [pc, #500] @ (801b080 ) 801ae8a: f004 fd4d bl 801f928 Report_Vdc(); 801ae8e: f7ff fb3f bl 801a510 break; 801ae92: f002 be1d b.w 801dad0 case BLE_CONNECT: // 모든 Gym setting (무게값, 모드, 가동 범위 등, 사용 시마다 설정하는 정보)을 초기화 // 무게 관련 상태 업데이트 Return_4x1byte(WEIGHTMINUS, WP_Gym.WeightSet[L]*2, WP_Gym.WeightMode[L], WP_Gym.WeightSet[R]*2, WP_Gym.WeightMode[R]); 801ae96: 4b78 ldr r3, [pc, #480] @ (801b078 ) 801ae98: edd3 7a03 vldr s15, [r3, #12] 801ae9c: ee77 7aa7 vadd.f32 s15, s15, s15 801aea0: eefc 7ae7 vcvt.u32.f32 s15, s15 801aea4: ee17 3a90 vmov r3, s15 801aea8: b299 uxth r1, r3 801aeaa: 4b73 ldr r3, [pc, #460] @ (801b078 ) 801aeac: 781b ldrb r3, [r3, #0] 801aeae: 4618 mov r0, r3 801aeb0: 4b71 ldr r3, [pc, #452] @ (801b078 ) 801aeb2: edd3 7a04 vldr s15, [r3, #16] 801aeb6: ee77 7aa7 vadd.f32 s15, s15, s15 801aeba: eefc 7ae7 vcvt.u32.f32 s15, s15 801aebe: ee17 3a90 vmov r3, s15 801aec2: b29b uxth r3, r3 801aec4: 4a6c ldr r2, [pc, #432] @ (801b078 ) 801aec6: 7852 ldrb r2, [r2, #1] 801aec8: 9200 str r2, [sp, #0] 801aeca: 4602 mov r2, r0 801aecc: 2067 movs r0, #103 @ 0x67 801aece: f7ff f859 bl 8019f84 // 전압 정보 업데이트 Vdc100 = Inv.Ctrl.Vdc * 100; 801aed2: 4b70 ldr r3, [pc, #448] @ (801b094 ) 801aed4: edd3 7a00 vldr s15, [r3] 801aed8: ed9f 7a70 vldr s14, [pc, #448] @ 801b09c 801aedc: ee67 7a87 vmul.f32 s15, s15, s14 801aee0: eefc 7ae7 vcvt.u32.f32 s15, s15 801aee4: ee17 3a90 vmov r3, s15 801aee8: b29a uxth r2, r3 801aeea: 4b6d ldr r3, [pc, #436] @ (801b0a0 ) 801aeec: 801a strh r2, [r3, #0] Return_2byte(GET_VOLTAGE, Vdc100); 801aeee: 4b6c ldr r3, [pc, #432] @ (801b0a0 ) 801aef0: 881b ldrh r3, [r3, #0] 801aef2: 4619 mov r1, r3 801aef4: 2005 movs r0, #5 801aef6: f7fe ff83 bl 8019e00 // 무게 On/Off 여부 업데이트 Return_1byte(WEIGHTONOFF, WP_Weight.Ctrl.OnOffStatus[L]); 801aefa: 4b6a ldr r3, [pc, #424] @ (801b0a4 ) 801aefc: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801af00: 4619 mov r1, r3 801af02: 2065 movs r0, #101 @ 0x65 801af04: f7fe ff42 bl 8019d8c // WP_Gym.Region.RangeHi[R] = 1800.0f; // WP_Gym.Region.H_HiSoft[L] = WP_Gym.Region.RangeHi[L] + WP_Gym.Region.L_soft; // WP_Gym.Region.H_HiSoft[R] = WP_Gym.Region.RangeHi[R] + WP_Gym.Region.L_soft; // } UART3_printf("FW v%d.%d.%d R2 (%04d.%02d.%02d)\r\n",WespionVer.VerMajer,WespionVer.VerMiner,WespionVer.VerSub,WespionVer.VerYear,WespionVer.VerMonth,WespionVer.VerDate);///somebp 2024.02.08 801af08: 4b67 ldr r3, [pc, #412] @ (801b0a8 ) 801af0a: 781b ldrb r3, [r3, #0] 801af0c: 4618 mov r0, r3 801af0e: 4b66 ldr r3, [pc, #408] @ (801b0a8 ) 801af10: 785b ldrb r3, [r3, #1] 801af12: 461c mov r4, r3 801af14: 4b64 ldr r3, [pc, #400] @ (801b0a8 ) 801af16: 789b ldrb r3, [r3, #2] 801af18: 461d mov r5, r3 801af1a: 4b63 ldr r3, [pc, #396] @ (801b0a8 ) 801af1c: 889b ldrh r3, [r3, #4] 801af1e: 461a mov r2, r3 801af20: 4b61 ldr r3, [pc, #388] @ (801b0a8 ) 801af22: 799b ldrb r3, [r3, #6] 801af24: 4619 mov r1, r3 801af26: 4b60 ldr r3, [pc, #384] @ (801b0a8 ) 801af28: 79db ldrb r3, [r3, #7] 801af2a: 9302 str r3, [sp, #8] 801af2c: 9101 str r1, [sp, #4] 801af2e: 9200 str r2, [sp, #0] 801af30: 462b mov r3, r5 801af32: 4622 mov r2, r4 801af34: 4601 mov r1, r0 801af36: 485d ldr r0, [pc, #372] @ (801b0ac ) 801af38: f004 ff14 bl 801fd64 break; 801af3c: f002 bdc8 b.w 801dad0 case CHECK_FWVER: Return_4x1byte(CHECK_FWVER,WespionVer.VerMajer, WespionVer.VerMiner, WespionVer.VerSub, WespionVer.VerPre); 801af40: 4b59 ldr r3, [pc, #356] @ (801b0a8 ) 801af42: 781b ldrb r3, [r3, #0] 801af44: 4619 mov r1, r3 801af46: 4b58 ldr r3, [pc, #352] @ (801b0a8 ) 801af48: 785b ldrb r3, [r3, #1] 801af4a: 461a mov r2, r3 801af4c: 4b56 ldr r3, [pc, #344] @ (801b0a8 ) 801af4e: 789b ldrb r3, [r3, #2] 801af50: 4618 mov r0, r3 801af52: 4b55 ldr r3, [pc, #340] @ (801b0a8 ) 801af54: 78db ldrb r3, [r3, #3] 801af56: 9300 str r3, [sp, #0] 801af58: 4603 mov r3, r0 801af5a: 2007 movs r0, #7 801af5c: f7ff f812 bl 8019f84 UART3_printf("FW v%d.%d.%d-dev.%d (%04d.%02d.%02d)\r\n",WespionVer.VerMajer,WespionVer.VerMiner,WespionVer.VerSub,WespionVer.VerPre,WespionVer.VerYear,WespionVer.VerMonth,WespionVer.VerDate); 801af60: 4b51 ldr r3, [pc, #324] @ (801b0a8 ) 801af62: 781b ldrb r3, [r3, #0] 801af64: 461c mov r4, r3 801af66: 4b50 ldr r3, [pc, #320] @ (801b0a8 ) 801af68: 785b ldrb r3, [r3, #1] 801af6a: 461d mov r5, r3 801af6c: 4b4e ldr r3, [pc, #312] @ (801b0a8 ) 801af6e: 789b ldrb r3, [r3, #2] 801af70: 461e mov r6, r3 801af72: 4b4d ldr r3, [pc, #308] @ (801b0a8 ) 801af74: 78db ldrb r3, [r3, #3] 801af76: 461a mov r2, r3 801af78: 4b4b ldr r3, [pc, #300] @ (801b0a8 ) 801af7a: 889b ldrh r3, [r3, #4] 801af7c: 4619 mov r1, r3 801af7e: 4b4a ldr r3, [pc, #296] @ (801b0a8 ) 801af80: 799b ldrb r3, [r3, #6] 801af82: 4618 mov r0, r3 801af84: 4b48 ldr r3, [pc, #288] @ (801b0a8 ) 801af86: 79db ldrb r3, [r3, #7] 801af88: 9303 str r3, [sp, #12] 801af8a: 9002 str r0, [sp, #8] 801af8c: 9101 str r1, [sp, #4] 801af8e: 9200 str r2, [sp, #0] 801af90: 4633 mov r3, r6 801af92: 462a mov r2, r5 801af94: 4621 mov r1, r4 801af96: 4846 ldr r0, [pc, #280] @ (801b0b0 ) 801af98: f004 fee4 bl 801fd64 break; 801af9c: f002 bd98 b.w 801dad0 case START_REPORT: DEBUG_printf("\r\n Start Report\r\n"); 801afa0: 4844 ldr r0, [pc, #272] @ (801b0b4 ) 801afa2: f004 ff35 bl 801fe10 Start_Report(); 801afa6: f7ff fae7 bl 801a578 break; 801afaa: f002 bd91 b.w 801dad0 case STOP_REPORT: DEBUG_printf("\r\n Stop Report\r\n"); 801afae: 4842 ldr r0, [pc, #264] @ (801b0b8 ) 801afb0: f004 ff2e bl 801fe10 Stop_Report(); 801afb4: f7ff fafa bl 801a5ac break; 801afb8: f002 bd8a b.w 801dad0 // Return_4x1byte(SET_WEIGHT, WP_Gym.WeightSet[L], WP_Gym.WeightMode[L], WP_Gym.WeightSet[R], WP_Gym.WeightMode[R]); // // ���� ���θ� �����ϴ� ���� �߰� // } // break; case VOLT_RPRT_TOGGLE: VoltRprtToggle(); 801afbc: f7ff fafe bl 801a5bc break; 801afc0: f002 bd86 b.w 801dad0 case SET_WEIGHT: // 모바일앱 테스트용 임시 // 모드 변경 : 없는 넘버일 때 에러만 만듦) if(UART3_Getc_NoClear(2) > 3 || UART3_Getc_NoClear(4) > 3 ) { 801afc4: 2102 movs r1, #2 801afc6: 482e ldr r0, [pc, #184] @ (801b080 ) 801afc8: f004 ff2c bl 801fe24 801afcc: 4603 mov r3, r0 801afce: 2b03 cmp r3, #3 801afd0: dc06 bgt.n 801afe0 801afd2: 2104 movs r1, #4 801afd4: 482a ldr r0, [pc, #168] @ (801b080 ) 801afd6: f004 ff25 bl 801fe24 801afda: 4603 mov r3, r0 801afdc: 2b03 cmp r3, #3 801afde: dd06 ble.n 801afee UART3_Puts("Err: Mode number error\r\n"); 801afe0: 2200 movs r2, #0 801afe2: 4936 ldr r1, [pc, #216] @ (801b0bc ) 801afe4: 4826 ldr r0, [pc, #152] @ (801b080 ) 801afe6: f004 fc9f bl 801f928 // WP_Gym.WeightModeError = 2; break; 801afea: f002 bd71 b.w 801dad0 } else{ // 좌측 무게 적용 if(UART3_Getc_NoClear(1) * 0.5 >= 60 || UART3_Getc_NoClear(1) * 0.5 < 0){ // 머신 제한 무게랑 연동해야 함!! 801afee: 2101 movs r1, #1 801aff0: 4823 ldr r0, [pc, #140] @ (801b080 ) 801aff2: f004 ff17 bl 801fe24 801aff6: 4603 mov r3, r0 801aff8: 4618 mov r0, r3 801affa: f7f5 f9c3 bl 8010384 <__aeabi_i2d> 801affe: f04f 0200 mov.w r2, #0 801b002: 4b2f ldr r3, [pc, #188] @ (801b0c0 ) 801b004: f7f5 fa28 bl 8010458 <__aeabi_dmul> 801b008: 4602 mov r2, r0 801b00a: 460b mov r3, r1 801b00c: 4610 mov r0, r2 801b00e: 4619 mov r1, r3 801b010: f04f 0200 mov.w r2, #0 801b014: 4b2b ldr r3, [pc, #172] @ (801b0c4 ) 801b016: f7f5 fca5 bl 8010964 <__aeabi_dcmpge> 801b01a: 4603 mov r3, r0 801b01c: 2b00 cmp r3, #0 801b01e: d119 bne.n 801b054 801b020: 2101 movs r1, #1 801b022: 4817 ldr r0, [pc, #92] @ (801b080 ) 801b024: f004 fefe bl 801fe24 801b028: 4603 mov r3, r0 801b02a: 4618 mov r0, r3 801b02c: f7f5 f9aa bl 8010384 <__aeabi_i2d> 801b030: f04f 0200 mov.w r2, #0 801b034: 4b22 ldr r3, [pc, #136] @ (801b0c0 ) 801b036: f7f5 fa0f bl 8010458 <__aeabi_dmul> 801b03a: 4602 mov r2, r0 801b03c: 460b mov r3, r1 801b03e: 4610 mov r0, r2 801b040: 4619 mov r1, r3 801b042: f04f 0200 mov.w r2, #0 801b046: f04f 0300 mov.w r3, #0 801b04a: f7f5 fc77 bl 801093c <__aeabi_dcmplt> 801b04e: 4603 mov r3, r0 801b050: 2b00 cmp r3, #0 801b052: d03d beq.n 801b0d0 delay_msec(15); 801b054: 481c ldr r0, [pc, #112] @ (801b0c8 ) 801b056: f002 fd5f bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801b05a: 2332 movs r3, #50 @ 0x32 801b05c: 220a movs r2, #10 801b05e: 210a movs r1, #10 801b060: 2096 movs r0, #150 @ 0x96 801b062: f7fe f93b bl 80192dc // 기존 무게가 유지되도록 아무 설정 변경 안 함 UART3_Puts("Err: Weight_Left\r\n"); 801b066: 2200 movs r2, #0 801b068: 4918 ldr r1, [pc, #96] @ (801b0cc ) 801b06a: 4805 ldr r0, [pc, #20] @ (801b080 ) 801b06c: f004 fc5c bl 801f928 break; 801b070: f002 bd2e b.w 801dad0 801b074: 0802a764 .word 0x0802a764 801b078: 20000148 .word 0x20000148 801b07c: 0802a778 .word 0x0802a778 801b080: 200053ec .word 0x200053ec 801b084: 0802a788 .word 0x0802a788 801b088: 0802a78c .word 0x0802a78c 801b08c: 0802a794 .word 0x0802a794 801b090: 0802a60c .word 0x0802a60c 801b094: 20000400 .word 0x20000400 801b098: 0802a618 .word 0x0802a618 801b09c: 42c80000 .word 0x42c80000 801b0a0: 20000c20 .word 0x20000c20 801b0a4: 200001d8 .word 0x200001d8 801b0a8: 200000b0 .word 0x200000b0 801b0ac: 0802a7a8 .word 0x0802a7a8 801b0b0: 0802a7cc .word 0x0802a7cc 801b0b4: 0802a7f4 .word 0x0802a7f4 801b0b8: 0802a808 .word 0x0802a808 801b0bc: 0802a81c .word 0x0802a81c 801b0c0: 3fe00000 .word 0x3fe00000 801b0c4: 404e0000 .word 0x404e0000 801b0c8: 00031704 .word 0x00031704 801b0cc: 0802a838 .word 0x0802a838 } else { WP_Gym.WeightBLE[L] = UART3_Getc_NoClear(1) * 0.5; // 프로토콜 단위(0.5kg) 환산 801b0d0: 2101 movs r1, #1 801b0d2: 48ad ldr r0, [pc, #692] @ (801b388 ) 801b0d4: f004 fea6 bl 801fe24 801b0d8: 4603 mov r3, r0 801b0da: 4618 mov r0, r3 801b0dc: f7f5 f952 bl 8010384 <__aeabi_i2d> 801b0e0: f04f 0200 mov.w r2, #0 801b0e4: 4ba9 ldr r3, [pc, #676] @ (801b38c ) 801b0e6: f7f5 f9b7 bl 8010458 <__aeabi_dmul> 801b0ea: 4602 mov r2, r0 801b0ec: 460b mov r3, r1 801b0ee: 4610 mov r0, r2 801b0f0: 4619 mov r1, r3 801b0f2: f7f5 fc4b bl 801098c <__aeabi_d2f> 801b0f6: 4603 mov r3, r0 801b0f8: 4aa5 ldr r2, [pc, #660] @ (801b390 ) 801b0fa: 6053 str r3, [r2, #4] } // 우측 무게 적용 if(UART3_Getc_NoClear(3) * 0.5 >= 60 || UART3_Getc_NoClear(3) * 0.5 < 0){ // 머신 제한 무게랑 연동해야 함!! 801b0fc: 2103 movs r1, #3 801b0fe: 48a2 ldr r0, [pc, #648] @ (801b388 ) 801b100: f004 fe90 bl 801fe24 801b104: 4603 mov r3, r0 801b106: 4618 mov r0, r3 801b108: f7f5 f93c bl 8010384 <__aeabi_i2d> 801b10c: f04f 0200 mov.w r2, #0 801b110: 4b9e ldr r3, [pc, #632] @ (801b38c ) 801b112: f7f5 f9a1 bl 8010458 <__aeabi_dmul> 801b116: 4602 mov r2, r0 801b118: 460b mov r3, r1 801b11a: 4610 mov r0, r2 801b11c: 4619 mov r1, r3 801b11e: f04f 0200 mov.w r2, #0 801b122: 4b9c ldr r3, [pc, #624] @ (801b394 ) 801b124: f7f5 fc1e bl 8010964 <__aeabi_dcmpge> 801b128: 4603 mov r3, r0 801b12a: 2b00 cmp r3, #0 801b12c: d119 bne.n 801b162 801b12e: 2103 movs r1, #3 801b130: 4895 ldr r0, [pc, #596] @ (801b388 ) 801b132: f004 fe77 bl 801fe24 801b136: 4603 mov r3, r0 801b138: 4618 mov r0, r3 801b13a: f7f5 f923 bl 8010384 <__aeabi_i2d> 801b13e: f04f 0200 mov.w r2, #0 801b142: 4b92 ldr r3, [pc, #584] @ (801b38c ) 801b144: f7f5 f988 bl 8010458 <__aeabi_dmul> 801b148: 4602 mov r2, r0 801b14a: 460b mov r3, r1 801b14c: 4610 mov r0, r2 801b14e: 4619 mov r1, r3 801b150: f04f 0200 mov.w r2, #0 801b154: f04f 0300 mov.w r3, #0 801b158: f7f5 fbf0 bl 801093c <__aeabi_dcmplt> 801b15c: 4603 mov r3, r0 801b15e: 2b00 cmp r3, #0 801b160: d00f beq.n 801b182 delay_msec(15); 801b162: 488d ldr r0, [pc, #564] @ (801b398 ) 801b164: f002 fcd8 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801b168: 2332 movs r3, #50 @ 0x32 801b16a: 220a movs r2, #10 801b16c: 210a movs r1, #10 801b16e: 2096 movs r0, #150 @ 0x96 801b170: f7fe f8b4 bl 80192dc // 기존 무게가 유지되도록 아무 설정 변경 안 함 UART3_Puts("Err: Weight_Right\r\n"); 801b174: 2200 movs r2, #0 801b176: 4989 ldr r1, [pc, #548] @ (801b39c ) 801b178: 4883 ldr r0, [pc, #524] @ (801b388 ) 801b17a: f004 fbd5 bl 801f928 break; 801b17e: f002 bca7 b.w 801dad0 } else { WP_Gym.WeightBLE[R] = UART3_Getc_NoClear(3) * 0.5; 801b182: 2103 movs r1, #3 801b184: 4880 ldr r0, [pc, #512] @ (801b388 ) 801b186: f004 fe4d bl 801fe24 801b18a: 4603 mov r3, r0 801b18c: 4618 mov r0, r3 801b18e: f7f5 f8f9 bl 8010384 <__aeabi_i2d> 801b192: f04f 0200 mov.w r2, #0 801b196: 4b7d ldr r3, [pc, #500] @ (801b38c ) 801b198: f7f5 f95e bl 8010458 <__aeabi_dmul> 801b19c: 4602 mov r2, r0 801b19e: 460b mov r3, r1 801b1a0: 4610 mov r0, r2 801b1a2: 4619 mov r1, r3 801b1a4: f7f5 fbf2 bl 801098c <__aeabi_d2f> 801b1a8: 4603 mov r3, r0 801b1aa: 4a79 ldr r2, [pc, #484] @ (801b390 ) 801b1ac: 6093 str r3, [r2, #8] } Task_Stop_10ms_1(); 801b1ae: f002 fe6b bl 801de88 Task_Start_10ms_1(Task10ms_1); 801b1b2: 487b ldr r0, [pc, #492] @ (801b3a0 ) 801b1b4: f002 fe00 bl 801ddb8 WP_Gym.WeightMode[L] = UART3_Getc_NoClear(2); 801b1b8: 2102 movs r1, #2 801b1ba: 4873 ldr r0, [pc, #460] @ (801b388 ) 801b1bc: f004 fe32 bl 801fe24 801b1c0: 4603 mov r3, r0 801b1c2: b2da uxtb r2, r3 801b1c4: 4b72 ldr r3, [pc, #456] @ (801b390 ) 801b1c6: 701a strb r2, [r3, #0] WP_Gym.WeightMode[R] = UART3_Getc_NoClear(4); 801b1c8: 2104 movs r1, #4 801b1ca: 486f ldr r0, [pc, #444] @ (801b388 ) 801b1cc: f004 fe2a bl 801fe24 801b1d0: 4603 mov r3, r0 801b1d2: b2da uxtb r2, r3 801b1d4: 4b6e ldr r3, [pc, #440] @ (801b390 ) 801b1d6: 705a strb r2, [r3, #1] } // 본무게 변경 시 EccLev(Weight)가 50%를 초과할 경우 50%로 줄이기 // 변경 이후 현재 적용 값을 리턴하는 구문 Return_4x1byte(SET_WEIGHT, WP_Gym.WeightSet[L]*2, WP_Gym.WeightMode[L], WP_Gym.WeightSet[R]*2, WP_Gym.WeightMode[R]); 801b1d8: 4b6d ldr r3, [pc, #436] @ (801b390 ) 801b1da: edd3 7a03 vldr s15, [r3, #12] 801b1de: ee77 7aa7 vadd.f32 s15, s15, s15 801b1e2: eefc 7ae7 vcvt.u32.f32 s15, s15 801b1e6: ee17 3a90 vmov r3, s15 801b1ea: b299 uxth r1, r3 801b1ec: 4b68 ldr r3, [pc, #416] @ (801b390 ) 801b1ee: 781b ldrb r3, [r3, #0] 801b1f0: 4618 mov r0, r3 801b1f2: 4b67 ldr r3, [pc, #412] @ (801b390 ) 801b1f4: edd3 7a04 vldr s15, [r3, #16] 801b1f8: ee77 7aa7 vadd.f32 s15, s15, s15 801b1fc: eefc 7ae7 vcvt.u32.f32 s15, s15 801b200: ee17 3a90 vmov r3, s15 801b204: b29b uxth r3, r3 801b206: 4a62 ldr r2, [pc, #392] @ (801b390 ) 801b208: 7852 ldrb r2, [r2, #1] 801b20a: 9200 str r2, [sp, #0] 801b20c: 4602 mov r2, r0 801b20e: 2061 movs r0, #97 @ 0x61 801b210: f7fe feb8 bl 8019f84 break; 801b214: f002 bc5c b.w 801dad0 case SET_RANGE: // 갑자기 구간을 바꿔버리면 무게가 확 변경되는 문제 해결해야 함! -> 스케쥴러? DEBUG_printf("\r\n Set Range\r\n"); 801b218: 4862 ldr r0, [pc, #392] @ (801b3a4 ) 801b21a: f004 fdf9 bl 801fe10 UART3_Puts("\r\n"); 801b21e: 2200 movs r2, #0 801b220: 4961 ldr r1, [pc, #388] @ (801b3a8 ) 801b222: 4859 ldr r0, [pc, #356] @ (801b388 ) 801b224: f004 fb80 bl 801f928 if(WP_Weight.Ctrl.OnOffScale[L] > 0.0f || WP_Weight.Ctrl.OnOffScale[R] > 0.0f) { 801b228: 4b60 ldr r3, [pc, #384] @ (801b3ac ) 801b22a: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 801b22e: eef5 7ac0 vcmpe.f32 s15, #0.0 801b232: eef1 fa10 vmrs APSR_nzcv, fpscr 801b236: dc07 bgt.n 801b248 801b238: 4b5c ldr r3, [pc, #368] @ (801b3ac ) 801b23a: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801b23e: eef5 7ac0 vcmpe.f32 s15, #0.0 801b242: eef1 fa10 vmrs APSR_nzcv, fpscr 801b246: dd09 ble.n 801b25c // if(WP_Gym.WeightSet[L] >= 5.5f || WP_Gym.WeightSet[R] >= 5.5f) { UART3_Puts("Err: Off Weight First\r\n"); 801b248: 2200 movs r2, #0 801b24a: 4959 ldr r1, [pc, #356] @ (801b3b0 ) 801b24c: 484e ldr r0, [pc, #312] @ (801b388 ) 801b24e: f004 fb6b bl 801f928 Return_1byte(SET_RANGE,0); // Not applied 801b252: 2100 movs r1, #0 801b254: 2062 movs r0, #98 @ 0x62 801b256: f7fe fd99 bl 8019d8c 801b25a: e132 b.n 801b4c2 } else{ switch(UART3_Getc_NoClear(1)){ 801b25c: 2101 movs r1, #1 801b25e: 484a ldr r0, [pc, #296] @ (801b388 ) 801b260: f004 fde0 bl 801fe24 801b264: 4603 mov r3, r0 801b266: 2b02 cmp r3, #2 801b268: f000 80ac beq.w 801b3c4 801b26c: 2b02 cmp r3, #2 801b26e: f302 841e bgt.w 801daae 801b272: 2b00 cmp r3, #0 801b274: d003 beq.n 801b27e 801b276: 2b01 cmp r3, #1 801b278: d043 beq.n 801b302 UART3_Puts(" (mm)\r\n"); Return_1byte(SET_RANGE,1); // applied break; } } break; 801b27a: f002 bc18 b.w 801daae SetRange(L,UART3_Getc_NoClear(2)); 801b27e: 2102 movs r1, #2 801b280: 4841 ldr r0, [pc, #260] @ (801b388 ) 801b282: f004 fdcf bl 801fe24 801b286: 4603 mov r3, r0 801b288: b2db uxtb r3, r3 801b28a: 4619 mov r1, r3 801b28c: 2000 movs r0, #0 801b28e: f7f8 f8b3 bl 80133f8 UART3_Puts("[Range of Motion - L] "); 801b292: 2200 movs r2, #0 801b294: 4947 ldr r1, [pc, #284] @ (801b3b4 ) 801b296: 483c ldr r0, [pc, #240] @ (801b388 ) 801b298: f004 fb46 bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeLo[L],0)); 801b29c: 4b3c ldr r3, [pc, #240] @ (801b390 ) 801b29e: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30 801b2a2: ee07 3a90 vmov s15, r3 801b2a6: eef8 7ae7 vcvt.f32.s32 s15, s15 801b2aa: 2000 movs r0, #0 801b2ac: eeb0 0a67 vmov.f32 s0, s15 801b2b0: f004 fe7a bl 801ffa8 801b2b4: 4603 mov r3, r0 801b2b6: 2200 movs r2, #0 801b2b8: 4619 mov r1, r3 801b2ba: 4833 ldr r0, [pc, #204] @ (801b388 ) 801b2bc: f004 fb34 bl 801f928 UART3_Puts("~ "); 801b2c0: 2200 movs r2, #0 801b2c2: 493d ldr r1, [pc, #244] @ (801b3b8 ) 801b2c4: 4830 ldr r0, [pc, #192] @ (801b388 ) 801b2c6: f004 fb2f bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeHi[L],0)); 801b2ca: 4b31 ldr r3, [pc, #196] @ (801b390 ) 801b2cc: f9b3 3034 ldrsh.w r3, [r3, #52] @ 0x34 801b2d0: ee07 3a90 vmov s15, r3 801b2d4: eef8 7ae7 vcvt.f32.s32 s15, s15 801b2d8: 2000 movs r0, #0 801b2da: eeb0 0a67 vmov.f32 s0, s15 801b2de: f004 fe63 bl 801ffa8 801b2e2: 4603 mov r3, r0 801b2e4: 2200 movs r2, #0 801b2e6: 4619 mov r1, r3 801b2e8: 4827 ldr r0, [pc, #156] @ (801b388 ) 801b2ea: f004 fb1d bl 801f928 UART3_Puts(" (mm)\r\n"); 801b2ee: 2200 movs r2, #0 801b2f0: 4932 ldr r1, [pc, #200] @ (801b3bc ) 801b2f2: 4825 ldr r0, [pc, #148] @ (801b388 ) 801b2f4: f004 fb18 bl 801f928 Return_1byte(SET_RANGE,1); // applied 801b2f8: 2101 movs r1, #1 801b2fa: 2062 movs r0, #98 @ 0x62 801b2fc: f7fe fd46 bl 8019d8c break; 801b300: e0df b.n 801b4c2 SetRange(R,UART3_Getc_NoClear(2)); 801b302: 2102 movs r1, #2 801b304: 4820 ldr r0, [pc, #128] @ (801b388 ) 801b306: f004 fd8d bl 801fe24 801b30a: 4603 mov r3, r0 801b30c: b2db uxtb r3, r3 801b30e: 4619 mov r1, r3 801b310: 2001 movs r0, #1 801b312: f7f8 f871 bl 80133f8 UART3_Puts("[Range of Motion - R] "); 801b316: 2200 movs r2, #0 801b318: 4929 ldr r1, [pc, #164] @ (801b3c0 ) 801b31a: 481b ldr r0, [pc, #108] @ (801b388 ) 801b31c: f004 fb04 bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeLo[R],0)); 801b320: 4b1b ldr r3, [pc, #108] @ (801b390 ) 801b322: f9b3 3032 ldrsh.w r3, [r3, #50] @ 0x32 801b326: ee07 3a90 vmov s15, r3 801b32a: eef8 7ae7 vcvt.f32.s32 s15, s15 801b32e: 2000 movs r0, #0 801b330: eeb0 0a67 vmov.f32 s0, s15 801b334: f004 fe38 bl 801ffa8 801b338: 4603 mov r3, r0 801b33a: 2200 movs r2, #0 801b33c: 4619 mov r1, r3 801b33e: 4812 ldr r0, [pc, #72] @ (801b388 ) 801b340: f004 faf2 bl 801f928 UART3_Puts("~ "); 801b344: 2200 movs r2, #0 801b346: 491c ldr r1, [pc, #112] @ (801b3b8 ) 801b348: 480f ldr r0, [pc, #60] @ (801b388 ) 801b34a: f004 faed bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeHi[R],0)); 801b34e: 4b10 ldr r3, [pc, #64] @ (801b390 ) 801b350: f9b3 3036 ldrsh.w r3, [r3, #54] @ 0x36 801b354: ee07 3a90 vmov s15, r3 801b358: eef8 7ae7 vcvt.f32.s32 s15, s15 801b35c: 2000 movs r0, #0 801b35e: eeb0 0a67 vmov.f32 s0, s15 801b362: f004 fe21 bl 801ffa8 801b366: 4603 mov r3, r0 801b368: 2200 movs r2, #0 801b36a: 4619 mov r1, r3 801b36c: 4806 ldr r0, [pc, #24] @ (801b388 ) 801b36e: f004 fadb bl 801f928 UART3_Puts(" (mm)\r\n"); 801b372: 2200 movs r2, #0 801b374: 4911 ldr r1, [pc, #68] @ (801b3bc ) 801b376: 4804 ldr r0, [pc, #16] @ (801b388 ) 801b378: f004 fad6 bl 801f928 Return_1byte(SET_RANGE,1); // applied 801b37c: 2101 movs r1, #1 801b37e: 2062 movs r0, #98 @ 0x62 801b380: f7fe fd04 bl 8019d8c break; 801b384: e09d b.n 801b4c2 801b386: bf00 nop 801b388: 200053ec .word 0x200053ec 801b38c: 3fe00000 .word 0x3fe00000 801b390: 20000148 .word 0x20000148 801b394: 404e0000 .word 0x404e0000 801b398: 00031704 .word 0x00031704 801b39c: 0802a84c .word 0x0802a84c 801b3a0: 0801deb9 .word 0x0801deb9 801b3a4: 0802a860 .word 0x0802a860 801b3a8: 0802a870 .word 0x0802a870 801b3ac: 200001d8 .word 0x200001d8 801b3b0: 0802a874 .word 0x0802a874 801b3b4: 0802a88c .word 0x0802a88c 801b3b8: 0802a8a4 .word 0x0802a8a4 801b3bc: 0802a8a8 .word 0x0802a8a8 801b3c0: 0802a8b0 .word 0x0802a8b0 SetRange(L,UART3_Getc_NoClear(2)); 801b3c4: 2102 movs r1, #2 801b3c6: 4888 ldr r0, [pc, #544] @ (801b5e8 ) 801b3c8: f004 fd2c bl 801fe24 801b3cc: 4603 mov r3, r0 801b3ce: b2db uxtb r3, r3 801b3d0: 4619 mov r1, r3 801b3d2: 2000 movs r0, #0 801b3d4: f7f8 f810 bl 80133f8 SetRange(R,UART3_Getc_NoClear(2)); 801b3d8: 2102 movs r1, #2 801b3da: 4883 ldr r0, [pc, #524] @ (801b5e8 ) 801b3dc: f004 fd22 bl 801fe24 801b3e0: 4603 mov r3, r0 801b3e2: b2db uxtb r3, r3 801b3e4: 4619 mov r1, r3 801b3e6: 2001 movs r0, #1 801b3e8: f7f8 f806 bl 80133f8 UART3_Puts("[Range of Motion - L] "); 801b3ec: 2200 movs r2, #0 801b3ee: 497f ldr r1, [pc, #508] @ (801b5ec ) 801b3f0: 487d ldr r0, [pc, #500] @ (801b5e8 ) 801b3f2: f004 fa99 bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeLo[L],0)); 801b3f6: 4b7e ldr r3, [pc, #504] @ (801b5f0 ) 801b3f8: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30 801b3fc: ee07 3a90 vmov s15, r3 801b400: eef8 7ae7 vcvt.f32.s32 s15, s15 801b404: 2000 movs r0, #0 801b406: eeb0 0a67 vmov.f32 s0, s15 801b40a: f004 fdcd bl 801ffa8 801b40e: 4603 mov r3, r0 801b410: 2200 movs r2, #0 801b412: 4619 mov r1, r3 801b414: 4874 ldr r0, [pc, #464] @ (801b5e8 ) 801b416: f004 fa87 bl 801f928 UART3_Puts("~ "); 801b41a: 2200 movs r2, #0 801b41c: 4975 ldr r1, [pc, #468] @ (801b5f4 ) 801b41e: 4872 ldr r0, [pc, #456] @ (801b5e8 ) 801b420: f004 fa82 bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeHi[L],0)); 801b424: 4b72 ldr r3, [pc, #456] @ (801b5f0 ) 801b426: f9b3 3034 ldrsh.w r3, [r3, #52] @ 0x34 801b42a: ee07 3a90 vmov s15, r3 801b42e: eef8 7ae7 vcvt.f32.s32 s15, s15 801b432: 2000 movs r0, #0 801b434: eeb0 0a67 vmov.f32 s0, s15 801b438: f004 fdb6 bl 801ffa8 801b43c: 4603 mov r3, r0 801b43e: 2200 movs r2, #0 801b440: 4619 mov r1, r3 801b442: 4869 ldr r0, [pc, #420] @ (801b5e8 ) 801b444: f004 fa70 bl 801f928 UART3_Puts(" (mm)\r\n"); 801b448: 2200 movs r2, #0 801b44a: 496b ldr r1, [pc, #428] @ (801b5f8 ) 801b44c: 4866 ldr r0, [pc, #408] @ (801b5e8 ) 801b44e: f004 fa6b bl 801f928 UART3_Puts("[Range of Motion - R] "); 801b452: 2200 movs r2, #0 801b454: 4969 ldr r1, [pc, #420] @ (801b5fc ) 801b456: 4864 ldr r0, [pc, #400] @ (801b5e8 ) 801b458: f004 fa66 bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeLo[R],0)); 801b45c: 4b64 ldr r3, [pc, #400] @ (801b5f0 ) 801b45e: f9b3 3032 ldrsh.w r3, [r3, #50] @ 0x32 801b462: ee07 3a90 vmov s15, r3 801b466: eef8 7ae7 vcvt.f32.s32 s15, s15 801b46a: 2000 movs r0, #0 801b46c: eeb0 0a67 vmov.f32 s0, s15 801b470: f004 fd9a bl 801ffa8 801b474: 4603 mov r3, r0 801b476: 2200 movs r2, #0 801b478: 4619 mov r1, r3 801b47a: 485b ldr r0, [pc, #364] @ (801b5e8 ) 801b47c: f004 fa54 bl 801f928 UART3_Puts("~ "); 801b480: 2200 movs r2, #0 801b482: 495c ldr r1, [pc, #368] @ (801b5f4 ) 801b484: 4858 ldr r0, [pc, #352] @ (801b5e8 ) 801b486: f004 fa4f bl 801f928 UART3_Puts(Float2String(WP_Gym.Region.RangeHi[R],0)); 801b48a: 4b59 ldr r3, [pc, #356] @ (801b5f0 ) 801b48c: f9b3 3036 ldrsh.w r3, [r3, #54] @ 0x36 801b490: ee07 3a90 vmov s15, r3 801b494: eef8 7ae7 vcvt.f32.s32 s15, s15 801b498: 2000 movs r0, #0 801b49a: eeb0 0a67 vmov.f32 s0, s15 801b49e: f004 fd83 bl 801ffa8 801b4a2: 4603 mov r3, r0 801b4a4: 2200 movs r2, #0 801b4a6: 4619 mov r1, r3 801b4a8: 484f ldr r0, [pc, #316] @ (801b5e8 ) 801b4aa: f004 fa3d bl 801f928 UART3_Puts(" (mm)\r\n"); 801b4ae: 2200 movs r2, #0 801b4b0: 4951 ldr r1, [pc, #324] @ (801b5f8 ) 801b4b2: 484d ldr r0, [pc, #308] @ (801b5e8 ) 801b4b4: f004 fa38 bl 801f928 Return_1byte(SET_RANGE,1); // applied 801b4b8: 2101 movs r1, #1 801b4ba: 2062 movs r0, #98 @ 0x62 801b4bc: f7fe fc66 bl 8019d8c break; 801b4c0: bf00 nop break; 801b4c2: f002 baf4 b.w 801daae case SET_RANGE_DIGIT: DEBUG_printf("\r\n Set Range Digit\r\n"); 801b4c6: 484e ldr r0, [pc, #312] @ (801b600 ) 801b4c8: f004 fca2 bl 801fe10 UART3_Puts("\r\n"); 801b4cc: 2200 movs r2, #0 801b4ce: 494d ldr r1, [pc, #308] @ (801b604 ) 801b4d0: 4845 ldr r0, [pc, #276] @ (801b5e8 ) 801b4d2: f004 fa29 bl 801f928 if(WP_Weight.Ctrl.OnOffScale[L] > 0.0f || WP_Weight.Ctrl.OnOffScale[R] > 0.0f) { 801b4d6: 4b4c ldr r3, [pc, #304] @ (801b608 ) 801b4d8: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 801b4dc: eef5 7ac0 vcmpe.f32 s15, #0.0 801b4e0: eef1 fa10 vmrs APSR_nzcv, fpscr 801b4e4: dc07 bgt.n 801b4f6 801b4e6: 4b48 ldr r3, [pc, #288] @ (801b608 ) 801b4e8: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801b4ec: eef5 7ac0 vcmpe.f32 s15, #0.0 801b4f0: eef1 fa10 vmrs APSR_nzcv, fpscr 801b4f4: dd09 ble.n 801b50a // if(WP_Gym.WeightSet[L] >= 5.5f || WP_Gym.WeightSet[R] >= 5.5f) { UART3_Puts("Err: Turn Off Weight First\r\n"); 801b4f6: 2200 movs r2, #0 801b4f8: 4944 ldr r1, [pc, #272] @ (801b60c ) 801b4fa: 483b ldr r0, [pc, #236] @ (801b5e8 ) 801b4fc: f004 fa14 bl 801f928 WP_Gym.Region.RangeError = 1; 801b500: 4b3b ldr r3, [pc, #236] @ (801b5f0 ) 801b502: 2201 movs r2, #1 801b504: f883 204a strb.w r2, [r3, #74] @ 0x4a 801b508: e02c b.n 801b564 } else{ // 프로토콜은 0.05mm 단위(report task와 통일 목적) -> 근데 Range는 mm 단위로 다뤄짐 - WeightController() uint16_t position = (((uint16_t)UART3_Getc_NoClear(3) << 8) | UART3_Getc_NoClear(4))* 0.05f; 801b50a: 2103 movs r1, #3 801b50c: 4836 ldr r0, [pc, #216] @ (801b5e8 ) 801b50e: f004 fc89 bl 801fe24 801b512: 4603 mov r3, r0 801b514: b29b uxth r3, r3 801b516: 021c lsls r4, r3, #8 801b518: 2104 movs r1, #4 801b51a: 4833 ldr r0, [pc, #204] @ (801b5e8 ) 801b51c: f004 fc82 bl 801fe24 801b520: 4603 mov r3, r0 801b522: 4323 orrs r3, r4 801b524: ee07 3a90 vmov s15, r3 801b528: eef8 7ae7 vcvt.f32.s32 s15, s15 801b52c: ed9f 7a38 vldr s14, [pc, #224] @ 801b610 801b530: ee67 7a87 vmul.f32 s15, s15, s14 801b534: eefc 7ae7 vcvt.u32.f32 s15, s15 801b538: ee17 3a90 vmov r3, s15 801b53c: f8a7 3098 strh.w r3, [r7, #152] @ 0x98 SetRangeDigit(UART3_Getc_NoClear(1),UART3_Getc_NoClear(2), position); 801b540: 2101 movs r1, #1 801b542: 4829 ldr r0, [pc, #164] @ (801b5e8 ) 801b544: f004 fc6e bl 801fe24 801b548: 4603 mov r3, r0 801b54a: b2dc uxtb r4, r3 801b54c: 2102 movs r1, #2 801b54e: 4826 ldr r0, [pc, #152] @ (801b5e8 ) 801b550: f004 fc68 bl 801fe24 801b554: 4603 mov r3, r0 801b556: b2db uxtb r3, r3 801b558: f8b7 2098 ldrh.w r2, [r7, #152] @ 0x98 801b55c: 4619 mov r1, r3 801b55e: 4620 mov r0, r4 801b560: f7f8 f808 bl 8013574 } Return_1byte(SET_RANGE_DIGIT,1); // Not applied 801b564: 2101 movs r1, #1 801b566: 2072 movs r0, #114 @ 0x72 801b568: f7fe fc10 bl 8019d8c break; 801b56c: f002 bab0 b.w 801dad0 case SET_RANGE_INIT: if(WP_Weight.Ctrl.OnOffStatus[L] == OFF && WP_Weight.Ctrl.OnOffStatus[R] == OFF) { 801b570: 4b25 ldr r3, [pc, #148] @ (801b608 ) 801b572: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801b576: 2b00 cmp r3, #0 801b578: d11a bne.n 801b5b0 801b57a: 4b23 ldr r3, [pc, #140] @ (801b608 ) 801b57c: f893 302b ldrb.w r3, [r3, #43] @ 0x2b 801b580: 2b00 cmp r3, #0 801b582: d115 bne.n 801b5b0 switch(UART3_Getc_NoClear(1)){ 801b584: 2101 movs r1, #1 801b586: 4818 ldr r0, [pc, #96] @ (801b5e8 ) 801b588: f004 fc4c bl 801fe24 801b58c: 4603 mov r3, r0 801b58e: 2b02 cmp r3, #2 801b590: d106 bne.n 801b5a0 case LR: GymRange_Init(); 801b592: f7f5 fcc5 bl 8010f20 Return_1byte(SET_RANGE_INIT,0); // Applied 801b596: 2100 movs r1, #0 801b598: 2073 movs r0, #115 @ 0x73 801b59a: f7fe fbf7 bl 8019d8c break; 801b59e: e004 b.n 801b5aa default : Return_1byte(SET_RANGE_INIT,1); // Not applied 801b5a0: 2101 movs r1, #1 801b5a2: 2073 movs r0, #115 @ 0x73 801b5a4: f7fe fbf2 bl 8019d8c break; 801b5a8: bf00 nop switch(UART3_Getc_NoClear(1)){ 801b5aa: bf00 nop } }else { Return_1byte(SET_RANGE_INIT,1); // Not applied } break; 801b5ac: f002 ba90 b.w 801dad0 Return_1byte(SET_RANGE_INIT,1); // Not applied 801b5b0: 2101 movs r1, #1 801b5b2: 2073 movs r0, #115 @ 0x73 801b5b4: f7fe fbea bl 8019d8c break; 801b5b8: f002 ba8a b.w 801dad0 case POS_CALIB: DEBUG_printf("\r\n Position Calibrate\r\n"); 801b5bc: 4815 ldr r0, [pc, #84] @ (801b614 ) 801b5be: f004 fc27 bl 801fe10 // �ش� ������ ���Ű��� �����ϴ� ���� PositionCalibrate(UART3_Getc_NoClear(1)-1); 801b5c2: 2101 movs r1, #1 801b5c4: 4808 ldr r0, [pc, #32] @ (801b5e8 ) 801b5c6: f004 fc2d bl 801fe24 801b5ca: 4603 mov r3, r0 801b5cc: b2db uxtb r3, r3 801b5ce: 3b01 subs r3, #1 801b5d0: b2db uxtb r3, r3 801b5d2: 4618 mov r0, r3 801b5d4: f7f7 fec4 bl 8013360 // 기존 1,2,3에서 enum L,R,LR (0,1,2)로 변경함 (250704) // Return_0byte(POS_CALIB); UART3_Puts("Position Calibrated\r\n"); 801b5d8: 2200 movs r2, #0 801b5da: 490f ldr r1, [pc, #60] @ (801b618 ) 801b5dc: 4802 ldr r0, [pc, #8] @ (801b5e8 ) 801b5de: f004 f9a3 bl 801f928 break; 801b5e2: f002 ba75 b.w 801dad0 801b5e6: bf00 nop 801b5e8: 200053ec .word 0x200053ec 801b5ec: 0802a88c .word 0x0802a88c 801b5f0: 20000148 .word 0x20000148 801b5f4: 0802a8a4 .word 0x0802a8a4 801b5f8: 0802a8a8 .word 0x0802a8a8 801b5fc: 0802a8b0 .word 0x0802a8b0 801b600: 0802a8c8 .word 0x0802a8c8 801b604: 0802a870 .word 0x0802a870 801b608: 200001d8 .word 0x200001d8 801b60c: 0802a8e0 .word 0x0802a8e0 801b610: 3d4ccccd .word 0x3d4ccccd 801b614: 0802a900 .word 0x0802a900 801b618: 0802a918 .word 0x0802a918 case EMERGENCY: // 지금은 단계적으로 변경하는 효과가 전혀 없음!! 스케쥴러로 돌려야 함!! DEBUG_printf("\r\n Emergency\r\n"); 801b61c: 48ba ldr r0, [pc, #744] @ (801b908 ) 801b61e: f004 fbf7 bl 801fe10 // SetWeight(0,0,0,0); float Target_L,Target_R; Target_L = Motor1.Cmd.Icmd.q; 801b622: 4bba ldr r3, [pc, #744] @ (801b90c ) 801b624: 685b ldr r3, [r3, #4] 801b626: f8c7 3094 str.w r3, [r7, #148] @ 0x94 Target_R = Motor2.Cmd.Icmd.q; 801b62a: 4bb9 ldr r3, [pc, #740] @ (801b910 ) 801b62c: 685b ldr r3, [r3, #4] 801b62e: f8c7 3090 str.w r3, [r7, #144] @ 0x90 UART3_Puts("Emergency Release !!\r\n"); 801b632: 2200 movs r2, #0 801b634: 49b7 ldr r1, [pc, #732] @ (801b914 ) 801b636: 48b8 ldr r0, [pc, #736] @ (801b918 ) 801b638: f004 f976 bl 801f928 delay_msec(200); 801b63c: 48b7 ldr r0, [pc, #732] @ (801b91c ) 801b63e: f002 fa6b bl 801db18 <_delay> UART3_Puts("90% of SetWeight !!\r\n"); 801b642: 2200 movs r2, #0 801b644: 49b6 ldr r1, [pc, #728] @ (801b920 ) 801b646: 48b4 ldr r0, [pc, #720] @ (801b918 ) 801b648: f004 f96e bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.9; // 90% 801b64c: f8d7 0094 ldr.w r0, [r7, #148] @ 0x94 801b650: f7f4 feaa bl 80103a8 <__aeabi_f2d> 801b654: a3a0 add r3, pc, #640 @ (adr r3, 801b8d8 ) 801b656: e9d3 2300 ldrd r2, r3, [r3] 801b65a: f7f4 fefd bl 8010458 <__aeabi_dmul> 801b65e: 4602 mov r2, r0 801b660: 460b mov r3, r1 801b662: 4610 mov r0, r2 801b664: 4619 mov r1, r3 801b666: f7f5 f991 bl 801098c <__aeabi_d2f> 801b66a: 4603 mov r3, r0 801b66c: 4aa7 ldr r2, [pc, #668] @ (801b90c ) 801b66e: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = Target_R *0.9; 801b670: f8d7 0090 ldr.w r0, [r7, #144] @ 0x90 801b674: f7f4 fe98 bl 80103a8 <__aeabi_f2d> 801b678: a397 add r3, pc, #604 @ (adr r3, 801b8d8 ) 801b67a: e9d3 2300 ldrd r2, r3, [r3] 801b67e: f7f4 feeb bl 8010458 <__aeabi_dmul> 801b682: 4602 mov r2, r0 801b684: 460b mov r3, r1 801b686: 4610 mov r0, r2 801b688: 4619 mov r1, r3 801b68a: f7f5 f97f bl 801098c <__aeabi_d2f> 801b68e: 4603 mov r3, r0 801b690: 4a9f ldr r2, [pc, #636] @ (801b910 ) 801b692: 6053 str r3, [r2, #4] delay_msec(200); 801b694: 48a1 ldr r0, [pc, #644] @ (801b91c ) 801b696: f002 fa3f bl 801db18 <_delay> UART3_Puts("80% of SetWeight !!\r\n"); 801b69a: 2200 movs r2, #0 801b69c: 49a1 ldr r1, [pc, #644] @ (801b924 ) 801b69e: 489e ldr r0, [pc, #632] @ (801b918 ) 801b6a0: f004 f942 bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.8; // 80% 801b6a4: f8d7 0094 ldr.w r0, [r7, #148] @ 0x94 801b6a8: f7f4 fe7e bl 80103a8 <__aeabi_f2d> 801b6ac: a38c add r3, pc, #560 @ (adr r3, 801b8e0 ) 801b6ae: e9d3 2300 ldrd r2, r3, [r3] 801b6b2: f7f4 fed1 bl 8010458 <__aeabi_dmul> 801b6b6: 4602 mov r2, r0 801b6b8: 460b mov r3, r1 801b6ba: 4610 mov r0, r2 801b6bc: 4619 mov r1, r3 801b6be: f7f5 f965 bl 801098c <__aeabi_d2f> 801b6c2: 4603 mov r3, r0 801b6c4: 4a91 ldr r2, [pc, #580] @ (801b90c ) 801b6c6: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = Target_R *0.8; 801b6c8: f8d7 0090 ldr.w r0, [r7, #144] @ 0x90 801b6cc: f7f4 fe6c bl 80103a8 <__aeabi_f2d> 801b6d0: a383 add r3, pc, #524 @ (adr r3, 801b8e0 ) 801b6d2: e9d3 2300 ldrd r2, r3, [r3] 801b6d6: f7f4 febf bl 8010458 <__aeabi_dmul> 801b6da: 4602 mov r2, r0 801b6dc: 460b mov r3, r1 801b6de: 4610 mov r0, r2 801b6e0: 4619 mov r1, r3 801b6e2: f7f5 f953 bl 801098c <__aeabi_d2f> 801b6e6: 4603 mov r3, r0 801b6e8: 4a89 ldr r2, [pc, #548] @ (801b910 ) 801b6ea: 6053 str r3, [r2, #4] delay_msec(150); 801b6ec: 488e ldr r0, [pc, #568] @ (801b928 ) 801b6ee: f002 fa13 bl 801db18 <_delay> UART3_Puts("70% of SetWeight !!\r\n"); 801b6f2: 2200 movs r2, #0 801b6f4: 498d ldr r1, [pc, #564] @ (801b92c ) 801b6f6: 4888 ldr r0, [pc, #544] @ (801b918 ) 801b6f8: f004 f916 bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.7; // 70% 801b6fc: f8d7 0094 ldr.w r0, [r7, #148] @ 0x94 801b700: f7f4 fe52 bl 80103a8 <__aeabi_f2d> 801b704: a378 add r3, pc, #480 @ (adr r3, 801b8e8 ) 801b706: e9d3 2300 ldrd r2, r3, [r3] 801b70a: f7f4 fea5 bl 8010458 <__aeabi_dmul> 801b70e: 4602 mov r2, r0 801b710: 460b mov r3, r1 801b712: 4610 mov r0, r2 801b714: 4619 mov r1, r3 801b716: f7f5 f939 bl 801098c <__aeabi_d2f> 801b71a: 4603 mov r3, r0 801b71c: 4a7b ldr r2, [pc, #492] @ (801b90c ) 801b71e: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = Target_R *0.7; 801b720: f8d7 0090 ldr.w r0, [r7, #144] @ 0x90 801b724: f7f4 fe40 bl 80103a8 <__aeabi_f2d> 801b728: a36f add r3, pc, #444 @ (adr r3, 801b8e8 ) 801b72a: e9d3 2300 ldrd r2, r3, [r3] 801b72e: f7f4 fe93 bl 8010458 <__aeabi_dmul> 801b732: 4602 mov r2, r0 801b734: 460b mov r3, r1 801b736: 4610 mov r0, r2 801b738: 4619 mov r1, r3 801b73a: f7f5 f927 bl 801098c <__aeabi_d2f> 801b73e: 4603 mov r3, r0 801b740: 4a73 ldr r2, [pc, #460] @ (801b910 ) 801b742: 6053 str r3, [r2, #4] delay_msec(100); 801b744: 487a ldr r0, [pc, #488] @ (801b930 ) 801b746: f002 f9e7 bl 801db18 <_delay> UART3_Puts("60% of SetWeight !!\r\n"); 801b74a: 2200 movs r2, #0 801b74c: 4979 ldr r1, [pc, #484] @ (801b934 ) 801b74e: 4872 ldr r0, [pc, #456] @ (801b918 ) 801b750: f004 f8ea bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.6; // 60% 801b754: f8d7 0094 ldr.w r0, [r7, #148] @ 0x94 801b758: f7f4 fe26 bl 80103a8 <__aeabi_f2d> 801b75c: a364 add r3, pc, #400 @ (adr r3, 801b8f0 ) 801b75e: e9d3 2300 ldrd r2, r3, [r3] 801b762: f7f4 fe79 bl 8010458 <__aeabi_dmul> 801b766: 4602 mov r2, r0 801b768: 460b mov r3, r1 801b76a: 4610 mov r0, r2 801b76c: 4619 mov r1, r3 801b76e: f7f5 f90d bl 801098c <__aeabi_d2f> 801b772: 4603 mov r3, r0 801b774: 4a65 ldr r2, [pc, #404] @ (801b90c ) 801b776: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = Target_R *0.6; 801b778: f8d7 0090 ldr.w r0, [r7, #144] @ 0x90 801b77c: f7f4 fe14 bl 80103a8 <__aeabi_f2d> 801b780: a35b add r3, pc, #364 @ (adr r3, 801b8f0 ) 801b782: e9d3 2300 ldrd r2, r3, [r3] 801b786: f7f4 fe67 bl 8010458 <__aeabi_dmul> 801b78a: 4602 mov r2, r0 801b78c: 460b mov r3, r1 801b78e: 4610 mov r0, r2 801b790: 4619 mov r1, r3 801b792: f7f5 f8fb bl 801098c <__aeabi_d2f> 801b796: 4603 mov r3, r0 801b798: 4a5d ldr r2, [pc, #372] @ (801b910 ) 801b79a: 6053 str r3, [r2, #4] delay_msec(100); 801b79c: 4864 ldr r0, [pc, #400] @ (801b930 ) 801b79e: f002 f9bb bl 801db18 <_delay> UART3_Puts("50% of SetWeight !!\r\n"); 801b7a2: 2200 movs r2, #0 801b7a4: 4964 ldr r1, [pc, #400] @ (801b938 ) 801b7a6: 485c ldr r0, [pc, #368] @ (801b918 ) 801b7a8: f004 f8be bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.5; // 50% 801b7ac: edd7 7a25 vldr s15, [r7, #148] @ 0x94 801b7b0: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801b7b4: ee67 7a87 vmul.f32 s15, s15, s14 801b7b8: 4b54 ldr r3, [pc, #336] @ (801b90c ) 801b7ba: edc3 7a01 vstr s15, [r3, #4] Motor2.Cmd.Icmd.q = Target_R *0.5; 801b7be: edd7 7a24 vldr s15, [r7, #144] @ 0x90 801b7c2: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801b7c6: ee67 7a87 vmul.f32 s15, s15, s14 801b7ca: 4b51 ldr r3, [pc, #324] @ (801b910 ) 801b7cc: edc3 7a01 vstr s15, [r3, #4] delay_msec(50); 801b7d0: 485a ldr r0, [pc, #360] @ (801b93c ) 801b7d2: f002 f9a1 bl 801db18 <_delay> UART3_Puts("30% of SetWeight !!\r\n"); 801b7d6: 2200 movs r2, #0 801b7d8: 4959 ldr r1, [pc, #356] @ (801b940 ) 801b7da: 484f ldr r0, [pc, #316] @ (801b918 ) 801b7dc: f004 f8a4 bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.3; // 30% 801b7e0: f8d7 0094 ldr.w r0, [r7, #148] @ 0x94 801b7e4: f7f4 fde0 bl 80103a8 <__aeabi_f2d> 801b7e8: a343 add r3, pc, #268 @ (adr r3, 801b8f8 ) 801b7ea: e9d3 2300 ldrd r2, r3, [r3] 801b7ee: f7f4 fe33 bl 8010458 <__aeabi_dmul> 801b7f2: 4602 mov r2, r0 801b7f4: 460b mov r3, r1 801b7f6: 4610 mov r0, r2 801b7f8: 4619 mov r1, r3 801b7fa: f7f5 f8c7 bl 801098c <__aeabi_d2f> 801b7fe: 4603 mov r3, r0 801b800: 4a42 ldr r2, [pc, #264] @ (801b90c ) 801b802: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = Target_R *0.3; 801b804: f8d7 0090 ldr.w r0, [r7, #144] @ 0x90 801b808: f7f4 fdce bl 80103a8 <__aeabi_f2d> 801b80c: a33a add r3, pc, #232 @ (adr r3, 801b8f8 ) 801b80e: e9d3 2300 ldrd r2, r3, [r3] 801b812: f7f4 fe21 bl 8010458 <__aeabi_dmul> 801b816: 4602 mov r2, r0 801b818: 460b mov r3, r1 801b81a: 4610 mov r0, r2 801b81c: 4619 mov r1, r3 801b81e: f7f5 f8b5 bl 801098c <__aeabi_d2f> 801b822: 4603 mov r3, r0 801b824: 4a3a ldr r2, [pc, #232] @ (801b910 ) 801b826: 6053 str r3, [r2, #4] delay_msec(25); 801b828: 4846 ldr r0, [pc, #280] @ (801b944 ) 801b82a: f002 f975 bl 801db18 <_delay> UART3_Puts("10% of SetWeight !!\r\n"); 801b82e: 2200 movs r2, #0 801b830: 4945 ldr r1, [pc, #276] @ (801b948 ) 801b832: 4839 ldr r0, [pc, #228] @ (801b918 ) 801b834: f004 f878 bl 801f928 Motor1.Cmd.Icmd.q = Target_L *0.1; // 10% 801b838: f8d7 0094 ldr.w r0, [r7, #148] @ 0x94 801b83c: f7f4 fdb4 bl 80103a8 <__aeabi_f2d> 801b840: a32f add r3, pc, #188 @ (adr r3, 801b900 ) 801b842: e9d3 2300 ldrd r2, r3, [r3] 801b846: f7f4 fe07 bl 8010458 <__aeabi_dmul> 801b84a: 4602 mov r2, r0 801b84c: 460b mov r3, r1 801b84e: 4610 mov r0, r2 801b850: 4619 mov r1, r3 801b852: f7f5 f89b bl 801098c <__aeabi_d2f> 801b856: 4603 mov r3, r0 801b858: 4a2c ldr r2, [pc, #176] @ (801b90c ) 801b85a: 6053 str r3, [r2, #4] Motor2.Cmd.Icmd.q = Target_R *0.1; 801b85c: f8d7 0090 ldr.w r0, [r7, #144] @ 0x90 801b860: f7f4 fda2 bl 80103a8 <__aeabi_f2d> 801b864: a326 add r3, pc, #152 @ (adr r3, 801b900 ) 801b866: e9d3 2300 ldrd r2, r3, [r3] 801b86a: f7f4 fdf5 bl 8010458 <__aeabi_dmul> 801b86e: 4602 mov r2, r0 801b870: 460b mov r3, r1 801b872: 4610 mov r0, r2 801b874: 4619 mov r1, r3 801b876: f7f5 f889 bl 801098c <__aeabi_d2f> 801b87a: 4603 mov r3, r0 801b87c: 4a24 ldr r2, [pc, #144] @ (801b910 ) 801b87e: 6053 str r3, [r2, #4] delay_msec(25); 801b880: 4830 ldr r0, [pc, #192] @ (801b944 ) 801b882: f002 f949 bl 801db18 <_delay> UART3_Puts("No Weight !!\r\n"); 801b886: 2200 movs r2, #0 801b888: 4930 ldr r1, [pc, #192] @ (801b94c ) 801b88a: 4823 ldr r0, [pc, #140] @ (801b918 ) 801b88c: f004 f84c bl 801f928 UART3_Puts("** Please Reboot RoomFit **\r\n"); 801b890: 2200 movs r2, #0 801b892: 492f ldr r1, [pc, #188] @ (801b950 ) 801b894: 4820 ldr r0, [pc, #128] @ (801b918 ) 801b896: f004 f847 bl 801f928 Motor1.Cmd.Icmd.q = 0; // 0% 801b89a: 4b1c ldr r3, [pc, #112] @ (801b90c ) 801b89c: f04f 0200 mov.w r2, #0 801b8a0: 605a str r2, [r3, #4] Motor2.Cmd.Icmd.q = 0; 801b8a2: 4b1b ldr r3, [pc, #108] @ (801b910 ) 801b8a4: f04f 0200 mov.w r2, #0 801b8a8: 605a str r2, [r3, #4] WP_Gym.WeightSet[L] = 0.0f; 801b8aa: 4b2a ldr r3, [pc, #168] @ (801b954 ) 801b8ac: f04f 0200 mov.w r2, #0 801b8b0: 60da str r2, [r3, #12] WP_Gym.WeightSet[R] = 0.0f; 801b8b2: 4b28 ldr r3, [pc, #160] @ (801b954 ) 801b8b4: f04f 0200 mov.w r2, #0 801b8b8: 611a str r2, [r3, #16] Debug_DriveMotor = 0; 801b8ba: 4b27 ldr r3, [pc, #156] @ (801b958 ) 801b8bc: 2200 movs r2, #0 801b8be: 701a strb r2, [r3, #0] check_Emergency++; 801b8c0: 4b26 ldr r3, [pc, #152] @ (801b95c ) 801b8c2: 681b ldr r3, [r3, #0] 801b8c4: 3301 adds r3, #1 801b8c6: 4a25 ldr r2, [pc, #148] @ (801b95c ) 801b8c8: 6013 str r3, [r2, #0] Return_0byte(EMERGENCY); 801b8ca: 2064 movs r0, #100 @ 0x64 801b8cc: f7fe fa2a bl 8019d24 break; 801b8d0: f002 b8fe b.w 801dad0 801b8d4: f3af 8000 nop.w 801b8d8: cccccccd .word 0xcccccccd 801b8dc: 3feccccc .word 0x3feccccc 801b8e0: 9999999a .word 0x9999999a 801b8e4: 3fe99999 .word 0x3fe99999 801b8e8: 66666666 .word 0x66666666 801b8ec: 3fe66666 .word 0x3fe66666 801b8f0: 33333333 .word 0x33333333 801b8f4: 3fe33333 .word 0x3fe33333 801b8f8: 33333333 .word 0x33333333 801b8fc: 3fd33333 .word 0x3fd33333 801b900: 9999999a .word 0x9999999a 801b904: 3fb99999 .word 0x3fb99999 801b908: 0802a930 .word 0x0802a930 801b90c: 20000574 .word 0x20000574 801b910: 20000704 .word 0x20000704 801b914: 0802a940 .word 0x0802a940 801b918: 200053ec .word 0x200053ec 801b91c: 002932e0 .word 0x002932e0 801b920: 0802a958 .word 0x0802a958 801b924: 0802a970 .word 0x0802a970 801b928: 001ee628 .word 0x001ee628 801b92c: 0802a988 .word 0x0802a988 801b930: 00149970 .word 0x00149970 801b934: 0802a9a0 .word 0x0802a9a0 801b938: 0802a9b8 .word 0x0802a9b8 801b93c: 000a4cb8 .word 0x000a4cb8 801b940: 0802a9d0 .word 0x0802a9d0 801b944: 0005265c .word 0x0005265c 801b948: 0802a9e8 .word 0x0802a9e8 801b94c: 0802aa00 .word 0x0802aa00 801b950: 0802aa10 .word 0x0802aa10 801b954: 20000148 .word 0x20000148 801b958: 20000c04 .word 0x20000c04 801b95c: 20000c2c .word 0x20000c2c case WEIGHTONOFF: switch(UART3_Getc_NoClear(1)){ 801b960: 2101 movs r1, #1 801b962: 48ad ldr r0, [pc, #692] @ (801bc18 ) 801b964: f004 fa5e bl 801fe24 801b968: 4603 mov r3, r0 801b96a: 2b00 cmp r3, #0 801b96c: d01d beq.n 801b9aa 801b96e: 2b01 cmp r3, #1 801b970: f042 809f bne.w 801dab2 case ON: if(WP_Weight.Ctrl.OnOffStatus[L] == ON){ 801b974: 4ba9 ldr r3, [pc, #676] @ (801bc1c ) 801b976: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801b97a: 2b01 cmp r3, #1 801b97c: d10c bne.n 801b998 Return_1byte(WEIGHTONOFF, WP_Weight.Ctrl.OnOffStatus[L]); 801b97e: 4ba7 ldr r3, [pc, #668] @ (801bc1c ) 801b980: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801b984: 4619 mov r1, r3 801b986: 2065 movs r0, #101 @ 0x65 801b988: f7fe fa00 bl 8019d8c UART3_Puts("Weight is already ON\r\n"); 801b98c: 2200 movs r2, #0 801b98e: 49a4 ldr r1, [pc, #656] @ (801bc20 ) 801b990: 48a1 ldr r0, [pc, #644] @ (801bc18 ) 801b992: f003 ffc9 bl 801f928 // 온으로 변경 WP_Weight.Ctrl.OnOffStatus[L] = ON; WP_Weight.Ctrl.OnOffStatus[R] = ON; // 상태 리턴은 WESPION_App.c에서 수행 완료 후 보냄 } break; 801b996: e023 b.n 801b9e0 WP_Weight.Ctrl.OnOffStatus[L] = ON; 801b998: 4ba0 ldr r3, [pc, #640] @ (801bc1c ) 801b99a: 2201 movs r2, #1 801b99c: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = ON; 801b9a0: 4b9e ldr r3, [pc, #632] @ (801bc1c ) 801b9a2: 2201 movs r2, #1 801b9a4: f883 202b strb.w r2, [r3, #43] @ 0x2b break; 801b9a8: e01a b.n 801b9e0 case OFF: if(WP_Weight.Ctrl.OnOffStatus[L] == OFF){ 801b9aa: 4b9c ldr r3, [pc, #624] @ (801bc1c ) 801b9ac: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801b9b0: 2b00 cmp r3, #0 801b9b2: d10c bne.n 801b9ce Return_1byte(WEIGHTONOFF, WP_Weight.Ctrl.OnOffStatus[L]); 801b9b4: 4b99 ldr r3, [pc, #612] @ (801bc1c ) 801b9b6: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801b9ba: 4619 mov r1, r3 801b9bc: 2065 movs r0, #101 @ 0x65 801b9be: f7fe f9e5 bl 8019d8c UART3_Puts("Weight is already OFF\r\n"); 801b9c2: 2200 movs r2, #0 801b9c4: 4997 ldr r1, [pc, #604] @ (801bc24 ) 801b9c6: 4894 ldr r0, [pc, #592] @ (801bc18 ) 801b9c8: f003 ffae bl 801f928 // 오프로 변경 WP_Weight.Ctrl.OnOffStatus[L] = OFF; WP_Weight.Ctrl.OnOffStatus[R] = OFF; // 상태 리턴은 WESPION_App.c에서 수행 완료 후 보냄 } break; 801b9cc: e007 b.n 801b9de WP_Weight.Ctrl.OnOffStatus[L] = OFF; 801b9ce: 4b93 ldr r3, [pc, #588] @ (801bc1c ) 801b9d0: 2200 movs r2, #0 801b9d2: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = OFF; 801b9d6: 4b91 ldr r3, [pc, #580] @ (801bc1c ) 801b9d8: 2200 movs r2, #0 801b9da: f883 202b strb.w r2, [r3, #43] @ 0x2b break; 801b9de: bf00 nop } break; 801b9e0: f002 b867 b.w 801dab2 case WEIGHTPLUS: // delay_msec(5); LED_Blink_ALL(30,10,40,5); 801b9e4: 2305 movs r3, #5 801b9e6: 2228 movs r2, #40 @ 0x28 801b9e8: 210a movs r1, #10 801b9ea: 201e movs r0, #30 801b9ec: f7fd fc76 bl 80192dc switch(UART3_Getc_NoClear(1)){ 801b9f0: 2101 movs r1, #1 801b9f2: 4889 ldr r0, [pc, #548] @ (801bc18 ) 801b9f4: f004 fa16 bl 801fe24 801b9f8: 4603 mov r3, r0 801b9fa: 2b02 cmp r3, #2 801b9fc: f000 8101 beq.w 801bc02 801ba00: 2b02 cmp r3, #2 801ba02: f302 8058 bgt.w 801dab6 801ba06: 2b00 cmp r3, #0 801ba08: d003 beq.n 801ba12 801ba0a: 2b01 cmp r3, #1 801ba0c: d07d beq.n 801bb0a Task_Start_10ms_1(Task10ms_1); break; } break; } break; 801ba0e: f002 b852 b.w 801dab6 switch(UART3_Getc_NoClear(2)){ 801ba12: 2102 movs r1, #2 801ba14: 4880 ldr r0, [pc, #512] @ (801bc18 ) 801ba16: f004 fa05 bl 801fe24 801ba1a: 4603 mov r3, r0 801ba1c: 2b01 cmp r3, #1 801ba1e: d002 beq.n 801ba26 801ba20: 2b02 cmp r3, #2 801ba22: d034 beq.n 801ba8e break; 801ba24: e1c6 b.n 801bdb4 WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] + 0.5f; 801ba26: 4b80 ldr r3, [pc, #512] @ (801bc28 ) 801ba28: edd3 7a01 vldr s15, [r3, #4] 801ba2c: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801ba30: ee77 7a87 vadd.f32 s15, s15, s14 801ba34: 4b7c ldr r3, [pc, #496] @ (801bc28 ) 801ba36: edc3 7a01 vstr s15, [r3, #4] if(WP_Gym.WeightBLE[L] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight){ 801ba3a: 4b7b ldr r3, [pc, #492] @ (801bc28 ) 801ba3c: ed93 7a01 vldr s14, [r3, #4] 801ba40: 4b7a ldr r3, [pc, #488] @ (801bc2c ) 801ba42: edd3 6a05 vldr s13, [r3, #20] 801ba46: 4b79 ldr r3, [pc, #484] @ (801bc2c ) 801ba48: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801ba4c: ee66 7aa7 vmul.f32 s15, s13, s15 801ba50: eeb4 7ae7 vcmpe.f32 s14, s15 801ba54: eef1 fa10 vmrs APSR_nzcv, fpscr 801ba58: db13 blt.n 801ba82 delay_msec(5); 801ba5a: 4875 ldr r0, [pc, #468] @ (801bc30 ) 801ba5c: f002 f85c bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801ba60: 2332 movs r3, #50 @ 0x32 801ba62: 220a movs r2, #10 801ba64: 210a movs r1, #10 801ba66: 2096 movs r0, #150 @ 0x96 801ba68: f7fd fc38 bl 80192dc WP_Gym.WeightBLE[L] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801ba6c: 4b6f ldr r3, [pc, #444] @ (801bc2c ) 801ba6e: ed93 7a05 vldr s14, [r3, #20] 801ba72: 4b6e ldr r3, [pc, #440] @ (801bc2c ) 801ba74: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801ba78: ee67 7a27 vmul.f32 s15, s14, s15 801ba7c: 4b6a ldr r3, [pc, #424] @ (801bc28 ) 801ba7e: edc3 7a01 vstr s15, [r3, #4] Task_Stop_10ms_1(); 801ba82: f002 fa01 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801ba86: 486b ldr r0, [pc, #428] @ (801bc34 ) 801ba88: f002 f996 bl 801ddb8 break; 801ba8c: e03c b.n 801bb08 delay_msec(15); 801ba8e: 486a ldr r0, [pc, #424] @ (801bc38 ) 801ba90: f002 f842 bl 801db18 <_delay> LED_Blink_ALL(40,10,50,10); 801ba94: 230a movs r3, #10 801ba96: 2232 movs r2, #50 @ 0x32 801ba98: 210a movs r1, #10 801ba9a: 2028 movs r0, #40 @ 0x28 801ba9c: f7fd fc1e bl 80192dc WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] + 5.0f; 801baa0: 4b61 ldr r3, [pc, #388] @ (801bc28 ) 801baa2: edd3 7a01 vldr s15, [r3, #4] 801baa6: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801baaa: ee77 7a87 vadd.f32 s15, s15, s14 801baae: 4b5e ldr r3, [pc, #376] @ (801bc28 ) 801bab0: edc3 7a01 vstr s15, [r3, #4] if(WP_Gym.WeightBLE[L] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight){ 801bab4: 4b5c ldr r3, [pc, #368] @ (801bc28 ) 801bab6: ed93 7a01 vldr s14, [r3, #4] 801baba: 4b5c ldr r3, [pc, #368] @ (801bc2c ) 801babc: edd3 6a05 vldr s13, [r3, #20] 801bac0: 4b5a ldr r3, [pc, #360] @ (801bc2c ) 801bac2: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bac6: ee66 7aa7 vmul.f32 s15, s13, s15 801baca: eeb4 7ae7 vcmpe.f32 s14, s15 801bace: eef1 fa10 vmrs APSR_nzcv, fpscr 801bad2: db13 blt.n 801bafc delay_msec(15); 801bad4: 4858 ldr r0, [pc, #352] @ (801bc38 ) 801bad6: f002 f81f bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bada: 2332 movs r3, #50 @ 0x32 801badc: 220a movs r2, #10 801bade: 210a movs r1, #10 801bae0: 2096 movs r0, #150 @ 0x96 801bae2: f7fd fbfb bl 80192dc WP_Gym.WeightBLE[L] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bae6: 4b51 ldr r3, [pc, #324] @ (801bc2c ) 801bae8: ed93 7a05 vldr s14, [r3, #20] 801baec: 4b4f ldr r3, [pc, #316] @ (801bc2c ) 801baee: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801baf2: ee67 7a27 vmul.f32 s15, s14, s15 801baf6: 4b4c ldr r3, [pc, #304] @ (801bc28 ) 801baf8: edc3 7a01 vstr s15, [r3, #4] Task_Stop_10ms_1(); 801bafc: f002 f9c4 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bb00: 484c ldr r0, [pc, #304] @ (801bc34 ) 801bb02: f002 f959 bl 801ddb8 break; 801bb06: bf00 nop break; 801bb08: e154 b.n 801bdb4 switch(UART3_Getc_NoClear(2)){ 801bb0a: 2102 movs r1, #2 801bb0c: 4842 ldr r0, [pc, #264] @ (801bc18 ) 801bb0e: f004 f989 bl 801fe24 801bb12: 4603 mov r3, r0 801bb14: 2b01 cmp r3, #1 801bb16: d002 beq.n 801bb1e 801bb18: 2b02 cmp r3, #2 801bb1a: d034 beq.n 801bb86 break; 801bb1c: e14a b.n 801bdb4 WP_Gym.WeightBLE[R] = WP_Gym.WeightBLE[R] + 0.5f; 801bb1e: 4b42 ldr r3, [pc, #264] @ (801bc28 ) 801bb20: edd3 7a02 vldr s15, [r3, #8] 801bb24: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801bb28: ee77 7a87 vadd.f32 s15, s15, s14 801bb2c: 4b3e ldr r3, [pc, #248] @ (801bc28 ) 801bb2e: edc3 7a02 vstr s15, [r3, #8] if(WP_Gym.WeightBLE[R] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight){ 801bb32: 4b3d ldr r3, [pc, #244] @ (801bc28 ) 801bb34: ed93 7a02 vldr s14, [r3, #8] 801bb38: 4b3c ldr r3, [pc, #240] @ (801bc2c ) 801bb3a: edd3 6a05 vldr s13, [r3, #20] 801bb3e: 4b3b ldr r3, [pc, #236] @ (801bc2c ) 801bb40: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bb44: ee66 7aa7 vmul.f32 s15, s13, s15 801bb48: eeb4 7ae7 vcmpe.f32 s14, s15 801bb4c: eef1 fa10 vmrs APSR_nzcv, fpscr 801bb50: db13 blt.n 801bb7a delay_msec(5); 801bb52: 4837 ldr r0, [pc, #220] @ (801bc30 ) 801bb54: f001 ffe0 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bb58: 2332 movs r3, #50 @ 0x32 801bb5a: 220a movs r2, #10 801bb5c: 210a movs r1, #10 801bb5e: 2096 movs r0, #150 @ 0x96 801bb60: f7fd fbbc bl 80192dc WP_Gym.WeightBLE[R] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bb64: 4b31 ldr r3, [pc, #196] @ (801bc2c ) 801bb66: ed93 7a05 vldr s14, [r3, #20] 801bb6a: 4b30 ldr r3, [pc, #192] @ (801bc2c ) 801bb6c: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bb70: ee67 7a27 vmul.f32 s15, s14, s15 801bb74: 4b2c ldr r3, [pc, #176] @ (801bc28 ) 801bb76: edc3 7a02 vstr s15, [r3, #8] Task_Stop_10ms_1(); 801bb7a: f002 f985 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bb7e: 482d ldr r0, [pc, #180] @ (801bc34 ) 801bb80: f002 f91a bl 801ddb8 break; 801bb84: e03c b.n 801bc00 delay_msec(15); 801bb86: 482c ldr r0, [pc, #176] @ (801bc38 ) 801bb88: f001 ffc6 bl 801db18 <_delay> LED_Blink_ALL(40,10,50,10); 801bb8c: 230a movs r3, #10 801bb8e: 2232 movs r2, #50 @ 0x32 801bb90: 210a movs r1, #10 801bb92: 2028 movs r0, #40 @ 0x28 801bb94: f7fd fba2 bl 80192dc WP_Gym.WeightBLE[R] = WP_Gym.WeightBLE[R] + 5.0f; 801bb98: 4b23 ldr r3, [pc, #140] @ (801bc28 ) 801bb9a: edd3 7a02 vldr s15, [r3, #8] 801bb9e: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801bba2: ee77 7a87 vadd.f32 s15, s15, s14 801bba6: 4b20 ldr r3, [pc, #128] @ (801bc28 ) 801bba8: edc3 7a02 vstr s15, [r3, #8] if(WP_Gym.WeightBLE[R] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight){ 801bbac: 4b1e ldr r3, [pc, #120] @ (801bc28 ) 801bbae: ed93 7a02 vldr s14, [r3, #8] 801bbb2: 4b1e ldr r3, [pc, #120] @ (801bc2c ) 801bbb4: edd3 6a05 vldr s13, [r3, #20] 801bbb8: 4b1c ldr r3, [pc, #112] @ (801bc2c ) 801bbba: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bbbe: ee66 7aa7 vmul.f32 s15, s13, s15 801bbc2: eeb4 7ae7 vcmpe.f32 s14, s15 801bbc6: eef1 fa10 vmrs APSR_nzcv, fpscr 801bbca: db13 blt.n 801bbf4 delay_msec(15); 801bbcc: 481a ldr r0, [pc, #104] @ (801bc38 ) 801bbce: f001 ffa3 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bbd2: 2332 movs r3, #50 @ 0x32 801bbd4: 220a movs r2, #10 801bbd6: 210a movs r1, #10 801bbd8: 2096 movs r0, #150 @ 0x96 801bbda: f7fd fb7f bl 80192dc WP_Gym.WeightBLE[R] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bbde: 4b13 ldr r3, [pc, #76] @ (801bc2c ) 801bbe0: ed93 7a05 vldr s14, [r3, #20] 801bbe4: 4b11 ldr r3, [pc, #68] @ (801bc2c ) 801bbe6: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bbea: ee67 7a27 vmul.f32 s15, s14, s15 801bbee: 4b0e ldr r3, [pc, #56] @ (801bc28 ) 801bbf0: edc3 7a02 vstr s15, [r3, #8] Task_Stop_10ms_1(); 801bbf4: f002 f948 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bbf8: 480e ldr r0, [pc, #56] @ (801bc34 ) 801bbfa: f002 f8dd bl 801ddb8 break; 801bbfe: bf00 nop break; 801bc00: e0d8 b.n 801bdb4 switch(UART3_Getc_NoClear(2)){ 801bc02: 2102 movs r1, #2 801bc04: 4804 ldr r0, [pc, #16] @ (801bc18 ) 801bc06: f004 f90d bl 801fe24 801bc0a: 4603 mov r3, r0 801bc0c: 2b01 cmp r3, #1 801bc0e: d015 beq.n 801bc3c 801bc10: 2b02 cmp r3, #2 801bc12: d06c beq.n 801bcee break; 801bc14: e0cd b.n 801bdb2 801bc16: bf00 nop 801bc18: 200053ec .word 0x200053ec 801bc1c: 200001d8 .word 0x200001d8 801bc20: 0802aa30 .word 0x0802aa30 801bc24: 0802aa48 .word 0x0802aa48 801bc28: 20000148 .word 0x20000148 801bc2c: 20000110 .word 0x20000110 801bc30: 000107ac .word 0x000107ac 801bc34: 0801deb9 .word 0x0801deb9 801bc38: 00031704 .word 0x00031704 WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] + 0.5f; 801bc3c: 4bb0 ldr r3, [pc, #704] @ (801bf00 ) 801bc3e: edd3 7a01 vldr s15, [r3, #4] 801bc42: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801bc46: ee77 7a87 vadd.f32 s15, s15, s14 801bc4a: 4bad ldr r3, [pc, #692] @ (801bf00 ) 801bc4c: edc3 7a01 vstr s15, [r3, #4] WP_Gym.WeightBLE[R] = WP_Gym.WeightBLE[R] + 0.5f; 801bc50: 4bab ldr r3, [pc, #684] @ (801bf00 ) 801bc52: edd3 7a02 vldr s15, [r3, #8] 801bc56: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801bc5a: ee77 7a87 vadd.f32 s15, s15, s14 801bc5e: 4ba8 ldr r3, [pc, #672] @ (801bf00 ) 801bc60: edc3 7a02 vstr s15, [r3, #8] if(WP_Gym.WeightBLE[L] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight || WP_Gym.WeightBLE[R] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight){ 801bc64: 4ba6 ldr r3, [pc, #664] @ (801bf00 ) 801bc66: ed93 7a01 vldr s14, [r3, #4] 801bc6a: 4ba6 ldr r3, [pc, #664] @ (801bf04 ) 801bc6c: edd3 6a05 vldr s13, [r3, #20] 801bc70: 4ba4 ldr r3, [pc, #656] @ (801bf04 ) 801bc72: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bc76: ee66 7aa7 vmul.f32 s15, s13, s15 801bc7a: eeb4 7ae7 vcmpe.f32 s14, s15 801bc7e: eef1 fa10 vmrs APSR_nzcv, fpscr 801bc82: da0f bge.n 801bca4 801bc84: 4b9e ldr r3, [pc, #632] @ (801bf00 ) 801bc86: ed93 7a02 vldr s14, [r3, #8] 801bc8a: 4b9e ldr r3, [pc, #632] @ (801bf04 ) 801bc8c: edd3 6a05 vldr s13, [r3, #20] 801bc90: 4b9c ldr r3, [pc, #624] @ (801bf04 ) 801bc92: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bc96: ee66 7aa7 vmul.f32 s15, s13, s15 801bc9a: eeb4 7ae7 vcmpe.f32 s14, s15 801bc9e: eef1 fa10 vmrs APSR_nzcv, fpscr 801bca2: db1e blt.n 801bce2 delay_msec(15); 801bca4: 4898 ldr r0, [pc, #608] @ (801bf08 ) 801bca6: f001 ff37 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bcaa: 2332 movs r3, #50 @ 0x32 801bcac: 220a movs r2, #10 801bcae: 210a movs r1, #10 801bcb0: 2096 movs r0, #150 @ 0x96 801bcb2: f7fd fb13 bl 80192dc WP_Gym.WeightBLE[L] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bcb6: 4b93 ldr r3, [pc, #588] @ (801bf04 ) 801bcb8: ed93 7a05 vldr s14, [r3, #20] 801bcbc: 4b91 ldr r3, [pc, #580] @ (801bf04 ) 801bcbe: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bcc2: ee67 7a27 vmul.f32 s15, s14, s15 801bcc6: 4b8e ldr r3, [pc, #568] @ (801bf00 ) 801bcc8: edc3 7a01 vstr s15, [r3, #4] WP_Gym.WeightBLE[R] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bccc: 4b8d ldr r3, [pc, #564] @ (801bf04 ) 801bcce: ed93 7a05 vldr s14, [r3, #20] 801bcd2: 4b8c ldr r3, [pc, #560] @ (801bf04 ) 801bcd4: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bcd8: ee67 7a27 vmul.f32 s15, s14, s15 801bcdc: 4b88 ldr r3, [pc, #544] @ (801bf00 ) 801bcde: edc3 7a02 vstr s15, [r3, #8] Task_Stop_10ms_1(); 801bce2: f002 f8d1 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bce6: 4889 ldr r0, [pc, #548] @ (801bf0c ) 801bce8: f002 f866 bl 801ddb8 break; 801bcec: e061 b.n 801bdb2 delay_msec(15); 801bcee: 4886 ldr r0, [pc, #536] @ (801bf08 ) 801bcf0: f001 ff12 bl 801db18 <_delay> LED_Blink_ALL(40,10,50,10); 801bcf4: 230a movs r3, #10 801bcf6: 2232 movs r2, #50 @ 0x32 801bcf8: 210a movs r1, #10 801bcfa: 2028 movs r0, #40 @ 0x28 801bcfc: f7fd faee bl 80192dc WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] + 5.0f; 801bd00: 4b7f ldr r3, [pc, #508] @ (801bf00 ) 801bd02: edd3 7a01 vldr s15, [r3, #4] 801bd06: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801bd0a: ee77 7a87 vadd.f32 s15, s15, s14 801bd0e: 4b7c ldr r3, [pc, #496] @ (801bf00 ) 801bd10: edc3 7a01 vstr s15, [r3, #4] WP_Gym.WeightBLE[R] = WP_Gym.WeightBLE[R] + 5.0f; 801bd14: 4b7a ldr r3, [pc, #488] @ (801bf00 ) 801bd16: edd3 7a02 vldr s15, [r3, #8] 801bd1a: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801bd1e: ee77 7a87 vadd.f32 s15, s15, s14 801bd22: 4b77 ldr r3, [pc, #476] @ (801bf00 ) 801bd24: edc3 7a02 vstr s15, [r3, #8] if(WP_Gym.WeightBLE[L] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight || WP_Gym.WeightBLE[R] >= WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight){ 801bd28: 4b75 ldr r3, [pc, #468] @ (801bf00 ) 801bd2a: ed93 7a01 vldr s14, [r3, #4] 801bd2e: 4b75 ldr r3, [pc, #468] @ (801bf04 ) 801bd30: edd3 6a05 vldr s13, [r3, #20] 801bd34: 4b73 ldr r3, [pc, #460] @ (801bf04 ) 801bd36: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bd3a: ee66 7aa7 vmul.f32 s15, s13, s15 801bd3e: eeb4 7ae7 vcmpe.f32 s14, s15 801bd42: eef1 fa10 vmrs APSR_nzcv, fpscr 801bd46: da0f bge.n 801bd68 801bd48: 4b6d ldr r3, [pc, #436] @ (801bf00 ) 801bd4a: ed93 7a02 vldr s14, [r3, #8] 801bd4e: 4b6d ldr r3, [pc, #436] @ (801bf04 ) 801bd50: edd3 6a05 vldr s13, [r3, #20] 801bd54: 4b6b ldr r3, [pc, #428] @ (801bf04 ) 801bd56: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bd5a: ee66 7aa7 vmul.f32 s15, s13, s15 801bd5e: eeb4 7ae7 vcmpe.f32 s14, s15 801bd62: eef1 fa10 vmrs APSR_nzcv, fpscr 801bd66: db1e blt.n 801bda6 delay_msec(15); 801bd68: 4867 ldr r0, [pc, #412] @ (801bf08 ) 801bd6a: f001 fed5 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bd6e: 2332 movs r3, #50 @ 0x32 801bd70: 220a movs r2, #10 801bd72: 210a movs r1, #10 801bd74: 2096 movs r0, #150 @ 0x96 801bd76: f7fd fab1 bl 80192dc WP_Gym.WeightBLE[L] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bd7a: 4b62 ldr r3, [pc, #392] @ (801bf04 ) 801bd7c: ed93 7a05 vldr s14, [r3, #20] 801bd80: 4b60 ldr r3, [pc, #384] @ (801bf04 ) 801bd82: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bd86: ee67 7a27 vmul.f32 s15, s14, s15 801bd8a: 4b5d ldr r3, [pc, #372] @ (801bf00 ) 801bd8c: edc3 7a01 vstr s15, [r3, #4] WP_Gym.WeightBLE[R] = WP_Machine.MaxCurrent * WP_Machine.Scale_Current2Weight; 801bd90: 4b5c ldr r3, [pc, #368] @ (801bf04 ) 801bd92: ed93 7a05 vldr s14, [r3, #20] 801bd96: 4b5b ldr r3, [pc, #364] @ (801bf04 ) 801bd98: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801bd9c: ee67 7a27 vmul.f32 s15, s14, s15 801bda0: 4b57 ldr r3, [pc, #348] @ (801bf00 ) 801bda2: edc3 7a02 vstr s15, [r3, #8] Task_Stop_10ms_1(); 801bda6: f002 f86f bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bdaa: 4858 ldr r0, [pc, #352] @ (801bf0c ) 801bdac: f002 f804 bl 801ddb8 break; 801bdb0: bf00 nop break; 801bdb2: bf00 nop break; 801bdb4: f001 be7f b.w 801dab6 case WEIGHTMINUS: // delay_msec(5); LED_Blink_ALL(10,50,30,10); 801bdb8: 230a movs r3, #10 801bdba: 221e movs r2, #30 801bdbc: 2132 movs r1, #50 @ 0x32 801bdbe: 200a movs r0, #10 801bdc0: f7fd fa8c bl 80192dc switch(UART3_Getc_NoClear(1)){ 801bdc4: 2101 movs r1, #1 801bdc6: 4852 ldr r0, [pc, #328] @ (801bf10 ) 801bdc8: f004 f82c bl 801fe24 801bdcc: 4603 mov r3, r0 801bdce: 2b02 cmp r3, #2 801bdd0: f000 80d1 beq.w 801bf76 801bdd4: 2b02 cmp r3, #2 801bdd6: f301 8670 bgt.w 801daba 801bdda: 2b00 cmp r3, #0 801bddc: d003 beq.n 801bde6 801bdde: 2b01 cmp r3, #1 801bde0: d05f beq.n 801bea2 Task_Start_10ms_1(Task10ms_1); break; } break; } break; 801bde2: f001 be6a b.w 801daba switch(UART3_Getc_NoClear(2)){ 801bde6: 2102 movs r1, #2 801bde8: 4849 ldr r0, [pc, #292] @ (801bf10 ) 801bdea: f004 f81b bl 801fe24 801bdee: 4603 mov r3, r0 801bdf0: 2b01 cmp r3, #1 801bdf2: d002 beq.n 801bdfa 801bdf4: 2b02 cmp r3, #2 801bdf6: d025 beq.n 801be44 break; 801bdf8: e147 b.n 801c08a WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] - 0.5f; 801bdfa: 4b41 ldr r3, [pc, #260] @ (801bf00 ) 801bdfc: edd3 7a01 vldr s15, [r3, #4] 801be00: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801be04: ee77 7ac7 vsub.f32 s15, s15, s14 801be08: 4b3d ldr r3, [pc, #244] @ (801bf00 ) 801be0a: edc3 7a01 vstr s15, [r3, #4] if(WP_Gym.WeightBLE[L] <= 0.0f){ 801be0e: 4b3c ldr r3, [pc, #240] @ (801bf00 ) 801be10: edd3 7a01 vldr s15, [r3, #4] 801be14: eef5 7ac0 vcmpe.f32 s15, #0.0 801be18: eef1 fa10 vmrs APSR_nzcv, fpscr 801be1c: d80c bhi.n 801be38 delay_msec(5); 801be1e: 483d ldr r0, [pc, #244] @ (801bf14 ) 801be20: f001 fe7a bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801be24: 2332 movs r3, #50 @ 0x32 801be26: 220a movs r2, #10 801be28: 210a movs r1, #10 801be2a: 2096 movs r0, #150 @ 0x96 801be2c: f7fd fa56 bl 80192dc WP_Gym.WeightBLE[L] = 0.0f; 801be30: 4b33 ldr r3, [pc, #204] @ (801bf00 ) 801be32: f04f 0200 mov.w r2, #0 801be36: 605a str r2, [r3, #4] Task_Stop_10ms_1(); 801be38: f002 f826 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801be3c: 4833 ldr r0, [pc, #204] @ (801bf0c ) 801be3e: f001 ffbb bl 801ddb8 break; 801be42: e02d b.n 801bea0 delay_msec(15); 801be44: 4830 ldr r0, [pc, #192] @ (801bf08 ) 801be46: f001 fe67 bl 801db18 <_delay> LED_Blink_ALL(10,80,60,10); 801be4a: 230a movs r3, #10 801be4c: 223c movs r2, #60 @ 0x3c 801be4e: 2150 movs r1, #80 @ 0x50 801be50: 200a movs r0, #10 801be52: f7fd fa43 bl 80192dc WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] - 5.0f; 801be56: 4b2a ldr r3, [pc, #168] @ (801bf00 ) 801be58: edd3 7a01 vldr s15, [r3, #4] 801be5c: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801be60: ee77 7ac7 vsub.f32 s15, s15, s14 801be64: 4b26 ldr r3, [pc, #152] @ (801bf00 ) 801be66: edc3 7a01 vstr s15, [r3, #4] if(WP_Gym.WeightBLE[L] <= 0.0f){ 801be6a: 4b25 ldr r3, [pc, #148] @ (801bf00 ) 801be6c: edd3 7a01 vldr s15, [r3, #4] 801be70: eef5 7ac0 vcmpe.f32 s15, #0.0 801be74: eef1 fa10 vmrs APSR_nzcv, fpscr 801be78: d80c bhi.n 801be94 delay_msec(15); 801be7a: 4823 ldr r0, [pc, #140] @ (801bf08 ) 801be7c: f001 fe4c bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801be80: 2332 movs r3, #50 @ 0x32 801be82: 220a movs r2, #10 801be84: 210a movs r1, #10 801be86: 2096 movs r0, #150 @ 0x96 801be88: f7fd fa28 bl 80192dc WP_Gym.WeightBLE[L] = 0.0f; 801be8c: 4b1c ldr r3, [pc, #112] @ (801bf00 ) 801be8e: f04f 0200 mov.w r2, #0 801be92: 605a str r2, [r3, #4] Task_Stop_10ms_1(); 801be94: f001 fff8 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801be98: 481c ldr r0, [pc, #112] @ (801bf0c ) 801be9a: f001 ff8d bl 801ddb8 break; 801be9e: bf00 nop break; 801bea0: e0f3 b.n 801c08a switch(UART3_Getc_NoClear(2)){ 801bea2: 2102 movs r1, #2 801bea4: 481a ldr r0, [pc, #104] @ (801bf10 ) 801bea6: f003 ffbd bl 801fe24 801beaa: 4603 mov r3, r0 801beac: 2b01 cmp r3, #1 801beae: d002 beq.n 801beb6 801beb0: 2b02 cmp r3, #2 801beb2: d031 beq.n 801bf18 break; 801beb4: e0e9 b.n 801c08a WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] - 0.5f; 801beb6: 4b12 ldr r3, [pc, #72] @ (801bf00 ) 801beb8: edd3 7a01 vldr s15, [r3, #4] 801bebc: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801bec0: ee77 7ac7 vsub.f32 s15, s15, s14 801bec4: 4b0e ldr r3, [pc, #56] @ (801bf00 ) 801bec6: edc3 7a01 vstr s15, [r3, #4] if(WP_Gym.WeightBLE[L] <= 0.0f){ 801beca: 4b0d ldr r3, [pc, #52] @ (801bf00 ) 801becc: edd3 7a01 vldr s15, [r3, #4] 801bed0: eef5 7ac0 vcmpe.f32 s15, #0.0 801bed4: eef1 fa10 vmrs APSR_nzcv, fpscr 801bed8: d80c bhi.n 801bef4 delay_msec(15); 801beda: 480b ldr r0, [pc, #44] @ (801bf08 ) 801bedc: f001 fe1c bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bee0: 2332 movs r3, #50 @ 0x32 801bee2: 220a movs r2, #10 801bee4: 210a movs r1, #10 801bee6: 2096 movs r0, #150 @ 0x96 801bee8: f7fd f9f8 bl 80192dc WP_Gym.WeightBLE[R] = 0.0f; 801beec: 4b04 ldr r3, [pc, #16] @ (801bf00 ) 801beee: f04f 0200 mov.w r2, #0 801bef2: 609a str r2, [r3, #8] Task_Stop_10ms_1(); 801bef4: f001 ffc8 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bef8: 4804 ldr r0, [pc, #16] @ (801bf0c ) 801befa: f001 ff5d bl 801ddb8 break; 801befe: e039 b.n 801bf74 801bf00: 20000148 .word 0x20000148 801bf04: 20000110 .word 0x20000110 801bf08: 00031704 .word 0x00031704 801bf0c: 0801deb9 .word 0x0801deb9 801bf10: 200053ec .word 0x200053ec 801bf14: 000107ac .word 0x000107ac delay_msec(15); 801bf18: 48a9 ldr r0, [pc, #676] @ (801c1c0 ) 801bf1a: f001 fdfd bl 801db18 <_delay> LED_Blink_ALL(10,80,60,10); 801bf1e: 230a movs r3, #10 801bf20: 223c movs r2, #60 @ 0x3c 801bf22: 2150 movs r1, #80 @ 0x50 801bf24: 200a movs r0, #10 801bf26: f7fd f9d9 bl 80192dc WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] - 5.0f; 801bf2a: 4ba6 ldr r3, [pc, #664] @ (801c1c4 ) 801bf2c: edd3 7a01 vldr s15, [r3, #4] 801bf30: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801bf34: ee77 7ac7 vsub.f32 s15, s15, s14 801bf38: 4ba2 ldr r3, [pc, #648] @ (801c1c4 ) 801bf3a: edc3 7a01 vstr s15, [r3, #4] if(WP_Gym.WeightBLE[L] <= 0.0f){ 801bf3e: 4ba1 ldr r3, [pc, #644] @ (801c1c4 ) 801bf40: edd3 7a01 vldr s15, [r3, #4] 801bf44: eef5 7ac0 vcmpe.f32 s15, #0.0 801bf48: eef1 fa10 vmrs APSR_nzcv, fpscr 801bf4c: d80c bhi.n 801bf68 delay_msec(15); 801bf4e: 489c ldr r0, [pc, #624] @ (801c1c0 ) 801bf50: f001 fde2 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bf54: 2332 movs r3, #50 @ 0x32 801bf56: 220a movs r2, #10 801bf58: 210a movs r1, #10 801bf5a: 2096 movs r0, #150 @ 0x96 801bf5c: f7fd f9be bl 80192dc WP_Gym.WeightBLE[R] = 0.0f; 801bf60: 4b98 ldr r3, [pc, #608] @ (801c1c4 ) 801bf62: f04f 0200 mov.w r2, #0 801bf66: 609a str r2, [r3, #8] Task_Stop_10ms_1(); 801bf68: f001 ff8e bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bf6c: 4896 ldr r0, [pc, #600] @ (801c1c8 ) 801bf6e: f001 ff23 bl 801ddb8 break; 801bf72: bf00 nop break; 801bf74: e089 b.n 801c08a switch(UART3_Getc_NoClear(2)){ 801bf76: 2102 movs r1, #2 801bf78: 4894 ldr r0, [pc, #592] @ (801c1cc ) 801bf7a: f003 ff53 bl 801fe24 801bf7e: 4603 mov r3, r0 801bf80: 2b01 cmp r3, #1 801bf82: d002 beq.n 801bf8a 801bf84: 2b02 cmp r3, #2 801bf86: d03b beq.n 801c000 break; 801bf88: e07e b.n 801c088 WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] - 0.5f; 801bf8a: 4b8e ldr r3, [pc, #568] @ (801c1c4 ) 801bf8c: edd3 7a01 vldr s15, [r3, #4] 801bf90: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801bf94: ee77 7ac7 vsub.f32 s15, s15, s14 801bf98: 4b8a ldr r3, [pc, #552] @ (801c1c4 ) 801bf9a: edc3 7a01 vstr s15, [r3, #4] WP_Gym.WeightBLE[R] = WP_Gym.WeightBLE[R] - 0.5f; 801bf9e: 4b89 ldr r3, [pc, #548] @ (801c1c4 ) 801bfa0: edd3 7a02 vldr s15, [r3, #8] 801bfa4: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801bfa8: ee77 7ac7 vsub.f32 s15, s15, s14 801bfac: 4b85 ldr r3, [pc, #532] @ (801c1c4 ) 801bfae: edc3 7a02 vstr s15, [r3, #8] if(WP_Gym.WeightBLE[L] <= 0.0f || WP_Gym.WeightBLE[R] <= 0.0f){ 801bfb2: 4b84 ldr r3, [pc, #528] @ (801c1c4 ) 801bfb4: edd3 7a01 vldr s15, [r3, #4] 801bfb8: eef5 7ac0 vcmpe.f32 s15, #0.0 801bfbc: eef1 fa10 vmrs APSR_nzcv, fpscr 801bfc0: d907 bls.n 801bfd2 801bfc2: 4b80 ldr r3, [pc, #512] @ (801c1c4 ) 801bfc4: edd3 7a02 vldr s15, [r3, #8] 801bfc8: eef5 7ac0 vcmpe.f32 s15, #0.0 801bfcc: eef1 fa10 vmrs APSR_nzcv, fpscr 801bfd0: d810 bhi.n 801bff4 delay_msec(15); 801bfd2: 487b ldr r0, [pc, #492] @ (801c1c0 ) 801bfd4: f001 fda0 bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801bfd8: 2332 movs r3, #50 @ 0x32 801bfda: 220a movs r2, #10 801bfdc: 210a movs r1, #10 801bfde: 2096 movs r0, #150 @ 0x96 801bfe0: f7fd f97c bl 80192dc WP_Gym.WeightBLE[L] = 0.0f; 801bfe4: 4b77 ldr r3, [pc, #476] @ (801c1c4 ) 801bfe6: f04f 0200 mov.w r2, #0 801bfea: 605a str r2, [r3, #4] WP_Gym.WeightBLE[R] = 0.0f; 801bfec: 4b75 ldr r3, [pc, #468] @ (801c1c4 ) 801bfee: f04f 0200 mov.w r2, #0 801bff2: 609a str r2, [r3, #8] Task_Stop_10ms_1(); 801bff4: f001 ff48 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801bff8: 4873 ldr r0, [pc, #460] @ (801c1c8 ) 801bffa: f001 fedd bl 801ddb8 break; 801bffe: e043 b.n 801c088 delay_msec(15); 801c000: 486f ldr r0, [pc, #444] @ (801c1c0 ) 801c002: f001 fd89 bl 801db18 <_delay> LED_Blink_ALL(10,80,60,10); 801c006: 230a movs r3, #10 801c008: 223c movs r2, #60 @ 0x3c 801c00a: 2150 movs r1, #80 @ 0x50 801c00c: 200a movs r0, #10 801c00e: f7fd f965 bl 80192dc WP_Gym.WeightBLE[L] = WP_Gym.WeightBLE[L] - 5.0f; 801c012: 4b6c ldr r3, [pc, #432] @ (801c1c4 ) 801c014: edd3 7a01 vldr s15, [r3, #4] 801c018: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801c01c: ee77 7ac7 vsub.f32 s15, s15, s14 801c020: 4b68 ldr r3, [pc, #416] @ (801c1c4 ) 801c022: edc3 7a01 vstr s15, [r3, #4] WP_Gym.WeightBLE[R] = WP_Gym.WeightBLE[R] - 5.0f; 801c026: 4b67 ldr r3, [pc, #412] @ (801c1c4 ) 801c028: edd3 7a02 vldr s15, [r3, #8] 801c02c: eeb1 7a04 vmov.f32 s14, #20 @ 0x40a00000 5.0 801c030: ee77 7ac7 vsub.f32 s15, s15, s14 801c034: 4b63 ldr r3, [pc, #396] @ (801c1c4 ) 801c036: edc3 7a02 vstr s15, [r3, #8] if(WP_Gym.WeightBLE[L] <= 0.0f || WP_Gym.WeightBLE[R] <= 0.0f){ 801c03a: 4b62 ldr r3, [pc, #392] @ (801c1c4 ) 801c03c: edd3 7a01 vldr s15, [r3, #4] 801c040: eef5 7ac0 vcmpe.f32 s15, #0.0 801c044: eef1 fa10 vmrs APSR_nzcv, fpscr 801c048: d907 bls.n 801c05a 801c04a: 4b5e ldr r3, [pc, #376] @ (801c1c4 ) 801c04c: edd3 7a02 vldr s15, [r3, #8] 801c050: eef5 7ac0 vcmpe.f32 s15, #0.0 801c054: eef1 fa10 vmrs APSR_nzcv, fpscr 801c058: d810 bhi.n 801c07c delay_msec(15); 801c05a: 4859 ldr r0, [pc, #356] @ (801c1c0 ) 801c05c: f001 fd5c bl 801db18 <_delay> LED_Blink_ALL(150,10,10,50); 801c060: 2332 movs r3, #50 @ 0x32 801c062: 220a movs r2, #10 801c064: 210a movs r1, #10 801c066: 2096 movs r0, #150 @ 0x96 801c068: f7fd f938 bl 80192dc WP_Gym.WeightBLE[L] = 0.0f; 801c06c: 4b55 ldr r3, [pc, #340] @ (801c1c4 ) 801c06e: f04f 0200 mov.w r2, #0 801c072: 605a str r2, [r3, #4] WP_Gym.WeightBLE[R] = 0.0f; 801c074: 4b53 ldr r3, [pc, #332] @ (801c1c4 ) 801c076: f04f 0200 mov.w r2, #0 801c07a: 609a str r2, [r3, #8] Task_Stop_10ms_1(); 801c07c: f001 ff04 bl 801de88 Task_Start_10ms_1(Task10ms_1); 801c080: 4851 ldr r0, [pc, #324] @ (801c1c8 ) 801c082: f001 fe99 bl 801ddb8 break; 801c086: bf00 nop break; 801c088: bf00 nop break; 801c08a: f001 bd16 b.w 801daba case MODE_CHANGE: // 3/19 업데이트 : MODE_SET으로 명칭 바꿔야 할 듯? if(UART3_Getc_NoClear(1) > 5){ // 0=Constant, 1=Negative, 2=Band, 3=Isokinetic, 4=Hydraulic, 5=Vibration 801c08e: 2101 movs r1, #1 801c090: 484e ldr r0, [pc, #312] @ (801c1cc ) 801c092: f003 fec7 bl 801fe24 801c096: 4603 mov r3, r0 801c098: 2b05 cmp r3, #5 801c09a: dd09 ble.n 801c0b0 UART3_Puts("Err: Mode command number error\r\n"); 801c09c: 2200 movs r2, #0 801c09e: 494c ldr r1, [pc, #304] @ (801c1d0 ) 801c0a0: 484a ldr r0, [pc, #296] @ (801c1cc ) 801c0a2: f003 fc41 bl 801f928 WP_Gym.WeightModeError = 2; 801c0a6: 4b47 ldr r3, [pc, #284] @ (801c1c4 ) 801c0a8: 2202 movs r2, #2 801c0aa: 709a strb r2, [r3, #2] } Return_4x1byte(MODE_CHANGE, WP_Gym.WeightMode[L], WP_Gym.WeightMode[R], WP_Gym.WeightModeError, WP_Gym.WeightModeError); // Return_2x1byte(MODE_CHANGE, WP_Gym.WeightMode[L], WP_Gym.WeightMode[R]); } break; 801c0ac: f001 bd10 b.w 801dad0 if(!Debug_HilMode && (WP_Gym.Position[L] > WP_Gym.Region.H_LoSoft[L] || WP_Gym.Position[R] > WP_Gym.Region.H_LoSoft[R])) { 801c0b0: 4b48 ldr r3, [pc, #288] @ (801c1d4 ) 801c0b2: 781b ldrb r3, [r3, #0] 801c0b4: 2b00 cmp r3, #0 801c0b6: d118 bne.n 801c0ea 801c0b8: 4b42 ldr r3, [pc, #264] @ (801c1c4 ) 801c0ba: f9b3 2014 ldrsh.w r2, [r3, #20] 801c0be: 4b41 ldr r3, [pc, #260] @ (801c1c4 ) 801c0c0: f9b3 302c ldrsh.w r3, [r3, #44] @ 0x2c 801c0c4: 429a cmp r2, r3 801c0c6: dc07 bgt.n 801c0d8 801c0c8: 4b3e ldr r3, [pc, #248] @ (801c1c4 ) 801c0ca: f9b3 2016 ldrsh.w r2, [r3, #22] 801c0ce: 4b3d ldr r3, [pc, #244] @ (801c1c4 ) 801c0d0: f9b3 302e ldrsh.w r3, [r3, #46] @ 0x2e 801c0d4: 429a cmp r2, r3 801c0d6: dd08 ble.n 801c0ea UART3_Puts("Err: Put down handles first\r\n"); 801c0d8: 2200 movs r2, #0 801c0da: 493f ldr r1, [pc, #252] @ (801c1d8 ) 801c0dc: 483b ldr r0, [pc, #236] @ (801c1cc ) 801c0de: f003 fc23 bl 801f928 WP_Gym.WeightModeError = 1; 801c0e2: 4b38 ldr r3, [pc, #224] @ (801c1c4 ) 801c0e4: 2201 movs r2, #1 801c0e6: 709a strb r2, [r3, #2] 801c0e8: e0c8 b.n 801c27c WP_Gym.WeightMode[L] = UART3_Getc_NoClear(1); 801c0ea: 2101 movs r1, #1 801c0ec: 4837 ldr r0, [pc, #220] @ (801c1cc ) 801c0ee: f003 fe99 bl 801fe24 801c0f2: 4603 mov r3, r0 801c0f4: b2da uxtb r2, r3 801c0f6: 4b33 ldr r3, [pc, #204] @ (801c1c4 ) 801c0f8: 701a strb r2, [r3, #0] WP_Gym.WeightMode[R] = UART3_Getc_NoClear(1); // 일단 좌측 값을 우측에도 적용 801c0fa: 2101 movs r1, #1 801c0fc: 4833 ldr r0, [pc, #204] @ (801c1cc ) 801c0fe: f003 fe91 bl 801fe24 801c102: 4603 mov r3, r0 801c104: b2da uxtb r2, r3 801c106: 4b2f ldr r3, [pc, #188] @ (801c1c4 ) 801c108: 705a strb r2, [r3, #1] WP_Gym.WeightModeError = 0; 801c10a: 4b2e ldr r3, [pc, #184] @ (801c1c4 ) 801c10c: 2200 movs r2, #0 801c10e: 709a strb r2, [r3, #2] switch (WP_Gym.WeightMode[L]) { 801c110: 4b2c ldr r3, [pc, #176] @ (801c1c4 ) 801c112: 781b ldrb r3, [r3, #0] 801c114: 2b02 cmp r3, #2 801c116: d069 beq.n 801c1ec 801c118: 2b02 cmp r3, #2 801c11a: f300 8082 bgt.w 801c222 801c11e: 2b00 cmp r3, #0 801c120: d002 beq.n 801c128 801c122: 2b01 cmp r3, #1 801c124: d01b beq.n 801c15e 801c126: e07c b.n 801c222 UART3_Puts("Mode 0 - Constant\r\n"); 801c128: 2200 movs r2, #0 801c12a: 492c ldr r1, [pc, #176] @ (801c1dc ) 801c12c: 4827 ldr r0, [pc, #156] @ (801c1cc ) 801c12e: f003 fbfb bl 801f928 WP_LEDCtrl.R = 8; 801c132: 4b2b ldr r3, [pc, #172] @ (801c1e0 ) 801c134: 2208 movs r2, #8 801c136: 701a strb r2, [r3, #0] WP_LEDCtrl.G = 4; 801c138: 4b29 ldr r3, [pc, #164] @ (801c1e0 ) 801c13a: 2204 movs r2, #4 801c13c: 705a strb r2, [r3, #1] WP_LEDCtrl.B = 80; 801c13e: 4b28 ldr r3, [pc, #160] @ (801c1e0 ) 801c140: 2250 movs r2, #80 @ 0x50 801c142: 709a strb r2, [r3, #2] LED_Blink_ALL(WP_LEDCtrl.R, WP_LEDCtrl.G, WP_LEDCtrl.B,20); 801c144: 4b26 ldr r3, [pc, #152] @ (801c1e0 ) 801c146: 781b ldrb r3, [r3, #0] 801c148: 4618 mov r0, r3 801c14a: 4b25 ldr r3, [pc, #148] @ (801c1e0 ) 801c14c: 785b ldrb r3, [r3, #1] 801c14e: 4619 mov r1, r3 801c150: 4b23 ldr r3, [pc, #140] @ (801c1e0 ) 801c152: 789b ldrb r3, [r3, #2] 801c154: 461a mov r2, r3 801c156: 2314 movs r3, #20 801c158: f7fd f8c0 bl 80192dc break; 801c15c: e061 b.n 801c222 WP_LEDCtrl.R = 20; 801c15e: 4b20 ldr r3, [pc, #128] @ (801c1e0 ) 801c160: 2214 movs r2, #20 801c162: 701a strb r2, [r3, #0] WP_LEDCtrl.G = 4; 801c164: 4b1e ldr r3, [pc, #120] @ (801c1e0 ) 801c166: 2204 movs r2, #4 801c168: 705a strb r2, [r3, #1] WP_LEDCtrl.B = 80; 801c16a: 4b1d ldr r3, [pc, #116] @ (801c1e0 ) 801c16c: 2250 movs r2, #80 @ 0x50 801c16e: 709a strb r2, [r3, #2] LED_Blink_ALL(WP_LEDCtrl.R, WP_LEDCtrl.G, WP_LEDCtrl.B,20); 801c170: 4b1b ldr r3, [pc, #108] @ (801c1e0 ) 801c172: 781b ldrb r3, [r3, #0] 801c174: 4618 mov r0, r3 801c176: 4b1a ldr r3, [pc, #104] @ (801c1e0 ) 801c178: 785b ldrb r3, [r3, #1] 801c17a: 4619 mov r1, r3 801c17c: 4b18 ldr r3, [pc, #96] @ (801c1e0 ) 801c17e: 789b ldrb r3, [r3, #2] 801c180: 461a mov r2, r3 801c182: 2314 movs r3, #20 801c184: f7fd f8aa bl 80192dc UART3_Puts("Mode 1 - Eccentric: +"); 801c188: 2200 movs r2, #0 801c18a: 4916 ldr r1, [pc, #88] @ (801c1e4 ) 801c18c: 480f ldr r0, [pc, #60] @ (801c1cc ) 801c18e: f003 fbcb bl 801f928 UART3_Puts(Float2String(WP_Gym.F_EccSet*2,1)); 801c192: 4b0c ldr r3, [pc, #48] @ (801c1c4 ) 801c194: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 801c198: ee77 7aa7 vadd.f32 s15, s15, s15 801c19c: 2001 movs r0, #1 801c19e: eeb0 0a67 vmov.f32 s0, s15 801c1a2: f003 ff01 bl 801ffa8 801c1a6: 4603 mov r3, r0 801c1a8: 2200 movs r2, #0 801c1aa: 4619 mov r1, r3 801c1ac: 4807 ldr r0, [pc, #28] @ (801c1cc ) 801c1ae: f003 fbbb bl 801f928 UART3_Puts(" [A]\r\n"); 801c1b2: 2200 movs r2, #0 801c1b4: 490c ldr r1, [pc, #48] @ (801c1e8 ) 801c1b6: 4805 ldr r0, [pc, #20] @ (801c1cc ) 801c1b8: f003 fbb6 bl 801f928 break; 801c1bc: e031 b.n 801c222 801c1be: bf00 nop 801c1c0: 00031704 .word 0x00031704 801c1c4: 20000148 .word 0x20000148 801c1c8: 0801deb9 .word 0x0801deb9 801c1cc: 200053ec .word 0x200053ec 801c1d0: 0802aa60 .word 0x0802aa60 801c1d4: 20000372 .word 0x20000372 801c1d8: 0802aa84 .word 0x0802aa84 801c1dc: 0802aaa4 .word 0x0802aaa4 801c1e0: 20000328 .word 0x20000328 801c1e4: 0802aab8 .word 0x0802aab8 801c1e8: 0802aad0 .word 0x0802aad0 WP_LEDCtrl.R = 10; 801c1ec: 4ba4 ldr r3, [pc, #656] @ (801c480 ) 801c1ee: 220a movs r2, #10 801c1f0: 701a strb r2, [r3, #0] WP_LEDCtrl.G = 40; 801c1f2: 4ba3 ldr r3, [pc, #652] @ (801c480 ) 801c1f4: 2228 movs r2, #40 @ 0x28 801c1f6: 705a strb r2, [r3, #1] WP_LEDCtrl.B = 40; 801c1f8: 4ba1 ldr r3, [pc, #644] @ (801c480 ) 801c1fa: 2228 movs r2, #40 @ 0x28 801c1fc: 709a strb r2, [r3, #2] LED_Blink_ALL(WP_LEDCtrl.R, WP_LEDCtrl.G, WP_LEDCtrl.B,20); 801c1fe: 4ba0 ldr r3, [pc, #640] @ (801c480 ) 801c200: 781b ldrb r3, [r3, #0] 801c202: 4618 mov r0, r3 801c204: 4b9e ldr r3, [pc, #632] @ (801c480 ) 801c206: 785b ldrb r3, [r3, #1] 801c208: 4619 mov r1, r3 801c20a: 4b9d ldr r3, [pc, #628] @ (801c480 ) 801c20c: 789b ldrb r3, [r3, #2] 801c20e: 461a mov r2, r3 801c210: 2314 movs r3, #20 801c212: f7fd f863 bl 80192dc UART3_Puts("Mode 2 - Band\r\n"); 801c216: 2200 movs r2, #0 801c218: 499a ldr r1, [pc, #616] @ (801c484 ) 801c21a: 489b ldr r0, [pc, #620] @ (801c488 ) 801c21c: f003 fb84 bl 801f928 break; 801c220: bf00 nop UART3_Puts("Weight: "); 801c222: 2200 movs r2, #0 801c224: 4999 ldr r1, [pc, #612] @ (801c48c ) 801c226: 4898 ldr r0, [pc, #608] @ (801c488 ) 801c228: f003 fb7e bl 801f928 UART3_Puts(Float2String(WP_Gym.WeightSet[L],2)); 801c22c: 4b98 ldr r3, [pc, #608] @ (801c490 ) 801c22e: edd3 7a03 vldr s15, [r3, #12] 801c232: 2002 movs r0, #2 801c234: eeb0 0a67 vmov.f32 s0, s15 801c238: f003 feb6 bl 801ffa8 801c23c: 4603 mov r3, r0 801c23e: 2200 movs r2, #0 801c240: 4619 mov r1, r3 801c242: 4891 ldr r0, [pc, #580] @ (801c488 ) 801c244: f003 fb70 bl 801f928 UART3_Puts(" [A] : "); 801c248: 2200 movs r2, #0 801c24a: 4992 ldr r1, [pc, #584] @ (801c494 ) 801c24c: 488e ldr r0, [pc, #568] @ (801c488 ) 801c24e: f003 fb6b bl 801f928 if(WP_Weight.Ctrl.OnOffStatus[L] == ON){ 801c252: 4b91 ldr r3, [pc, #580] @ (801c498 ) 801c254: f893 302a ldrb.w r3, [r3, #42] @ 0x2a 801c258: 2b01 cmp r3, #1 801c25a: d105 bne.n 801c268 UART3_Puts(" ON"); 801c25c: 2200 movs r2, #0 801c25e: 498f ldr r1, [pc, #572] @ (801c49c ) 801c260: 4889 ldr r0, [pc, #548] @ (801c488 ) 801c262: f003 fb61 bl 801f928 801c266: e004 b.n 801c272 UART3_Puts(" OFF"); 801c268: 2200 movs r2, #0 801c26a: 498d ldr r1, [pc, #564] @ (801c4a0 ) 801c26c: 4886 ldr r0, [pc, #536] @ (801c488 ) 801c26e: f003 fb5b bl 801f928 UART3_Puts(" [A]\r\n"); 801c272: 2200 movs r2, #0 801c274: 498b ldr r1, [pc, #556] @ (801c4a4 ) 801c276: 4884 ldr r0, [pc, #528] @ (801c488 ) 801c278: f003 fb56 bl 801f928 Return_4x1byte(MODE_CHANGE, WP_Gym.WeightMode[L], WP_Gym.WeightMode[R], WP_Gym.WeightModeError, WP_Gym.WeightModeError); 801c27c: 4b84 ldr r3, [pc, #528] @ (801c490 ) 801c27e: 781b ldrb r3, [r3, #0] 801c280: 4619 mov r1, r3 801c282: 4b83 ldr r3, [pc, #524] @ (801c490 ) 801c284: 785b ldrb r3, [r3, #1] 801c286: 461a mov r2, r3 801c288: 4b81 ldr r3, [pc, #516] @ (801c490 ) 801c28a: 789b ldrb r3, [r3, #2] 801c28c: 4618 mov r0, r3 801c28e: 4b80 ldr r3, [pc, #512] @ (801c490 ) 801c290: 789b ldrb r3, [r3, #2] 801c292: 9300 str r3, [sp, #0] 801c294: 4603 mov r3, r0 801c296: 2068 movs r0, #104 @ 0x68 801c298: f7fd fe74 bl 8019f84 break; 801c29c: f001 bc18 b.w 801dad0 case ECC_LEVEL: WP_Gym.F_EccSet_Temp[L] = UART3_Getc_NoClear(1) * 0.5f; // 프로토콜 단위 환산 (정수1 = 0.5kg) 801c2a0: 2101 movs r1, #1 801c2a2: 4879 ldr r0, [pc, #484] @ (801c488 ) 801c2a4: f003 fdbe bl 801fe24 801c2a8: 4603 mov r3, r0 801c2aa: ee07 3a90 vmov s15, r3 801c2ae: eef8 7ae7 vcvt.f32.s32 s15, s15 801c2b2: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801c2b6: ee67 7a87 vmul.f32 s15, s15, s14 801c2ba: 4b75 ldr r3, [pc, #468] @ (801c490 ) 801c2bc: edc3 7a1c vstr s15, [r3, #112] @ 0x70 WP_Gym.F_EccSet_Temp[R] = UART3_Getc_NoClear(2) * 0.5f; 801c2c0: 2102 movs r1, #2 801c2c2: 4871 ldr r0, [pc, #452] @ (801c488 ) 801c2c4: f003 fdae bl 801fe24 801c2c8: 4603 mov r3, r0 801c2ca: ee07 3a90 vmov s15, r3 801c2ce: eef8 7ae7 vcvt.f32.s32 s15, s15 801c2d2: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801c2d6: ee67 7a87 vmul.f32 s15, s15, s14 801c2da: 4b6d ldr r3, [pc, #436] @ (801c490 ) 801c2dc: edc3 7a1d vstr s15, [r3, #116] @ 0x74 if(WP_Gym.F_EccSet_Temp[L] > WP_Gym.WeightSet[L] || WP_Gym.F_EccSet_Temp[R] > WP_Gym.WeightSet[R]){ 801c2e0: 4b6b ldr r3, [pc, #428] @ (801c490 ) 801c2e2: ed93 7a1c vldr s14, [r3, #112] @ 0x70 801c2e6: 4b6a ldr r3, [pc, #424] @ (801c490 ) 801c2e8: edd3 7a03 vldr s15, [r3, #12] 801c2ec: eeb4 7ae7 vcmpe.f32 s14, s15 801c2f0: eef1 fa10 vmrs APSR_nzcv, fpscr 801c2f4: dc0a bgt.n 801c30c 801c2f6: 4b66 ldr r3, [pc, #408] @ (801c490 ) 801c2f8: ed93 7a1d vldr s14, [r3, #116] @ 0x74 801c2fc: 4b64 ldr r3, [pc, #400] @ (801c490 ) 801c2fe: edd3 7a04 vldr s15, [r3, #16] 801c302: eeb4 7ae7 vcmpe.f32 s14, s15 801c306: eef1 fa10 vmrs APSR_nzcv, fpscr 801c30a: dd09 ble.n 801c320 UART3_Puts("Err: Over 100% is not allowed\r\n"); 801c30c: 2200 movs r2, #0 801c30e: 4966 ldr r1, [pc, #408] @ (801c4a8 ) 801c310: 485d ldr r0, [pc, #372] @ (801c488 ) 801c312: f003 fb09 bl 801f928 WP_Gym.F_Ecc_ErrorCode = 1; 801c316: 4b5e ldr r3, [pc, #376] @ (801c490 ) 801c318: 2201 movs r2, #1 801c31a: f883 207c strb.w r2, [r3, #124] @ 0x7c 801c31e: e027 b.n 801c370 } else if(WP_Gym.F_EccSet_Temp[L] > WP_Gym.F_EccLimit || WP_Gym.F_EccSet_Temp[R] > WP_Gym.F_EccLimit){ 801c320: 4b5b ldr r3, [pc, #364] @ (801c490 ) 801c322: ed93 7a1c vldr s14, [r3, #112] @ 0x70 801c326: 4b5a ldr r3, [pc, #360] @ (801c490 ) 801c328: edd3 7a1e vldr s15, [r3, #120] @ 0x78 801c32c: eeb4 7ae7 vcmpe.f32 s14, s15 801c330: eef1 fa10 vmrs APSR_nzcv, fpscr 801c334: dc0a bgt.n 801c34c 801c336: 4b56 ldr r3, [pc, #344] @ (801c490 ) 801c338: ed93 7a1d vldr s14, [r3, #116] @ 0x74 801c33c: 4b54 ldr r3, [pc, #336] @ (801c490 ) 801c33e: edd3 7a1e vldr s15, [r3, #120] @ 0x78 801c342: eeb4 7ae7 vcmpe.f32 s14, s15 801c346: eef1 fa10 vmrs APSR_nzcv, fpscr 801c34a: dd09 ble.n 801c360 UART3_Puts("Err: EccWeight is limited\r\n"); 801c34c: 2200 movs r2, #0 801c34e: 4957 ldr r1, [pc, #348] @ (801c4ac ) 801c350: 484d ldr r0, [pc, #308] @ (801c488 ) 801c352: f003 fae9 bl 801f928 WP_Gym.F_Ecc_ErrorCode = 2; 801c356: 4b4e ldr r3, [pc, #312] @ (801c490 ) 801c358: 2202 movs r2, #2 801c35a: f883 207c strb.w r2, [r3, #124] @ 0x7c 801c35e: e007 b.n 801c370 } else{ // WP_Gym.F_EccSet_Temp[L] = WP_Gym.F_Ecc_Percentage[L] * 0.01; // WP_Gym.F_EccSet_Temp[R] = WP_Gym.F_Ecc_Percentage[R] * 0.01; // 추후 좌우 구분시에 추가 (좌측도 같이 수정) WP_Gym.F_EccSet = WP_Gym.F_EccSet_Temp[L]; // 임시 중복 코드 ㅠ : WeightController에는 이 공통 변수가 쓰이고 있어서.. 801c360: 4b4b ldr r3, [pc, #300] @ (801c490 ) 801c362: 6f1b ldr r3, [r3, #112] @ 0x70 801c364: 4a4a ldr r2, [pc, #296] @ (801c490 ) 801c366: 66d3 str r3, [r2, #108] @ 0x6c WP_Gym.F_Ecc_ErrorCode = 0; 801c368: 4b49 ldr r3, [pc, #292] @ (801c490 ) 801c36a: 2200 movs r2, #0 801c36c: f883 207c strb.w r2, [r3, #124] @ 0x7c // WP_Gym.F_EccSet = 0.5; // } else { // WP_Gym.F_EccSet = WP_Gym.F_EccSet + 0.5; // } UART3_Puts("Eccentric: +"); 801c370: 2200 movs r2, #0 801c372: 494f ldr r1, [pc, #316] @ (801c4b0 ) 801c374: 4844 ldr r0, [pc, #272] @ (801c488 ) 801c376: f003 fad7 bl 801f928 UART3_Puts(Float2String(WP_Gym.F_EccSet * 2,1)); 801c37a: 4b45 ldr r3, [pc, #276] @ (801c490 ) 801c37c: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 801c380: ee77 7aa7 vadd.f32 s15, s15, s15 801c384: 2001 movs r0, #1 801c386: eeb0 0a67 vmov.f32 s0, s15 801c38a: f003 fe0d bl 801ffa8 801c38e: 4603 mov r3, r0 801c390: 2200 movs r2, #0 801c392: 4619 mov r1, r3 801c394: 483c ldr r0, [pc, #240] @ (801c488 ) 801c396: f003 fac7 bl 801f928 UART3_Puts(" [kg]\r\n"); 801c39a: 2200 movs r2, #0 801c39c: 4945 ldr r1, [pc, #276] @ (801c4b4 ) 801c39e: 483a ldr r0, [pc, #232] @ (801c488 ) 801c3a0: f003 fac2 bl 801f928 // int EccSet20 = WP_Gym.F_EccSet * 20; Return_4x1byte(ECC_LEVEL, WP_Gym.F_EccSet_Temp[L] * 2, WP_Gym.F_EccSet_Temp[R] * 2, WP_Gym.F_Ecc_ErrorCode, 0); 801c3a4: 4b3a ldr r3, [pc, #232] @ (801c490 ) 801c3a6: edd3 7a1c vldr s15, [r3, #112] @ 0x70 801c3aa: ee77 7aa7 vadd.f32 s15, s15, s15 801c3ae: eefc 7ae7 vcvt.u32.f32 s15, s15 801c3b2: ee17 3a90 vmov r3, s15 801c3b6: b299 uxth r1, r3 801c3b8: 4b35 ldr r3, [pc, #212] @ (801c490 ) 801c3ba: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801c3be: ee77 7aa7 vadd.f32 s15, s15, s15 801c3c2: eefc 7ae7 vcvt.u32.f32 s15, s15 801c3c6: ee17 3a90 vmov r3, s15 801c3ca: b29a uxth r2, r3 801c3cc: 4b30 ldr r3, [pc, #192] @ (801c490 ) 801c3ce: f893 307c ldrb.w r3, [r3, #124] @ 0x7c 801c3d2: 4618 mov r0, r3 801c3d4: 2300 movs r3, #0 801c3d6: 9300 str r3, [sp, #0] 801c3d8: 4603 mov r3, r0 801c3da: 2069 movs r0, #105 @ 0x69 801c3dc: f7fd fdd2 bl 8019f84 // Return_1byte(ECC_LEVEL, EccSet20); // 0.1kg 단위 break; 801c3e0: f001 bb76 b.w 801dad0 case AUTOWEIGHT_ACTIVE: // 지령 받은 값으로 변수 업데이트 WP_Weight.Ctrl.MotionAutoActive = UART3_Getc_NoClear(1); 801c3e4: 2101 movs r1, #1 801c3e6: 4828 ldr r0, [pc, #160] @ (801c488 ) 801c3e8: f003 fd1c bl 801fe24 801c3ec: 4603 mov r3, r0 801c3ee: b2da uxtb r2, r3 801c3f0: 4b29 ldr r3, [pc, #164] @ (801c498 ) 801c3f2: f883 2028 strb.w r2, [r3, #40] @ 0x28 // 업데이트 적용(시도) 이후 실제 적용되있는 값을 리턴 Return_1byte(AUTOWEIGHT_ACTIVE, WP_Weight.Ctrl.MotionAutoActive); 801c3f6: 4b28 ldr r3, [pc, #160] @ (801c498 ) 801c3f8: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 801c3fc: 4619 mov r1, r3 801c3fe: 2081 movs r0, #129 @ 0x81 801c400: f7fd fcc4 bl 8019d8c break; 801c404: f001 bb64 b.w 801dad0 case RUN_FORCEDCALIB: UART3_Puts("User requested Forced Calibration \r\n"); 801c408: 2200 movs r2, #0 801c40a: 492b ldr r1, [pc, #172] @ (801c4b8 ) 801c40c: 481e ldr r0, [pc, #120] @ (801c488 ) 801c40e: f003 fa8b bl 801f928 ReStart_ForcedCalib = 1; 801c412: 4b2a ldr r3, [pc, #168] @ (801c4bc ) 801c414: 2201 movs r2, #1 801c416: 601a str r2, [r3, #0] if(cnt_LED_Calib == 0) { // 진입 LED 801c418: 4b29 ldr r3, [pc, #164] @ (801c4c0 ) 801c41a: 681b ldr r3, [r3, #0] 801c41c: 2b00 cmp r3, #0 801c41e: d109 bne.n 801c434 LED_On_ALL(2, 20, 12); 801c420: 220c movs r2, #12 801c422: 2114 movs r1, #20 801c424: 2002 movs r0, #2 801c426: f7fc ffc1 bl 80193ac cnt_LED_Calib++; 801c42a: 4b25 ldr r3, [pc, #148] @ (801c4c0 ) 801c42c: 681b ldr r3, [r3, #0] 801c42e: 3301 adds r3, #1 801c430: 4a23 ldr r2, [pc, #140] @ (801c4c0 ) 801c432: 6013 str r3, [r2, #0] } Return_1byte(AUTOWEIGHT_ACTIVE, ReStart_ForcedCalib); 801c434: 4b21 ldr r3, [pc, #132] @ (801c4bc ) 801c436: 681b ldr r3, [r3, #0] 801c438: b2db uxtb r3, r3 801c43a: 4619 mov r1, r3 801c43c: 2081 movs r0, #129 @ 0x81 801c43e: f7fd fca5 bl 8019d8c break; 801c442: f001 bb45 b.w 801dad0 case DEBUGPRINT_TOGGLE: switch(DebugingPrintActive) { 801c446: 4b1f ldr r3, [pc, #124] @ (801c4c4 ) 801c448: 781b ldrb r3, [r3, #0] 801c44a: 2b00 cmp r3, #0 801c44c: d003 beq.n 801c456 801c44e: 2b01 cmp r3, #1 801c450: d00a beq.n 801c468 case 1: DebugingPrintActive = 0; UART3_Puts("\r\n Debug Printing OFF \r\n"); break; } break; 801c452: f001 bb3d b.w 801dad0 DebugingPrintActive = 1; 801c456: 4b1b ldr r3, [pc, #108] @ (801c4c4 ) 801c458: 2201 movs r2, #1 801c45a: 701a strb r2, [r3, #0] UART3_Puts("\r\n Debug Printing ON \r\n"); 801c45c: 2200 movs r2, #0 801c45e: 491a ldr r1, [pc, #104] @ (801c4c8 ) 801c460: 4809 ldr r0, [pc, #36] @ (801c488 ) 801c462: f003 fa61 bl 801f928 break; 801c466: e008 b.n 801c47a DebugingPrintActive = 0; 801c468: 4b16 ldr r3, [pc, #88] @ (801c4c4 ) 801c46a: 2200 movs r2, #0 801c46c: 701a strb r2, [r3, #0] UART3_Puts("\r\n Debug Printing OFF \r\n"); 801c46e: 2200 movs r2, #0 801c470: 4916 ldr r1, [pc, #88] @ (801c4cc ) 801c472: 4805 ldr r0, [pc, #20] @ (801c488 ) 801c474: f003 fa58 bl 801f928 break; 801c478: bf00 nop break; 801c47a: f001 bb29 b.w 801dad0 801c47e: bf00 nop 801c480: 20000328 .word 0x20000328 801c484: 0802aad8 .word 0x0802aad8 801c488: 200053ec .word 0x200053ec 801c48c: 0802aae8 .word 0x0802aae8 801c490: 20000148 .word 0x20000148 801c494: 0802aaf4 .word 0x0802aaf4 801c498: 200001d8 .word 0x200001d8 801c49c: 0802aafc .word 0x0802aafc 801c4a0: 0802ab00 .word 0x0802ab00 801c4a4: 0802aad0 .word 0x0802aad0 801c4a8: 0802ab08 .word 0x0802ab08 801c4ac: 0802ab28 .word 0x0802ab28 801c4b0: 0802ab44 .word 0x0802ab44 801c4b4: 0802ab54 .word 0x0802ab54 801c4b8: 0802ab5c .word 0x0802ab5c 801c4bc: 20000398 .word 0x20000398 801c4c0: 2000038c .word 0x2000038c 801c4c4: 20000c10 .word 0x20000c10 801c4c8: 0802ab84 .word 0x0802ab84 801c4cc: 0802ab9c .word 0x0802ab9c case SET_DATA: UART3_Puts("\r\n Set Data\r\n"); 801c4d0: 2200 movs r2, #0 801c4d2: 49c5 ldr r1, [pc, #788] @ (801c7e8 ) 801c4d4: 48c5 ldr r0, [pc, #788] @ (801c7ec ) 801c4d6: f003 fa27 bl 801f928 if(psize>5) { 801c4da: 4bc5 ldr r3, [pc, #788] @ (801c7f0 ) 801c4dc: 781b ldrb r3, [r3, #0] 801c4de: 2b05 cmp r3, #5 801c4e0: f241 82ed bls.w 801dabe uint16_t paddress=((uint16_t)UART3_Getc_NoClear(1)<<8)+(uint8_t)UART3_Getc_NoClear(2); 801c4e4: 2101 movs r1, #1 801c4e6: 48c1 ldr r0, [pc, #772] @ (801c7ec ) 801c4e8: f003 fc9c bl 801fe24 801c4ec: 4603 mov r3, r0 801c4ee: b29b uxth r3, r3 801c4f0: 021b lsls r3, r3, #8 801c4f2: b29c uxth r4, r3 801c4f4: 2102 movs r1, #2 801c4f6: 48bd ldr r0, [pc, #756] @ (801c7ec ) 801c4f8: f003 fc94 bl 801fe24 801c4fc: 4603 mov r3, r0 801c4fe: b2db uxtb r3, r3 801c500: 4423 add r3, r4 801c502: f8a7 309c strh.w r3, [r7, #156] @ 0x9c uint8_t data_size=UART3_Getc_NoClear(3); 801c506: 2103 movs r1, #3 801c508: 48b8 ldr r0, [pc, #736] @ (801c7ec ) 801c50a: f003 fc8b bl 801fe24 801c50e: 4603 mov r3, r0 801c510: f887 309b strb.w r3, [r7, #155] @ 0x9b UART3_printf(" paddress:0x%04X\tdata_size:%d\r\n", paddress, data_size); 801c514: f8b7 309c ldrh.w r3, [r7, #156] @ 0x9c 801c518: f897 209b ldrb.w r2, [r7, #155] @ 0x9b 801c51c: 4619 mov r1, r3 801c51e: 48b5 ldr r0, [pc, #724] @ (801c7f4 ) 801c520: f003 fc20 bl 801fd64 if((paddress+data_size)>(sizeof(Data_Form_RAM)-4)) break; 801c524: f8b7 209c ldrh.w r2, [r7, #156] @ 0x9c 801c528: f897 309b ldrb.w r3, [r7, #155] @ 0x9b 801c52c: 4413 add r3, r2 801c52e: 2bfc cmp r3, #252 @ 0xfc 801c530: f201 82c7 bhi.w 801dac2 for(uint8_t i=0; i *((uint8_t*)&RAM_Data+paddress+i)=UART3_Getc_NoClear(4+i); 801c53c: f897 30c3 ldrb.w r3, [r7, #195] @ 0xc3 801c540: b29b uxth r3, r3 801c542: 3304 adds r3, #4 801c544: b29b uxth r3, r3 801c546: 4619 mov r1, r3 801c548: 48a8 ldr r0, [pc, #672] @ (801c7ec ) 801c54a: f003 fc6b bl 801fe24 801c54e: 4603 mov r3, r0 801c550: 4619 mov r1, r3 801c552: f8b7 209c ldrh.w r2, [r7, #156] @ 0x9c 801c556: f897 30c3 ldrb.w r3, [r7, #195] @ 0xc3 801c55a: 4413 add r3, r2 801c55c: 4aa6 ldr r2, [pc, #664] @ (801c7f8 ) 801c55e: 4413 add r3, r2 801c560: b2ca uxtb r2, r1 801c562: 701a strb r2, [r3, #0] for(uint8_t i=0; i } MotorCtrl_Initialize(); ///Refresh Variables for Motor & !! Disable Gate Drivers !! 801c57a: f7f9 fde9 bl 8016150 Initialize_Machine(); 801c57e: f7f4 fc27 bl 8010dd0 } break; 801c582: f001 ba9c b.w 801dabe case GET_DATA: DEBUG_printf("\r\n Get Data\r\n"); 801c586: 489d ldr r0, [pc, #628] @ (801c7fc ) 801c588: f003 fc42 bl 801fe10 if(psize>=5) { 801c58c: 4b98 ldr r3, [pc, #608] @ (801c7f0 ) 801c58e: 781b ldrb r3, [r3, #0] 801c590: 2b04 cmp r3, #4 801c592: f241 8298 bls.w 801dac6 uint16_t paddress=((uint16_t)UART3_Getc_NoClear(1)<<8)+(uint8_t)UART3_Getc_NoClear(2); 801c596: 2101 movs r1, #1 801c598: 4894 ldr r0, [pc, #592] @ (801c7ec ) 801c59a: f003 fc43 bl 801fe24 801c59e: 4603 mov r3, r0 801c5a0: b29b uxth r3, r3 801c5a2: 021b lsls r3, r3, #8 801c5a4: b29c uxth r4, r3 801c5a6: 2102 movs r1, #2 801c5a8: 4890 ldr r0, [pc, #576] @ (801c7ec ) 801c5aa: f003 fc3b bl 801fe24 801c5ae: 4603 mov r3, r0 801c5b0: b2db uxtb r3, r3 801c5b2: 4423 add r3, r4 801c5b4: f8a7 30a0 strh.w r3, [r7, #160] @ 0xa0 uint8_t data_size=UART3_Getc_NoClear(3); 801c5b8: 2103 movs r1, #3 801c5ba: 488c ldr r0, [pc, #560] @ (801c7ec ) 801c5bc: f003 fc32 bl 801fe24 801c5c0: 4603 mov r3, r0 801c5c2: f887 309f strb.w r3, [r7, #159] @ 0x9f uint8_t buffer[128+5]; DEBUG_printf(" paddress:0x%04X\tdata_size:%d\r\n", paddress, data_size); 801c5c6: f8b7 30a0 ldrh.w r3, [r7, #160] @ 0xa0 801c5ca: f897 209f ldrb.w r2, [r7, #159] @ 0x9f 801c5ce: 4619 mov r1, r3 801c5d0: 4888 ldr r0, [pc, #544] @ (801c7f4 ) 801c5d2: f003 fc1d bl 801fe10 if((paddress+data_size)>(sizeof(Data_Form_RAM)-4)) break; 801c5d6: f8b7 20a0 ldrh.w r2, [r7, #160] @ 0xa0 801c5da: f897 309f ldrb.w r3, [r7, #159] @ 0x9f 801c5de: 4413 add r3, r2 801c5e0: 2bfc cmp r3, #252 @ 0xfc 801c5e2: f201 8272 bhi.w 801daca buffer[0] = 0xFF; checksum = 0xFF; 801c5e6: 23ff movs r3, #255 @ 0xff 801c5e8: 703b strb r3, [r7, #0] 801c5ea: 4b85 ldr r3, [pc, #532] @ (801c800 ) 801c5ec: 22ff movs r2, #255 @ 0xff 801c5ee: 701a strb r2, [r3, #0] buffer[1] = 0xFF; checksum += 0xFF; 801c5f0: 23ff movs r3, #255 @ 0xff 801c5f2: 707b strb r3, [r7, #1] 801c5f4: 4b82 ldr r3, [pc, #520] @ (801c800 ) 801c5f6: 781b ldrb r3, [r3, #0] 801c5f8: 3b01 subs r3, #1 801c5fa: b2da uxtb r2, r3 801c5fc: 4b80 ldr r3, [pc, #512] @ (801c800 ) 801c5fe: 701a strb r2, [r3, #0] buffer[2] = 2+data_size; checksum += 2+data_size; 801c600: f897 309f ldrb.w r3, [r7, #159] @ 0x9f 801c604: 3302 adds r3, #2 801c606: b2db uxtb r3, r3 801c608: 70bb strb r3, [r7, #2] 801c60a: 4b7d ldr r3, [pc, #500] @ (801c800 ) 801c60c: 781a ldrb r2, [r3, #0] 801c60e: f897 309f ldrb.w r3, [r7, #159] @ 0x9f 801c612: 4413 add r3, r2 801c614: b2db uxtb r3, r3 801c616: 3302 adds r3, #2 801c618: b2da uxtb r2, r3 801c61a: 4b79 ldr r3, [pc, #484] @ (801c800 ) 801c61c: 701a strb r2, [r3, #0] buffer[3] = GET_DATA; checksum += GET_DATA; 801c61e: 23f1 movs r3, #241 @ 0xf1 801c620: 70fb strb r3, [r7, #3] 801c622: 4b77 ldr r3, [pc, #476] @ (801c800 ) 801c624: 781b ldrb r3, [r3, #0] 801c626: 3b0f subs r3, #15 801c628: b2da uxtb r2, r3 801c62a: 4b75 ldr r3, [pc, #468] @ (801c800 ) 801c62c: 701a strb r2, [r3, #0] for(uint8_t i=0; i buffer[4+i] = *((uint8_t*)&RAM_Data+paddress+i); 801c636: f8b7 20a0 ldrh.w r2, [r7, #160] @ 0xa0 801c63a: f897 30c2 ldrb.w r3, [r7, #194] @ 0xc2 801c63e: 4413 add r3, r2 801c640: 4a6d ldr r2, [pc, #436] @ (801c7f8 ) 801c642: 441a add r2, r3 801c644: f897 30c2 ldrb.w r3, [r7, #194] @ 0xc2 801c648: 3304 adds r3, #4 801c64a: 7812 ldrb r2, [r2, #0] 801c64c: 33c8 adds r3, #200 @ 0xc8 801c64e: 443b add r3, r7 801c650: f803 2cc8 strb.w r2, [r3, #-200] checksum += buffer[4+i]; 801c654: f897 30c2 ldrb.w r3, [r7, #194] @ 0xc2 801c658: 3304 adds r3, #4 801c65a: 33c8 adds r3, #200 @ 0xc8 801c65c: 443b add r3, r7 801c65e: f813 2cc8 ldrb.w r2, [r3, #-200] 801c662: 4b67 ldr r3, [pc, #412] @ (801c800 ) 801c664: 781b ldrb r3, [r3, #0] 801c666: 4413 add r3, r2 801c668: b2da uxtb r2, r3 801c66a: 4b65 ldr r3, [pc, #404] @ (801c800 ) 801c66c: 701a strb r2, [r3, #0] for(uint8_t i=0; i } buffer[4+data_size] = -checksum; 801c684: 4b5e ldr r3, [pc, #376] @ (801c800 ) 801c686: 781a ldrb r2, [r3, #0] 801c688: f897 309f ldrb.w r3, [r7, #159] @ 0x9f 801c68c: 3304 adds r3, #4 801c68e: 4252 negs r2, r2 801c690: b2d2 uxtb r2, r2 801c692: 33c8 adds r3, #200 @ 0xc8 801c694: 443b add r3, r7 801c696: f803 2cc8 strb.w r2, [r3, #-200] UART3_PutData(buffer, 5+data_size); 801c69a: f897 309f ldrb.w r3, [r7, #159] @ 0x9f 801c69e: 3305 adds r3, #5 801c6a0: b2da uxtb r2, r3 801c6a2: 463b mov r3, r7 801c6a4: 4619 mov r1, r3 801c6a6: 4851 ldr r0, [pc, #324] @ (801c7ec ) 801c6a8: f003 f93e bl 801f928 } break; 801c6ac: f001 ba0b b.w 801dac6 case SAVE_DATA_TO_FLASH : DEBUG_printf("\r\n Save Data to Flash\r\n"); 801c6b0: 4854 ldr r0, [pc, #336] @ (801c804 ) 801c6b2: f003 fbad bl 801fe10 Save_Data_to_Flash(); 801c6b6: f7fd ffa5 bl 801a604 uint8_t rx_data=0; // (25/04/09) 801c6ba: 2300 movs r3, #0 801c6bc: f887 30a3 strb.w r3, [r7, #163] @ 0xa3 Rx_Interrupt_IT(&huart3,rx_data); 801c6c0: f897 30a3 ldrb.w r3, [r7, #163] @ 0xa3 801c6c4: 4619 mov r1, r3 801c6c6: 4849 ldr r0, [pc, #292] @ (801c7ec ) 801c6c8: f003 faaa bl 801fc20 break; 801c6cc: f001 ba00 b.w 801dad0 case FAIL_SAFE_ERROR: if(psize>=3) { 801c6d0: 4b47 ldr r3, [pc, #284] @ (801c7f0 ) 801c6d2: 781b ldrb r3, [r3, #0] 801c6d4: 2b02 cmp r3, #2 801c6d6: f241 81fa bls.w 801dace Error_Flag_Enable = (UART3_Getc_NoClear(1)!=0); 801c6da: 2101 movs r1, #1 801c6dc: 4843 ldr r0, [pc, #268] @ (801c7ec ) 801c6de: f003 fba1 bl 801fe24 801c6e2: 4603 mov r3, r0 801c6e4: 2b00 cmp r3, #0 801c6e6: bf14 ite ne 801c6e8: 2301 movne r3, #1 801c6ea: 2300 moveq r3, #0 801c6ec: b2db uxtb r3, r3 801c6ee: 461a mov r2, r3 801c6f0: 4b45 ldr r3, [pc, #276] @ (801c808 ) 801c6f2: 701a strb r2, [r3, #0] if(Error_Flag_Enable) Return_4byte(FAIL_SAFE_ERROR, Error_Flag); 801c6f4: 4b44 ldr r3, [pc, #272] @ (801c808 ) 801c6f6: 781b ldrb r3, [r3, #0] 801c6f8: 2b00 cmp r3, #0 801c6fa: f001 81e8 beq.w 801dace 801c6fe: 4b43 ldr r3, [pc, #268] @ (801c80c ) 801c700: 681b ldr r3, [r3, #0] 801c702: 4619 mov r1, r3 801c704: 20f3 movs r0, #243 @ 0xf3 801c706: f7fd fbbb bl 8019e80 } break; 801c70a: f001 b9e0 b.w 801dace case FACTORY_RESET: DEBUG_printf("\r\n Factory Reset\r\n"); 801c70e: 4840 ldr r0, [pc, #256] @ (801c810 ) 801c710: f003 fb7e bl 801fe10 Factory_Reset(); 801c714: f7fd ff80 bl 801a618 MotorCtrl_Initialize(); ///Refresh Variables for Motor & !! Disable Gate Drivers !! 801c718: f7f9 fd1a bl 8016150 Initialize_Machine(); 801c71c: f7f4 fb58 bl 8010dd0 break; 801c720: f001 b9d6 b.w 801dad0 case REBOOT: DEBUG_printf("\r\n System Reboot\r\n"); 801c724: 483b ldr r0, [pc, #236] @ (801c814 ) 801c726: f003 fb73 bl 801fe10 System_Reboot(); 801c72a: f7fd ff97 bl 801a65c break; 801c72e: f001 b9cf b.w 801dad0 // case STANDBY: // DEBUG_printf("\r\n System Standby\r\n"); // System_Standby(); // break; case SLEEP: DEBUG_printf("\r\n System Sleep\r\n"); 801c732: 4839 ldr r0, [pc, #228] @ (801c818 ) 801c734: f003 fb6c bl 801fe10 System_Sleep(); 801c738: f7fd ffb6 bl 801a6a8 break; 801c73c: f001 b9c8 b.w 801dad0 ///somebp 2024.02.02 case DEBUG_REPORT: // [v1.0.2+] BLE 디버그 리포트 + 디버그 서브코맨드 if(psize >= 3) { // FF FF 03 F5 [sub] [CHK] — 서브코맨드 801c740: 4b2b ldr r3, [pc, #172] @ (801c7f0 ) 801c742: 781b ldrb r3, [r3, #0] 801c744: 2b02 cmp r3, #2 801c746: f240 82fe bls.w 801cd46 switch(UART3_Getc_NoClear(1)) { 801c74a: 2101 movs r1, #1 801c74c: 4827 ldr r0, [pc, #156] @ (801c7ec ) 801c74e: f003 fb69 bl 801fe24 801c752: 4603 mov r3, r0 801c754: 3b01 subs r3, #1 801c756: 2b20 cmp r3, #32 801c758: f200 82e4 bhi.w 801cd24 801c75c: a201 add r2, pc, #4 @ (adr r2, 801c764 ) 801c75e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801c762: bf00 nop 801c764: 0801c81d .word 0x0801c81d 801c768: 0801c885 .word 0x0801c885 801c76c: 0801c895 .word 0x0801c895 801c770: 0801c981 .word 0x0801c981 801c774: 0801c991 .word 0x0801c991 801c778: 0801cd25 .word 0x0801cd25 801c77c: 0801cd25 .word 0x0801cd25 801c780: 0801cd25 .word 0x0801cd25 801c784: 0801cd25 .word 0x0801cd25 801c788: 0801cd25 .word 0x0801cd25 801c78c: 0801cd25 .word 0x0801cd25 801c790: 0801cd25 .word 0x0801cd25 801c794: 0801cd25 .word 0x0801cd25 801c798: 0801cd25 .word 0x0801cd25 801c79c: 0801cd25 .word 0x0801cd25 801c7a0: 0801ccd9 .word 0x0801ccd9 801c7a4: 0801cce9 .word 0x0801cce9 801c7a8: 0801cd25 .word 0x0801cd25 801c7ac: 0801cd25 .word 0x0801cd25 801c7b0: 0801cd25 .word 0x0801cd25 801c7b4: 0801cd25 .word 0x0801cd25 801c7b8: 0801cd25 .word 0x0801cd25 801c7bc: 0801cd25 .word 0x0801cd25 801c7c0: 0801cd25 .word 0x0801cd25 801c7c4: 0801cd25 .word 0x0801cd25 801c7c8: 0801cd25 .word 0x0801cd25 801c7cc: 0801cd25 .word 0x0801cd25 801c7d0: 0801cd25 .word 0x0801cd25 801c7d4: 0801cd25 .word 0x0801cd25 801c7d8: 0801cd25 .word 0x0801cd25 801c7dc: 0801cd25 .word 0x0801cd25 801c7e0: 0801ccf9 .word 0x0801ccf9 801c7e4: 0801cd0f .word 0x0801cd0f 801c7e8: 0802abb8 .word 0x0802abb8 801c7ec: 200053ec .word 0x200053ec 801c7f0: 20000c3c .word 0x20000c3c 801c7f4: 0802abc8 .word 0x0802abc8 801c7f8: 20000a98 .word 0x20000a98 801c7fc: 0802abe8 .word 0x0802abe8 801c800: 20000c3d .word 0x20000c3d 801c804: 0802abf8 .word 0x0802abf8 801c808: 20000c18 .word 0x20000c18 801c80c: 20000c14 .word 0x20000c14 801c810: 0802ac10 .word 0x0802ac10 801c814: 0802ac24 .word 0x0802ac24 801c818: 0802ac38 .word 0x0802ac38 case 0x01: // F5 01: EncInit 스킵 + RunGym 강제 진입 Debug_SkipEncInit = 1; 801c81c: 4bd4 ldr r3, [pc, #848] @ (801cb70 ) 801c81e: 2201 movs r2, #1 801c820: 701a strb r2, [r3, #0] Drive_Status = RunGym; 801c822: 4bd4 ldr r3, [pc, #848] @ (801cb74 ) 801c824: 2203 movs r2, #3 801c826: 701a strb r2, [r3, #0] Debug_DriveMotor = Drv_BothMotor; 801c828: 4bd3 ldr r3, [pc, #844] @ (801cb78 ) 801c82a: 2203 movs r2, #3 801c82c: 701a strb r2, [r3, #0] Motor1En(WP_Gate_DIS); // 게이트 OFF 유지 (안전) 801c82e: 2101 movs r1, #1 801c830: 2001 movs r0, #1 801c832: f7fc f97f bl 8018b34 Motor2En(WP_Gate_DIS); 801c836: 2101 movs r1, #1 801c838: 2002 movs r0, #2 801c83a: f7fc f97b bl 8018b34 // HIL용: 무게 ON + 기본 10kg (검증 편의) WP_Weight.Ctrl.OnOffScale[L] = 1.0f; 801c83e: 4bcf ldr r3, [pc, #828] @ (801cb7c ) 801c840: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 801c844: 62da str r2, [r3, #44] @ 0x2c WP_Weight.Ctrl.OnOffScale[R] = 1.0f; 801c846: 4bcd ldr r3, [pc, #820] @ (801cb7c ) 801c848: f04f 527e mov.w r2, #1065353216 @ 0x3f800000 801c84c: 631a str r2, [r3, #48] @ 0x30 WP_Weight.Ctrl.OnOffStatus[L] = 1; 801c84e: 4bcb ldr r3, [pc, #812] @ (801cb7c ) 801c850: 2201 movs r2, #1 801c852: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = 1; 801c856: 4bc9 ldr r3, [pc, #804] @ (801cb7c ) 801c858: 2201 movs r2, #1 801c85a: f883 202b strb.w r2, [r3, #43] @ 0x2b WP_Gym.WeightSet[L] = 10.0f; 801c85e: 4bc8 ldr r3, [pc, #800] @ (801cb80 ) 801c860: 4ac8 ldr r2, [pc, #800] @ (801cb84 ) 801c862: 60da str r2, [r3, #12] WP_Gym.WeightSet[R] = 10.0f; 801c864: 4bc6 ldr r3, [pc, #792] @ (801cb80 ) 801c866: 4ac7 ldr r2, [pc, #796] @ (801cb84 ) 801c868: 611a str r2, [r3, #16] WP_Gym.WeightBLE[L] = 10.0f; 801c86a: 4bc5 ldr r3, [pc, #788] @ (801cb80 ) 801c86c: 4ac5 ldr r2, [pc, #788] @ (801cb84 ) 801c86e: 605a str r2, [r3, #4] WP_Gym.WeightBLE[R] = 10.0f; 801c870: 4bc3 ldr r3, [pc, #780] @ (801cb80 ) 801c872: 4ac4 ldr r2, [pc, #784] @ (801cb84 ) 801c874: 609a str r2, [r3, #8] Start_Report(); // 50ms Report 시작 (Debug Report도 여기서 호출됨) 801c876: f7fd fe7f bl 801a578 Return_1byte(DEBUG_REPORT, 0x01); // ACK 801c87a: 2101 movs r1, #1 801c87c: 20f5 movs r0, #245 @ 0xf5 801c87e: f7fd fa85 bl 8019d8c break; 801c882: e273 b.n 801cd6c case 0x02: // F5 02: EncInit 복원 (원래 상태로) Debug_SkipEncInit = 0; 801c884: 4bba ldr r3, [pc, #744] @ (801cb70 ) 801c886: 2200 movs r2, #0 801c888: 701a strb r2, [r3, #0] Return_1byte(DEBUG_REPORT, 0x02); // ACK 801c88a: 2102 movs r1, #2 801c88c: 20f5 movs r0, #245 @ 0xf5 801c88e: f7fd fa7d bl 8019d8c break; 801c892: e26b b.n 801cd6c case 0x03: // F5 03: HIL Position+Speed 주입 // FF FF 0B F5 03 posL_H posL_L posR_H posR_L spdL_H spdL_L spdR_H spdR_L CHK if(psize >= 7) { 801c894: 4bbc ldr r3, [pc, #752] @ (801cb88 ) 801c896: 781b ldrb r3, [r3, #0] 801c898: 2b06 cmp r3, #6 801c89a: f240 8266 bls.w 801cd6a Debug_HilMode = 1; // HIL 활성화 801c89e: 4bbb ldr r3, [pc, #748] @ (801cb8c ) 801c8a0: 2201 movs r2, #1 801c8a2: 701a strb r2, [r3, #0] int16_t injPosL = (int16_t)((UART3_Getc_NoClear(2) << 8) | UART3_Getc_NoClear(3)); 801c8a4: 2102 movs r1, #2 801c8a6: 48ba ldr r0, [pc, #744] @ (801cb90 ) 801c8a8: f003 fabc bl 801fe24 801c8ac: 4603 mov r3, r0 801c8ae: 021b lsls r3, r3, #8 801c8b0: b21c sxth r4, r3 801c8b2: 2103 movs r1, #3 801c8b4: 48b6 ldr r0, [pc, #728] @ (801cb90 ) 801c8b6: f003 fab5 bl 801fe24 801c8ba: 4603 mov r3, r0 801c8bc: 4323 orrs r3, r4 801c8be: f8a7 30aa strh.w r3, [r7, #170] @ 0xaa int16_t injPosR = (int16_t)((UART3_Getc_NoClear(4) << 8) | UART3_Getc_NoClear(5)); 801c8c2: 2104 movs r1, #4 801c8c4: 48b2 ldr r0, [pc, #712] @ (801cb90 ) 801c8c6: f003 faad bl 801fe24 801c8ca: 4603 mov r3, r0 801c8cc: 021b lsls r3, r3, #8 801c8ce: b21c sxth r4, r3 801c8d0: 2105 movs r1, #5 801c8d2: 48af ldr r0, [pc, #700] @ (801cb90 ) 801c8d4: f003 faa6 bl 801fe24 801c8d8: 4603 mov r3, r0 801c8da: 4323 orrs r3, r4 801c8dc: f8a7 30a8 strh.w r3, [r7, #168] @ 0xa8 WP_Gym.PositionFine[L] = injPosL; // 0.05mm 단위 801c8e0: f9b7 30aa ldrsh.w r3, [r7, #170] @ 0xaa 801c8e4: 4aa6 ldr r2, [pc, #664] @ (801cb80 ) 801c8e6: 6193 str r3, [r2, #24] WP_Gym.PositionFine[R] = injPosR; 801c8e8: f9b7 30a8 ldrsh.w r3, [r7, #168] @ 0xa8 801c8ec: 4aa4 ldr r2, [pc, #656] @ (801cb80 ) 801c8ee: 61d3 str r3, [r2, #28] WP_Gym.PositionFine2[L] = injPosL / 2; // 0.1mm 단위 (PositionFine / 2) 801c8f0: f9b7 30aa ldrsh.w r3, [r7, #170] @ 0xaa 801c8f4: 0fda lsrs r2, r3, #31 801c8f6: 4413 add r3, r2 801c8f8: 105b asrs r3, r3, #1 801c8fa: b21b sxth r3, r3 801c8fc: 461a mov r2, r3 801c8fe: 4ba0 ldr r3, [pc, #640] @ (801cb80 ) 801c900: 621a str r2, [r3, #32] WP_Gym.PositionFine2[R] = injPosR / 2; 801c902: f9b7 30a8 ldrsh.w r3, [r7, #168] @ 0xa8 801c906: 0fda lsrs r2, r3, #31 801c908: 4413 add r3, r2 801c90a: 105b asrs r3, r3, #1 801c90c: b21b sxth r3, r3 801c90e: 461a mov r2, r3 801c910: 4b9b ldr r3, [pc, #620] @ (801cb80 ) 801c912: 625a str r2, [r3, #36] @ 0x24 // Speed: 확장 패킷이면 앱에서 직접 주입, 아니면 0 유지 if(psize >= 11) { 801c914: 4b9c ldr r3, [pc, #624] @ (801cb88 ) 801c916: 781b ldrb r3, [r3, #0] 801c918: 2b0a cmp r3, #10 801c91a: f240 8226 bls.w 801cd6a int16_t injSpdL = (int16_t)((UART3_Getc_NoClear(6) << 8) | UART3_Getc_NoClear(7)); 801c91e: 2106 movs r1, #6 801c920: 489b ldr r0, [pc, #620] @ (801cb90 ) 801c922: f003 fa7f bl 801fe24 801c926: 4603 mov r3, r0 801c928: 021b lsls r3, r3, #8 801c92a: b21c sxth r4, r3 801c92c: 2107 movs r1, #7 801c92e: 4898 ldr r0, [pc, #608] @ (801cb90 ) 801c930: f003 fa78 bl 801fe24 801c934: 4603 mov r3, r0 801c936: 4323 orrs r3, r4 801c938: f8a7 30a6 strh.w r3, [r7, #166] @ 0xa6 int16_t injSpdR = (int16_t)((UART3_Getc_NoClear(8) << 8) | UART3_Getc_NoClear(9)); 801c93c: 2108 movs r1, #8 801c93e: 4894 ldr r0, [pc, #592] @ (801cb90 ) 801c940: f003 fa70 bl 801fe24 801c944: 4603 mov r3, r0 801c946: 021b lsls r3, r3, #8 801c948: b21c sxth r4, r3 801c94a: 2109 movs r1, #9 801c94c: 4890 ldr r0, [pc, #576] @ (801cb90 ) 801c94e: f003 fa69 bl 801fe24 801c952: 4603 mov r3, r0 801c954: 4323 orrs r3, r4 801c956: f8a7 30a4 strh.w r3, [r7, #164] @ 0xa4 WP_Gym.Speed[L] = (float)injSpdL; // mm/s 단위 그대로 801c95a: f9b7 30a6 ldrsh.w r3, [r7, #166] @ 0xa6 801c95e: ee07 3a90 vmov s15, r3 801c962: eef8 7ae7 vcvt.f32.s32 s15, s15 801c966: 4b86 ldr r3, [pc, #536] @ (801cb80 ) 801c968: edc3 7a15 vstr s15, [r3, #84] @ 0x54 WP_Gym.Speed[R] = (float)injSpdR; 801c96c: f9b7 30a4 ldrsh.w r3, [r7, #164] @ 0xa4 801c970: ee07 3a90 vmov s15, r3 801c974: eef8 7ae7 vcvt.f32.s32 s15, s15 801c978: 4b81 ldr r3, [pc, #516] @ (801cb80 ) 801c97a: edc3 7a16 vstr s15, [r3, #88] @ 0x58 } } break; 801c97e: e1f4 b.n 801cd6a case 0x04: // F5 04: HIL 모드 해제 Debug_HilMode = 0; 801c980: 4b82 ldr r3, [pc, #520] @ (801cb8c ) 801c982: 2200 movs r2, #0 801c984: 701a strb r2, [r3, #0] Return_1byte(DEBUG_REPORT, 0x04); // ACK 801c986: 2104 movs r1, #4 801c988: 20f5 movs r0, #245 @ 0xf5 801c98a: f7fd f9ff bl 8019d8c break; 801c98e: e1ed b.n 801cd6c case 0x05: // F5 05: 무게 모드 파라미터 설정 { uint8_t paramId = UART3_Getc_NoClear(2); 801c990: 2102 movs r1, #2 801c992: 487f ldr r0, [pc, #508] @ (801cb90 ) 801c994: f003 fa46 bl 801fe24 801c998: 4603 mov r3, r0 801c99a: f887 30af strb.w r3, [r7, #175] @ 0xaf uint16_t val = (uint16_t)((UART3_Getc_NoClear(3) << 8) | UART3_Getc_NoClear(4)); 801c99e: 2103 movs r1, #3 801c9a0: 487b ldr r0, [pc, #492] @ (801cb90 ) 801c9a2: f003 fa3f bl 801fe24 801c9a6: 4603 mov r3, r0 801c9a8: 021b lsls r3, r3, #8 801c9aa: b21c sxth r4, r3 801c9ac: 2104 movs r1, #4 801c9ae: 4878 ldr r0, [pc, #480] @ (801cb90 ) 801c9b0: f003 fa38 bl 801fe24 801c9b4: 4603 mov r3, r0 801c9b6: 4323 orrs r3, r4 801c9b8: b21b sxth r3, r3 801c9ba: f8a7 30ac strh.w r3, [r7, #172] @ 0xac switch(paramId) { 801c9be: f897 30af ldrb.w r3, [r7, #175] @ 0xaf 801c9c2: 3b01 subs r3, #1 801c9c4: 2b4f cmp r3, #79 @ 0x4f 801c9c6: f200 8182 bhi.w 801ccce 801c9ca: a201 add r2, pc, #4 @ (adr r2, 801c9d0 ) 801c9cc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801c9d0: 0801cb11 .word 0x0801cb11 801c9d4: 0801cb25 .word 0x0801cb25 801c9d8: 0801cb39 .word 0x0801cb39 801c9dc: 0801cb55 .word 0x0801cb55 801c9e0: 0801cccf .word 0x0801cccf 801c9e4: 0801cccf .word 0x0801cccf 801c9e8: 0801cccf .word 0x0801cccf 801c9ec: 0801cccf .word 0x0801cccf 801c9f0: 0801cccf .word 0x0801cccf 801c9f4: 0801cccf .word 0x0801cccf 801c9f8: 0801cccf .word 0x0801cccf 801c9fc: 0801cccf .word 0x0801cccf 801ca00: 0801cccf .word 0x0801cccf 801ca04: 0801cccf .word 0x0801cccf 801ca08: 0801cccf .word 0x0801cccf 801ca0c: 0801cb99 .word 0x0801cb99 801ca10: 0801cbad .word 0x0801cbad 801ca14: 0801cbc9 .word 0x0801cbc9 801ca18: 0801cbe5 .word 0x0801cbe5 801ca1c: 0801cc01 .word 0x0801cc01 801ca20: 0801cc1d .word 0x0801cc1d 801ca24: 0801cccf .word 0x0801cccf 801ca28: 0801cccf .word 0x0801cccf 801ca2c: 0801cccf .word 0x0801cccf 801ca30: 0801cccf .word 0x0801cccf 801ca34: 0801cccf .word 0x0801cccf 801ca38: 0801cccf .word 0x0801cccf 801ca3c: 0801cccf .word 0x0801cccf 801ca40: 0801cccf .word 0x0801cccf 801ca44: 0801cccf .word 0x0801cccf 801ca48: 0801cccf .word 0x0801cccf 801ca4c: 0801cc39 .word 0x0801cc39 801ca50: 0801cccf .word 0x0801cccf 801ca54: 0801cccf .word 0x0801cccf 801ca58: 0801cccf .word 0x0801cccf 801ca5c: 0801cccf .word 0x0801cccf 801ca60: 0801cccf .word 0x0801cccf 801ca64: 0801cccf .word 0x0801cccf 801ca68: 0801cccf .word 0x0801cccf 801ca6c: 0801cccf .word 0x0801cccf 801ca70: 0801cccf .word 0x0801cccf 801ca74: 0801cccf .word 0x0801cccf 801ca78: 0801cccf .word 0x0801cccf 801ca7c: 0801cccf .word 0x0801cccf 801ca80: 0801cccf .word 0x0801cccf 801ca84: 0801cccf .word 0x0801cccf 801ca88: 0801cccf .word 0x0801cccf 801ca8c: 0801cc4d .word 0x0801cc4d 801ca90: 0801cc69 .word 0x0801cc69 801ca94: 0801cc85 .word 0x0801cc85 801ca98: 0801cccf .word 0x0801cccf 801ca9c: 0801cccf .word 0x0801cccf 801caa0: 0801cccf .word 0x0801cccf 801caa4: 0801cccf .word 0x0801cccf 801caa8: 0801cccf .word 0x0801cccf 801caac: 0801cccf .word 0x0801cccf 801cab0: 0801cccf .word 0x0801cccf 801cab4: 0801cccf .word 0x0801cccf 801cab8: 0801cccf .word 0x0801cccf 801cabc: 0801cccf .word 0x0801cccf 801cac0: 0801cccf .word 0x0801cccf 801cac4: 0801cccf .word 0x0801cccf 801cac8: 0801cccf .word 0x0801cccf 801cacc: 0801cca1 .word 0x0801cca1 801cad0: 0801cccf .word 0x0801cccf 801cad4: 0801cccf .word 0x0801cccf 801cad8: 0801cccf .word 0x0801cccf 801cadc: 0801cccf .word 0x0801cccf 801cae0: 0801cccf .word 0x0801cccf 801cae4: 0801cccf .word 0x0801cccf 801cae8: 0801cccf .word 0x0801cccf 801caec: 0801cccf .word 0x0801cccf 801caf0: 0801cccf .word 0x0801cccf 801caf4: 0801cccf .word 0x0801cccf 801caf8: 0801cccf .word 0x0801cccf 801cafc: 0801cccf .word 0x0801cccf 801cb00: 0801cccf .word 0x0801cccf 801cb04: 0801cccf .word 0x0801cccf 801cb08: 0801cccf .word 0x0801cccf 801cb0c: 0801ccbd .word 0x0801ccbd case 0x01: WP_Weight.Hydro.Vmax = (float)val; break; // v3.2: Vref→Vmax 통합 (하위호환) 801cb10: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cb14: ee07 3a90 vmov s15, r3 801cb18: eef8 7a67 vcvt.f32.u32 s15, s15 801cb1c: 4b17 ldr r3, [pc, #92] @ (801cb7c ) 801cb1e: edc3 7a1b vstr s15, [r3, #108] @ 0x6c 801cb22: e0d4 b.n 801ccce case 0x02: WP_Weight.Hydro.Vmax = (float)val; break; 801cb24: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cb28: ee07 3a90 vmov s15, r3 801cb2c: eef8 7a67 vcvt.f32.u32 s15, s15 801cb30: 4b12 ldr r3, [pc, #72] @ (801cb7c ) 801cb32: edc3 7a1b vstr s15, [r3, #108] @ 0x6c 801cb36: e0ca b.n 801ccce case 0x03: WP_Weight.Hydro.n = (float)val / 100.0f; break; 801cb38: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cb3c: ee07 3a90 vmov s15, r3 801cb40: eeb8 7a67 vcvt.f32.u32 s14, s15 801cb44: eddf 6a13 vldr s13, [pc, #76] @ 801cb94 801cb48: eec7 7a26 vdiv.f32 s15, s14, s13 801cb4c: 4b0b ldr r3, [pc, #44] @ (801cb7c ) 801cb4e: edc3 7a1c vstr s15, [r3, #112] @ 0x70 801cb52: e0bc b.n 801ccce case 0x04: WP_Weight.Hydro.minRatio = (float)val / 100.0f; break; 801cb54: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cb58: ee07 3a90 vmov s15, r3 801cb5c: eeb8 7a67 vcvt.f32.u32 s14, s15 801cb60: eddf 6a0c vldr s13, [pc, #48] @ 801cb94 801cb64: eec7 7a26 vdiv.f32 s15, s14, s13 801cb68: 4b04 ldr r3, [pc, #16] @ (801cb7c ) 801cb6a: edc3 7a1d vstr s15, [r3, #116] @ 0x74 801cb6e: e0ae b.n 801ccce 801cb70: 20000c05 .word 0x20000c05 801cb74: 20000018 .word 0x20000018 801cb78: 20000c04 .word 0x20000c04 801cb7c: 200001d8 .word 0x200001d8 801cb80: 20000148 .word 0x20000148 801cb84: 41200000 .word 0x41200000 801cb88: 20000c3c .word 0x20000c3c 801cb8c: 20000372 .word 0x20000372 801cb90: 200053ec .word 0x200053ec 801cb94: 42c80000 .word 0x42c80000 case 0x10: WP_Weight.Iso.Vtarget = (float)val; break; 801cb98: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cb9c: ee07 3a90 vmov s15, r3 801cba0: eef8 7a67 vcvt.f32.u32 s15, s15 801cba4: 4baa ldr r3, [pc, #680] @ (801ce50 ) 801cba6: edc3 7a1e vstr s15, [r3, #120] @ 0x78 801cbaa: e090 b.n 801ccce case 0x11: WP_Weight.Iso.Kp = (float)val / 100.0f; break; 801cbac: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cbb0: ee07 3a90 vmov s15, r3 801cbb4: eeb8 7a67 vcvt.f32.u32 s14, s15 801cbb8: eddf 6aa6 vldr s13, [pc, #664] @ 801ce54 801cbbc: eec7 7a26 vdiv.f32 s15, s14, s13 801cbc0: 4ba3 ldr r3, [pc, #652] @ (801ce50 ) 801cbc2: edc3 7a1f vstr s15, [r3, #124] @ 0x7c 801cbc6: e082 b.n 801ccce case 0x12: WP_Weight.Iso.Ki = (float)val / 100.0f; break; 801cbc8: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cbcc: ee07 3a90 vmov s15, r3 801cbd0: eeb8 7a67 vcvt.f32.u32 s14, s15 801cbd4: eddf 6a9f vldr s13, [pc, #636] @ 801ce54 801cbd8: eec7 7a26 vdiv.f32 s15, s14, s13 801cbdc: 4b9c ldr r3, [pc, #624] @ (801ce50 ) 801cbde: edc3 7a20 vstr s15, [r3, #128] @ 0x80 801cbe2: e074 b.n 801ccce case 0x13: WP_Weight.Iso.DecayRate = (float)val / 10.0f; break; // ×10, kg/s (200→20.0) 801cbe4: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cbe8: ee07 3a90 vmov s15, r3 801cbec: eeb8 7a67 vcvt.f32.u32 s14, s15 801cbf0: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0 801cbf4: eec7 7a26 vdiv.f32 s15, s14, s13 801cbf8: 4b95 ldr r3, [pc, #596] @ (801ce50 ) 801cbfa: edc3 7a21 vstr s15, [r3, #132] @ 0x84 801cbfe: e066 b.n 801ccce case 0x14: WP_Weight.Iso.Fmin = (float)val / 10.0f; break; // ×10, kg (30→3.0) 801cc00: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cc04: ee07 3a90 vmov s15, r3 801cc08: eeb8 7a67 vcvt.f32.u32 s14, s15 801cc0c: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0 801cc10: eec7 7a26 vdiv.f32 s15, s14, s13 801cc14: 4b8e ldr r3, [pc, #568] @ (801ce50 ) 801cc16: edc3 7a22 vstr s15, [r3, #136] @ 0x88 801cc1a: e058 b.n 801ccce case 0x15: WP_Weight.Iso.Fmax = (float)val / 10.0f; break; // ×10, kg (100→10.0), 0=TargetWeight 801cc1c: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cc20: ee07 3a90 vmov s15, r3 801cc24: eeb8 7a67 vcvt.f32.u32 s14, s15 801cc28: eef2 6a04 vmov.f32 s13, #36 @ 0x41200000 10.0 801cc2c: eec7 7a26 vdiv.f32 s15, s14, s13 801cc30: 4b87 ldr r3, [pc, #540] @ (801ce50 ) 801cc32: edc3 7a23 vstr s15, [r3, #140] @ 0x8c 801cc36: e04a b.n 801ccce case 0x20: WP_Weight.Safety.SlewRate_kgPerSec = (float)val; break; 801cc38: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cc3c: ee07 3a90 vmov s15, r3 801cc40: eef8 7a67 vcvt.f32.u32 s15, s15 801cc44: 4b82 ldr r3, [pc, #520] @ (801ce50 ) 801cc46: edc3 7a28 vstr s15, [r3, #160] @ 0xa0 801cc4a: e040 b.n 801ccce case 0x30: WP_Weight.Vib.Freq = (float)val / 100.0f; break; // ×100 801cc4c: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cc50: ee07 3a90 vmov s15, r3 801cc54: eeb8 7a67 vcvt.f32.u32 s14, s15 801cc58: eddf 6a7e vldr s13, [pc, #504] @ 801ce54 801cc5c: eec7 7a26 vdiv.f32 s15, s14, s13 801cc60: 4b7b ldr r3, [pc, #492] @ (801ce50 ) 801cc62: edc3 7a24 vstr s15, [r3, #144] @ 0x90 801cc66: e032 b.n 801ccce case 0x31: WP_Weight.Vib.AmplitudeKg = (float)val / 100.0f; break; // ×100, kg 801cc68: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cc6c: ee07 3a90 vmov s15, r3 801cc70: eeb8 7a67 vcvt.f32.u32 s14, s15 801cc74: eddf 6a77 vldr s13, [pc, #476] @ 801ce54 801cc78: eec7 7a26 vdiv.f32 s15, s14, s13 801cc7c: 4b74 ldr r3, [pc, #464] @ (801ce50 ) 801cc7e: edc3 7a25 vstr s15, [r3, #148] @ 0x94 801cc82: e024 b.n 801ccce case 0x32: WP_Weight.Vib.MaxRatio = (float)val / 100.0f; break; // ×100, 비율 801cc84: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cc88: ee07 3a90 vmov s15, r3 801cc8c: eeb8 7a67 vcvt.f32.u32 s14, s15 801cc90: eddf 6a70 vldr s13, [pc, #448] @ 801ce54 801cc94: eec7 7a26 vdiv.f32 s15, s14, s13 801cc98: 4b6d ldr r3, [pc, #436] @ (801ce50 ) 801cc9a: edc3 7a26 vstr s15, [r3, #152] @ 0x98 801cc9e: e016 b.n 801ccce case 0x40: WP_Weight.Safety.IqLimit = (float)val / 100.0f; break; // ×100, A 단위 801cca0: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801cca4: ee07 3a90 vmov s15, r3 801cca8: eeb8 7a67 vcvt.f32.u32 s14, s15 801ccac: eddf 6a69 vldr s13, [pc, #420] @ 801ce54 801ccb0: eec7 7a26 vdiv.f32 s15, s14, s13 801ccb4: 4b66 ldr r3, [pc, #408] @ (801ce50 ) 801ccb6: edc3 7a27 vstr s15, [r3, #156] @ 0x9c 801ccba: e008 b.n 801ccce case 0x50: Time_StopAutoOff = (int)val * 1000; break; // val=0.1초 단위 (50→5초), ×1000(10kHz×0.1s) 801ccbc: f8b7 30ac ldrh.w r3, [r7, #172] @ 0xac 801ccc0: f44f 727a mov.w r2, #1000 @ 0x3e8 801ccc4: fb02 f303 mul.w r3, r2, r3 801ccc8: 4a63 ldr r2, [pc, #396] @ (801ce58 ) 801ccca: 6013 str r3, [r2, #0] 801cccc: bf00 nop } Return_1byte(DEBUG_REPORT, 0x05); // ACK 801ccce: 2105 movs r1, #5 801ccd0: 20f5 movs r0, #245 @ 0xf5 801ccd2: f7fd f85b bl 8019d8c } break; 801ccd6: e049 b.n 801cd6c case 0x10: // F5 10: Debug Report 강제 ON Debug_Report_Active = 1; 801ccd8: 4b60 ldr r3, [pc, #384] @ (801ce5c ) 801ccda: 2201 movs r2, #1 801ccdc: 701a strb r2, [r3, #0] Return_1byte(DEBUG_REPORT, 0x10); // ACK 801ccde: 2110 movs r1, #16 801cce0: 20f5 movs r0, #245 @ 0xf5 801cce2: f7fd f853 bl 8019d8c break; 801cce6: e041 b.n 801cd6c case 0x11: // F5 11: Debug Report 강제 OFF Debug_Report_Active = 0; 801cce8: 4b5c ldr r3, [pc, #368] @ (801ce5c ) 801ccea: 2200 movs r2, #0 801ccec: 701a strb r2, [r3, #0] Return_1byte(DEBUG_REPORT, 0x11); // ACK 801ccee: 2111 movs r1, #17 801ccf0: 20f5 movs r0, #245 @ 0xf5 801ccf2: f7fd f84b bl 8019d8c break; 801ccf6: e039 b.n 801cd6c case 0x20: // F5 20: Dev Report ON (v3→dev 전환) DevReport_Active = 1; 801ccf8: 4b59 ldr r3, [pc, #356] @ (801ce60 ) 801ccfa: 2201 movs r2, #1 801ccfc: 701a strb r2, [r3, #0] Task_Start_50ms(Return_Report_Task_dev); // 즉시 전환 801ccfe: 4859 ldr r0, [pc, #356] @ (801ce64 ) 801cd00: f001 f86a bl 801ddd8 Return_1byte(DEBUG_REPORT, 0x20); // ACK 801cd04: 2120 movs r1, #32 801cd06: 20f5 movs r0, #245 @ 0xf5 801cd08: f7fd f840 bl 8019d8c break; 801cd0c: e02e b.n 801cd6c case 0x21: // F5 21: Dev Report OFF (dev→v3 원복) DevReport_Active = 0; 801cd0e: 4b54 ldr r3, [pc, #336] @ (801ce60 ) 801cd10: 2200 movs r2, #0 801cd12: 701a strb r2, [r3, #0] Task_Start_50ms(Return_Report_Task_v3); // 즉시 전환 801cd14: 4854 ldr r0, [pc, #336] @ (801ce68 ) 801cd16: f001 f85f bl 801ddd8 Return_1byte(DEBUG_REPORT, 0x21); // ACK 801cd1a: 2121 movs r1, #33 @ 0x21 801cd1c: 20f5 movs r0, #245 @ 0xf5 801cd1e: f7fd f835 bl 8019d8c break; 801cd22: e023 b.n 801cd6c default: // F5 xx: 리포트 토글 (기존 동작) Debug_Report_Active = !Debug_Report_Active; 801cd24: 4b4d ldr r3, [pc, #308] @ (801ce5c ) 801cd26: 781b ldrb r3, [r3, #0] 801cd28: 2b00 cmp r3, #0 801cd2a: bf0c ite eq 801cd2c: 2301 moveq r3, #1 801cd2e: 2300 movne r3, #0 801cd30: b2db uxtb r3, r3 801cd32: 461a mov r2, r3 801cd34: 4b49 ldr r3, [pc, #292] @ (801ce5c ) 801cd36: 701a strb r2, [r3, #0] Return_1byte(DEBUG_REPORT, Debug_Report_Active); 801cd38: 4b48 ldr r3, [pc, #288] @ (801ce5c ) 801cd3a: 781b ldrb r3, [r3, #0] 801cd3c: 4619 mov r1, r3 801cd3e: 20f5 movs r0, #245 @ 0xf5 801cd40: f7fd f824 bl 8019d8c break; 801cd44: e012 b.n 801cd6c } } else { // FF FF 02 F5 [CHK] — 기존 토글 Debug_Report_Active = !Debug_Report_Active; 801cd46: 4b45 ldr r3, [pc, #276] @ (801ce5c ) 801cd48: 781b ldrb r3, [r3, #0] 801cd4a: 2b00 cmp r3, #0 801cd4c: bf0c ite eq 801cd4e: 2301 moveq r3, #1 801cd50: 2300 movne r3, #0 801cd52: b2db uxtb r3, r3 801cd54: 461a mov r2, r3 801cd56: 4b41 ldr r3, [pc, #260] @ (801ce5c ) 801cd58: 701a strb r2, [r3, #0] Return_1byte(DEBUG_REPORT, Debug_Report_Active); 801cd5a: 4b40 ldr r3, [pc, #256] @ (801ce5c ) 801cd5c: 781b ldrb r3, [r3, #0] 801cd5e: 4619 mov r1, r3 801cd60: 20f5 movs r0, #245 @ 0xf5 801cd62: f7fd f813 bl 8019d8c } break; 801cd66: f000 beb3 b.w 801dad0 break; 801cd6a: bf00 nop break; 801cd6c: f000 beb0 b.w 801dad0 case 0xFF: //for TEST FF FF 03 FF ## CHK (##: [00]Default [01]RAM data [02]Original Sector [03]Backup Sector [04]Variables) DEBUG_printf("\r\n Memory Dump for TEST\r\n"); 801cd70: 483e ldr r0, [pc, #248] @ (801ce6c ) 801cd72: f003 f84d bl 801fe10 { uint8_t *p; if(UART3_Getc_NoClear(1)<4) { 801cd76: 2101 movs r1, #1 801cd78: 483d ldr r0, [pc, #244] @ (801ce70 ) 801cd7a: f003 f853 bl 801fe24 801cd7e: 4603 mov r3, r0 801cd80: 2b03 cmp r3, #3 801cd82: f300 808d bgt.w 801cea0 switch(UART3_Getc_NoClear(1)) { 801cd86: 2101 movs r1, #1 801cd88: 4839 ldr r0, [pc, #228] @ (801ce70 ) 801cd8a: f003 f84b bl 801fe24 801cd8e: 4603 mov r3, r0 801cd90: 2b03 cmp r3, #3 801cd92: d82f bhi.n 801cdf4 801cd94: a201 add r2, pc, #4 @ (adr r2, 801cd9c ) 801cd96: f852 f023 ldr.w pc, [r2, r3, lsl #2] 801cd9a: bf00 nop 801cd9c: 0801cdd1 .word 0x0801cdd1 801cda0: 0801cde3 .word 0x0801cde3 801cda4: 0801cdad .word 0x0801cdad 801cda8: 0801cdbf .word 0x0801cdbf case FLASH_ORIGIN_SECTOR: //2 UART3_Puts("\r\nOriginal Sector\r\n"); 801cdac: 2200 movs r2, #0 801cdae: 4931 ldr r1, [pc, #196] @ (801ce74 ) 801cdb0: 482f ldr r0, [pc, #188] @ (801ce70 ) 801cdb2: f002 fdb9 bl 801f928 p = (uint8_t*)&Origin_Data; 801cdb6: 4b30 ldr r3, [pc, #192] @ (801ce78 ) 801cdb8: f8c7 30bc str.w r3, [r7, #188] @ 0xbc break; 801cdbc: e01a b.n 801cdf4 case FLASH_BACKUP_SECTOR: //3 UART3_Puts("\r\nBackup Sector\r\n"); 801cdbe: 2200 movs r2, #0 801cdc0: 492e ldr r1, [pc, #184] @ (801ce7c ) 801cdc2: 482b ldr r0, [pc, #172] @ (801ce70 ) 801cdc4: f002 fdb0 bl 801f928 p = (uint8_t*)&Backup_Data; 801cdc8: 4b2d ldr r3, [pc, #180] @ (801ce80 ) 801cdca: f8c7 30bc str.w r3, [r7, #188] @ 0xbc break; 801cdce: e011 b.n 801cdf4 case 0: UART3_Puts("\r\nDefault RAM Data\r\n"); 801cdd0: 2200 movs r2, #0 801cdd2: 492c ldr r1, [pc, #176] @ (801ce84 ) 801cdd4: 4826 ldr r0, [pc, #152] @ (801ce70 ) 801cdd6: f002 fda7 bl 801f928 p = (uint8_t*)&Defualt_RAM_Data; 801cdda: 4b2b ldr r3, [pc, #172] @ (801ce88 ) 801cddc: f8c7 30bc str.w r3, [r7, #188] @ 0xbc break; 801cde0: e008 b.n 801cdf4 case 1: UART3_Puts("\r\nRAM Data\r\n"); 801cde2: 2200 movs r2, #0 801cde4: 4929 ldr r1, [pc, #164] @ (801ce8c ) 801cde6: 4822 ldr r0, [pc, #136] @ (801ce70 ) 801cde8: f002 fd9e bl 801f928 p = (uint8_t*)&RAM_Data; 801cdec: 4b28 ldr r3, [pc, #160] @ (801ce90 ) 801cdee: f8c7 30bc str.w r3, [r7, #188] @ 0xbc break; 801cdf2: bf00 nop } //Display Dump for(int i=0; i if(i%16==0) UART3_printf("\r\n[%04X] ", i); 801cdfc: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 801ce00: f003 030f and.w r3, r3, #15 801ce04: 2b00 cmp r3, #0 801ce06: d104 bne.n 801ce12 801ce08: f8d7 10b8 ldr.w r1, [r7, #184] @ 0xb8 801ce0c: 4821 ldr r0, [pc, #132] @ (801ce94 ) 801ce0e: f002 ffa9 bl 801fd64 UART3_printf("%02X ", *p++); 801ce12: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 801ce16: 1c5a adds r2, r3, #1 801ce18: f8c7 20bc str.w r2, [r7, #188] @ 0xbc 801ce1c: 781b ldrb r3, [r3, #0] 801ce1e: 4619 mov r1, r3 801ce20: 481d ldr r0, [pc, #116] @ (801ce98 ) 801ce22: f002 ff9f bl 801fd64 delay_msec(0.5); 801ce26: f641 205e movw r0, #6750 @ 0x1a5e 801ce2a: f000 fe75 bl 801db18 <_delay> for(int i=0; i } UART3_Puts("\r\n"); 801ce40: 2200 movs r2, #0 801ce42: 4916 ldr r1, [pc, #88] @ (801ce9c ) 801ce44: 480a ldr r0, [pc, #40] @ (801ce70 ) 801ce46: f002 fd6f bl 801f928 UART3_printf(" Avg: %lu cycles (%s us)\r\n", ISR_Profile.avg, Float2String((float)ISR_Profile.avg/180.0f, 1)); UART3_printf(" Count: %lu\r\n", ISR_Profile.count); UART3_printf(" Budget: 200us (5kHz), Usage: %s%%\r\n", Float2String((float)ISR_Profile.max/36000.0f*100.0f, 1)); } } break; 801ce4a: f000 be41 b.w 801dad0 801ce4e: bf00 nop 801ce50: 200001d8 .word 0x200001d8 801ce54: 42c80000 .word 0x42c80000 801ce58: 20000014 .word 0x20000014 801ce5c: 20000340 .word 0x20000340 801ce60: 20000c19 .word 0x20000c19 801ce64: 0801a019 .word 0x0801a019 801ce68: 0801a355 .word 0x0801a355 801ce6c: 0802ac4c .word 0x0802ac4c 801ce70: 200053ec .word 0x200053ec 801ce74: 0802ac68 .word 0x0802ac68 801ce78: 08008000 .word 0x08008000 801ce7c: 0802ac7c .word 0x0802ac7c 801ce80: 0800c000 .word 0x0800c000 801ce84: 0802ac90 .word 0x0802ac90 801ce88: 0802d150 .word 0x0802d150 801ce8c: 0802aca8 .word 0x0802aca8 801ce90: 20000a98 .word 0x20000a98 801ce94: 0802acb8 .word 0x0802acb8 801ce98: 0802acc4 .word 0x0802acc4 801ce9c: 0802a870 .word 0x0802a870 UART3_printf("\r\n\r\n[HW]\tModel: %d.%d\t",RAM_Data.model[0],RAM_Data.model[1]); 801cea0: 4bcf ldr r3, [pc, #828] @ (801d1e0 ) 801cea2: 781b ldrb r3, [r3, #0] 801cea4: 4619 mov r1, r3 801cea6: 4bce ldr r3, [pc, #824] @ (801d1e0 ) 801cea8: 785b ldrb r3, [r3, #1] 801ceaa: 461a mov r2, r3 801ceac: 48cd ldr r0, [pc, #820] @ (801d1e4 ) 801ceae: f002 ff59 bl 801fd64 UART3_printf("FW Ver: %d.%d.%d\t",WespionVer.VerMajer,WespionVer.VerMiner,WespionVer.VerSub); 801ceb2: 4bcd ldr r3, [pc, #820] @ (801d1e8 ) 801ceb4: 781b ldrb r3, [r3, #0] 801ceb6: 4619 mov r1, r3 801ceb8: 4bcb ldr r3, [pc, #812] @ (801d1e8 ) 801ceba: 785b ldrb r3, [r3, #1] 801cebc: 461a mov r2, r3 801cebe: 4bca ldr r3, [pc, #808] @ (801d1e8 ) 801cec0: 789b ldrb r3, [r3, #2] 801cec2: 48ca ldr r0, [pc, #808] @ (801d1ec ) 801cec4: f002 ff4e bl 801fd64 UART3_printf("Date: %04d.%02d.%02d\t",WespionVer.VerYear,WespionVer.VerMonth,WespionVer.VerDate); 801cec8: 4bc7 ldr r3, [pc, #796] @ (801d1e8 ) 801ceca: 889b ldrh r3, [r3, #4] 801cecc: 4619 mov r1, r3 801cece: 4bc6 ldr r3, [pc, #792] @ (801d1e8 ) 801ced0: 799b ldrb r3, [r3, #6] 801ced2: 461a mov r2, r3 801ced4: 4bc4 ldr r3, [pc, #784] @ (801d1e8 ) 801ced6: 79db ldrb r3, [r3, #7] 801ced8: 48c5 ldr r0, [pc, #788] @ (801d1f0 ) 801ceda: f002 ff43 bl 801fd64 UART3_printf("\r\n\tUpdate\tDate: %s\tTime: %s",__DATE__, __TIME__); ///somebp 2024.02.08 801cede: 4ac5 ldr r2, [pc, #788] @ (801d1f4 ) 801cee0: 49c5 ldr r1, [pc, #788] @ (801d1f8 ) 801cee2: 48c6 ldr r0, [pc, #792] @ (801d1fc ) 801cee4: f002 ff3e bl 801fd64 UART3_printf("\r\n\r\n[Motor1]\tPole:%d\t",Motor1.Para.Pole); 801cee8: 4bc5 ldr r3, [pc, #788] @ (801d200 ) 801ceea: f893 317c ldrb.w r3, [r3, #380] @ 0x17c 801ceee: 4619 mov r1, r3 801cef0: 48c4 ldr r0, [pc, #784] @ (801d204 ) 801cef2: f002 ff37 bl 801fd64 UART3_printf("Ld:%s\t",Float2String(Motor1.Para.Ld, 2)); 801cef6: 4bc2 ldr r3, [pc, #776] @ (801d200 ) 801cef8: edd3 7a61 vldr s15, [r3, #388] @ 0x184 801cefc: 2002 movs r0, #2 801cefe: eeb0 0a67 vmov.f32 s0, s15 801cf02: f003 f851 bl 801ffa8 801cf06: 4603 mov r3, r0 801cf08: 4619 mov r1, r3 801cf0a: 48bf ldr r0, [pc, #764] @ (801d208 ) 801cf0c: f002 ff2a bl 801fd64 UART3_printf("Lq:%s\t",Float2String(Motor1.Para.Lq, 2)); 801cf10: 4bbb ldr r3, [pc, #748] @ (801d200 ) 801cf12: edd3 7a62 vldr s15, [r3, #392] @ 0x188 801cf16: 2002 movs r0, #2 801cf18: eeb0 0a67 vmov.f32 s0, s15 801cf1c: f003 f844 bl 801ffa8 801cf20: 4603 mov r3, r0 801cf22: 4619 mov r1, r3 801cf24: 48b9 ldr r0, [pc, #740] @ (801d20c ) 801cf26: f002 ff1d bl 801fd64 UART3_printf("Rs:%s\t",Float2String(Motor1.Para.Rs, 2)); 801cf2a: 4bb5 ldr r3, [pc, #724] @ (801d200 ) 801cf2c: edd3 7a60 vldr s15, [r3, #384] @ 0x180 801cf30: 2002 movs r0, #2 801cf32: eeb0 0a67 vmov.f32 s0, s15 801cf36: f003 f837 bl 801ffa8 801cf3a: 4603 mov r3, r0 801cf3c: 4619 mov r1, r3 801cf3e: 48b4 ldr r0, [pc, #720] @ (801d210 ) 801cf40: f002 ff10 bl 801fd64 UART3_printf("PhaiF:%s\t",Float2String(Motor1.Para.PhaiF, 3)); 801cf44: 4bae ldr r3, [pc, #696] @ (801d200 ) 801cf46: edd3 7a63 vldr s15, [r3, #396] @ 0x18c 801cf4a: 2003 movs r0, #3 801cf4c: eeb0 0a67 vmov.f32 s0, s15 801cf50: f003 f82a bl 801ffa8 801cf54: 4603 mov r3, r0 801cf56: 4619 mov r1, r3 801cf58: 48ae ldr r0, [pc, #696] @ (801d214 ) 801cf5a: f002 ff03 bl 801fd64 UART3_printf("\r\nGain\t(CurD) Kp:%s\t",Float2String(Motor1.GainCurD.Kp, 2)); 801cf5e: 4ba8 ldr r3, [pc, #672] @ (801d200 ) 801cf60: edd3 7a2f vldr s15, [r3, #188] @ 0xbc 801cf64: 2002 movs r0, #2 801cf66: eeb0 0a67 vmov.f32 s0, s15 801cf6a: f003 f81d bl 801ffa8 801cf6e: 4603 mov r3, r0 801cf70: 4619 mov r1, r3 801cf72: 48a9 ldr r0, [pc, #676] @ (801d218 ) 801cf74: f002 fef6 bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor1.GainCurD.Ki, 2)); 801cf78: 4ba1 ldr r3, [pc, #644] @ (801d200 ) 801cf7a: edd3 7a30 vldr s15, [r3, #192] @ 0xc0 801cf7e: 2002 movs r0, #2 801cf80: eeb0 0a67 vmov.f32 s0, s15 801cf84: f003 f810 bl 801ffa8 801cf88: 4603 mov r3, r0 801cf8a: 4619 mov r1, r3 801cf8c: 48a3 ldr r0, [pc, #652] @ (801d21c ) 801cf8e: f002 fee9 bl 801fd64 UART3_printf("Kaw:%s\t",Float2String(Motor1.GainCurD.Kaw, 2)); 801cf92: 4b9b ldr r3, [pc, #620] @ (801d200 ) 801cf94: edd3 7a31 vldr s15, [r3, #196] @ 0xc4 801cf98: 2002 movs r0, #2 801cf9a: eeb0 0a67 vmov.f32 s0, s15 801cf9e: f003 f803 bl 801ffa8 801cfa2: 4603 mov r3, r0 801cfa4: 4619 mov r1, r3 801cfa6: 489e ldr r0, [pc, #632] @ (801d220 ) 801cfa8: f002 fedc bl 801fd64 UART3_printf("(CurQ) Kp:%s\t",Float2String(Motor1.GainCurQ.Kp, 2)); 801cfac: 4b94 ldr r3, [pc, #592] @ (801d200 ) 801cfae: edd3 7a33 vldr s15, [r3, #204] @ 0xcc 801cfb2: 2002 movs r0, #2 801cfb4: eeb0 0a67 vmov.f32 s0, s15 801cfb8: f002 fff6 bl 801ffa8 801cfbc: 4603 mov r3, r0 801cfbe: 4619 mov r1, r3 801cfc0: 4898 ldr r0, [pc, #608] @ (801d224 ) 801cfc2: f002 fecf bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor1.GainCurQ.Ki, 2)); 801cfc6: 4b8e ldr r3, [pc, #568] @ (801d200 ) 801cfc8: edd3 7a34 vldr s15, [r3, #208] @ 0xd0 801cfcc: 2002 movs r0, #2 801cfce: eeb0 0a67 vmov.f32 s0, s15 801cfd2: f002 ffe9 bl 801ffa8 801cfd6: 4603 mov r3, r0 801cfd8: 4619 mov r1, r3 801cfda: 4890 ldr r0, [pc, #576] @ (801d21c ) 801cfdc: f002 fec2 bl 801fd64 UART3_printf("Kaw:%s\t",Float2String(Motor1.GainCurQ.Kaw, 2)); 801cfe0: 4b87 ldr r3, [pc, #540] @ (801d200 ) 801cfe2: edd3 7a35 vldr s15, [r3, #212] @ 0xd4 801cfe6: 2002 movs r0, #2 801cfe8: eeb0 0a67 vmov.f32 s0, s15 801cfec: f002 ffdc bl 801ffa8 801cff0: 4603 mov r3, r0 801cff2: 4619 mov r1, r3 801cff4: 488a ldr r0, [pc, #552] @ (801d220 ) 801cff6: f002 feb5 bl 801fd64 UART3_printf("\r\n\t(Spd) Kp:%s\t",Float2String(Motor1.GainSpd.Kp, 2)); 801cffa: 4b81 ldr r3, [pc, #516] @ (801d200 ) 801cffc: edd3 7a37 vldr s15, [r3, #220] @ 0xdc 801d000: 2002 movs r0, #2 801d002: eeb0 0a67 vmov.f32 s0, s15 801d006: f002 ffcf bl 801ffa8 801d00a: 4603 mov r3, r0 801d00c: 4619 mov r1, r3 801d00e: 4886 ldr r0, [pc, #536] @ (801d228 ) 801d010: f002 fea8 bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor1.GainSpd.Ki, 2)); 801d014: 4b7a ldr r3, [pc, #488] @ (801d200 ) 801d016: edd3 7a38 vldr s15, [r3, #224] @ 0xe0 801d01a: 2002 movs r0, #2 801d01c: eeb0 0a67 vmov.f32 s0, s15 801d020: f002 ffc2 bl 801ffa8 801d024: 4603 mov r3, r0 801d026: 4619 mov r1, r3 801d028: 487c ldr r0, [pc, #496] @ (801d21c ) 801d02a: f002 fe9b bl 801fd64 UART3_printf("Kaw:%s\t",Float2String(Motor1.GainSpd.Kaw, 2)); 801d02e: 4b74 ldr r3, [pc, #464] @ (801d200 ) 801d030: edd3 7a39 vldr s15, [r3, #228] @ 0xe4 801d034: 2002 movs r0, #2 801d036: eeb0 0a67 vmov.f32 s0, s15 801d03a: f002 ffb5 bl 801ffa8 801d03e: 4603 mov r3, r0 801d040: 4619 mov r1, r3 801d042: 4877 ldr r0, [pc, #476] @ (801d220 ) 801d044: f002 fe8e bl 801fd64 UART3_printf("(Fwk) Kp:%s\t",Float2String(Motor1.GainFweak.Kp, 2)); 801d048: 4b6d ldr r3, [pc, #436] @ (801d200 ) 801d04a: edd3 7a3b vldr s15, [r3, #236] @ 0xec 801d04e: 2002 movs r0, #2 801d050: eeb0 0a67 vmov.f32 s0, s15 801d054: f002 ffa8 bl 801ffa8 801d058: 4603 mov r3, r0 801d05a: 4619 mov r1, r3 801d05c: 4873 ldr r0, [pc, #460] @ (801d22c ) 801d05e: f002 fe81 bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor1.GainFweak.Ki, 2)); 801d062: 4b67 ldr r3, [pc, #412] @ (801d200 ) 801d064: edd3 7a3c vldr s15, [r3, #240] @ 0xf0 801d068: 2002 movs r0, #2 801d06a: eeb0 0a67 vmov.f32 s0, s15 801d06e: f002 ff9b bl 801ffa8 801d072: 4603 mov r3, r0 801d074: 4619 mov r1, r3 801d076: 4869 ldr r0, [pc, #420] @ (801d21c ) 801d078: f002 fe74 bl 801fd64 UART3_printf("\r\nM_Ang\tPolePair:%d\t",Motor1_Ang.PolePair); 801d07c: 4b6c ldr r3, [pc, #432] @ (801d230 ) 801d07e: 7b1b ldrb r3, [r3, #12] 801d080: 4619 mov r1, r3 801d082: 486c ldr r0, [pc, #432] @ (801d234 ) 801d084: f002 fe6e bl 801fd64 UART3_printf("Enc:%d\t",Motor1_Ang.EncPulse); 801d088: 4b69 ldr r3, [pc, #420] @ (801d230 ) 801d08a: 889b ldrh r3, [r3, #4] 801d08c: 4619 mov r1, r3 801d08e: 486a ldr r0, [pc, #424] @ (801d238 ) 801d090: f002 fe68 bl 801fd64 UART3_printf("AngSc:%s\t",Float2String(Motor1_Ang.AngleScale, 2)); 801d094: 4b66 ldr r3, [pc, #408] @ (801d230 ) 801d096: edd3 7a02 vldr s15, [r3, #8] 801d09a: 2002 movs r0, #2 801d09c: eeb0 0a67 vmov.f32 s0, s15 801d0a0: f002 ff82 bl 801ffa8 801d0a4: 4603 mov r3, r0 801d0a6: 4619 mov r1, r3 801d0a8: 4864 ldr r0, [pc, #400] @ (801d23c ) 801d0aa: f002 fe5b bl 801fd64 UART3_printf("SpdSc:%s\t",Float2String(Motor1_Ang.SpeedScale, 2)); 801d0ae: 4b60 ldr r3, [pc, #384] @ (801d230 ) 801d0b0: edd3 7a04 vldr s15, [r3, #16] 801d0b4: 2002 movs r0, #2 801d0b6: eeb0 0a67 vmov.f32 s0, s15 801d0ba: f002 ff75 bl 801ffa8 801d0be: 4603 mov r3, r0 801d0c0: 4619 mov r1, r3 801d0c2: 485f ldr r0, [pc, #380] @ (801d240 ) 801d0c4: f002 fe4e bl 801fd64 UART3_printf("\r\n\tOffs:%s\t",Float2String(Motor1_Ang.AngleElecOffset, 1)); 801d0c8: 4b59 ldr r3, [pc, #356] @ (801d230 ) 801d0ca: edd3 7a00 vldr s15, [r3] 801d0ce: 2001 movs r0, #1 801d0d0: eeb0 0a67 vmov.f32 s0, s15 801d0d4: f002 ff68 bl 801ffa8 801d0d8: 4603 mov r3, r0 801d0da: 4619 mov r1, r3 801d0dc: 4859 ldr r0, [pc, #356] @ (801d244 ) 801d0de: f002 fe41 bl 801fd64 UART3_printf("RpmLim:%s\t",Float2String(Motor1_Ang.RpmLim, 1)); 801d0e2: 4b53 ldr r3, [pc, #332] @ (801d230 ) 801d0e4: edd3 7a12 vldr s15, [r3, #72] @ 0x48 801d0e8: 2001 movs r0, #1 801d0ea: eeb0 0a67 vmov.f32 s0, s15 801d0ee: f002 ff5b bl 801ffa8 801d0f2: 4603 mov r3, r0 801d0f4: 4619 mov r1, r3 801d0f6: 4854 ldr r0, [pc, #336] @ (801d248 ) 801d0f8: f002 fe34 bl 801fd64 UART3_printf("SpdLim:%s\t",Float2String(Motor1_Ang.SpdCtrlOutLim, 1)); 801d0fc: 4b4c ldr r3, [pc, #304] @ (801d230 ) 801d0fe: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 801d102: 2001 movs r0, #1 801d104: eeb0 0a67 vmov.f32 s0, s15 801d108: f002 ff4e bl 801ffa8 801d10c: 4603 mov r3, r0 801d10e: 4619 mov r1, r3 801d110: 484e ldr r0, [pc, #312] @ (801d24c ) 801d112: f002 fe27 bl 801fd64 UART3_printf("\r\nMR\tMaxS:%d\t",Motor1_Ang.MR.Max.Sin); 801d116: 4b46 ldr r3, [pc, #280] @ (801d230 ) 801d118: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64 801d11c: 4619 mov r1, r3 801d11e: 484c ldr r0, [pc, #304] @ (801d250 ) 801d120: f002 fe20 bl 801fd64 UART3_printf("MaxC:%d\t",Motor1_Ang.MR.Max.Cos); 801d124: 4b42 ldr r3, [pc, #264] @ (801d230 ) 801d126: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66 801d12a: 4619 mov r1, r3 801d12c: 4849 ldr r0, [pc, #292] @ (801d254 ) 801d12e: f002 fe19 bl 801fd64 UART3_printf("MinS:%d\t",Motor1_Ang.MR.Min.Sin); 801d132: 4b3f ldr r3, [pc, #252] @ (801d230 ) 801d134: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60 801d138: 4619 mov r1, r3 801d13a: 4847 ldr r0, [pc, #284] @ (801d258 ) 801d13c: f002 fe12 bl 801fd64 UART3_printf("MinC:%d\t",Motor1_Ang.MR.Min.Cos); 801d140: 4b3b ldr r3, [pc, #236] @ (801d230 ) 801d142: f8b3 3062 ldrh.w r3, [r3, #98] @ 0x62 801d146: 4619 mov r1, r3 801d148: 4844 ldr r0, [pc, #272] @ (801d25c ) 801d14a: f002 fe0b bl 801fd64 UART3_printf("MidS:%d\t",Motor1_Ang.MR.Mid.Sin); 801d14e: 4b38 ldr r3, [pc, #224] @ (801d230 ) 801d150: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68 801d154: 4619 mov r1, r3 801d156: 4842 ldr r0, [pc, #264] @ (801d260 ) 801d158: f002 fe04 bl 801fd64 UART3_printf("MidC:%d\t",Motor1_Ang.MR.Mid.Cos); 801d15c: 4b34 ldr r3, [pc, #208] @ (801d230 ) 801d15e: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a 801d162: 4619 mov r1, r3 801d164: 483f ldr r0, [pc, #252] @ (801d264 ) 801d166: f002 fdfd bl 801fd64 UART3_printf("GainS:%s\t",Float2String(Motor1_Ang.MR.Gain.Sin, 1)); 801d16a: 4b31 ldr r3, [pc, #196] @ (801d230 ) 801d16c: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 801d170: 2001 movs r0, #1 801d172: eeb0 0a67 vmov.f32 s0, s15 801d176: f002 ff17 bl 801ffa8 801d17a: 4603 mov r3, r0 801d17c: 4619 mov r1, r3 801d17e: 483a ldr r0, [pc, #232] @ (801d268 ) 801d180: f002 fdf0 bl 801fd64 UART3_printf("GainC:%s\t",Float2String(Motor1_Ang.MR.Gain.Cos, 1)); 801d184: 4b2a ldr r3, [pc, #168] @ (801d230 ) 801d186: edd3 7a1c vldr s15, [r3, #112] @ 0x70 801d18a: 2001 movs r0, #1 801d18c: eeb0 0a67 vmov.f32 s0, s15 801d190: f002 ff0a bl 801ffa8 801d194: 4603 mov r3, r0 801d196: 4619 mov r1, r3 801d198: 4834 ldr r0, [pc, #208] @ (801d26c ) 801d19a: f002 fde3 bl 801fd64 Delay_sec(0.4); 801d19e: f240 108f movw r0, #399 @ 0x18f 801d1a2: f003 f84d bl 8020240 UART3_printf("\r\n\r\n[Motor2]\tPole:%d\t",Motor2.Para.Pole); 801d1a6: 4b32 ldr r3, [pc, #200] @ (801d270 ) 801d1a8: f893 317c ldrb.w r3, [r3, #380] @ 0x17c 801d1ac: 4619 mov r1, r3 801d1ae: 4831 ldr r0, [pc, #196] @ (801d274 ) 801d1b0: f002 fdd8 bl 801fd64 UART3_printf("Ld:%s\t",Float2String(Motor2.Para.Ld, 2)); 801d1b4: 4b2e ldr r3, [pc, #184] @ (801d270 ) 801d1b6: edd3 7a61 vldr s15, [r3, #388] @ 0x184 801d1ba: 2002 movs r0, #2 801d1bc: eeb0 0a67 vmov.f32 s0, s15 801d1c0: f002 fef2 bl 801ffa8 801d1c4: 4603 mov r3, r0 801d1c6: 4619 mov r1, r3 801d1c8: 480f ldr r0, [pc, #60] @ (801d208 ) 801d1ca: f002 fdcb bl 801fd64 UART3_printf("Lq:%s\t",Float2String(Motor2.Para.Lq, 2)); 801d1ce: 4b28 ldr r3, [pc, #160] @ (801d270 ) 801d1d0: edd3 7a62 vldr s15, [r3, #392] @ 0x188 801d1d4: 2002 movs r0, #2 801d1d6: eeb0 0a67 vmov.f32 s0, s15 801d1da: f002 fee5 bl 801ffa8 801d1de: e04b b.n 801d278 801d1e0: 20000a98 .word 0x20000a98 801d1e4: 0802accc .word 0x0802accc 801d1e8: 200000b0 .word 0x200000b0 801d1ec: 0802ace4 .word 0x0802ace4 801d1f0: 0802acf8 .word 0x0802acf8 801d1f4: 0802ad10 .word 0x0802ad10 801d1f8: 0802ad1c .word 0x0802ad1c 801d1fc: 0802ad28 .word 0x0802ad28 801d200: 20000574 .word 0x20000574 801d204: 0802ad44 .word 0x0802ad44 801d208: 0802ad5c .word 0x0802ad5c 801d20c: 0802ad64 .word 0x0802ad64 801d210: 0802ad6c .word 0x0802ad6c 801d214: 0802ad74 .word 0x0802ad74 801d218: 0802ad80 .word 0x0802ad80 801d21c: 0802ad98 .word 0x0802ad98 801d220: 0802ada0 .word 0x0802ada0 801d224: 0802ada8 .word 0x0802ada8 801d228: 0802adb8 .word 0x0802adb8 801d22c: 0802adcc .word 0x0802adcc 801d230: 2000047c .word 0x2000047c 801d234: 0802addc .word 0x0802addc 801d238: 0802adf4 .word 0x0802adf4 801d23c: 0802adfc .word 0x0802adfc 801d240: 0802ae08 .word 0x0802ae08 801d244: 0802ae14 .word 0x0802ae14 801d248: 0802ae20 .word 0x0802ae20 801d24c: 0802ae2c .word 0x0802ae2c 801d250: 0802ae38 .word 0x0802ae38 801d254: 0802ae48 .word 0x0802ae48 801d258: 0802ae54 .word 0x0802ae54 801d25c: 0802ae60 .word 0x0802ae60 801d260: 0802ae6c .word 0x0802ae6c 801d264: 0802ae78 .word 0x0802ae78 801d268: 0802ae84 .word 0x0802ae84 801d26c: 0802ae90 .word 0x0802ae90 801d270: 20000704 .word 0x20000704 801d274: 0802ae9c .word 0x0802ae9c 801d278: 4603 mov r3, r0 801d27a: 4619 mov r1, r3 801d27c: 48d6 ldr r0, [pc, #856] @ (801d5d8 ) 801d27e: f002 fd71 bl 801fd64 UART3_printf("Rs:%s\t",Float2String(Motor2.Para.Rs, 2)); 801d282: 4bd6 ldr r3, [pc, #856] @ (801d5dc ) 801d284: edd3 7a60 vldr s15, [r3, #384] @ 0x180 801d288: 2002 movs r0, #2 801d28a: eeb0 0a67 vmov.f32 s0, s15 801d28e: f002 fe8b bl 801ffa8 801d292: 4603 mov r3, r0 801d294: 4619 mov r1, r3 801d296: 48d2 ldr r0, [pc, #840] @ (801d5e0 ) 801d298: f002 fd64 bl 801fd64 UART3_printf("PhaiF:%s\t",Float2String(Motor2.Para.PhaiF, 3)); 801d29c: 4bcf ldr r3, [pc, #828] @ (801d5dc ) 801d29e: edd3 7a63 vldr s15, [r3, #396] @ 0x18c 801d2a2: 2003 movs r0, #3 801d2a4: eeb0 0a67 vmov.f32 s0, s15 801d2a8: f002 fe7e bl 801ffa8 801d2ac: 4603 mov r3, r0 801d2ae: 4619 mov r1, r3 801d2b0: 48cc ldr r0, [pc, #816] @ (801d5e4 ) 801d2b2: f002 fd57 bl 801fd64 UART3_printf("\r\nGain\t(CurD) Kp:%s\t",Float2String(Motor2.GainCurD.Kp, 2)); 801d2b6: 4bc9 ldr r3, [pc, #804] @ (801d5dc ) 801d2b8: edd3 7a2f vldr s15, [r3, #188] @ 0xbc 801d2bc: 2002 movs r0, #2 801d2be: eeb0 0a67 vmov.f32 s0, s15 801d2c2: f002 fe71 bl 801ffa8 801d2c6: 4603 mov r3, r0 801d2c8: 4619 mov r1, r3 801d2ca: 48c7 ldr r0, [pc, #796] @ (801d5e8 ) 801d2cc: f002 fd4a bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor2.GainCurD.Ki, 2)); 801d2d0: 4bc2 ldr r3, [pc, #776] @ (801d5dc ) 801d2d2: edd3 7a30 vldr s15, [r3, #192] @ 0xc0 801d2d6: 2002 movs r0, #2 801d2d8: eeb0 0a67 vmov.f32 s0, s15 801d2dc: f002 fe64 bl 801ffa8 801d2e0: 4603 mov r3, r0 801d2e2: 4619 mov r1, r3 801d2e4: 48c1 ldr r0, [pc, #772] @ (801d5ec ) 801d2e6: f002 fd3d bl 801fd64 UART3_printf("Kaw:%s\t",Float2String(Motor2.GainCurD.Kaw, 2)); 801d2ea: 4bbc ldr r3, [pc, #752] @ (801d5dc ) 801d2ec: edd3 7a31 vldr s15, [r3, #196] @ 0xc4 801d2f0: 2002 movs r0, #2 801d2f2: eeb0 0a67 vmov.f32 s0, s15 801d2f6: f002 fe57 bl 801ffa8 801d2fa: 4603 mov r3, r0 801d2fc: 4619 mov r1, r3 801d2fe: 48bc ldr r0, [pc, #752] @ (801d5f0 ) 801d300: f002 fd30 bl 801fd64 UART3_printf("(CurQ) Kp:%s\t",Float2String(Motor2.GainCurQ.Kp, 2)); 801d304: 4bb5 ldr r3, [pc, #724] @ (801d5dc ) 801d306: edd3 7a33 vldr s15, [r3, #204] @ 0xcc 801d30a: 2002 movs r0, #2 801d30c: eeb0 0a67 vmov.f32 s0, s15 801d310: f002 fe4a bl 801ffa8 801d314: 4603 mov r3, r0 801d316: 4619 mov r1, r3 801d318: 48b6 ldr r0, [pc, #728] @ (801d5f4 ) 801d31a: f002 fd23 bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor2.GainCurQ.Ki, 2)); 801d31e: 4baf ldr r3, [pc, #700] @ (801d5dc ) 801d320: edd3 7a34 vldr s15, [r3, #208] @ 0xd0 801d324: 2002 movs r0, #2 801d326: eeb0 0a67 vmov.f32 s0, s15 801d32a: f002 fe3d bl 801ffa8 801d32e: 4603 mov r3, r0 801d330: 4619 mov r1, r3 801d332: 48ae ldr r0, [pc, #696] @ (801d5ec ) 801d334: f002 fd16 bl 801fd64 UART3_printf("Kaw:%s\t",Float2String(Motor2.GainCurQ.Kaw, 2)); 801d338: 4ba8 ldr r3, [pc, #672] @ (801d5dc ) 801d33a: edd3 7a35 vldr s15, [r3, #212] @ 0xd4 801d33e: 2002 movs r0, #2 801d340: eeb0 0a67 vmov.f32 s0, s15 801d344: f002 fe30 bl 801ffa8 801d348: 4603 mov r3, r0 801d34a: 4619 mov r1, r3 801d34c: 48a8 ldr r0, [pc, #672] @ (801d5f0 ) 801d34e: f002 fd09 bl 801fd64 UART3_printf("\r\n\t(Spd) Kp:%s\t",Float2String(Motor2.GainSpd.Kp, 2)); 801d352: 4ba2 ldr r3, [pc, #648] @ (801d5dc ) 801d354: edd3 7a37 vldr s15, [r3, #220] @ 0xdc 801d358: 2002 movs r0, #2 801d35a: eeb0 0a67 vmov.f32 s0, s15 801d35e: f002 fe23 bl 801ffa8 801d362: 4603 mov r3, r0 801d364: 4619 mov r1, r3 801d366: 48a4 ldr r0, [pc, #656] @ (801d5f8 ) 801d368: f002 fcfc bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor2.GainSpd.Ki, 2)); 801d36c: 4b9b ldr r3, [pc, #620] @ (801d5dc ) 801d36e: edd3 7a38 vldr s15, [r3, #224] @ 0xe0 801d372: 2002 movs r0, #2 801d374: eeb0 0a67 vmov.f32 s0, s15 801d378: f002 fe16 bl 801ffa8 801d37c: 4603 mov r3, r0 801d37e: 4619 mov r1, r3 801d380: 489a ldr r0, [pc, #616] @ (801d5ec ) 801d382: f002 fcef bl 801fd64 UART3_printf("Kaw:%s\t",Float2String(Motor2.GainSpd.Kaw, 2)); 801d386: 4b95 ldr r3, [pc, #596] @ (801d5dc ) 801d388: edd3 7a39 vldr s15, [r3, #228] @ 0xe4 801d38c: 2002 movs r0, #2 801d38e: eeb0 0a67 vmov.f32 s0, s15 801d392: f002 fe09 bl 801ffa8 801d396: 4603 mov r3, r0 801d398: 4619 mov r1, r3 801d39a: 4895 ldr r0, [pc, #596] @ (801d5f0 ) 801d39c: f002 fce2 bl 801fd64 UART3_printf("(Fwk) Kp:%s\t",Float2String(Motor2.GainFweak.Kp, 2)); 801d3a0: 4b8e ldr r3, [pc, #568] @ (801d5dc ) 801d3a2: edd3 7a3b vldr s15, [r3, #236] @ 0xec 801d3a6: 2002 movs r0, #2 801d3a8: eeb0 0a67 vmov.f32 s0, s15 801d3ac: f002 fdfc bl 801ffa8 801d3b0: 4603 mov r3, r0 801d3b2: 4619 mov r1, r3 801d3b4: 4891 ldr r0, [pc, #580] @ (801d5fc ) 801d3b6: f002 fcd5 bl 801fd64 UART3_printf("Ki:%s\t",Float2String(Motor2.GainFweak.Ki, 2)); 801d3ba: 4b88 ldr r3, [pc, #544] @ (801d5dc ) 801d3bc: edd3 7a3c vldr s15, [r3, #240] @ 0xf0 801d3c0: 2002 movs r0, #2 801d3c2: eeb0 0a67 vmov.f32 s0, s15 801d3c6: f002 fdef bl 801ffa8 801d3ca: 4603 mov r3, r0 801d3cc: 4619 mov r1, r3 801d3ce: 4887 ldr r0, [pc, #540] @ (801d5ec ) 801d3d0: f002 fcc8 bl 801fd64 UART3_printf("\r\nM_Ang\tPolePair:%d\t",Motor2_Ang.PolePair); 801d3d4: 4b8a ldr r3, [pc, #552] @ (801d600 ) 801d3d6: 7b1b ldrb r3, [r3, #12] 801d3d8: 4619 mov r1, r3 801d3da: 488a ldr r0, [pc, #552] @ (801d604 ) 801d3dc: f002 fcc2 bl 801fd64 UART3_printf("Enc:%d\t",Motor2_Ang.EncPulse); 801d3e0: 4b87 ldr r3, [pc, #540] @ (801d600 ) 801d3e2: 889b ldrh r3, [r3, #4] 801d3e4: 4619 mov r1, r3 801d3e6: 4888 ldr r0, [pc, #544] @ (801d608 ) 801d3e8: f002 fcbc bl 801fd64 UART3_printf("AngSc:%s\t",Float2String(Motor2_Ang.AngleScale, 2)); 801d3ec: 4b84 ldr r3, [pc, #528] @ (801d600 ) 801d3ee: edd3 7a02 vldr s15, [r3, #8] 801d3f2: 2002 movs r0, #2 801d3f4: eeb0 0a67 vmov.f32 s0, s15 801d3f8: f002 fdd6 bl 801ffa8 801d3fc: 4603 mov r3, r0 801d3fe: 4619 mov r1, r3 801d400: 4882 ldr r0, [pc, #520] @ (801d60c ) 801d402: f002 fcaf bl 801fd64 UART3_printf("SpdSc:%s\t",Float2String(Motor2_Ang.SpeedScale, 2)); 801d406: 4b7e ldr r3, [pc, #504] @ (801d600 ) 801d408: edd3 7a04 vldr s15, [r3, #16] 801d40c: 2002 movs r0, #2 801d40e: eeb0 0a67 vmov.f32 s0, s15 801d412: f002 fdc9 bl 801ffa8 801d416: 4603 mov r3, r0 801d418: 4619 mov r1, r3 801d41a: 487d ldr r0, [pc, #500] @ (801d610 ) 801d41c: f002 fca2 bl 801fd64 UART3_printf("\r\n\tOffs:%s\t",Float2String(Motor2_Ang.AngleElecOffset, 1)); 801d420: 4b77 ldr r3, [pc, #476] @ (801d600 ) 801d422: edd3 7a00 vldr s15, [r3] 801d426: 2001 movs r0, #1 801d428: eeb0 0a67 vmov.f32 s0, s15 801d42c: f002 fdbc bl 801ffa8 801d430: 4603 mov r3, r0 801d432: 4619 mov r1, r3 801d434: 4877 ldr r0, [pc, #476] @ (801d614 ) 801d436: f002 fc95 bl 801fd64 UART3_printf("RpmLim:%s\t",Float2String(Motor2_Ang.RpmLim, 1)); 801d43a: 4b71 ldr r3, [pc, #452] @ (801d600 ) 801d43c: edd3 7a12 vldr s15, [r3, #72] @ 0x48 801d440: 2001 movs r0, #1 801d442: eeb0 0a67 vmov.f32 s0, s15 801d446: f002 fdaf bl 801ffa8 801d44a: 4603 mov r3, r0 801d44c: 4619 mov r1, r3 801d44e: 4872 ldr r0, [pc, #456] @ (801d618 ) 801d450: f002 fc88 bl 801fd64 UART3_printf("SpdLim:%s\t",Float2String(Motor2_Ang.SpdCtrlOutLim, 1)); 801d454: 4b6a ldr r3, [pc, #424] @ (801d600 ) 801d456: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 801d45a: 2001 movs r0, #1 801d45c: eeb0 0a67 vmov.f32 s0, s15 801d460: f002 fda2 bl 801ffa8 801d464: 4603 mov r3, r0 801d466: 4619 mov r1, r3 801d468: 486c ldr r0, [pc, #432] @ (801d61c ) 801d46a: f002 fc7b bl 801fd64 UART3_printf("\r\nMR\tMaxS:%d\t",Motor2_Ang.MR.Max.Sin); 801d46e: 4b64 ldr r3, [pc, #400] @ (801d600 ) 801d470: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64 801d474: 4619 mov r1, r3 801d476: 486a ldr r0, [pc, #424] @ (801d620 ) 801d478: f002 fc74 bl 801fd64 UART3_printf("MaxC:%d\t",Motor2_Ang.MR.Max.Cos); 801d47c: 4b60 ldr r3, [pc, #384] @ (801d600 ) 801d47e: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66 801d482: 4619 mov r1, r3 801d484: 4867 ldr r0, [pc, #412] @ (801d624 ) 801d486: f002 fc6d bl 801fd64 UART3_printf("MinS:%d\t",Motor2_Ang.MR.Min.Sin); 801d48a: 4b5d ldr r3, [pc, #372] @ (801d600 ) 801d48c: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60 801d490: 4619 mov r1, r3 801d492: 4865 ldr r0, [pc, #404] @ (801d628 ) 801d494: f002 fc66 bl 801fd64 UART3_printf("MinC:%d\t",Motor2_Ang.MR.Min.Cos); 801d498: 4b59 ldr r3, [pc, #356] @ (801d600 ) 801d49a: f8b3 3062 ldrh.w r3, [r3, #98] @ 0x62 801d49e: 4619 mov r1, r3 801d4a0: 4862 ldr r0, [pc, #392] @ (801d62c ) 801d4a2: f002 fc5f bl 801fd64 UART3_printf("MidS:%d\t",Motor2_Ang.MR.Mid.Sin); 801d4a6: 4b56 ldr r3, [pc, #344] @ (801d600 ) 801d4a8: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68 801d4ac: 4619 mov r1, r3 801d4ae: 4860 ldr r0, [pc, #384] @ (801d630 ) 801d4b0: f002 fc58 bl 801fd64 UART3_printf("MidC:%d\t",Motor2_Ang.MR.Mid.Cos); 801d4b4: 4b52 ldr r3, [pc, #328] @ (801d600 ) 801d4b6: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a 801d4ba: 4619 mov r1, r3 801d4bc: 485d ldr r0, [pc, #372] @ (801d634 ) 801d4be: f002 fc51 bl 801fd64 UART3_printf("GainS:%s\t",Float2String(Motor2_Ang.MR.Gain.Sin, 1)); 801d4c2: 4b4f ldr r3, [pc, #316] @ (801d600 ) 801d4c4: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 801d4c8: 2001 movs r0, #1 801d4ca: eeb0 0a67 vmov.f32 s0, s15 801d4ce: f002 fd6b bl 801ffa8 801d4d2: 4603 mov r3, r0 801d4d4: 4619 mov r1, r3 801d4d6: 4858 ldr r0, [pc, #352] @ (801d638 ) 801d4d8: f002 fc44 bl 801fd64 UART3_printf("GainC:%s\t",Float2String(Motor2_Ang.MR.Gain.Cos, 1)); 801d4dc: 4b48 ldr r3, [pc, #288] @ (801d600 ) 801d4de: edd3 7a1c vldr s15, [r3, #112] @ 0x70 801d4e2: 2001 movs r0, #1 801d4e4: eeb0 0a67 vmov.f32 s0, s15 801d4e8: f002 fd5e bl 801ffa8 801d4ec: 4603 mov r3, r0 801d4ee: 4619 mov r1, r3 801d4f0: 4852 ldr r0, [pc, #328] @ (801d63c ) 801d4f2: f002 fc37 bl 801fd64 Delay_sec(0.4); 801d4f6: f240 108f movw r0, #399 @ 0x18f 801d4fa: f002 fea1 bl 8020240 UART3_printf("\r\n\r\n[Inv]\tHWAdcSc:%s\t",Float2String(Inv.Para.HwAdcScale, 4)); 801d4fe: 4b50 ldr r3, [pc, #320] @ (801d640 ) 801d500: edd3 7a16 vldr s15, [r3, #88] @ 0x58 801d504: 2004 movs r0, #4 801d506: eeb0 0a67 vmov.f32 s0, s15 801d50a: f002 fd4d bl 801ffa8 801d50e: 4603 mov r3, r0 801d510: 4619 mov r1, r3 801d512: 484c ldr r0, [pc, #304] @ (801d644 ) 801d514: f002 fc26 bl 801fd64 UART3_printf("HWVdcSc:%s\t",Float2String(Inv.Para.HwVdcScale, 4)); 801d518: 4b49 ldr r3, [pc, #292] @ (801d640 ) 801d51a: edd3 7a17 vldr s15, [r3, #92] @ 0x5c 801d51e: 2004 movs r0, #4 801d520: eeb0 0a67 vmov.f32 s0, s15 801d524: f002 fd40 bl 801ffa8 801d528: 4603 mov r3, r0 801d52a: 4619 mov r1, r3 801d52c: 4846 ldr r0, [pc, #280] @ (801d648 ) 801d52e: f002 fc19 bl 801fd64 UART3_printf("HWiSc:%s\t",Float2String(Inv.Para.HwiScale, 4)); 801d532: 4b43 ldr r3, [pc, #268] @ (801d640 ) 801d534: edd3 7a18 vldr s15, [r3, #96] @ 0x60 801d538: 2004 movs r0, #4 801d53a: eeb0 0a67 vmov.f32 s0, s15 801d53e: f002 fd33 bl 801ffa8 801d542: 4603 mov r3, r0 801d544: 4619 mov r1, r3 801d546: 4841 ldr r0, [pc, #260] @ (801d64c ) 801d548: f002 fc0c bl 801fd64 UART3_printf("VdcSc:%s\t",Float2String(Inv.Para.VdcScale, 4)); 801d54c: 4b3c ldr r3, [pc, #240] @ (801d640 ) 801d54e: edd3 7a19 vldr s15, [r3, #100] @ 0x64 801d552: 2004 movs r0, #4 801d554: eeb0 0a67 vmov.f32 s0, s15 801d558: f002 fd26 bl 801ffa8 801d55c: 4603 mov r3, r0 801d55e: 4619 mov r1, r3 801d560: 483b ldr r0, [pc, #236] @ (801d650 ) 801d562: f002 fbff bl 801fd64 UART3_printf("iSc:%s\t",Float2String(Inv.Para.iScale, 4)); 801d566: 4b36 ldr r3, [pc, #216] @ (801d640 ) 801d568: edd3 7a1a vldr s15, [r3, #104] @ 0x68 801d56c: 2004 movs r0, #4 801d56e: eeb0 0a67 vmov.f32 s0, s15 801d572: f002 fd19 bl 801ffa8 801d576: 4603 mov r3, r0 801d578: 4619 mov r1, r3 801d57a: 4836 ldr r0, [pc, #216] @ (801d654 ) 801d57c: f002 fbf2 bl 801fd64 UART3_printf("\r\n\tTsmp:%s\t",Float2String(Inv.Para.Tsamp, 4)); 801d580: 4b2f ldr r3, [pc, #188] @ (801d640 ) 801d582: edd3 7a1c vldr s15, [r3, #112] @ 0x70 801d586: 2004 movs r0, #4 801d588: eeb0 0a67 vmov.f32 s0, s15 801d58c: f002 fd0c bl 801ffa8 801d590: 4603 mov r3, r0 801d592: 4619 mov r1, r3 801d594: 4830 ldr r0, [pc, #192] @ (801d658 ) 801d596: f002 fbe5 bl 801fd64 UART3_printf("VdcMg:%s\t",Float2String(Inv.Para.VdcMargin, 4)); 801d59a: 4b29 ldr r3, [pc, #164] @ (801d640 ) 801d59c: edd3 7a1b vldr s15, [r3, #108] @ 0x6c 801d5a0: 2004 movs r0, #4 801d5a2: eeb0 0a67 vmov.f32 s0, s15 801d5a6: f002 fcff bl 801ffa8 801d5aa: 4603 mov r3, r0 801d5ac: 4619 mov r1, r3 801d5ae: 482b ldr r0, [pc, #172] @ (801d65c ) 801d5b0: f002 fbd8 bl 801fd64 UART3_printf("PWMmax:%s\t",Float2String(Inv.Para.PWM_Max, 2)); 801d5b4: 4b22 ldr r3, [pc, #136] @ (801d640 ) 801d5b6: edd3 7a1e vldr s15, [r3, #120] @ 0x78 801d5ba: 2002 movs r0, #2 801d5bc: eeb0 0a67 vmov.f32 s0, s15 801d5c0: f002 fcf2 bl 801ffa8 801d5c4: 4603 mov r3, r0 801d5c6: 4619 mov r1, r3 801d5c8: 4825 ldr r0, [pc, #148] @ (801d660 ) 801d5ca: f002 fbcb bl 801fd64 UART3_printf("PWMmid:%s\t",Float2String(Inv.Para.PWM_Mid, 2)); 801d5ce: 4b1c ldr r3, [pc, #112] @ (801d640 ) 801d5d0: edd3 7a1d vldr s15, [r3, #116] @ 0x74 801d5d4: 2002 movs r0, #2 801d5d6: e045 b.n 801d664 801d5d8: 0802ad64 .word 0x0802ad64 801d5dc: 20000704 .word 0x20000704 801d5e0: 0802ad6c .word 0x0802ad6c 801d5e4: 0802ad74 .word 0x0802ad74 801d5e8: 0802ad80 .word 0x0802ad80 801d5ec: 0802ad98 .word 0x0802ad98 801d5f0: 0802ada0 .word 0x0802ada0 801d5f4: 0802ada8 .word 0x0802ada8 801d5f8: 0802adb8 .word 0x0802adb8 801d5fc: 0802adcc .word 0x0802adcc 801d600: 200004f8 .word 0x200004f8 801d604: 0802addc .word 0x0802addc 801d608: 0802adf4 .word 0x0802adf4 801d60c: 0802adfc .word 0x0802adfc 801d610: 0802ae08 .word 0x0802ae08 801d614: 0802ae14 .word 0x0802ae14 801d618: 0802ae20 .word 0x0802ae20 801d61c: 0802ae2c .word 0x0802ae2c 801d620: 0802ae38 .word 0x0802ae38 801d624: 0802ae48 .word 0x0802ae48 801d628: 0802ae54 .word 0x0802ae54 801d62c: 0802ae60 .word 0x0802ae60 801d630: 0802ae6c .word 0x0802ae6c 801d634: 0802ae78 .word 0x0802ae78 801d638: 0802ae84 .word 0x0802ae84 801d63c: 0802ae90 .word 0x0802ae90 801d640: 20000400 .word 0x20000400 801d644: 0802aeb4 .word 0x0802aeb4 801d648: 0802aecc .word 0x0802aecc 801d64c: 0802aed8 .word 0x0802aed8 801d650: 0802aee4 .word 0x0802aee4 801d654: 0802aef0 .word 0x0802aef0 801d658: 0802aef8 .word 0x0802aef8 801d65c: 0802af04 .word 0x0802af04 801d660: 0802af10 .word 0x0802af10 801d664: eeb0 0a67 vmov.f32 s0, s15 801d668: f002 fc9e bl 801ffa8 801d66c: 4603 mov r3, r0 801d66e: 4619 mov r1, r3 801d670: 48d8 ldr r0, [pc, #864] @ (801d9d4 ) 801d672: f002 fb77 bl 801fd64 UART3_printf("VLiFw:%s\t",Float2String(Inv.Ctrl.VdcLimFweak, 1)); 801d676: 4bd8 ldr r3, [pc, #864] @ (801d9d8 ) 801d678: edd3 7a07 vldr s15, [r3, #28] 801d67c: 2001 movs r0, #1 801d67e: eeb0 0a67 vmov.f32 s0, s15 801d682: f002 fc91 bl 801ffa8 801d686: 4603 mov r3, r0 801d688: 4619 mov r1, r3 801d68a: 48d4 ldr r0, [pc, #848] @ (801d9dc ) 801d68c: f002 fb6a bl 801fd64 UART3_printf("ILiFw:%s\t",Float2String(Inv.Ctrl.IlimFweak, 1)); 801d690: 4bd1 ldr r3, [pc, #836] @ (801d9d8 ) 801d692: edd3 7a09 vldr s15, [r3, #36] @ 0x24 801d696: 2001 movs r0, #1 801d698: eeb0 0a67 vmov.f32 s0, s15 801d69c: f002 fc84 bl 801ffa8 801d6a0: 4603 mov r3, r0 801d6a2: 4619 mov r1, r3 801d6a4: 48ce ldr r0, [pc, #824] @ (801d9e0 ) 801d6a6: f002 fb5d bl 801fd64 UART3_printf("\r\n\r\n[LPF]\t(Vdc)fc:%s\t",Float2String(LpfVdc.fc, 1)); 801d6aa: 4bce ldr r3, [pc, #824] @ (801d9e4 ) 801d6ac: edd3 7a00 vldr s15, [r3] 801d6b0: 2001 movs r0, #1 801d6b2: eeb0 0a67 vmov.f32 s0, s15 801d6b6: f002 fc77 bl 801ffa8 801d6ba: 4603 mov r3, r0 801d6bc: 4619 mov r1, r3 801d6be: 48ca ldr r0, [pc, #808] @ (801d9e8 ) 801d6c0: f002 fb50 bl 801fd64 UART3_printf("fs:%s\t",Float2String(LpfVdc.fs, 1)); 801d6c4: 4bc7 ldr r3, [pc, #796] @ (801d9e4 ) 801d6c6: edd3 7a01 vldr s15, [r3, #4] 801d6ca: 2001 movs r0, #1 801d6cc: eeb0 0a67 vmov.f32 s0, s15 801d6d0: f002 fc6a bl 801ffa8 801d6d4: 4603 mov r3, r0 801d6d6: 4619 mov r1, r3 801d6d8: 48c4 ldr r0, [pc, #784] @ (801d9ec ) 801d6da: f002 fb43 bl 801fd64 UART3_printf("(Cur)fc:%s\t",Float2String(LpfCur.fc, 1)); 801d6de: 4bc4 ldr r3, [pc, #784] @ (801d9f0 ) 801d6e0: edd3 7a00 vldr s15, [r3] 801d6e4: 2001 movs r0, #1 801d6e6: eeb0 0a67 vmov.f32 s0, s15 801d6ea: f002 fc5d bl 801ffa8 801d6ee: 4603 mov r3, r0 801d6f0: 4619 mov r1, r3 801d6f2: 48c0 ldr r0, [pc, #768] @ (801d9f4 ) 801d6f4: f002 fb36 bl 801fd64 UART3_printf("fs:%s\t",Float2String(LpfCur.fs, 1)); 801d6f8: 4bbd ldr r3, [pc, #756] @ (801d9f0 ) 801d6fa: edd3 7a01 vldr s15, [r3, #4] 801d6fe: 2001 movs r0, #1 801d700: eeb0 0a67 vmov.f32 s0, s15 801d704: f002 fc50 bl 801ffa8 801d708: 4603 mov r3, r0 801d70a: 4619 mov r1, r3 801d70c: 48b7 ldr r0, [pc, #732] @ (801d9ec ) 801d70e: f002 fb29 bl 801fd64 UART3_printf("(Spd)fc:%s\t",Float2String(LpfSpd.fc, 1)); 801d712: 4bb9 ldr r3, [pc, #740] @ (801d9f8 ) 801d714: edd3 7a00 vldr s15, [r3] 801d718: 2001 movs r0, #1 801d71a: eeb0 0a67 vmov.f32 s0, s15 801d71e: f002 fc43 bl 801ffa8 801d722: 4603 mov r3, r0 801d724: 4619 mov r1, r3 801d726: 48b5 ldr r0, [pc, #724] @ (801d9fc ) 801d728: f002 fb1c bl 801fd64 UART3_printf("fs:%s\t",Float2String(LpfSpd.fs, 1)); 801d72c: 4bb2 ldr r3, [pc, #712] @ (801d9f8 ) 801d72e: edd3 7a01 vldr s15, [r3, #4] 801d732: 2001 movs r0, #1 801d734: eeb0 0a67 vmov.f32 s0, s15 801d738: f002 fc36 bl 801ffa8 801d73c: 4603 mov r3, r0 801d73e: 4619 mov r1, r3 801d740: 48aa ldr r0, [pc, #680] @ (801d9ec ) 801d742: f002 fb0f bl 801fd64 UART3_printf("\r\n\r\n[Err]\t(Is)Open:%s\t",Float2String(WP_ErrRef.IsensorOpen, 1)); 801d746: 4bae ldr r3, [pc, #696] @ (801da00 ) 801d748: edd3 7a05 vldr s15, [r3, #20] 801d74c: 2001 movs r0, #1 801d74e: eeb0 0a67 vmov.f32 s0, s15 801d752: f002 fc29 bl 801ffa8 801d756: 4603 mov r3, r0 801d758: 4619 mov r1, r3 801d75a: 48aa ldr r0, [pc, #680] @ (801da04 ) 801d75c: f002 fb02 bl 801fd64 UART3_printf("Short:%s\t",Float2String(WP_ErrRef.IsensorShort, 1)); 801d760: 4ba7 ldr r3, [pc, #668] @ (801da00 ) 801d762: edd3 7a04 vldr s15, [r3, #16] 801d766: 2001 movs r0, #1 801d768: eeb0 0a67 vmov.f32 s0, s15 801d76c: f002 fc1c bl 801ffa8 801d770: 4603 mov r3, r0 801d772: 4619 mov r1, r3 801d774: 48a4 ldr r0, [pc, #656] @ (801da08 ) 801d776: f002 faf5 bl 801fd64 UART3_printf("OFFmax:%s\t",Float2String(WP_ErrRef.IsensorOffsetMax, 1)); 801d77a: 4ba1 ldr r3, [pc, #644] @ (801da00 ) 801d77c: edd3 7a06 vldr s15, [r3, #24] 801d780: 2001 movs r0, #1 801d782: eeb0 0a67 vmov.f32 s0, s15 801d786: f002 fc0f bl 801ffa8 801d78a: 4603 mov r3, r0 801d78c: 4619 mov r1, r3 801d78e: 489f ldr r0, [pc, #636] @ (801da0c ) 801d790: f002 fae8 bl 801fd64 UART3_printf("OFFmin:%s\t",Float2String(WP_ErrRef.IsensorOffsetMin, 1)); 801d794: 4b9a ldr r3, [pc, #616] @ (801da00 ) 801d796: edd3 7a07 vldr s15, [r3, #28] 801d79a: 2001 movs r0, #1 801d79c: eeb0 0a67 vmov.f32 s0, s15 801d7a0: f002 fc02 bl 801ffa8 801d7a4: 4603 mov r3, r0 801d7a6: 4619 mov r1, r3 801d7a8: 4899 ldr r0, [pc, #612] @ (801da10 ) 801d7aa: f002 fadb bl 801fd64 UART3_printf("\r\n\tOverCur:%s\t",Float2String(WP_ErrRef.OverCurrent, 1)); 801d7ae: 4b94 ldr r3, [pc, #592] @ (801da00 ) 801d7b0: edd3 7a02 vldr s15, [r3, #8] 801d7b4: 2001 movs r0, #1 801d7b6: eeb0 0a67 vmov.f32 s0, s15 801d7ba: f002 fbf5 bl 801ffa8 801d7be: 4603 mov r3, r0 801d7c0: 4619 mov r1, r3 801d7c2: 4894 ldr r0, [pc, #592] @ (801da14 ) 801d7c4: f002 face bl 801fd64 UART3_printf("OverSpd:%s\t",Float2String(WP_ErrRef.OverSpeed, 1)); 801d7c8: 4b8d ldr r3, [pc, #564] @ (801da00 ) 801d7ca: edd3 7a03 vldr s15, [r3, #12] 801d7ce: 2001 movs r0, #1 801d7d0: eeb0 0a67 vmov.f32 s0, s15 801d7d4: f002 fbe8 bl 801ffa8 801d7d8: 4603 mov r3, r0 801d7da: 4619 mov r1, r3 801d7dc: 488e ldr r0, [pc, #568] @ (801da18 ) 801d7de: f002 fac1 bl 801fd64 UART3_printf("OverV:%s\t",Float2String(WP_ErrRef.OverVoltage, 1)); 801d7e2: 4b87 ldr r3, [pc, #540] @ (801da00 ) 801d7e4: edd3 7a00 vldr s15, [r3] 801d7e8: 2001 movs r0, #1 801d7ea: eeb0 0a67 vmov.f32 s0, s15 801d7ee: f002 fbdb bl 801ffa8 801d7f2: 4603 mov r3, r0 801d7f4: 4619 mov r1, r3 801d7f6: 4889 ldr r0, [pc, #548] @ (801da1c ) 801d7f8: f002 fab4 bl 801fd64 UART3_printf("UnderV:%s\t",Float2String(WP_ErrRef.UnderVoltage, 1)); 801d7fc: 4b80 ldr r3, [pc, #512] @ (801da00 ) 801d7fe: edd3 7a01 vldr s15, [r3, #4] 801d802: 2001 movs r0, #1 801d804: eeb0 0a67 vmov.f32 s0, s15 801d808: f002 fbce bl 801ffa8 801d80c: 4603 mov r3, r0 801d80e: 4619 mov r1, r3 801d810: 4883 ldr r0, [pc, #524] @ (801da20 ) 801d812: f002 faa7 bl 801fd64 UART3_printf("\r\n\r\n[Spec]\tGear:%s\t",Float2String(WP_Machine.SensorGearRatio, 1)); 801d816: 4b83 ldr r3, [pc, #524] @ (801da24 ) 801d818: edd3 7a00 vldr s15, [r3] 801d81c: 2001 movs r0, #1 801d81e: eeb0 0a67 vmov.f32 s0, s15 801d822: f002 fbc1 bl 801ffa8 801d826: 4603 mov r3, r0 801d828: 4619 mov r1, r3 801d82a: 487f ldr r0, [pc, #508] @ (801da28 ) 801d82c: f002 fa9a bl 801fd64 UART3_printf("GearInv:%s\t",Float2String(WP_Machine.SensorGearRatioInv, 1)); 801d830: 4b7c ldr r3, [pc, #496] @ (801da24 ) 801d832: edd3 7a01 vldr s15, [r3, #4] 801d836: 2001 movs r0, #1 801d838: eeb0 0a67 vmov.f32 s0, s15 801d83c: f002 fbb4 bl 801ffa8 801d840: 4603 mov r3, r0 801d842: 4619 mov r1, r3 801d844: 4879 ldr r0, [pc, #484] @ (801da2c ) 801d846: f002 fa8d bl 801fd64 UART3_printf("SpoolD:%s\t",Float2String(WP_Machine.SpoolDiameter, 1)); 801d84a: 4b76 ldr r3, [pc, #472] @ (801da24 ) 801d84c: edd3 7a02 vldr s15, [r3, #8] 801d850: 2001 movs r0, #1 801d852: eeb0 0a67 vmov.f32 s0, s15 801d856: f002 fba7 bl 801ffa8 801d85a: 4603 mov r3, r0 801d85c: 4619 mov r1, r3 801d85e: 4874 ldr r0, [pc, #464] @ (801da30 ) 801d860: f002 fa80 bl 801fd64 UART3_printf("MaxWeight:%s\t",Float2String(WP_Machine.MaxWeight, 1)); 801d864: 4b6f ldr r3, [pc, #444] @ (801da24 ) 801d866: edd3 7a04 vldr s15, [r3, #16] 801d86a: 2001 movs r0, #1 801d86c: eeb0 0a67 vmov.f32 s0, s15 801d870: f002 fb9a bl 801ffa8 801d874: 4603 mov r3, r0 801d876: 4619 mov r1, r3 801d878: 486e ldr r0, [pc, #440] @ (801da34 ) 801d87a: f002 fa73 bl 801fd64 UART3_printf("CableMax:%s\t",Float2String(WP_Machine.CableMaxLength, 1)); 801d87e: 4b69 ldr r3, [pc, #420] @ (801da24 ) 801d880: 899b ldrh r3, [r3, #12] 801d882: ee07 3a90 vmov s15, r3 801d886: eef8 7a67 vcvt.f32.u32 s15, s15 801d88a: 2001 movs r0, #1 801d88c: eeb0 0a67 vmov.f32 s0, s15 801d890: f002 fb8a bl 801ffa8 801d894: 4603 mov r3, r0 801d896: 4619 mov r1, r3 801d898: 4867 ldr r0, [pc, #412] @ (801da38 ) 801d89a: f002 fa63 bl 801fd64 UART3_printf("ScW2Cur:%s\t",Float2String(WP_Machine.Scale_Weight2Current, 1)); 801d89e: 4b61 ldr r3, [pc, #388] @ (801da24 ) 801d8a0: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801d8a4: 2001 movs r0, #1 801d8a6: eeb0 0a67 vmov.f32 s0, s15 801d8aa: f002 fb7d bl 801ffa8 801d8ae: 4603 mov r3, r0 801d8b0: 4619 mov r1, r3 801d8b2: 4862 ldr r0, [pc, #392] @ (801da3c ) 801d8b4: f002 fa56 bl 801fd64 UART3_printf("\r\n\tSoftWind:%s\t",Float2String(WP_Machine.SoftWindingHeight, 1)); 801d8b8: 4b5a ldr r3, [pc, #360] @ (801da24 ) 801d8ba: edd3 7a06 vldr s15, [r3, #24] 801d8be: 2001 movs r0, #1 801d8c0: eeb0 0a67 vmov.f32 s0, s15 801d8c4: f002 fb70 bl 801ffa8 801d8c8: 4603 mov r3, r0 801d8ca: 4619 mov r1, r3 801d8cc: 485c ldr r0, [pc, #368] @ (801da40 ) 801d8ce: f002 fa49 bl 801fd64 UART3_printf("Def.W%s\t",Float2String(WP_Machine.DefaultWeight, 1)); 801d8d2: 4b54 ldr r3, [pc, #336] @ (801da24 ) 801d8d4: edd3 7a07 vldr s15, [r3, #28] 801d8d8: 2001 movs r0, #1 801d8da: eeb0 0a67 vmov.f32 s0, s15 801d8de: f002 fb63 bl 801ffa8 801d8e2: 4603 mov r3, r0 801d8e4: 4619 mov r1, r3 801d8e6: 4857 ldr r0, [pc, #348] @ (801da44 ) 801d8e8: f002 fa3c bl 801fd64 UART3_printf("Fric.W:%s\t",Float2String(WP_Machine.FrictionWeight, 1)); 801d8ec: 4b4d ldr r3, [pc, #308] @ (801da24 ) 801d8ee: edd3 7a08 vldr s15, [r3, #32] 801d8f2: 2001 movs r0, #1 801d8f4: eeb0 0a67 vmov.f32 s0, s15 801d8f8: f002 fb56 bl 801ffa8 801d8fc: 4603 mov r3, r0 801d8fe: 4619 mov r1, r3 801d900: 4851 ldr r0, [pc, #324] @ (801da48 ) 801d902: f002 fa2f bl 801fd64 UART3_printf("Fric.Spd+:%s\t",Float2String(WP_Machine.FrictionSpeedPlus, 1)); 801d906: 4b47 ldr r3, [pc, #284] @ (801da24 ) 801d908: edd3 7a0a vldr s15, [r3, #40] @ 0x28 801d90c: 2001 movs r0, #1 801d90e: eeb0 0a67 vmov.f32 s0, s15 801d912: f002 fb49 bl 801ffa8 801d916: 4603 mov r3, r0 801d918: 4619 mov r1, r3 801d91a: 484c ldr r0, [pc, #304] @ (801da4c ) 801d91c: f002 fa22 bl 801fd64 UART3_printf("Fric.Spd-:%s\t",Float2String(WP_Machine.FrictionSpeedMinus, 1)); 801d920: 4b40 ldr r3, [pc, #256] @ (801da24 ) 801d922: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 801d926: 2001 movs r0, #1 801d928: eeb0 0a67 vmov.f32 s0, s15 801d92c: f002 fb3c bl 801ffa8 801d930: 4603 mov r3, r0 801d932: 4619 mov r1, r3 801d934: 4846 ldr r0, [pc, #280] @ (801da50 ) 801d936: f002 fa15 bl 801fd64 UART3_printf("\r\n\r\n"); 801d93a: 4846 ldr r0, [pc, #280] @ (801da54 ) 801d93c: f002 fa12 bl 801fd64 UART3_printf("[ISR Profile] (180MHz, cycles/180=us)\r\n"); 801d940: 4845 ldr r0, [pc, #276] @ (801da58 ) 801d942: f002 fa0f bl 801fd64 UART3_printf(" Last: %lu cycles (%s us)\r\n", ISR_Profile.last, Float2String((float)ISR_Profile.last/180.0f, 1)); 801d946: 4b45 ldr r3, [pc, #276] @ (801da5c ) 801d948: 681c ldr r4, [r3, #0] 801d94a: 4b44 ldr r3, [pc, #272] @ (801da5c ) 801d94c: 681b ldr r3, [r3, #0] 801d94e: ee07 3a90 vmov s15, r3 801d952: eef8 7a67 vcvt.f32.u32 s15, s15 801d956: eddf 6a42 vldr s13, [pc, #264] @ 801da60 801d95a: ee87 7aa6 vdiv.f32 s14, s15, s13 801d95e: 2001 movs r0, #1 801d960: eeb0 0a47 vmov.f32 s0, s14 801d964: f002 fb20 bl 801ffa8 801d968: 4603 mov r3, r0 801d96a: 461a mov r2, r3 801d96c: 4621 mov r1, r4 801d96e: 483d ldr r0, [pc, #244] @ (801da64 ) 801d970: f002 f9f8 bl 801fd64 UART3_printf(" Max: %lu cycles (%s us)\r\n", ISR_Profile.max, Float2String((float)ISR_Profile.max/180.0f, 1)); 801d974: 4b39 ldr r3, [pc, #228] @ (801da5c ) 801d976: 685c ldr r4, [r3, #4] 801d978: 4b38 ldr r3, [pc, #224] @ (801da5c ) 801d97a: 685b ldr r3, [r3, #4] 801d97c: ee07 3a90 vmov s15, r3 801d980: eef8 7a67 vcvt.f32.u32 s15, s15 801d984: eddf 6a36 vldr s13, [pc, #216] @ 801da60 801d988: ee87 7aa6 vdiv.f32 s14, s15, s13 801d98c: 2001 movs r0, #1 801d98e: eeb0 0a47 vmov.f32 s0, s14 801d992: f002 fb09 bl 801ffa8 801d996: 4603 mov r3, r0 801d998: 461a mov r2, r3 801d99a: 4621 mov r1, r4 801d99c: 4832 ldr r0, [pc, #200] @ (801da68 ) 801d99e: f002 f9e1 bl 801fd64 UART3_printf(" Avg: %lu cycles (%s us)\r\n", ISR_Profile.avg, Float2String((float)ISR_Profile.avg/180.0f, 1)); 801d9a2: 4b2e ldr r3, [pc, #184] @ (801da5c ) 801d9a4: 689c ldr r4, [r3, #8] 801d9a6: 4b2d ldr r3, [pc, #180] @ (801da5c ) 801d9a8: 689b ldr r3, [r3, #8] 801d9aa: ee07 3a90 vmov s15, r3 801d9ae: eef8 7a67 vcvt.f32.u32 s15, s15 801d9b2: eddf 6a2b vldr s13, [pc, #172] @ 801da60 801d9b6: ee87 7aa6 vdiv.f32 s14, s15, s13 801d9ba: 2001 movs r0, #1 801d9bc: eeb0 0a47 vmov.f32 s0, s14 801d9c0: f002 faf2 bl 801ffa8 801d9c4: 4603 mov r3, r0 801d9c6: 461a mov r2, r3 801d9c8: 4621 mov r1, r4 801d9ca: 4828 ldr r0, [pc, #160] @ (801da6c ) 801d9cc: f002 f9ca bl 801fd64 801d9d0: e04e b.n 801da70 801d9d2: bf00 nop 801d9d4: 0802af1c .word 0x0802af1c 801d9d8: 20000400 .word 0x20000400 801d9dc: 0802af28 .word 0x0802af28 801d9e0: 0802af34 .word 0x0802af34 801d9e4: 200008ec .word 0x200008ec 801d9e8: 0802af40 .word 0x0802af40 801d9ec: 0802af58 .word 0x0802af58 801d9f0: 200008e0 .word 0x200008e0 801d9f4: 0802af60 .word 0x0802af60 801d9f8: 200008f8 .word 0x200008f8 801d9fc: 0802af6c .word 0x0802af6c 801da00: 200003e0 .word 0x200003e0 801da04: 0802af78 .word 0x0802af78 801da08: 0802af90 .word 0x0802af90 801da0c: 0802af9c .word 0x0802af9c 801da10: 0802afa8 .word 0x0802afa8 801da14: 0802afb4 .word 0x0802afb4 801da18: 0802afc4 .word 0x0802afc4 801da1c: 0802afd0 .word 0x0802afd0 801da20: 0802afdc .word 0x0802afdc 801da24: 20000110 .word 0x20000110 801da28: 0802afe8 .word 0x0802afe8 801da2c: 0802affc .word 0x0802affc 801da30: 0802b008 .word 0x0802b008 801da34: 0802b014 .word 0x0802b014 801da38: 0802b024 .word 0x0802b024 801da3c: 0802b034 .word 0x0802b034 801da40: 0802b040 .word 0x0802b040 801da44: 0802b050 .word 0x0802b050 801da48: 0802b05c .word 0x0802b05c 801da4c: 0802b068 .word 0x0802b068 801da50: 0802b078 .word 0x0802b078 801da54: 0802b088 .word 0x0802b088 801da58: 0802b090 .word 0x0802b090 801da5c: 20000330 .word 0x20000330 801da60: 43340000 .word 0x43340000 801da64: 0802b0b8 .word 0x0802b0b8 801da68: 0802b0d8 .word 0x0802b0d8 801da6c: 0802b0f8 .word 0x0802b0f8 UART3_printf(" Count: %lu\r\n", ISR_Profile.count); 801da70: 4b21 ldr r3, [pc, #132] @ (801daf8 ) 801da72: 68db ldr r3, [r3, #12] 801da74: 4619 mov r1, r3 801da76: 4821 ldr r0, [pc, #132] @ (801dafc ) 801da78: f002 f974 bl 801fd64 UART3_printf(" Budget: 200us (5kHz), Usage: %s%%\r\n", Float2String((float)ISR_Profile.max/36000.0f*100.0f, 1)); 801da7c: 4b1e ldr r3, [pc, #120] @ (801daf8 ) 801da7e: 685b ldr r3, [r3, #4] 801da80: ee07 3a90 vmov s15, r3 801da84: eeb8 7a67 vcvt.f32.u32 s14, s15 801da88: eddf 6a1d vldr s13, [pc, #116] @ 801db00 801da8c: eec7 7a26 vdiv.f32 s15, s14, s13 801da90: ed9f 7a1c vldr s14, [pc, #112] @ 801db04 801da94: ee67 7a87 vmul.f32 s15, s15, s14 801da98: 2001 movs r0, #1 801da9a: eeb0 0a67 vmov.f32 s0, s15 801da9e: f002 fa83 bl 801ffa8 801daa2: 4603 mov r3, r0 801daa4: 4619 mov r1, r3 801daa6: 4818 ldr r0, [pc, #96] @ (801db08 ) 801daa8: f002 f95c bl 801fd64 break; 801daac: e010 b.n 801dad0 break; 801daae: bf00 nop 801dab0: e00e b.n 801dad0 break; 801dab2: bf00 nop 801dab4: e00c b.n 801dad0 break; 801dab6: bf00 nop 801dab8: e00a b.n 801dad0 break; 801daba: bf00 nop 801dabc: e008 b.n 801dad0 break; 801dabe: bf00 nop 801dac0: e006 b.n 801dad0 if((paddress+data_size)>(sizeof(Data_Form_RAM)-4)) break; 801dac2: bf00 nop 801dac4: e004 b.n 801dad0 break; 801dac6: bf00 nop 801dac8: e002 b.n 801dad0 if((paddress+data_size)>(sizeof(Data_Form_RAM)-4)) break; 801daca: bf00 nop 801dacc: e000 b.n 801dad0 break; 801dace: bf00 nop } UART3_Clear_Buffer(psize); 801dad0: 4b0e ldr r3, [pc, #56] @ (801db0c ) 801dad2: 781b ldrb r3, [r3, #0] 801dad4: 4619 mov r1, r3 801dad6: 480e ldr r0, [pc, #56] @ (801db10 ) 801dad8: f002 f9f8 bl 801fecc old_available=UART3_Available(); ///somebp 2024.02.19 801dadc: 480c ldr r0, [pc, #48] @ (801db10 ) 801dade: f002 f90d bl 801fcfc 801dae2: 4603 mov r3, r0 801dae4: 461a mov r2, r3 801dae6: 4b0b ldr r3, [pc, #44] @ (801db14 ) 801dae8: 801a strh r2, [r3, #0] psize = 0; 801daea: 4b08 ldr r3, [pc, #32] @ (801db0c ) 801daec: 2200 movs r2, #0 801daee: 701a strb r2, [r3, #0] } } } 801daf0: 37cc adds r7, #204 @ 0xcc 801daf2: 46bd mov sp, r7 801daf4: bdf0 pop {r4, r5, r6, r7, pc} 801daf6: bf00 nop 801daf8: 20000330 .word 0x20000330 801dafc: 0802b118 .word 0x0802b118 801db00: 470ca000 .word 0x470ca000 801db04: 42c80000 .word 0x42c80000 801db08: 0802b128 .word 0x0802b128 801db0c: 20000c3c .word 0x20000c3c 801db10: 200053ec .word 0x200053ec 801db14: 20000c36 .word 0x20000c36 0801db18 <_delay>: /** * @brief Inaccurate Time Delay but NOT use Systick Timer (can be used in Interrupt Service Routine) * @param Count 32bit Count */ void _delay(uint32_t Count) { 801db18: b480 push {r7} 801db1a: b085 sub sp, #20 801db1c: af00 add r7, sp, #0 801db1e: 6078 str r0, [r7, #4] for(volatile uint32_t i=0; i 801db26: 68fb ldr r3, [r7, #12] 801db28: 3301 adds r3, #1 801db2a: 60fb str r3, [r7, #12] 801db2c: 68fb ldr r3, [r7, #12] 801db2e: 687a ldr r2, [r7, #4] 801db30: 429a cmp r2, r3 801db32: d8f8 bhi.n 801db26 <_delay+0xe> } 801db34: bf00 nop 801db36: bf00 nop 801db38: 3714 adds r7, #20 801db3a: 46bd mov sp, r7 801db3c: f85d 7b04 ldr.w r7, [sp], #4 801db40: 4770 bx lr ... 0801db44 : void (*User_Task_Every_60s)()=(void *)0; void (*User_Task_Every_User)()=(void *)0; uint16_t User_Time = 0; void HAL_SYSTICK_Callback(void) { 801db44: b580 push {r7, lr} 801db46: af00 add r7, sp, #0 if((void *)User_Task_Every_1ms!=(void *)0) (*User_Task_Every_1ms)(); 801db48: 4b80 ldr r3, [pc, #512] @ (801dd4c ) 801db4a: 681b ldr r3, [r3, #0] 801db4c: 2b00 cmp r3, #0 801db4e: d002 beq.n 801db56 801db50: 4b7e ldr r3, [pc, #504] @ (801dd4c ) 801db52: 681b ldr r3, [r3, #0] 801db54: 4798 blx r3 if((void *)User_Task_Every_5ms!=(void *)0 && (Get_Time()% 5)==0) (*User_Task_Every_5ms)(); 801db56: 4b7e ldr r3, [pc, #504] @ (801dd50 ) 801db58: 681b ldr r3, [r3, #0] 801db5a: 2b00 cmp r3, #0 801db5c: d00f beq.n 801db7e 801db5e: f002 fb63 bl 8020228 801db62: 4601 mov r1, r0 801db64: 4b7b ldr r3, [pc, #492] @ (801dd54 ) 801db66: fba3 2301 umull r2, r3, r3, r1 801db6a: 089a lsrs r2, r3, #2 801db6c: 4613 mov r3, r2 801db6e: 009b lsls r3, r3, #2 801db70: 4413 add r3, r2 801db72: 1aca subs r2, r1, r3 801db74: 2a00 cmp r2, #0 801db76: d102 bne.n 801db7e 801db78: 4b75 ldr r3, [pc, #468] @ (801dd50 ) 801db7a: 681b ldr r3, [r3, #0] 801db7c: 4798 blx r3 if((void *)User_Task_Every_10ms!=(void *)0 && (Get_Time()% 10)==1) (*User_Task_Every_10ms)(); 801db7e: 4b76 ldr r3, [pc, #472] @ (801dd58 ) 801db80: 681b ldr r3, [r3, #0] 801db82: 2b00 cmp r3, #0 801db84: d010 beq.n 801dba8 801db86: f002 fb4f bl 8020228 801db8a: 4601 mov r1, r0 801db8c: 4b71 ldr r3, [pc, #452] @ (801dd54 ) 801db8e: fba3 2301 umull r2, r3, r3, r1 801db92: 08da lsrs r2, r3, #3 801db94: 4613 mov r3, r2 801db96: 009b lsls r3, r3, #2 801db98: 4413 add r3, r2 801db9a: 005b lsls r3, r3, #1 801db9c: 1aca subs r2, r1, r3 801db9e: 2a01 cmp r2, #1 801dba0: d102 bne.n 801dba8 801dba2: 4b6d ldr r3, [pc, #436] @ (801dd58 ) 801dba4: 681b ldr r3, [r3, #0] 801dba6: 4798 blx r3 if((void *)User_Task_Every_10ms_1!=(void *)0 && (Get_Time()% 10)==2) (*User_Task_Every_10ms_1)(); 801dba8: 4b6c ldr r3, [pc, #432] @ (801dd5c ) 801dbaa: 681b ldr r3, [r3, #0] 801dbac: 2b00 cmp r3, #0 801dbae: d010 beq.n 801dbd2 801dbb0: f002 fb3a bl 8020228 801dbb4: 4601 mov r1, r0 801dbb6: 4b67 ldr r3, [pc, #412] @ (801dd54 ) 801dbb8: fba3 2301 umull r2, r3, r3, r1 801dbbc: 08da lsrs r2, r3, #3 801dbbe: 4613 mov r3, r2 801dbc0: 009b lsls r3, r3, #2 801dbc2: 4413 add r3, r2 801dbc4: 005b lsls r3, r3, #1 801dbc6: 1aca subs r2, r1, r3 801dbc8: 2a02 cmp r2, #2 801dbca: d102 bne.n 801dbd2 801dbcc: 4b63 ldr r3, [pc, #396] @ (801dd5c ) 801dbce: 681b ldr r3, [r3, #0] 801dbd0: 4798 blx r3 if((void *)User_Task_Every_50ms!=(void *)0 && (Get_Time()% 50)==3) (*User_Task_Every_50ms)(); 801dbd2: 4b63 ldr r3, [pc, #396] @ (801dd60 ) 801dbd4: 681b ldr r3, [r3, #0] 801dbd6: 2b00 cmp r3, #0 801dbd8: d00f beq.n 801dbfa 801dbda: f002 fb25 bl 8020228 801dbde: 4602 mov r2, r0 801dbe0: 4b60 ldr r3, [pc, #384] @ (801dd64 ) 801dbe2: fba3 1302 umull r1, r3, r3, r2 801dbe6: 091b lsrs r3, r3, #4 801dbe8: 2132 movs r1, #50 @ 0x32 801dbea: fb01 f303 mul.w r3, r1, r3 801dbee: 1ad3 subs r3, r2, r3 801dbf0: 2b03 cmp r3, #3 801dbf2: d102 bne.n 801dbfa 801dbf4: 4b5a ldr r3, [pc, #360] @ (801dd60 ) 801dbf6: 681b ldr r3, [r3, #0] 801dbf8: 4798 blx r3 if((void *)User_Task_Every_50ms_1!=(void *)0 && (Get_Time()% 50)==13) (*User_Task_Every_50ms_1)(); 801dbfa: 4b5b ldr r3, [pc, #364] @ (801dd68 ) 801dbfc: 681b ldr r3, [r3, #0] 801dbfe: 2b00 cmp r3, #0 801dc00: d00f beq.n 801dc22 801dc02: f002 fb11 bl 8020228 801dc06: 4602 mov r2, r0 801dc08: 4b56 ldr r3, [pc, #344] @ (801dd64 ) 801dc0a: fba3 1302 umull r1, r3, r3, r2 801dc0e: 091b lsrs r3, r3, #4 801dc10: 2132 movs r1, #50 @ 0x32 801dc12: fb01 f303 mul.w r3, r1, r3 801dc16: 1ad3 subs r3, r2, r3 801dc18: 2b0d cmp r3, #13 801dc1a: d102 bne.n 801dc22 801dc1c: 4b52 ldr r3, [pc, #328] @ (801dd68 ) 801dc1e: 681b ldr r3, [r3, #0] 801dc20: 4798 blx r3 if((void *)User_Task_Every_100ms!=(void *)0 && (Get_Time()% 100)==4) (*User_Task_Every_100ms)(); 801dc22: 4b52 ldr r3, [pc, #328] @ (801dd6c ) 801dc24: 681b ldr r3, [r3, #0] 801dc26: 2b00 cmp r3, #0 801dc28: d00f beq.n 801dc4a 801dc2a: f002 fafd bl 8020228 801dc2e: 4602 mov r2, r0 801dc30: 4b4c ldr r3, [pc, #304] @ (801dd64 ) 801dc32: fba3 1302 umull r1, r3, r3, r2 801dc36: 095b lsrs r3, r3, #5 801dc38: 2164 movs r1, #100 @ 0x64 801dc3a: fb01 f303 mul.w r3, r1, r3 801dc3e: 1ad3 subs r3, r2, r3 801dc40: 2b04 cmp r3, #4 801dc42: d102 bne.n 801dc4a 801dc44: 4b49 ldr r3, [pc, #292] @ (801dd6c ) 801dc46: 681b ldr r3, [r3, #0] 801dc48: 4798 blx r3 if((void *)User_Task_Every_250ms!=(void *)0 && (Get_Time()% 250)==5) (*User_Task_Every_250ms)(); 801dc4a: 4b49 ldr r3, [pc, #292] @ (801dd70 ) 801dc4c: 681b ldr r3, [r3, #0] 801dc4e: 2b00 cmp r3, #0 801dc50: d00f beq.n 801dc72 801dc52: f002 fae9 bl 8020228 801dc56: 4602 mov r2, r0 801dc58: 4b46 ldr r3, [pc, #280] @ (801dd74 ) 801dc5a: fba3 1302 umull r1, r3, r3, r2 801dc5e: 091b lsrs r3, r3, #4 801dc60: 21fa movs r1, #250 @ 0xfa 801dc62: fb01 f303 mul.w r3, r1, r3 801dc66: 1ad3 subs r3, r2, r3 801dc68: 2b05 cmp r3, #5 801dc6a: d102 bne.n 801dc72 801dc6c: 4b40 ldr r3, [pc, #256] @ (801dd70 ) 801dc6e: 681b ldr r3, [r3, #0] 801dc70: 4798 blx r3 if((void *)User_Task_Every_500ms!=(void *)0 && (Get_Time()% 500)==6) (*User_Task_Every_500ms)(); 801dc72: 4b41 ldr r3, [pc, #260] @ (801dd78 ) 801dc74: 681b ldr r3, [r3, #0] 801dc76: 2b00 cmp r3, #0 801dc78: d010 beq.n 801dc9c 801dc7a: f002 fad5 bl 8020228 801dc7e: 4602 mov r2, r0 801dc80: 4b3c ldr r3, [pc, #240] @ (801dd74 ) 801dc82: fba3 1302 umull r1, r3, r3, r2 801dc86: 095b lsrs r3, r3, #5 801dc88: f44f 71fa mov.w r1, #500 @ 0x1f4 801dc8c: fb01 f303 mul.w r3, r1, r3 801dc90: 1ad3 subs r3, r2, r3 801dc92: 2b06 cmp r3, #6 801dc94: d102 bne.n 801dc9c 801dc96: 4b38 ldr r3, [pc, #224] @ (801dd78 ) 801dc98: 681b ldr r3, [r3, #0] 801dc9a: 4798 blx r3 if((void *)User_Task_Every_1s!=(void *)0 && (Get_Time()% 1000)==7) (*User_Task_Every_1s)(); 801dc9c: 4b37 ldr r3, [pc, #220] @ (801dd7c ) 801dc9e: 681b ldr r3, [r3, #0] 801dca0: 2b00 cmp r3, #0 801dca2: d010 beq.n 801dcc6 801dca4: f002 fac0 bl 8020228 801dca8: 4602 mov r2, r0 801dcaa: 4b32 ldr r3, [pc, #200] @ (801dd74 ) 801dcac: fba3 1302 umull r1, r3, r3, r2 801dcb0: 099b lsrs r3, r3, #6 801dcb2: f44f 717a mov.w r1, #1000 @ 0x3e8 801dcb6: fb01 f303 mul.w r3, r1, r3 801dcba: 1ad3 subs r3, r2, r3 801dcbc: 2b07 cmp r3, #7 801dcbe: d102 bne.n 801dcc6 801dcc0: 4b2e ldr r3, [pc, #184] @ (801dd7c ) 801dcc2: 681b ldr r3, [r3, #0] 801dcc4: 4798 blx r3 if((void *)User_Task_Every_10s!=(void *)0 && (Get_Time()%10000)==8) (*User_Task_Every_10s)(); 801dcc6: 4b2e ldr r3, [pc, #184] @ (801dd80 ) 801dcc8: 681b ldr r3, [r3, #0] 801dcca: 2b00 cmp r3, #0 801dccc: d010 beq.n 801dcf0 801dcce: f002 faab bl 8020228 801dcd2: 4602 mov r2, r0 801dcd4: 4b2b ldr r3, [pc, #172] @ (801dd84 ) 801dcd6: fba3 1302 umull r1, r3, r3, r2 801dcda: 0b5b lsrs r3, r3, #13 801dcdc: f242 7110 movw r1, #10000 @ 0x2710 801dce0: fb01 f303 mul.w r3, r1, r3 801dce4: 1ad3 subs r3, r2, r3 801dce6: 2b08 cmp r3, #8 801dce8: d102 bne.n 801dcf0 801dcea: 4b25 ldr r3, [pc, #148] @ (801dd80 ) 801dcec: 681b ldr r3, [r3, #0] 801dcee: 4798 blx r3 if((void *)User_Task_Every_60s!=(void *)0 && (Get_Time()%60000)==9) (*User_Task_Every_60s)(); 801dcf0: 4b25 ldr r3, [pc, #148] @ (801dd88 ) 801dcf2: 681b ldr r3, [r3, #0] 801dcf4: 2b00 cmp r3, #0 801dcf6: d010 beq.n 801dd1a 801dcf8: f002 fa96 bl 8020228 801dcfc: 4602 mov r2, r0 801dcfe: 4b23 ldr r3, [pc, #140] @ (801dd8c ) 801dd00: fba3 1302 umull r1, r3, r3, r2 801dd04: 0b9b lsrs r3, r3, #14 801dd06: f64e 2160 movw r1, #60000 @ 0xea60 801dd0a: fb01 f303 mul.w r3, r1, r3 801dd0e: 1ad3 subs r3, r2, r3 801dd10: 2b09 cmp r3, #9 801dd12: d102 bne.n 801dd1a 801dd14: 4b1c ldr r3, [pc, #112] @ (801dd88 ) 801dd16: 681b ldr r3, [r3, #0] 801dd18: 4798 blx r3 if((void *)User_Task_Every_User!=(void *)0 && (Get_Time()%User_Time)==User_Time-1) (*User_Task_Every_User)(); 801dd1a: 4b1d ldr r3, [pc, #116] @ (801dd90 ) 801dd1c: 681b ldr r3, [r3, #0] 801dd1e: 2b00 cmp r3, #0 801dd20: d011 beq.n 801dd46 801dd22: f002 fa81 bl 8020228 801dd26: 4603 mov r3, r0 801dd28: 4a1a ldr r2, [pc, #104] @ (801dd94 ) 801dd2a: 8812 ldrh r2, [r2, #0] 801dd2c: fbb3 f1f2 udiv r1, r3, r2 801dd30: fb01 f202 mul.w r2, r1, r2 801dd34: 1a9b subs r3, r3, r2 801dd36: 4a17 ldr r2, [pc, #92] @ (801dd94 ) 801dd38: 8812 ldrh r2, [r2, #0] 801dd3a: 3a01 subs r2, #1 801dd3c: 4293 cmp r3, r2 801dd3e: d102 bne.n 801dd46 801dd40: 4b13 ldr r3, [pc, #76] @ (801dd90 ) 801dd42: 681b ldr r3, [r3, #0] 801dd44: 4798 blx r3 } 801dd46: bf00 nop 801dd48: bd80 pop {r7, pc} 801dd4a: bf00 nop 801dd4c: 20000c58 .word 0x20000c58 801dd50: 20000c5c .word 0x20000c5c 801dd54: cccccccd .word 0xcccccccd 801dd58: 20000c60 .word 0x20000c60 801dd5c: 20000c64 .word 0x20000c64 801dd60: 20000c68 .word 0x20000c68 801dd64: 51eb851f .word 0x51eb851f 801dd68: 20000c6c .word 0x20000c6c 801dd6c: 20000c70 .word 0x20000c70 801dd70: 20000c74 .word 0x20000c74 801dd74: 10624dd3 .word 0x10624dd3 801dd78: 20000c78 .word 0x20000c78 801dd7c: 20000c7c .word 0x20000c7c 801dd80: 20000c80 .word 0x20000c80 801dd84: d1b71759 .word 0xd1b71759 801dd88: 20000c84 .word 0x20000c84 801dd8c: 45e7b273 .word 0x45e7b273 801dd90: 20000c88 .word 0x20000c88 801dd94: 20000c8c .word 0x20000c8c 0801dd98 : void Task_Start_1ms(void(*task)()) { User_Task_Every_1ms=task; } void Task_Start_5ms(void(*task)()) { 801dd98: b480 push {r7} 801dd9a: b083 sub sp, #12 801dd9c: af00 add r7, sp, #0 801dd9e: 6078 str r0, [r7, #4] User_Task_Every_5ms=task; 801dda0: 4a04 ldr r2, [pc, #16] @ (801ddb4 ) 801dda2: 687b ldr r3, [r7, #4] 801dda4: 6013 str r3, [r2, #0] } 801dda6: bf00 nop 801dda8: 370c adds r7, #12 801ddaa: 46bd mov sp, r7 801ddac: f85d 7b04 ldr.w r7, [sp], #4 801ddb0: 4770 bx lr 801ddb2: bf00 nop 801ddb4: 20000c5c .word 0x20000c5c 0801ddb8 : void Task_Start_10ms(void(*task)()) { User_Task_Every_10ms=task; } void Task_Start_10ms_1(void(*task)()) { 801ddb8: b480 push {r7} 801ddba: b083 sub sp, #12 801ddbc: af00 add r7, sp, #0 801ddbe: 6078 str r0, [r7, #4] User_Task_Every_10ms_1=task; 801ddc0: 4a04 ldr r2, [pc, #16] @ (801ddd4 ) 801ddc2: 687b ldr r3, [r7, #4] 801ddc4: 6013 str r3, [r2, #0] } 801ddc6: bf00 nop 801ddc8: 370c adds r7, #12 801ddca: 46bd mov sp, r7 801ddcc: f85d 7b04 ldr.w r7, [sp], #4 801ddd0: 4770 bx lr 801ddd2: bf00 nop 801ddd4: 20000c64 .word 0x20000c64 0801ddd8 : void Task_Start_50ms(void(*task)()) { 801ddd8: b480 push {r7} 801ddda: b083 sub sp, #12 801dddc: af00 add r7, sp, #0 801ddde: 6078 str r0, [r7, #4] User_Task_Every_50ms=task; 801dde0: 4a04 ldr r2, [pc, #16] @ (801ddf4 ) 801dde2: 687b ldr r3, [r7, #4] 801dde4: 6013 str r3, [r2, #0] } 801dde6: bf00 nop 801dde8: 370c adds r7, #12 801ddea: 46bd mov sp, r7 801ddec: f85d 7b04 ldr.w r7, [sp], #4 801ddf0: 4770 bx lr 801ddf2: bf00 nop 801ddf4: 20000c68 .word 0x20000c68 0801ddf8 : void Task_Start_50ms_1(void(*task)()) { 801ddf8: b480 push {r7} 801ddfa: b083 sub sp, #12 801ddfc: af00 add r7, sp, #0 801ddfe: 6078 str r0, [r7, #4] User_Task_Every_50ms_1=task; 801de00: 4a04 ldr r2, [pc, #16] @ (801de14 ) 801de02: 687b ldr r3, [r7, #4] 801de04: 6013 str r3, [r2, #0] } 801de06: bf00 nop 801de08: 370c adds r7, #12 801de0a: 46bd mov sp, r7 801de0c: f85d 7b04 ldr.w r7, [sp], #4 801de10: 4770 bx lr 801de12: bf00 nop 801de14: 20000c6c .word 0x20000c6c 0801de18 : void Task_Start_100ms(void(*task)()) { 801de18: b480 push {r7} 801de1a: b083 sub sp, #12 801de1c: af00 add r7, sp, #0 801de1e: 6078 str r0, [r7, #4] User_Task_Every_100ms=task; 801de20: 4a04 ldr r2, [pc, #16] @ (801de34 ) 801de22: 687b ldr r3, [r7, #4] 801de24: 6013 str r3, [r2, #0] } 801de26: bf00 nop 801de28: 370c adds r7, #12 801de2a: 46bd mov sp, r7 801de2c: f85d 7b04 ldr.w r7, [sp], #4 801de30: 4770 bx lr 801de32: bf00 nop 801de34: 20000c70 .word 0x20000c70 0801de38 : void Task_Start_10s(void(*task)()) { User_Task_Every_10s=task; } void Task_Start_60s(void(*task)()) { 801de38: b480 push {r7} 801de3a: b083 sub sp, #12 801de3c: af00 add r7, sp, #0 801de3e: 6078 str r0, [r7, #4] User_Task_Every_60s=task; 801de40: 4a04 ldr r2, [pc, #16] @ (801de54 ) 801de42: 687b ldr r3, [r7, #4] 801de44: 6013 str r3, [r2, #0] } 801de46: bf00 nop 801de48: 370c adds r7, #12 801de4a: 46bd mov sp, r7 801de4c: f85d 7b04 ldr.w r7, [sp], #4 801de50: 4770 bx lr 801de52: bf00 nop 801de54: 20000c84 .word 0x20000c84 0801de58 : void Task_Stop_5ms(void) { User_Task_Every_5ms=(void *)0; } void Task_Stop_10ms(void) { 801de58: b480 push {r7} 801de5a: af00 add r7, sp, #0 User_Task_Every_10ms=(void *)0; 801de5c: 4b03 ldr r3, [pc, #12] @ (801de6c ) 801de5e: 2200 movs r2, #0 801de60: 601a str r2, [r3, #0] } 801de62: bf00 nop 801de64: 46bd mov sp, r7 801de66: f85d 7b04 ldr.w r7, [sp], #4 801de6a: 4770 bx lr 801de6c: 20000c60 .word 0x20000c60 0801de70 : void Task_Stop_50ms(void) { 801de70: b480 push {r7} 801de72: af00 add r7, sp, #0 User_Task_Every_50ms=(void *)0; 801de74: 4b03 ldr r3, [pc, #12] @ (801de84 ) 801de76: 2200 movs r2, #0 801de78: 601a str r2, [r3, #0] } 801de7a: bf00 nop 801de7c: 46bd mov sp, r7 801de7e: f85d 7b04 ldr.w r7, [sp], #4 801de82: 4770 bx lr 801de84: 20000c68 .word 0x20000c68 0801de88 : void Task_Stop_10ms_1(void) { 801de88: b480 push {r7} 801de8a: af00 add r7, sp, #0 User_Task_Every_10ms_1=(void *)0; 801de8c: 4b03 ldr r3, [pc, #12] @ (801de9c ) 801de8e: 2200 movs r2, #0 801de90: 601a str r2, [r3, #0] } 801de92: bf00 nop 801de94: 46bd mov sp, r7 801de96: f85d 7b04 ldr.w r7, [sp], #4 801de9a: 4770 bx lr 801de9c: 20000c64 .word 0x20000c64 0801dea0 : void Task_Stop_50ms_1(void) { 801dea0: b480 push {r7} 801dea2: af00 add r7, sp, #0 User_Task_Every_50ms_1=(void *)0; 801dea4: 4b03 ldr r3, [pc, #12] @ (801deb4 ) 801dea6: 2200 movs r2, #0 801dea8: 601a str r2, [r3, #0] } 801deaa: bf00 nop 801deac: 46bd mov sp, r7 801deae: f85d 7b04 ldr.w r7, [sp], #4 801deb2: 4770 bx lr 801deb4: 20000c6c .word 0x20000c6c 0801deb8 : // HAL_GPIO_TogglePin(GPIOF, GPIO_PIN_0); // Regen_Resistor_Control_HSW(); } void Task10ms_1(void) { 801deb8: b580 push {r7, lr} 801deba: af00 add r7, sp, #0 if(WP_Weight.Ctrl.OnOffScale[L] == 0 && WP_Weight.Ctrl.OnOffScale[R] == 0) { 801debc: 4b10 ldr r3, [pc, #64] @ (801df00 ) 801debe: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 801dec2: eef5 7a40 vcmp.f32 s15, #0.0 801dec6: eef1 fa10 vmrs APSR_nzcv, fpscr 801deca: d10c bne.n 801dee6 801decc: 4b0c ldr r3, [pc, #48] @ (801df00 ) 801dece: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801ded2: eef5 7a40 vcmp.f32 s15, #0.0 801ded6: eef1 fa10 vmrs APSR_nzcv, fpscr 801deda: d104 bne.n 801dee6 WeightBLEtoSetTask(0.1); 801dedc: ed9f 0a09 vldr s0, [pc, #36] @ 801df04 801dee0: f7f4 ff26 bl 8012d30 801dee4: e003 b.n 801deee } else { WeightBLEtoSetTask(0.025f); 801dee6: ed9f 0a08 vldr s0, [pc, #32] @ 801df08 801deea: f7f4 ff21 bl 8012d30 } taskCnt._10ms_1++; 801deee: 4b07 ldr r3, [pc, #28] @ (801df0c ) 801def0: 891b ldrh r3, [r3, #8] 801def2: 3301 adds r3, #1 801def4: b29a uxth r2, r3 801def6: 4b05 ldr r3, [pc, #20] @ (801df0c ) 801def8: 811a strh r2, [r3, #8] } 801defa: bf00 nop 801defc: bd80 pop {r7, pc} 801defe: bf00 nop 801df00: 200001d8 .word 0x200001d8 801df04: 3dcccccd .word 0x3dcccccd 801df08: 3ccccccd .word 0x3ccccccd 801df0c: 20000c40 .word 0x20000c40 0801df10 : void Task50ms(void) { 801df10: b480 push {r7} 801df12: af00 add r7, sp, #0 taskCnt._50ms++; 801df14: 4b05 ldr r3, [pc, #20] @ (801df2c ) 801df16: 895b ldrh r3, [r3, #10] 801df18: 3301 adds r3, #1 801df1a: b29a uxth r2, r3 801df1c: 4b03 ldr r3, [pc, #12] @ (801df2c ) 801df1e: 815a strh r2, [r3, #10] // LED_Blink_ALL(LED_R,5,LED_B,20); // // delay_msec(5); // cnt_DropReleaseLED--; // } } 801df20: bf00 nop 801df22: 46bd mov sp, r7 801df24: f85d 7b04 ldr.w r7, [sp], #4 801df28: 4770 bx lr 801df2a: bf00 nop 801df2c: 20000c40 .word 0x20000c40 0801df30 : void Task100ms(void) { 801df30: b580 push {r7, lr} 801df32: af00 add r7, sp, #0 Derating_Control(L); 801df34: 2000 movs r0, #0 801df36: f001 fa2d bl 801f394 Derating_Control(R); 801df3a: 2001 movs r0, #1 801df3c: f001 fa2a bl 801f394 switch(Status_VoltRprt){ 801df40: 4b08 ldr r3, [pc, #32] @ (801df64 ) 801df42: 681b ldr r3, [r3, #0] 801df44: 2b00 cmp r3, #0 801df46: d004 beq.n 801df52 801df48: 2b01 cmp r3, #1 801df4a: d103 bne.n 801df54 case ON: Report_Vdc(); 801df4c: f7fc fae0 bl 801a510 break; 801df50: e000 b.n 801df54 case OFF: break; 801df52: bf00 nop } taskCnt._100ms++; 801df54: 4b04 ldr r3, [pc, #16] @ (801df68 ) 801df56: 899b ldrh r3, [r3, #12] 801df58: 3301 adds r3, #1 801df5a: b29a uxth r2, r3 801df5c: 4b02 ldr r3, [pc, #8] @ (801df68 ) 801df5e: 819a strh r2, [r3, #12] } 801df60: bf00 nop 801df62: bd80 pop {r7, pc} 801df64: 20000c24 .word 0x20000c24 801df68: 20000c40 .word 0x20000c40 0801df6c : SPI_HandleTypeDef hspi1; SPI_HandleTypeDef hspi4; /* SPI1 init function */ void MX_SPI1_Init(void) { 801df6c: b580 push {r7, lr} 801df6e: af00 add r7, sp, #0 /* USER CODE END SPI1_Init 0 */ /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ hspi1.Instance = SPI1; 801df70: 4b17 ldr r3, [pc, #92] @ (801dfd0 ) 801df72: 4a18 ldr r2, [pc, #96] @ (801dfd4 ) 801df74: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; 801df76: 4b16 ldr r3, [pc, #88] @ (801dfd0 ) 801df78: f44f 7282 mov.w r2, #260 @ 0x104 801df7c: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; 801df7e: 4b14 ldr r3, [pc, #80] @ (801dfd0 ) 801df80: 2200 movs r2, #0 801df82: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; 801df84: 4b12 ldr r3, [pc, #72] @ (801dfd0 ) 801df86: 2200 movs r2, #0 801df88: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; 801df8a: 4b11 ldr r3, [pc, #68] @ (801dfd0 ) 801df8c: 2200 movs r2, #0 801df8e: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; 801df90: 4b0f ldr r3, [pc, #60] @ (801dfd0 ) 801df92: 2200 movs r2, #0 801df94: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_SOFT; 801df96: 4b0e ldr r3, [pc, #56] @ (801dfd0 ) 801df98: f44f 7200 mov.w r2, #512 @ 0x200 801df9c: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; 801df9e: 4b0c ldr r3, [pc, #48] @ (801dfd0 ) 801dfa0: 2218 movs r2, #24 801dfa2: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; 801dfa4: 4b0a ldr r3, [pc, #40] @ (801dfd0 ) 801dfa6: 2200 movs r2, #0 801dfa8: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; 801dfaa: 4b09 ldr r3, [pc, #36] @ (801dfd0 ) 801dfac: 2200 movs r2, #0 801dfae: 625a str r2, [r3, #36] @ 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 801dfb0: 4b07 ldr r3, [pc, #28] @ (801dfd0 ) 801dfb2: 2200 movs r2, #0 801dfb4: 629a str r2, [r3, #40] @ 0x28 hspi1.Init.CRCPolynomial = 10; 801dfb6: 4b06 ldr r3, [pc, #24] @ (801dfd0 ) 801dfb8: 220a movs r2, #10 801dfba: 62da str r2, [r3, #44] @ 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) 801dfbc: 4804 ldr r0, [pc, #16] @ (801dfd0 ) 801dfbe: f007 fd47 bl 8025a50 801dfc2: 4603 mov r3, r0 801dfc4: 2b00 cmp r3, #0 801dfc6: d001 beq.n 801dfcc { Error_Handler(); 801dfc8: f7fb fe93 bl 8019cf2 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } 801dfcc: bf00 nop 801dfce: bd80 pop {r7, pc} 801dfd0: 20000c90 .word 0x20000c90 801dfd4: 40013000 .word 0x40013000 0801dfd8 : /* SPI4 init function */ void MX_SPI4_Init(void) { 801dfd8: b580 push {r7, lr} 801dfda: af00 add r7, sp, #0 /* USER CODE END SPI4_Init 0 */ /* USER CODE BEGIN SPI4_Init 1 */ /* USER CODE END SPI4_Init 1 */ hspi4.Instance = SPI4; 801dfdc: 4b17 ldr r3, [pc, #92] @ (801e03c ) 801dfde: 4a18 ldr r2, [pc, #96] @ (801e040 ) 801dfe0: 601a str r2, [r3, #0] hspi4.Init.Mode = SPI_MODE_MASTER; 801dfe2: 4b16 ldr r3, [pc, #88] @ (801e03c ) 801dfe4: f44f 7282 mov.w r2, #260 @ 0x104 801dfe8: 605a str r2, [r3, #4] hspi4.Init.Direction = SPI_DIRECTION_2LINES; 801dfea: 4b14 ldr r3, [pc, #80] @ (801e03c ) 801dfec: 2200 movs r2, #0 801dfee: 609a str r2, [r3, #8] hspi4.Init.DataSize = SPI_DATASIZE_8BIT; 801dff0: 4b12 ldr r3, [pc, #72] @ (801e03c ) 801dff2: 2200 movs r2, #0 801dff4: 60da str r2, [r3, #12] hspi4.Init.CLKPolarity = SPI_POLARITY_LOW; 801dff6: 4b11 ldr r3, [pc, #68] @ (801e03c ) 801dff8: 2200 movs r2, #0 801dffa: 611a str r2, [r3, #16] hspi4.Init.CLKPhase = SPI_PHASE_1EDGE; 801dffc: 4b0f ldr r3, [pc, #60] @ (801e03c ) 801dffe: 2200 movs r2, #0 801e000: 615a str r2, [r3, #20] hspi4.Init.NSS = SPI_NSS_HARD_OUTPUT; 801e002: 4b0e ldr r3, [pc, #56] @ (801e03c ) 801e004: f44f 2280 mov.w r2, #262144 @ 0x40000 801e008: 619a str r2, [r3, #24] hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 801e00a: 4b0c ldr r3, [pc, #48] @ (801e03c ) 801e00c: 2200 movs r2, #0 801e00e: 61da str r2, [r3, #28] hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB; 801e010: 4b0a ldr r3, [pc, #40] @ (801e03c ) 801e012: 2200 movs r2, #0 801e014: 621a str r2, [r3, #32] hspi4.Init.TIMode = SPI_TIMODE_DISABLE; 801e016: 4b09 ldr r3, [pc, #36] @ (801e03c ) 801e018: 2200 movs r2, #0 801e01a: 625a str r2, [r3, #36] @ 0x24 hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 801e01c: 4b07 ldr r3, [pc, #28] @ (801e03c ) 801e01e: 2200 movs r2, #0 801e020: 629a str r2, [r3, #40] @ 0x28 hspi4.Init.CRCPolynomial = 10; 801e022: 4b06 ldr r3, [pc, #24] @ (801e03c ) 801e024: 220a movs r2, #10 801e026: 62da str r2, [r3, #44] @ 0x2c if (HAL_SPI_Init(&hspi4) != HAL_OK) 801e028: 4804 ldr r0, [pc, #16] @ (801e03c ) 801e02a: f007 fd11 bl 8025a50 801e02e: 4603 mov r3, r0 801e030: 2b00 cmp r3, #0 801e032: d001 beq.n 801e038 { Error_Handler(); 801e034: f7fb fe5d bl 8019cf2 } /* USER CODE BEGIN SPI4_Init 2 */ /* USER CODE END SPI4_Init 2 */ } 801e038: bf00 nop 801e03a: bd80 pop {r7, pc} 801e03c: 20000ce8 .word 0x20000ce8 801e040: 40013400 .word 0x40013400 0801e044 : void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) { 801e044: b580 push {r7, lr} 801e046: b08c sub sp, #48 @ 0x30 801e048: af00 add r7, sp, #0 801e04a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 801e04c: f107 031c add.w r3, r7, #28 801e050: 2200 movs r2, #0 801e052: 601a str r2, [r3, #0] 801e054: 605a str r2, [r3, #4] 801e056: 609a str r2, [r3, #8] 801e058: 60da str r2, [r3, #12] 801e05a: 611a str r2, [r3, #16] if(spiHandle->Instance==SPI1) 801e05c: 687b ldr r3, [r7, #4] 801e05e: 681b ldr r3, [r3, #0] 801e060: 4a42 ldr r2, [pc, #264] @ (801e16c ) 801e062: 4293 cmp r3, r2 801e064: d144 bne.n 801e0f0 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* SPI1 clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); 801e066: 2300 movs r3, #0 801e068: 61bb str r3, [r7, #24] 801e06a: 4b41 ldr r3, [pc, #260] @ (801e170 ) 801e06c: 6c5b ldr r3, [r3, #68] @ 0x44 801e06e: 4a40 ldr r2, [pc, #256] @ (801e170 ) 801e070: f443 5380 orr.w r3, r3, #4096 @ 0x1000 801e074: 6453 str r3, [r2, #68] @ 0x44 801e076: 4b3e ldr r3, [pc, #248] @ (801e170 ) 801e078: 6c5b ldr r3, [r3, #68] @ 0x44 801e07a: f403 5380 and.w r3, r3, #4096 @ 0x1000 801e07e: 61bb str r3, [r7, #24] 801e080: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); 801e082: 2300 movs r3, #0 801e084: 617b str r3, [r7, #20] 801e086: 4b3a ldr r3, [pc, #232] @ (801e170 ) 801e088: 6b1b ldr r3, [r3, #48] @ 0x30 801e08a: 4a39 ldr r2, [pc, #228] @ (801e170 ) 801e08c: f043 0302 orr.w r3, r3, #2 801e090: 6313 str r3, [r2, #48] @ 0x30 801e092: 4b37 ldr r3, [pc, #220] @ (801e170 ) 801e094: 6b1b ldr r3, [r3, #48] @ 0x30 801e096: f003 0302 and.w r3, r3, #2 801e09a: 617b str r3, [r7, #20] 801e09c: 697b ldr r3, [r7, #20] /**SPI1 GPIO Configuration PB3 ------> SPI1_SCK PB4 ------> SPI1_MISO PB5 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4; 801e09e: 2318 movs r3, #24 801e0a0: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801e0a2: 2302 movs r3, #2 801e0a4: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 801e0a6: 2300 movs r3, #0 801e0a8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 801e0aa: 2303 movs r3, #3 801e0ac: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 801e0ae: 2305 movs r3, #5 801e0b0: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 801e0b2: f107 031c add.w r3, r7, #28 801e0b6: 4619 mov r1, r3 801e0b8: 482e ldr r0, [pc, #184] @ (801e174 ) 801e0ba: f004 faed bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_5; 801e0be: 2320 movs r3, #32 801e0c0: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801e0c2: 2302 movs r3, #2 801e0c4: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 801e0c6: 2302 movs r3, #2 801e0c8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 801e0ca: 2303 movs r3, #3 801e0cc: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 801e0ce: 2305 movs r3, #5 801e0d0: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 801e0d2: f107 031c add.w r3, r7, #28 801e0d6: 4619 mov r1, r3 801e0d8: 4826 ldr r0, [pc, #152] @ (801e174 ) 801e0da: f004 fadd bl 8022698 /* SPI1 interrupt Init */ HAL_NVIC_SetPriority(SPI1_IRQn, 10, 0); 801e0de: 2200 movs r2, #0 801e0e0: 210a movs r1, #10 801e0e2: 2023 movs r0, #35 @ 0x23 801e0e4: f003 fa53 bl 802158e HAL_NVIC_EnableIRQ(SPI1_IRQn); 801e0e8: 2023 movs r0, #35 @ 0x23 801e0ea: f003 fa6c bl 80215c6 HAL_NVIC_EnableIRQ(SPI4_IRQn); /* USER CODE BEGIN SPI4_MspInit 1 */ /* USER CODE END SPI4_MspInit 1 */ } } 801e0ee: e039 b.n 801e164 else if(spiHandle->Instance==SPI4) 801e0f0: 687b ldr r3, [r7, #4] 801e0f2: 681b ldr r3, [r3, #0] 801e0f4: 4a20 ldr r2, [pc, #128] @ (801e178 ) 801e0f6: 4293 cmp r3, r2 801e0f8: d134 bne.n 801e164 __HAL_RCC_SPI4_CLK_ENABLE(); 801e0fa: 2300 movs r3, #0 801e0fc: 613b str r3, [r7, #16] 801e0fe: 4b1c ldr r3, [pc, #112] @ (801e170 ) 801e100: 6c5b ldr r3, [r3, #68] @ 0x44 801e102: 4a1b ldr r2, [pc, #108] @ (801e170 ) 801e104: f443 5300 orr.w r3, r3, #8192 @ 0x2000 801e108: 6453 str r3, [r2, #68] @ 0x44 801e10a: 4b19 ldr r3, [pc, #100] @ (801e170 ) 801e10c: 6c5b ldr r3, [r3, #68] @ 0x44 801e10e: f403 5300 and.w r3, r3, #8192 @ 0x2000 801e112: 613b str r3, [r7, #16] 801e114: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOG_CLK_ENABLE(); 801e116: 2300 movs r3, #0 801e118: 60fb str r3, [r7, #12] 801e11a: 4b15 ldr r3, [pc, #84] @ (801e170 ) 801e11c: 6b1b ldr r3, [r3, #48] @ 0x30 801e11e: 4a14 ldr r2, [pc, #80] @ (801e170 ) 801e120: f043 0340 orr.w r3, r3, #64 @ 0x40 801e124: 6313 str r3, [r2, #48] @ 0x30 801e126: 4b12 ldr r3, [pc, #72] @ (801e170 ) 801e128: 6b1b ldr r3, [r3, #48] @ 0x30 801e12a: f003 0340 and.w r3, r3, #64 @ 0x40 801e12e: 60fb str r3, [r7, #12] 801e130: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14; 801e132: f44f 43f0 mov.w r3, #30720 @ 0x7800 801e136: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801e138: 2302 movs r3, #2 801e13a: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 801e13c: 2300 movs r3, #0 801e13e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 801e140: 2303 movs r3, #3 801e142: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF6_SPI4; 801e144: 2306 movs r3, #6 801e146: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 801e148: f107 031c add.w r3, r7, #28 801e14c: 4619 mov r1, r3 801e14e: 480b ldr r0, [pc, #44] @ (801e17c ) 801e150: f004 faa2 bl 8022698 HAL_NVIC_SetPriority(SPI4_IRQn, 10, 0); 801e154: 2200 movs r2, #0 801e156: 210a movs r1, #10 801e158: 2054 movs r0, #84 @ 0x54 801e15a: f003 fa18 bl 802158e HAL_NVIC_EnableIRQ(SPI4_IRQn); 801e15e: 2054 movs r0, #84 @ 0x54 801e160: f003 fa31 bl 80215c6 } 801e164: bf00 nop 801e166: 3730 adds r7, #48 @ 0x30 801e168: 46bd mov sp, r7 801e16a: bd80 pop {r7, pc} 801e16c: 40013000 .word 0x40013000 801e170: 40023800 .word 0x40023800 801e174: 40020400 .word 0x40020400 801e178: 40013400 .word 0x40013400 801e17c: 40021800 .word 0x40021800 0801e180 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 801e180: b480 push {r7} 801e182: b083 sub sp, #12 801e184: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 801e186: 2300 movs r3, #0 801e188: 607b str r3, [r7, #4] 801e18a: 4b10 ldr r3, [pc, #64] @ (801e1cc ) 801e18c: 6c5b ldr r3, [r3, #68] @ 0x44 801e18e: 4a0f ldr r2, [pc, #60] @ (801e1cc ) 801e190: f443 4380 orr.w r3, r3, #16384 @ 0x4000 801e194: 6453 str r3, [r2, #68] @ 0x44 801e196: 4b0d ldr r3, [pc, #52] @ (801e1cc ) 801e198: 6c5b ldr r3, [r3, #68] @ 0x44 801e19a: f403 4380 and.w r3, r3, #16384 @ 0x4000 801e19e: 607b str r3, [r7, #4] 801e1a0: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 801e1a2: 2300 movs r3, #0 801e1a4: 603b str r3, [r7, #0] 801e1a6: 4b09 ldr r3, [pc, #36] @ (801e1cc ) 801e1a8: 6c1b ldr r3, [r3, #64] @ 0x40 801e1aa: 4a08 ldr r2, [pc, #32] @ (801e1cc ) 801e1ac: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 801e1b0: 6413 str r3, [r2, #64] @ 0x40 801e1b2: 4b06 ldr r3, [pc, #24] @ (801e1cc ) 801e1b4: 6c1b ldr r3, [r3, #64] @ 0x40 801e1b6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 801e1ba: 603b str r3, [r7, #0] 801e1bc: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 801e1be: bf00 nop 801e1c0: 370c adds r7, #12 801e1c2: 46bd mov sp, r7 801e1c4: f85d 7b04 ldr.w r7, [sp], #4 801e1c8: 4770 bx lr 801e1ca: bf00 nop 801e1cc: 40023800 .word 0x40023800 0801e1d0 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 801e1d0: b480 push {r7} 801e1d2: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 801e1d4: bf00 nop 801e1d6: e7fd b.n 801e1d4 0801e1d8 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 801e1d8: b480 push {r7} 801e1da: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 801e1dc: bf00 nop 801e1de: e7fd b.n 801e1dc 0801e1e0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 801e1e0: b480 push {r7} 801e1e2: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 801e1e4: bf00 nop 801e1e6: e7fd b.n 801e1e4 0801e1e8 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { 801e1e8: b480 push {r7} 801e1ea: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 801e1ec: bf00 nop 801e1ee: e7fd b.n 801e1ec 0801e1f0 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 801e1f0: b480 push {r7} 801e1f2: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 801e1f4: bf00 nop 801e1f6: e7fd b.n 801e1f4 0801e1f8 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 801e1f8: b480 push {r7} 801e1fa: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 801e1fc: bf00 nop 801e1fe: 46bd mov sp, r7 801e200: f85d 7b04 ldr.w r7, [sp], #4 801e204: 4770 bx lr 0801e206 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 801e206: b480 push {r7} 801e208: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 801e20a: bf00 nop 801e20c: 46bd mov sp, r7 801e20e: f85d 7b04 ldr.w r7, [sp], #4 801e212: 4770 bx lr 0801e214 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 801e214: b480 push {r7} 801e216: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 801e218: bf00 nop 801e21a: 46bd mov sp, r7 801e21c: f85d 7b04 ldr.w r7, [sp], #4 801e220: 4770 bx lr 0801e222 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 801e222: b580 push {r7, lr} 801e224: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 801e226: f001 ffeb bl 8020200 /* USER CODE BEGIN SysTick_IRQn 1 */ HAL_SYSTICK_IRQHandler(); 801e22a: f003 f9f8 bl 802161e /* USER CODE END SysTick_IRQn 1 */ } 801e22e: bf00 nop 801e230: bd80 pop {r7, pc} ... 0801e234 : /** * @brief This function handles EXTI line 0 interrupt. */ void EXTI0_IRQHandler(void) { 801e234: b580 push {r7, lr} 801e236: af00 add r7, sp, #0 /* USER CODE BEGIN EXTI0_IRQn 0 */ ITcnt.exti0++; 801e238: 4b05 ldr r3, [pc, #20] @ (801e250 ) 801e23a: 885b ldrh r3, [r3, #2] 801e23c: 3301 adds r3, #1 801e23e: b29a uxth r2, r3 801e240: 4b03 ldr r3, [pc, #12] @ (801e250 ) 801e242: 805a strh r2, [r3, #2] /* USER CODE END EXTI0_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); 801e244: 2001 movs r0, #1 801e246: f004 fcfb bl 8022c40 /* USER CODE BEGIN EXTI0_IRQn 1 */ /* USER CODE END EXTI0_IRQn 1 */ } 801e24a: bf00 nop 801e24c: bd80 pop {r7, pc} 801e24e: bf00 nop 801e250: 20000d40 .word 0x20000d40 0801e254 : // //// digitalWrite(88, 0); // /* USER CODE END ADC_IRQn 1 */ //} void ADC_IRQHandler(void) { 801e254: b580 push {r7, lr} 801e256: af00 add r7, sp, #0 // digitalWrite(57, 1); //#if ANGLE_MODE == ANGLE_ENC // WP_CtrlErr.Motor1.Angle = WP_EncPos(MOTOR1, &Motor1_Ang); // WP_CtrlErr.Motor2.Angle = WP_EncPos(MOTOR2, &Motor2_Ang); //#endif ITcnt.adc++; // Below 3 handler function execution time is about 10.20us 801e258: 4b08 ldr r3, [pc, #32] @ (801e27c ) 801e25a: 88db ldrh r3, [r3, #6] 801e25c: 3301 adds r3, #1 801e25e: b29a uxth r2, r3 801e260: 4b06 ldr r3, [pc, #24] @ (801e27c ) 801e262: 80da strh r2, [r3, #6] /* USER CODE END ADC_IRQn 0 */ HAL_ADC_IRQHandler(&hadc1); 801e264: 4806 ldr r0, [pc, #24] @ (801e280 ) 801e266: f002 f8a4 bl 80203b2 HAL_ADC_IRQHandler(&hadc2); 801e26a: 4806 ldr r0, [pc, #24] @ (801e284 ) 801e26c: f002 f8a1 bl 80203b2 HAL_ADC_IRQHandler(&hadc3); 801e270: 4805 ldr r0, [pc, #20] @ (801e288 ) 801e272: f002 f89e bl 80203b2 // break; // } // WESPION_MotorControl(); /* USER CODE END ADC_IRQn 1 */ } 801e276: bf00 nop 801e278: bd80 pop {r7, pc} 801e27a: bf00 nop 801e27c: 20000d40 .word 0x20000d40 801e280: 2000091c .word 0x2000091c 801e284: 20000964 .word 0x20000964 801e288: 200009ac .word 0x200009ac 0801e28c : /** * @brief This function handles TIM1 break interrupt and TIM9 global interrupt. */ void TIM1_BRK_TIM9_IRQHandler(void) { 801e28c: b580 push {r7, lr} 801e28e: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 0 */ ITcnt.tim1_brk_tim9++; 801e290: 4b06 ldr r3, [pc, #24] @ (801e2ac ) 801e292: 891b ldrh r3, [r3, #8] 801e294: 3301 adds r3, #1 801e296: b29a uxth r2, r3 801e298: 4b04 ldr r3, [pc, #16] @ (801e2ac ) 801e29a: 811a strh r2, [r3, #8] /* USER CODE END TIM1_BRK_TIM9_IRQn 0 */ HAL_TIM_IRQHandler(&htim1); 801e29c: 4804 ldr r0, [pc, #16] @ (801e2b0 ) 801e29e: f008 f9bb bl 8026618 HAL_TIM_IRQHandler(&htim9); 801e2a2: 4804 ldr r0, [pc, #16] @ (801e2b4 ) 801e2a4: f008 f9b8 bl 8026618 /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 1 */ /* USER CODE END TIM1_BRK_TIM9_IRQn 1 */ } 801e2a8: bf00 nop 801e2aa: bd80 pop {r7, pc} 801e2ac: 20000d40 .word 0x20000d40 801e2b0: 20000d68 .word 0x20000d68 801e2b4: 20000ed0 .word 0x20000ed0 0801e2b8 : /** * @brief This function handles TIM1 update interrupt and TIM10 global interrupt. */ void TIM1_UP_TIM10_IRQHandler(void) { 801e2b8: b580 push {r7, lr} 801e2ba: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */ // digitalWrite(56, 1); ITcnt.tim1_up_tim10++; // Below handler function + 2 Encoder function execution time is about 5us 801e2bc: 4b05 ldr r3, [pc, #20] @ (801e2d4 ) 801e2be: 895b ldrh r3, [r3, #10] 801e2c0: 3301 adds r3, #1 801e2c2: b29a uxth r2, r3 801e2c4: 4b03 ldr r3, [pc, #12] @ (801e2d4 ) 801e2c6: 815a strh r2, [r3, #10] /* USER CODE END TIM1_UP_TIM10_IRQn 0 */ HAL_TIM_IRQHandler(&htim1); 801e2c8: 4803 ldr r0, [pc, #12] @ (801e2d8 ) 801e2ca: f008 f9a5 bl 8026618 /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */ // WP_CtrlErr.Motor1.Angle = WP_EncPos(MOTOR1, &Motor1_Ang); // WP_CtrlErr.Motor2.Angle = WP_EncPos(MOTOR2, &Motor2_Ang); // digitalWrite(56, 0); /* USER CODE END TIM1_UP_TIM10_IRQn 1 */ } 801e2ce: bf00 nop 801e2d0: bd80 pop {r7, pc} 801e2d2: bf00 nop 801e2d4: 20000d40 .word 0x20000d40 801e2d8: 20000d68 .word 0x20000d68 0801e2dc : /** * @brief This function handles TIM1 trigger and commutation interrupts and TIM11 global interrupt. */ void TIM1_TRG_COM_TIM11_IRQHandler(void) { 801e2dc: b580 push {r7, lr} 801e2de: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */ ITcnt.tim1_trg_com_timm11++; 801e2e0: 4b05 ldr r3, [pc, #20] @ (801e2f8 ) 801e2e2: 899b ldrh r3, [r3, #12] 801e2e4: 3301 adds r3, #1 801e2e6: b29a uxth r2, r3 801e2e8: 4b03 ldr r3, [pc, #12] @ (801e2f8 ) 801e2ea: 819a strh r2, [r3, #12] /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */ HAL_TIM_IRQHandler(&htim1); 801e2ec: 4803 ldr r0, [pc, #12] @ (801e2fc ) 801e2ee: f008 f993 bl 8026618 /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */ /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */ } 801e2f2: bf00 nop 801e2f4: bd80 pop {r7, pc} 801e2f6: bf00 nop 801e2f8: 20000d40 .word 0x20000d40 801e2fc: 20000d68 .word 0x20000d68 0801e300 : /** * @brief This function handles TIM2 global interrupt. */ void TIM2_IRQHandler(void) { 801e300: b580 push {r7, lr} 801e302: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_IRQn 0 */ ITcnt.tim2++; 801e304: 4b05 ldr r3, [pc, #20] @ (801e31c ) 801e306: 89db ldrh r3, [r3, #14] 801e308: 3301 adds r3, #1 801e30a: b29a uxth r2, r3 801e30c: 4b03 ldr r3, [pc, #12] @ (801e31c ) 801e30e: 81da strh r2, [r3, #14] /* USER CODE END TIM2_IRQn 0 */ HAL_TIM_IRQHandler(&htim2); 801e310: 4803 ldr r0, [pc, #12] @ (801e320 ) 801e312: f008 f981 bl 8026618 /* USER CODE BEGIN TIM2_IRQn 1 */ /* USER CODE END TIM2_IRQn 1 */ } 801e316: bf00 nop 801e318: bd80 pop {r7, pc} 801e31a: bf00 nop 801e31c: 20000d40 .word 0x20000d40 801e320: 20000db0 .word 0x20000db0 0801e324 : /** * @brief This function handles TIM4 global interrupt. */ void TIM4_IRQHandler(void) { 801e324: b580 push {r7, lr} 801e326: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_IRQn 0 */ ITcnt.tim4++; 801e328: 4b05 ldr r3, [pc, #20] @ (801e340 ) 801e32a: 8a1b ldrh r3, [r3, #16] 801e32c: 3301 adds r3, #1 801e32e: b29a uxth r2, r3 801e330: 4b03 ldr r3, [pc, #12] @ (801e340 ) 801e332: 821a strh r2, [r3, #16] /* USER CODE END TIM4_IRQn 0 */ HAL_TIM_IRQHandler(&htim4); 801e334: 4803 ldr r0, [pc, #12] @ (801e344 ) 801e336: f008 f96f bl 8026618 /* USER CODE BEGIN TIM4_IRQn 1 */ /* USER CODE END TIM4_IRQn 1 */ } 801e33a: bf00 nop 801e33c: bd80 pop {r7, pc} 801e33e: bf00 nop 801e340: 20000d40 .word 0x20000d40 801e344: 20000df8 .word 0x20000df8 0801e348 : /** * @brief This function handles I2C1 event interrupt. */ void I2C1_EV_IRQHandler(void) { 801e348: b580 push {r7, lr} 801e34a: af00 add r7, sp, #0 /* USER CODE BEGIN I2C1_EV_IRQn 0 */ ITcnt.i2c1_ev++; 801e34c: 4b05 ldr r3, [pc, #20] @ (801e364 ) 801e34e: 8a5b ldrh r3, [r3, #18] 801e350: 3301 adds r3, #1 801e352: b29a uxth r2, r3 801e354: 4b03 ldr r3, [pc, #12] @ (801e364 ) 801e356: 825a strh r2, [r3, #18] /* USER CODE END I2C1_EV_IRQn 0 */ HAL_I2C_EV_IRQHandler(&hi2c1); 801e358: 4803 ldr r0, [pc, #12] @ (801e368 ) 801e35a: f004 fdcd bl 8022ef8 /* USER CODE BEGIN I2C1_EV_IRQn 1 */ /* USER CODE END I2C1_EV_IRQn 1 */ } 801e35e: bf00 nop 801e360: bd80 pop {r7, pc} 801e362: bf00 nop 801e364: 20000d40 .word 0x20000d40 801e368: 20000b98 .word 0x20000b98 0801e36c : /** * @brief This function handles I2C1 error interrupt. */ void I2C1_ER_IRQHandler(void) { 801e36c: b580 push {r7, lr} 801e36e: af00 add r7, sp, #0 /* USER CODE BEGIN I2C1_ER_IRQn 0 */ ITcnt.i2c1_er++; 801e370: 4b05 ldr r3, [pc, #20] @ (801e388 ) 801e372: 8a9b ldrh r3, [r3, #20] 801e374: 3301 adds r3, #1 801e376: b29a uxth r2, r3 801e378: 4b03 ldr r3, [pc, #12] @ (801e388 ) 801e37a: 829a strh r2, [r3, #20] /* USER CODE END I2C1_ER_IRQn 0 */ HAL_I2C_ER_IRQHandler(&hi2c1); 801e37c: 4803 ldr r0, [pc, #12] @ (801e38c ) 801e37e: f004 ff0e bl 802319e /* USER CODE BEGIN I2C1_ER_IRQn 1 */ /* USER CODE END I2C1_ER_IRQn 1 */ } 801e382: bf00 nop 801e384: bd80 pop {r7, pc} 801e386: bf00 nop 801e388: 20000d40 .word 0x20000d40 801e38c: 20000b98 .word 0x20000b98 0801e390 : /** * @brief This function handles SPI1 global interrupt. */ void SPI1_IRQHandler(void) { 801e390: b580 push {r7, lr} 801e392: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_IRQn 0 */ ITcnt.spi1++; 801e394: 4b05 ldr r3, [pc, #20] @ (801e3ac ) 801e396: 8adb ldrh r3, [r3, #22] 801e398: 3301 adds r3, #1 801e39a: b29a uxth r2, r3 801e39c: 4b03 ldr r3, [pc, #12] @ (801e3ac ) 801e39e: 82da strh r2, [r3, #22] /* USER CODE END SPI1_IRQn 0 */ HAL_SPI_IRQHandler(&hspi1); 801e3a0: 4803 ldr r0, [pc, #12] @ (801e3b0 ) 801e3a2: f007 fbdf bl 8025b64 /* USER CODE BEGIN SPI1_IRQn 1 */ /* USER CODE END SPI1_IRQn 1 */ } 801e3a6: bf00 nop 801e3a8: bd80 pop {r7, pc} 801e3aa: bf00 nop 801e3ac: 20000d40 .word 0x20000d40 801e3b0: 20000c90 .word 0x20000c90 0801e3b4 : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { 801e3b4: b580 push {r7, lr} 801e3b6: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ ITcnt.usart2++; 801e3b8: 4b05 ldr r3, [pc, #20] @ (801e3d0 ) 801e3ba: 8b1b ldrh r3, [r3, #24] 801e3bc: 3301 adds r3, #1 801e3be: b29a uxth r2, r3 801e3c0: 4b03 ldr r3, [pc, #12] @ (801e3d0 ) 801e3c2: 831a strh r2, [r3, #24] /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); 801e3c4: 4803 ldr r0, [pc, #12] @ (801e3d4 ) 801e3c6: f009 f9b3 bl 8027730 /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } 801e3ca: bf00 nop 801e3cc: bd80 pop {r7, pc} 801e3ce: bf00 nop 801e3d0: 20000d40 .word 0x20000d40 801e3d4: 200053a8 .word 0x200053a8 0801e3d8 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { 801e3d8: b580 push {r7, lr} 801e3da: af00 add r7, sp, #0 /* USER CODE BEGIN USART3_IRQn 0 */ ITcnt.usart3++; 801e3dc: 4b05 ldr r3, [pc, #20] @ (801e3f4 ) 801e3de: 8b5b ldrh r3, [r3, #26] 801e3e0: 3301 adds r3, #1 801e3e2: b29a uxth r2, r3 801e3e4: 4b03 ldr r3, [pc, #12] @ (801e3f4 ) 801e3e6: 835a strh r2, [r3, #26] /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); 801e3e8: 4803 ldr r0, [pc, #12] @ (801e3f8 ) 801e3ea: f009 f9a1 bl 8027730 /* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE END USART3_IRQn 1 */ } 801e3ee: bf00 nop 801e3f0: bd80 pop {r7, pc} 801e3f2: bf00 nop 801e3f4: 20000d40 .word 0x20000d40 801e3f8: 200053ec .word 0x200053ec 0801e3fc : /** * @brief This function handles EXTI line[15:10] interrupts. */ void EXTI15_10_IRQHandler(void) { 801e3fc: b580 push {r7, lr} 801e3fe: af00 add r7, sp, #0 /* USER CODE BEGIN EXTI15_10_IRQn 0 */ ITcnt.exti15_10++; 801e400: 4b07 ldr r3, [pc, #28] @ (801e420 ) 801e402: 8b9b ldrh r3, [r3, #28] 801e404: 3301 adds r3, #1 801e406: b29a uxth r2, r3 801e408: 4b05 ldr r3, [pc, #20] @ (801e420 ) 801e40a: 839a strh r2, [r3, #28] /* USER CODE END EXTI15_10_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13); 801e40c: f44f 5000 mov.w r0, #8192 @ 0x2000 801e410: f004 fc16 bl 8022c40 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15); 801e414: f44f 4000 mov.w r0, #32768 @ 0x8000 801e418: f004 fc12 bl 8022c40 /* USER CODE BEGIN EXTI15_10_IRQn 1 */ /* USER CODE END EXTI15_10_IRQn 1 */ } 801e41c: bf00 nop 801e41e: bd80 pop {r7, pc} 801e420: 20000d40 .word 0x20000d40 0801e424 : /** * @brief This function handles TIM8 break interrupt and TIM12 global interrupt. */ void TIM8_BRK_TIM12_IRQHandler(void) { 801e424: b580 push {r7, lr} 801e426: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_BRK_TIM12_IRQn 0 */ /* USER CODE END TIM8_BRK_TIM12_IRQn 0 */ HAL_TIM_IRQHandler(&htim8); 801e428: 4802 ldr r0, [pc, #8] @ (801e434 ) 801e42a: f008 f8f5 bl 8026618 /* USER CODE BEGIN TIM8_BRK_TIM12_IRQn 1 */ /* USER CODE END TIM8_BRK_TIM12_IRQn 1 */ } 801e42e: bf00 nop 801e430: bd80 pop {r7, pc} 801e432: bf00 nop 801e434: 20000e88 .word 0x20000e88 0801e438 : /** * @brief This function handles TIM8 update interrupt and TIM13 global interrupt. */ void TIM8_UP_TIM13_IRQHandler(void) { 801e438: b580 push {r7, lr} 801e43a: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */ ITcnt.tim8_up_tim13++; 801e43c: 4b05 ldr r3, [pc, #20] @ (801e454 ) 801e43e: 8bdb ldrh r3, [r3, #30] 801e440: 3301 adds r3, #1 801e442: b29a uxth r2, r3 801e444: 4b03 ldr r3, [pc, #12] @ (801e454 ) 801e446: 83da strh r2, [r3, #30] /* USER CODE END TIM8_UP_TIM13_IRQn 0 */ HAL_TIM_IRQHandler(&htim8); 801e448: 4803 ldr r0, [pc, #12] @ (801e458 ) 801e44a: f008 f8e5 bl 8026618 /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */ /* USER CODE END TIM8_UP_TIM13_IRQn 1 */ } 801e44e: bf00 nop 801e450: bd80 pop {r7, pc} 801e452: bf00 nop 801e454: 20000d40 .word 0x20000d40 801e458: 20000e88 .word 0x20000e88 0801e45c : /** * @brief This function handles TIM8 trigger and commutation interrupts and TIM14 global interrupt. */ void TIM8_TRG_COM_TIM14_IRQHandler(void) { 801e45c: b580 push {r7, lr} 801e45e: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 0 */ ITcnt.tim8_trg_com_tim14++; 801e460: 4b05 ldr r3, [pc, #20] @ (801e478 ) 801e462: 8c1b ldrh r3, [r3, #32] 801e464: 3301 adds r3, #1 801e466: b29a uxth r2, r3 801e468: 4b03 ldr r3, [pc, #12] @ (801e478 ) 801e46a: 841a strh r2, [r3, #32] /* USER CODE END TIM8_TRG_COM_TIM14_IRQn 0 */ HAL_TIM_IRQHandler(&htim8); 801e46c: 4803 ldr r0, [pc, #12] @ (801e47c ) 801e46e: f008 f8d3 bl 8026618 /* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 1 */ /* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */ } 801e472: bf00 nop 801e474: bd80 pop {r7, pc} 801e476: bf00 nop 801e478: 20000d40 .word 0x20000d40 801e47c: 20000e88 .word 0x20000e88 0801e480 : /** * @brief This function handles DMA2 stream0 global interrupt. */ void DMA2_Stream0_IRQHandler(void) { 801e480: b580 push {r7, lr} 801e482: af00 add r7, sp, #0 /* USER CODE BEGIN DMA2_Stream0_IRQn 0 */ ITcnt.dma2_St0++; 801e484: 4b05 ldr r3, [pc, #20] @ (801e49c ) 801e486: 8c5b ldrh r3, [r3, #34] @ 0x22 801e488: 3301 adds r3, #1 801e48a: b29a uxth r2, r3 801e48c: 4b03 ldr r3, [pc, #12] @ (801e49c ) 801e48e: 845a strh r2, [r3, #34] @ 0x22 /* USER CODE END DMA2_Stream0_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc3); 801e490: 4803 ldr r0, [pc, #12] @ (801e4a0 ) 801e492: f003 fba1 bl 8021bd8 /* USER CODE BEGIN DMA2_Stream0_IRQn 1 */ /* USER CODE END DMA2_Stream0_IRQn 1 */ } 801e496: bf00 nop 801e498: bd80 pop {r7, pc} 801e49a: bf00 nop 801e49c: 20000d40 .word 0x20000d40 801e4a0: 200009f4 .word 0x200009f4 0801e4a4 : /** * @brief This function handles SPI4 global interrupt. */ void SPI4_IRQHandler(void) { 801e4a4: b580 push {r7, lr} 801e4a6: af00 add r7, sp, #0 /* USER CODE BEGIN SPI4_IRQn 0 */ /* USER CODE END SPI4_IRQn 0 */ HAL_SPI_IRQHandler(&hspi4); 801e4a8: 4802 ldr r0, [pc, #8] @ (801e4b4 ) 801e4aa: f007 fb5b bl 8025b64 /* USER CODE BEGIN SPI4_IRQn 1 */ /* USER CODE END SPI4_IRQn 1 */ } 801e4ae: bf00 nop 801e4b0: bd80 pop {r7, pc} 801e4b2: bf00 nop 801e4b4: 20000ce8 .word 0x20000ce8 0801e4b8 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 801e4b8: b580 push {r7, lr} 801e4ba: b086 sub sp, #24 801e4bc: af00 add r7, sp, #0 801e4be: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 801e4c0: 4a14 ldr r2, [pc, #80] @ (801e514 <_sbrk+0x5c>) 801e4c2: 4b15 ldr r3, [pc, #84] @ (801e518 <_sbrk+0x60>) 801e4c4: 1ad3 subs r3, r2, r3 801e4c6: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 801e4c8: 697b ldr r3, [r7, #20] 801e4ca: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 801e4cc: 4b13 ldr r3, [pc, #76] @ (801e51c <_sbrk+0x64>) 801e4ce: 681b ldr r3, [r3, #0] 801e4d0: 2b00 cmp r3, #0 801e4d2: d102 bne.n 801e4da <_sbrk+0x22> { __sbrk_heap_end = &_end; 801e4d4: 4b11 ldr r3, [pc, #68] @ (801e51c <_sbrk+0x64>) 801e4d6: 4a12 ldr r2, [pc, #72] @ (801e520 <_sbrk+0x68>) 801e4d8: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 801e4da: 4b10 ldr r3, [pc, #64] @ (801e51c <_sbrk+0x64>) 801e4dc: 681a ldr r2, [r3, #0] 801e4de: 687b ldr r3, [r7, #4] 801e4e0: 4413 add r3, r2 801e4e2: 693a ldr r2, [r7, #16] 801e4e4: 429a cmp r2, r3 801e4e6: d207 bcs.n 801e4f8 <_sbrk+0x40> { errno = ENOMEM; 801e4e8: f009 ffac bl 8028444 <__errno> 801e4ec: 4603 mov r3, r0 801e4ee: 220c movs r2, #12 801e4f0: 601a str r2, [r3, #0] return (void *)-1; 801e4f2: f04f 33ff mov.w r3, #4294967295 801e4f6: e009 b.n 801e50c <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 801e4f8: 4b08 ldr r3, [pc, #32] @ (801e51c <_sbrk+0x64>) 801e4fa: 681b ldr r3, [r3, #0] 801e4fc: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 801e4fe: 4b07 ldr r3, [pc, #28] @ (801e51c <_sbrk+0x64>) 801e500: 681a ldr r2, [r3, #0] 801e502: 687b ldr r3, [r7, #4] 801e504: 4413 add r3, r2 801e506: 4a05 ldr r2, [pc, #20] @ (801e51c <_sbrk+0x64>) 801e508: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 801e50a: 68fb ldr r3, [r7, #12] } 801e50c: 4618 mov r0, r3 801e50e: 3718 adds r7, #24 801e510: 46bd mov sp, r7 801e512: bd80 pop {r7, pc} 801e514: 20020000 .word 0x20020000 801e518: 00000400 .word 0x00000400 801e51c: 20000d64 .word 0x20000d64 801e520: 200055b8 .word 0x200055b8 0801e524 : * configuration. * @param None * @retval None */ void SystemInit(void) { 801e524: b480 push {r7} 801e526: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 801e528: 4b07 ldr r3, [pc, #28] @ (801e548 ) 801e52a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 801e52e: 4a06 ldr r2, [pc, #24] @ (801e548 ) 801e530: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 801e534: f8c2 3088 str.w r3, [r2, #136] @ 0x88 SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ 801e538: 4b03 ldr r3, [pc, #12] @ (801e548 ) 801e53a: 4a04 ldr r2, [pc, #16] @ (801e54c ) 801e53c: 609a str r2, [r3, #8] #endif /* USER_VECT_TAB_ADDRESS */ } 801e53e: bf00 nop 801e540: 46bd mov sp, r7 801e542: f85d 7b04 ldr.w r7, [sp], #4 801e546: 4770 bx lr 801e548: e000ed00 .word 0xe000ed00 801e54c: 08004000 .word 0x08004000 0801e550 : TIM_HandleTypeDef htim8; TIM_HandleTypeDef htim9; /* TIM1 init function */ void MX_TIM1_Init(void) { 801e550: b580 push {r7, lr} 801e552: b096 sub sp, #88 @ 0x58 801e554: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_Init 0 */ /* USER CODE END TIM1_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 801e556: f107 0348 add.w r3, r7, #72 @ 0x48 801e55a: 2200 movs r2, #0 801e55c: 601a str r2, [r3, #0] 801e55e: 605a str r2, [r3, #4] 801e560: 609a str r2, [r3, #8] 801e562: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 801e564: f107 0340 add.w r3, r7, #64 @ 0x40 801e568: 2200 movs r2, #0 801e56a: 601a str r2, [r3, #0] 801e56c: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 801e56e: f107 0324 add.w r3, r7, #36 @ 0x24 801e572: 2200 movs r2, #0 801e574: 601a str r2, [r3, #0] 801e576: 605a str r2, [r3, #4] 801e578: 609a str r2, [r3, #8] 801e57a: 60da str r2, [r3, #12] 801e57c: 611a str r2, [r3, #16] 801e57e: 615a str r2, [r3, #20] 801e580: 619a str r2, [r3, #24] TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; 801e582: 1d3b adds r3, r7, #4 801e584: 2220 movs r2, #32 801e586: 2100 movs r1, #0 801e588: 4618 mov r0, r3 801e58a: f009 ff53 bl 8028434 /* USER CODE BEGIN TIM1_Init 1 */ /* USER CODE END TIM1_Init 1 */ htim1.Instance = TIM1; 801e58e: 4b53 ldr r3, [pc, #332] @ (801e6dc ) 801e590: 4a53 ldr r2, [pc, #332] @ (801e6e0 ) 801e592: 601a str r2, [r3, #0] htim1.Init.Prescaler = 0; 801e594: 4b51 ldr r3, [pc, #324] @ (801e6dc ) 801e596: 2200 movs r2, #0 801e598: 605a str r2, [r3, #4] htim1.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED3; 801e59a: 4b50 ldr r3, [pc, #320] @ (801e6dc ) 801e59c: 2260 movs r2, #96 @ 0x60 801e59e: 609a str r2, [r3, #8] htim1.Init.Period = TIM_PERIOD; 801e5a0: 4b4e ldr r3, [pc, #312] @ (801e6dc ) 801e5a2: f242 3227 movw r2, #8999 @ 0x2327 801e5a6: 60da str r2, [r3, #12] htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 801e5a8: 4b4c ldr r3, [pc, #304] @ (801e6dc ) 801e5aa: 2200 movs r2, #0 801e5ac: 611a str r2, [r3, #16] htim1.Init.RepetitionCounter = 1; 801e5ae: 4b4b ldr r3, [pc, #300] @ (801e6dc ) 801e5b0: 2201 movs r2, #1 801e5b2: 615a str r2, [r3, #20] htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 801e5b4: 4b49 ldr r3, [pc, #292] @ (801e6dc ) 801e5b6: 2200 movs r2, #0 801e5b8: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim1) != HAL_OK) 801e5ba: 4848 ldr r0, [pc, #288] @ (801e6dc ) 801e5bc: f007 fbe4 bl 8025d88 801e5c0: 4603 mov r3, r0 801e5c2: 2b00 cmp r3, #0 801e5c4: d001 beq.n 801e5ca { Error_Handler(); 801e5c6: f7fb fb94 bl 8019cf2 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 801e5ca: f44f 5380 mov.w r3, #4096 @ 0x1000 801e5ce: 64bb str r3, [r7, #72] @ 0x48 if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) 801e5d0: f107 0348 add.w r3, r7, #72 @ 0x48 801e5d4: 4619 mov r1, r3 801e5d6: 4841 ldr r0, [pc, #260] @ (801e6dc ) 801e5d8: f008 f9e8 bl 80269ac 801e5dc: 4603 mov r3, r0 801e5de: 2b00 cmp r3, #0 801e5e0: d001 beq.n 801e5e6 { Error_Handler(); 801e5e2: f7fb fb86 bl 8019cf2 } if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) 801e5e6: 483d ldr r0, [pc, #244] @ (801e6dc ) 801e5e8: f007 fc1d bl 8025e26 801e5ec: 4603 mov r3, r0 801e5ee: 2b00 cmp r3, #0 801e5f0: d001 beq.n 801e5f6 { Error_Handler(); 801e5f2: f7fb fb7e bl 8019cf2 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; 801e5f6: 2320 movs r3, #32 801e5f8: 643b str r3, [r7, #64] @ 0x40 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; 801e5fa: 2380 movs r3, #128 @ 0x80 801e5fc: 647b str r3, [r7, #68] @ 0x44 if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) 801e5fe: f107 0340 add.w r3, r7, #64 @ 0x40 801e602: 4619 mov r1, r3 801e604: 4835 ldr r0, [pc, #212] @ (801e6dc ) 801e606: f008 fea5 bl 8027354 801e60a: 4603 mov r3, r0 801e60c: 2b00 cmp r3, #0 801e60e: d001 beq.n 801e614 { Error_Handler(); 801e610: f7fb fb6f bl 8019cf2 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 801e614: 2360 movs r3, #96 @ 0x60 801e616: 627b str r3, [r7, #36] @ 0x24 sConfigOC.Pulse = 0; 801e618: 2300 movs r3, #0 801e61a: 62bb str r3, [r7, #40] @ 0x28 sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 801e61c: 2300 movs r3, #0 801e61e: 62fb str r3, [r7, #44] @ 0x2c sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; 801e620: 2300 movs r3, #0 801e622: 633b str r3, [r7, #48] @ 0x30 sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 801e624: 2300 movs r3, #0 801e626: 637b str r3, [r7, #52] @ 0x34 sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; 801e628: 2300 movs r3, #0 801e62a: 63bb str r3, [r7, #56] @ 0x38 sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; 801e62c: 2300 movs r3, #0 801e62e: 63fb str r3, [r7, #60] @ 0x3c if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 801e630: f107 0324 add.w r3, r7, #36 @ 0x24 801e634: 2200 movs r2, #0 801e636: 4619 mov r1, r3 801e638: 4828 ldr r0, [pc, #160] @ (801e6dc ) 801e63a: f008 f8f5 bl 8026828 801e63e: 4603 mov r3, r0 801e640: 2b00 cmp r3, #0 801e642: d001 beq.n 801e648 { Error_Handler(); 801e644: f7fb fb55 bl 8019cf2 } if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 801e648: f107 0324 add.w r3, r7, #36 @ 0x24 801e64c: 2204 movs r2, #4 801e64e: 4619 mov r1, r3 801e650: 4822 ldr r0, [pc, #136] @ (801e6dc ) 801e652: f008 f8e9 bl 8026828 801e656: 4603 mov r3, r0 801e658: 2b00 cmp r3, #0 801e65a: d001 beq.n 801e660 { Error_Handler(); 801e65c: f7fb fb49 bl 8019cf2 } if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 801e660: f107 0324 add.w r3, r7, #36 @ 0x24 801e664: 2208 movs r2, #8 801e666: 4619 mov r1, r3 801e668: 481c ldr r0, [pc, #112] @ (801e6dc ) 801e66a: f008 f8dd bl 8026828 801e66e: 4603 mov r3, r0 801e670: 2b00 cmp r3, #0 801e672: d001 beq.n 801e678 { Error_Handler(); 801e674: f7fb fb3d bl 8019cf2 } sConfigOC.Pulse = TIM_PERIOD-1; 801e678: f242 3326 movw r3, #8998 @ 0x2326 801e67c: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 801e67e: f107 0324 add.w r3, r7, #36 @ 0x24 801e682: 220c movs r2, #12 801e684: 4619 mov r1, r3 801e686: 4815 ldr r0, [pc, #84] @ (801e6dc ) 801e688: f008 f8ce bl 8026828 801e68c: 4603 mov r3, r0 801e68e: 2b00 cmp r3, #0 801e690: d001 beq.n 801e696 { Error_Handler(); 801e692: f7fb fb2e bl 8019cf2 } sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE; 801e696: f44f 6300 mov.w r3, #2048 @ 0x800 801e69a: 607b str r3, [r7, #4] sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE; 801e69c: f44f 6380 mov.w r3, #1024 @ 0x400 801e6a0: 60bb str r3, [r7, #8] sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; 801e6a2: 2300 movs r3, #0 801e6a4: 60fb str r3, [r7, #12] sBreakDeadTimeConfig.DeadTime = TIM_DEAD; 801e6a6: 236b movs r3, #107 @ 0x6b 801e6a8: 613b str r3, [r7, #16] sBreakDeadTimeConfig.BreakState = TIM_BREAK_ENABLE; 801e6aa: f44f 5380 mov.w r3, #4096 @ 0x1000 801e6ae: 617b str r3, [r7, #20] sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_LOW; 801e6b0: 2300 movs r3, #0 801e6b2: 61bb str r3, [r7, #24] sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; 801e6b4: 2300 movs r3, #0 801e6b6: 623b str r3, [r7, #32] if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) 801e6b8: 1d3b adds r3, r7, #4 801e6ba: 4619 mov r1, r3 801e6bc: 4807 ldr r0, [pc, #28] @ (801e6dc ) 801e6be: f008 fec5 bl 802744c 801e6c2: 4603 mov r3, r0 801e6c4: 2b00 cmp r3, #0 801e6c6: d001 beq.n 801e6cc { Error_Handler(); 801e6c8: f7fb fb13 bl 8019cf2 } /* USER CODE BEGIN TIM1_Init 2 */ /* USER CODE END TIM1_Init 2 */ HAL_TIM_MspPostInit(&htim1); 801e6cc: 4803 ldr r0, [pc, #12] @ (801e6dc ) 801e6ce: f000 fb8d bl 801edec } 801e6d2: bf00 nop 801e6d4: 3758 adds r7, #88 @ 0x58 801e6d6: 46bd mov sp, r7 801e6d8: bd80 pop {r7, pc} 801e6da: bf00 nop 801e6dc: 20000d68 .word 0x20000d68 801e6e0: 40010000 .word 0x40010000 0801e6e4 : /* TIM2 init function */ void MX_TIM2_Init(void) { 801e6e4: b580 push {r7, lr} 801e6e6: b08c sub sp, #48 @ 0x30 801e6e8: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_Encoder_InitTypeDef sConfig = {0}; 801e6ea: f107 030c add.w r3, r7, #12 801e6ee: 2224 movs r2, #36 @ 0x24 801e6f0: 2100 movs r1, #0 801e6f2: 4618 mov r0, r3 801e6f4: f009 fe9e bl 8028434 TIM_MasterConfigTypeDef sMasterConfig = {0}; 801e6f8: 1d3b adds r3, r7, #4 801e6fa: 2200 movs r2, #0 801e6fc: 601a str r2, [r3, #0] 801e6fe: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 801e700: 4b21 ldr r3, [pc, #132] @ (801e788 ) 801e702: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 801e706: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 801e708: 4b1f ldr r3, [pc, #124] @ (801e788 ) 801e70a: 2200 movs r2, #0 801e70c: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 801e70e: 4b1e ldr r3, [pc, #120] @ (801e788 ) 801e710: 2200 movs r2, #0 801e712: 609a str r2, [r3, #8] htim2.Init.Period = 65535; 801e714: 4b1c ldr r3, [pc, #112] @ (801e788 ) 801e716: f64f 72ff movw r2, #65535 @ 0xffff 801e71a: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 801e71c: 4b1a ldr r3, [pc, #104] @ (801e788 ) 801e71e: 2200 movs r2, #0 801e720: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 801e722: 4b19 ldr r3, [pc, #100] @ (801e788 ) 801e724: 2200 movs r2, #0 801e726: 619a str r2, [r3, #24] sConfig.EncoderMode = TIM_ENCODERMODE_TI12; 801e728: 2303 movs r3, #3 801e72a: 60fb str r3, [r7, #12] sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 801e72c: 2300 movs r3, #0 801e72e: 613b str r3, [r7, #16] sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; 801e730: 2301 movs r3, #1 801e732: 617b str r3, [r7, #20] sConfig.IC1Prescaler = TIM_ICPSC_DIV1; 801e734: 2300 movs r3, #0 801e736: 61bb str r3, [r7, #24] sConfig.IC1Filter = 0; 801e738: 2300 movs r3, #0 801e73a: 61fb str r3, [r7, #28] sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 801e73c: 2300 movs r3, #0 801e73e: 623b str r3, [r7, #32] sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; 801e740: 2301 movs r3, #1 801e742: 627b str r3, [r7, #36] @ 0x24 sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 801e744: 2300 movs r3, #0 801e746: 62bb str r3, [r7, #40] @ 0x28 sConfig.IC2Filter = 0; 801e748: 2300 movs r3, #0 801e74a: 62fb str r3, [r7, #44] @ 0x2c if (HAL_TIM_Encoder_Init(&htim2, &sConfig) != HAL_OK) 801e74c: f107 030c add.w r3, r7, #12 801e750: 4619 mov r1, r3 801e752: 480d ldr r0, [pc, #52] @ (801e788 ) 801e754: f007 fde8 bl 8026328 801e758: 4603 mov r3, r0 801e75a: 2b00 cmp r3, #0 801e75c: d001 beq.n 801e762 { Error_Handler(); 801e75e: f7fb fac8 bl 8019cf2 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 801e762: 2300 movs r3, #0 801e764: 607b str r3, [r7, #4] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 801e766: 2300 movs r3, #0 801e768: 60bb str r3, [r7, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 801e76a: 1d3b adds r3, r7, #4 801e76c: 4619 mov r1, r3 801e76e: 4806 ldr r0, [pc, #24] @ (801e788 ) 801e770: f008 fdf0 bl 8027354 801e774: 4603 mov r3, r0 801e776: 2b00 cmp r3, #0 801e778: d001 beq.n 801e77e { Error_Handler(); 801e77a: f7fb faba bl 8019cf2 } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ } 801e77e: bf00 nop 801e780: 3730 adds r7, #48 @ 0x30 801e782: 46bd mov sp, r7 801e784: bd80 pop {r7, pc} 801e786: bf00 nop 801e788: 20000db0 .word 0x20000db0 0801e78c : /* TIM4 init function */ void MX_TIM4_Init(void) { 801e78c: b580 push {r7, lr} 801e78e: b08c sub sp, #48 @ 0x30 801e790: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_Encoder_InitTypeDef sConfig = {0}; 801e792: f107 030c add.w r3, r7, #12 801e796: 2224 movs r2, #36 @ 0x24 801e798: 2100 movs r1, #0 801e79a: 4618 mov r0, r3 801e79c: f009 fe4a bl 8028434 TIM_MasterConfigTypeDef sMasterConfig = {0}; 801e7a0: 1d3b adds r3, r7, #4 801e7a2: 2200 movs r2, #0 801e7a4: 601a str r2, [r3, #0] 801e7a6: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 801e7a8: 4b20 ldr r3, [pc, #128] @ (801e82c ) 801e7aa: 4a21 ldr r2, [pc, #132] @ (801e830 ) 801e7ac: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 801e7ae: 4b1f ldr r3, [pc, #124] @ (801e82c ) 801e7b0: 2200 movs r2, #0 801e7b2: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 801e7b4: 4b1d ldr r3, [pc, #116] @ (801e82c ) 801e7b6: 2200 movs r2, #0 801e7b8: 609a str r2, [r3, #8] htim4.Init.Period = 65535; 801e7ba: 4b1c ldr r3, [pc, #112] @ (801e82c ) 801e7bc: f64f 72ff movw r2, #65535 @ 0xffff 801e7c0: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 801e7c2: 4b1a ldr r3, [pc, #104] @ (801e82c ) 801e7c4: 2200 movs r2, #0 801e7c6: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 801e7c8: 4b18 ldr r3, [pc, #96] @ (801e82c ) 801e7ca: 2200 movs r2, #0 801e7cc: 619a str r2, [r3, #24] sConfig.EncoderMode = TIM_ENCODERMODE_TI12; 801e7ce: 2303 movs r3, #3 801e7d0: 60fb str r3, [r7, #12] sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 801e7d2: 2300 movs r3, #0 801e7d4: 613b str r3, [r7, #16] sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; 801e7d6: 2301 movs r3, #1 801e7d8: 617b str r3, [r7, #20] sConfig.IC1Prescaler = TIM_ICPSC_DIV1; 801e7da: 2300 movs r3, #0 801e7dc: 61bb str r3, [r7, #24] sConfig.IC1Filter = 0; 801e7de: 2300 movs r3, #0 801e7e0: 61fb str r3, [r7, #28] sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 801e7e2: 2300 movs r3, #0 801e7e4: 623b str r3, [r7, #32] sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; 801e7e6: 2301 movs r3, #1 801e7e8: 627b str r3, [r7, #36] @ 0x24 sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 801e7ea: 2300 movs r3, #0 801e7ec: 62bb str r3, [r7, #40] @ 0x28 sConfig.IC2Filter = 0; 801e7ee: 2300 movs r3, #0 801e7f0: 62fb str r3, [r7, #44] @ 0x2c if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK) 801e7f2: f107 030c add.w r3, r7, #12 801e7f6: 4619 mov r1, r3 801e7f8: 480c ldr r0, [pc, #48] @ (801e82c ) 801e7fa: f007 fd95 bl 8026328 801e7fe: 4603 mov r3, r0 801e800: 2b00 cmp r3, #0 801e802: d001 beq.n 801e808 { Error_Handler(); 801e804: f7fb fa75 bl 8019cf2 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 801e808: 2300 movs r3, #0 801e80a: 607b str r3, [r7, #4] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 801e80c: 2300 movs r3, #0 801e80e: 60bb str r3, [r7, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 801e810: 1d3b adds r3, r7, #4 801e812: 4619 mov r1, r3 801e814: 4805 ldr r0, [pc, #20] @ (801e82c ) 801e816: f008 fd9d bl 8027354 801e81a: 4603 mov r3, r0 801e81c: 2b00 cmp r3, #0 801e81e: d001 beq.n 801e824 { Error_Handler(); 801e820: f7fb fa67 bl 8019cf2 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ } 801e824: bf00 nop 801e826: 3730 adds r7, #48 @ 0x30 801e828: 46bd mov sp, r7 801e82a: bd80 pop {r7, pc} 801e82c: 20000df8 .word 0x20000df8 801e830: 40000800 .word 0x40000800 0801e834 : /* TIM5 init function */ void MX_TIM5_Init(void) { 801e834: b580 push {r7, lr} 801e836: b08a sub sp, #40 @ 0x28 801e838: af00 add r7, sp, #0 /* USER CODE BEGIN TIM5_Init 0 */ /* USER CODE END TIM5_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 801e83a: f107 0320 add.w r3, r7, #32 801e83e: 2200 movs r2, #0 801e840: 601a str r2, [r3, #0] 801e842: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 801e844: 1d3b adds r3, r7, #4 801e846: 2200 movs r2, #0 801e848: 601a str r2, [r3, #0] 801e84a: 605a str r2, [r3, #4] 801e84c: 609a str r2, [r3, #8] 801e84e: 60da str r2, [r3, #12] 801e850: 611a str r2, [r3, #16] 801e852: 615a str r2, [r3, #20] 801e854: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM5_Init 1 */ /* USER CODE END TIM5_Init 1 */ htim5.Instance = TIM5; 801e856: 4b20 ldr r3, [pc, #128] @ (801e8d8 ) 801e858: 4a20 ldr r2, [pc, #128] @ (801e8dc ) 801e85a: 601a str r2, [r3, #0] htim5.Init.Prescaler = 0; 801e85c: 4b1e ldr r3, [pc, #120] @ (801e8d8 ) 801e85e: 2200 movs r2, #0 801e860: 605a str r2, [r3, #4] htim5.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1; 801e862: 4b1d ldr r3, [pc, #116] @ (801e8d8 ) 801e864: 2220 movs r2, #32 801e866: 609a str r2, [r3, #8] htim5.Init.Period = 90000-1; 801e868: 4b1b ldr r3, [pc, #108] @ (801e8d8 ) 801e86a: 4a1d ldr r2, [pc, #116] @ (801e8e0 ) 801e86c: 60da str r2, [r3, #12] htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 801e86e: 4b1a ldr r3, [pc, #104] @ (801e8d8 ) 801e870: 2200 movs r2, #0 801e872: 611a str r2, [r3, #16] htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 801e874: 4b18 ldr r3, [pc, #96] @ (801e8d8 ) 801e876: 2200 movs r2, #0 801e878: 619a str r2, [r3, #24] if (HAL_TIM_PWM_Init(&htim5) != HAL_OK) 801e87a: 4817 ldr r0, [pc, #92] @ (801e8d8 ) 801e87c: f007 fad3 bl 8025e26 801e880: 4603 mov r3, r0 801e882: 2b00 cmp r3, #0 801e884: d001 beq.n 801e88a { Error_Handler(); 801e886: f7fb fa34 bl 8019cf2 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 801e88a: 2300 movs r3, #0 801e88c: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 801e88e: 2300 movs r3, #0 801e890: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK) 801e892: f107 0320 add.w r3, r7, #32 801e896: 4619 mov r1, r3 801e898: 480f ldr r0, [pc, #60] @ (801e8d8 ) 801e89a: f008 fd5b bl 8027354 801e89e: 4603 mov r3, r0 801e8a0: 2b00 cmp r3, #0 801e8a2: d001 beq.n 801e8a8 { Error_Handler(); 801e8a4: f7fb fa25 bl 8019cf2 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 801e8a8: 2360 movs r3, #96 @ 0x60 801e8aa: 607b str r3, [r7, #4] sConfigOC.Pulse = 1; 801e8ac: 2301 movs r3, #1 801e8ae: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 801e8b0: 2300 movs r3, #0 801e8b2: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 801e8b4: 2300 movs r3, #0 801e8b6: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 801e8b8: 1d3b adds r3, r7, #4 801e8ba: 2200 movs r2, #0 801e8bc: 4619 mov r1, r3 801e8be: 4806 ldr r0, [pc, #24] @ (801e8d8 ) 801e8c0: f007 ffb2 bl 8026828 801e8c4: 4603 mov r3, r0 801e8c6: 2b00 cmp r3, #0 801e8c8: d001 beq.n 801e8ce { Error_Handler(); 801e8ca: f7fb fa12 bl 8019cf2 } /* USER CODE BEGIN TIM5_Init 2 */ /* USER CODE END TIM5_Init 2 */ } 801e8ce: bf00 nop 801e8d0: 3728 adds r7, #40 @ 0x28 801e8d2: 46bd mov sp, r7 801e8d4: bd80 pop {r7, pc} 801e8d6: bf00 nop 801e8d8: 20000e40 .word 0x20000e40 801e8dc: 40000c00 .word 0x40000c00 801e8e0: 00015f8f .word 0x00015f8f 0801e8e4 : /* TIM8 init function */ void MX_TIM8_Init(void) { 801e8e4: b580 push {r7, lr} 801e8e6: b096 sub sp, #88 @ 0x58 801e8e8: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_Init 0 */ /* USER CODE END TIM8_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 801e8ea: f107 0348 add.w r3, r7, #72 @ 0x48 801e8ee: 2200 movs r2, #0 801e8f0: 601a str r2, [r3, #0] 801e8f2: 605a str r2, [r3, #4] 801e8f4: 609a str r2, [r3, #8] 801e8f6: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 801e8f8: f107 0340 add.w r3, r7, #64 @ 0x40 801e8fc: 2200 movs r2, #0 801e8fe: 601a str r2, [r3, #0] 801e900: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 801e902: f107 0324 add.w r3, r7, #36 @ 0x24 801e906: 2200 movs r2, #0 801e908: 601a str r2, [r3, #0] 801e90a: 605a str r2, [r3, #4] 801e90c: 609a str r2, [r3, #8] 801e90e: 60da str r2, [r3, #12] 801e910: 611a str r2, [r3, #16] 801e912: 615a str r2, [r3, #20] 801e914: 619a str r2, [r3, #24] TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; 801e916: 1d3b adds r3, r7, #4 801e918: 2220 movs r2, #32 801e91a: 2100 movs r1, #0 801e91c: 4618 mov r0, r3 801e91e: f009 fd89 bl 8028434 /* USER CODE BEGIN TIM8_Init 1 */ /* USER CODE END TIM8_Init 1 */ htim8.Instance = TIM8; 801e922: 4b4b ldr r3, [pc, #300] @ (801ea50 ) 801e924: 4a4b ldr r2, [pc, #300] @ (801ea54 ) 801e926: 601a str r2, [r3, #0] htim8.Init.Prescaler = 0; 801e928: 4b49 ldr r3, [pc, #292] @ (801ea50 ) 801e92a: 2200 movs r2, #0 801e92c: 605a str r2, [r3, #4] htim8.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED3; 801e92e: 4b48 ldr r3, [pc, #288] @ (801ea50 ) 801e930: 2260 movs r2, #96 @ 0x60 801e932: 609a str r2, [r3, #8] htim8.Init.Period = TIM_PERIOD; 801e934: 4b46 ldr r3, [pc, #280] @ (801ea50 ) 801e936: f242 3227 movw r2, #8999 @ 0x2327 801e93a: 60da str r2, [r3, #12] htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 801e93c: 4b44 ldr r3, [pc, #272] @ (801ea50 ) 801e93e: 2200 movs r2, #0 801e940: 611a str r2, [r3, #16] htim8.Init.RepetitionCounter = 1; 801e942: 4b43 ldr r3, [pc, #268] @ (801ea50 ) 801e944: 2201 movs r2, #1 801e946: 615a str r2, [r3, #20] htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 801e948: 4b41 ldr r3, [pc, #260] @ (801ea50 ) 801e94a: 2200 movs r2, #0 801e94c: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim8) != HAL_OK) 801e94e: 4840 ldr r0, [pc, #256] @ (801ea50 ) 801e950: f007 fa1a bl 8025d88 801e954: 4603 mov r3, r0 801e956: 2b00 cmp r3, #0 801e958: d001 beq.n 801e95e { Error_Handler(); 801e95a: f7fb f9ca bl 8019cf2 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 801e95e: f44f 5380 mov.w r3, #4096 @ 0x1000 801e962: 64bb str r3, [r7, #72] @ 0x48 if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) 801e964: f107 0348 add.w r3, r7, #72 @ 0x48 801e968: 4619 mov r1, r3 801e96a: 4839 ldr r0, [pc, #228] @ (801ea50 ) 801e96c: f008 f81e bl 80269ac 801e970: 4603 mov r3, r0 801e972: 2b00 cmp r3, #0 801e974: d001 beq.n 801e97a { Error_Handler(); 801e976: f7fb f9bc bl 8019cf2 } if (HAL_TIM_PWM_Init(&htim8) != HAL_OK) 801e97a: 4835 ldr r0, [pc, #212] @ (801ea50 ) 801e97c: f007 fa53 bl 8025e26 801e980: 4603 mov r3, r0 801e982: 2b00 cmp r3, #0 801e984: d001 beq.n 801e98a { Error_Handler(); 801e986: f7fb f9b4 bl 8019cf2 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; 801e98a: 2320 movs r3, #32 801e98c: 643b str r3, [r7, #64] @ 0x40 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; 801e98e: 2380 movs r3, #128 @ 0x80 801e990: 647b str r3, [r7, #68] @ 0x44 if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) 801e992: f107 0340 add.w r3, r7, #64 @ 0x40 801e996: 4619 mov r1, r3 801e998: 482d ldr r0, [pc, #180] @ (801ea50 ) 801e99a: f008 fcdb bl 8027354 801e99e: 4603 mov r3, r0 801e9a0: 2b00 cmp r3, #0 801e9a2: d001 beq.n 801e9a8 { Error_Handler(); 801e9a4: f7fb f9a5 bl 8019cf2 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 801e9a8: 2360 movs r3, #96 @ 0x60 801e9aa: 627b str r3, [r7, #36] @ 0x24 sConfigOC.Pulse = 0; 801e9ac: 2300 movs r3, #0 801e9ae: 62bb str r3, [r7, #40] @ 0x28 sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 801e9b0: 2300 movs r3, #0 801e9b2: 62fb str r3, [r7, #44] @ 0x2c sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; 801e9b4: 2300 movs r3, #0 801e9b6: 633b str r3, [r7, #48] @ 0x30 sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 801e9b8: 2300 movs r3, #0 801e9ba: 637b str r3, [r7, #52] @ 0x34 sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; 801e9bc: 2300 movs r3, #0 801e9be: 63bb str r3, [r7, #56] @ 0x38 sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; 801e9c0: 2300 movs r3, #0 801e9c2: 63fb str r3, [r7, #60] @ 0x3c if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 801e9c4: f107 0324 add.w r3, r7, #36 @ 0x24 801e9c8: 2200 movs r2, #0 801e9ca: 4619 mov r1, r3 801e9cc: 4820 ldr r0, [pc, #128] @ (801ea50 ) 801e9ce: f007 ff2b bl 8026828 801e9d2: 4603 mov r3, r0 801e9d4: 2b00 cmp r3, #0 801e9d6: d001 beq.n 801e9dc { Error_Handler(); 801e9d8: f7fb f98b bl 8019cf2 } if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 801e9dc: f107 0324 add.w r3, r7, #36 @ 0x24 801e9e0: 2204 movs r2, #4 801e9e2: 4619 mov r1, r3 801e9e4: 481a ldr r0, [pc, #104] @ (801ea50 ) 801e9e6: f007 ff1f bl 8026828 801e9ea: 4603 mov r3, r0 801e9ec: 2b00 cmp r3, #0 801e9ee: d001 beq.n 801e9f4 { Error_Handler(); 801e9f0: f7fb f97f bl 8019cf2 } if (HAL_TIM_PWM_ConfigChannel(&htim8, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 801e9f4: f107 0324 add.w r3, r7, #36 @ 0x24 801e9f8: 2208 movs r2, #8 801e9fa: 4619 mov r1, r3 801e9fc: 4814 ldr r0, [pc, #80] @ (801ea50 ) 801e9fe: f007 ff13 bl 8026828 801ea02: 4603 mov r3, r0 801ea04: 2b00 cmp r3, #0 801ea06: d001 beq.n 801ea0c { Error_Handler(); 801ea08: f7fb f973 bl 8019cf2 } sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_ENABLE; 801ea0c: f44f 6300 mov.w r3, #2048 @ 0x800 801ea10: 607b str r3, [r7, #4] sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_ENABLE; 801ea12: f44f 6380 mov.w r3, #1024 @ 0x400 801ea16: 60bb str r3, [r7, #8] sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; 801ea18: 2300 movs r3, #0 801ea1a: 60fb str r3, [r7, #12] sBreakDeadTimeConfig.DeadTime = TIM_DEAD; 801ea1c: 236b movs r3, #107 @ 0x6b 801ea1e: 613b str r3, [r7, #16] sBreakDeadTimeConfig.BreakState = TIM_BREAK_ENABLE; 801ea20: f44f 5380 mov.w r3, #4096 @ 0x1000 801ea24: 617b str r3, [r7, #20] sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_LOW; 801ea26: 2300 movs r3, #0 801ea28: 61bb str r3, [r7, #24] sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; 801ea2a: 2300 movs r3, #0 801ea2c: 623b str r3, [r7, #32] if (HAL_TIMEx_ConfigBreakDeadTime(&htim8, &sBreakDeadTimeConfig) != HAL_OK) 801ea2e: 1d3b adds r3, r7, #4 801ea30: 4619 mov r1, r3 801ea32: 4807 ldr r0, [pc, #28] @ (801ea50 ) 801ea34: f008 fd0a bl 802744c 801ea38: 4603 mov r3, r0 801ea3a: 2b00 cmp r3, #0 801ea3c: d001 beq.n 801ea42 { Error_Handler(); 801ea3e: f7fb f958 bl 8019cf2 } /* USER CODE BEGIN TIM8_Init 2 */ /* USER CODE END TIM8_Init 2 */ HAL_TIM_MspPostInit(&htim8); 801ea42: 4803 ldr r0, [pc, #12] @ (801ea50 ) 801ea44: f000 f9d2 bl 801edec } 801ea48: bf00 nop 801ea4a: 3758 adds r7, #88 @ 0x58 801ea4c: 46bd mov sp, r7 801ea4e: bd80 pop {r7, pc} 801ea50: 20000e88 .word 0x20000e88 801ea54: 40010400 .word 0x40010400 0801ea58 : /* TIM9 init function */ void MX_TIM9_Init(void) { 801ea58: b580 push {r7, lr} 801ea5a: b088 sub sp, #32 801ea5c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM9_Init 0 */ /* USER CODE END TIM9_Init 0 */ TIM_OC_InitTypeDef sConfigOC = {0}; 801ea5e: 1d3b adds r3, r7, #4 801ea60: 2200 movs r2, #0 801ea62: 601a str r2, [r3, #0] 801ea64: 605a str r2, [r3, #4] 801ea66: 609a str r2, [r3, #8] 801ea68: 60da str r2, [r3, #12] 801ea6a: 611a str r2, [r3, #16] 801ea6c: 615a str r2, [r3, #20] 801ea6e: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM9_Init 1 */ /* USER CODE END TIM9_Init 1 */ htim9.Instance = TIM9; 801ea70: 4b1f ldr r3, [pc, #124] @ (801eaf0 ) 801ea72: 4a20 ldr r2, [pc, #128] @ (801eaf4 ) 801ea74: 601a str r2, [r3, #0] htim9.Init.Prescaler = 0; 801ea76: 4b1e ldr r3, [pc, #120] @ (801eaf0 ) 801ea78: 2200 movs r2, #0 801ea7a: 605a str r2, [r3, #4] htim9.Init.CounterMode = TIM_COUNTERMODE_UP; 801ea7c: 4b1c ldr r3, [pc, #112] @ (801eaf0 ) 801ea7e: 2200 movs r2, #0 801ea80: 609a str r2, [r3, #8] htim9.Init.Period = (2*TIM_PERIOD); 801ea82: 4b1b ldr r3, [pc, #108] @ (801eaf0 ) 801ea84: f244 624e movw r2, #17998 @ 0x464e 801ea88: 60da str r2, [r3, #12] htim9.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 801ea8a: 4b19 ldr r3, [pc, #100] @ (801eaf0 ) 801ea8c: 2200 movs r2, #0 801ea8e: 611a str r2, [r3, #16] htim9.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 801ea90: 4b17 ldr r3, [pc, #92] @ (801eaf0 ) 801ea92: 2200 movs r2, #0 801ea94: 619a str r2, [r3, #24] if (HAL_TIM_PWM_Init(&htim9) != HAL_OK) 801ea96: 4816 ldr r0, [pc, #88] @ (801eaf0 ) 801ea98: f007 f9c5 bl 8025e26 801ea9c: 4603 mov r3, r0 801ea9e: 2b00 cmp r3, #0 801eaa0: d001 beq.n 801eaa6 { Error_Handler(); 801eaa2: f7fb f926 bl 8019cf2 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 801eaa6: 2360 movs r3, #96 @ 0x60 801eaa8: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 801eaaa: 2300 movs r3, #0 801eaac: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 801eaae: 2300 movs r3, #0 801eab0: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 801eab2: 2300 movs r3, #0 801eab4: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim9, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 801eab6: 1d3b adds r3, r7, #4 801eab8: 2200 movs r2, #0 801eaba: 4619 mov r1, r3 801eabc: 480c ldr r0, [pc, #48] @ (801eaf0 ) 801eabe: f007 feb3 bl 8026828 801eac2: 4603 mov r3, r0 801eac4: 2b00 cmp r3, #0 801eac6: d001 beq.n 801eacc { Error_Handler(); 801eac8: f7fb f913 bl 8019cf2 } if (HAL_TIM_PWM_ConfigChannel(&htim9, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 801eacc: 1d3b adds r3, r7, #4 801eace: 2204 movs r2, #4 801ead0: 4619 mov r1, r3 801ead2: 4807 ldr r0, [pc, #28] @ (801eaf0 ) 801ead4: f007 fea8 bl 8026828 801ead8: 4603 mov r3, r0 801eada: 2b00 cmp r3, #0 801eadc: d001 beq.n 801eae2 { Error_Handler(); 801eade: f7fb f908 bl 8019cf2 } /* USER CODE BEGIN TIM9_Init 2 */ /* USER CODE END TIM9_Init 2 */ HAL_TIM_MspPostInit(&htim9); 801eae2: 4803 ldr r0, [pc, #12] @ (801eaf0 ) 801eae4: f000 f982 bl 801edec } 801eae8: bf00 nop 801eaea: 3720 adds r7, #32 801eaec: 46bd mov sp, r7 801eaee: bd80 pop {r7, pc} 801eaf0: 20000ed0 .word 0x20000ed0 801eaf4: 40014000 .word 0x40014000 0801eaf8 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { 801eaf8: b580 push {r7, lr} 801eafa: b08c sub sp, #48 @ 0x30 801eafc: af00 add r7, sp, #0 801eafe: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 801eb00: f107 031c add.w r3, r7, #28 801eb04: 2200 movs r2, #0 801eb06: 601a str r2, [r3, #0] 801eb08: 605a str r2, [r3, #4] 801eb0a: 609a str r2, [r3, #8] 801eb0c: 60da str r2, [r3, #12] 801eb0e: 611a str r2, [r3, #16] if(tim_baseHandle->Instance==TIM1) 801eb10: 687b ldr r3, [r7, #4] 801eb12: 681b ldr r3, [r3, #0] 801eb14: 4a4a ldr r2, [pc, #296] @ (801ec40 ) 801eb16: 4293 cmp r3, r2 801eb18: d145 bne.n 801eba6 { /* USER CODE BEGIN TIM1_MspInit 0 */ /* USER CODE END TIM1_MspInit 0 */ /* TIM1 clock enable */ __HAL_RCC_TIM1_CLK_ENABLE(); 801eb1a: 2300 movs r3, #0 801eb1c: 61bb str r3, [r7, #24] 801eb1e: 4b49 ldr r3, [pc, #292] @ (801ec44 ) 801eb20: 6c5b ldr r3, [r3, #68] @ 0x44 801eb22: 4a48 ldr r2, [pc, #288] @ (801ec44 ) 801eb24: f043 0301 orr.w r3, r3, #1 801eb28: 6453 str r3, [r2, #68] @ 0x44 801eb2a: 4b46 ldr r3, [pc, #280] @ (801ec44 ) 801eb2c: 6c5b ldr r3, [r3, #68] @ 0x44 801eb2e: f003 0301 and.w r3, r3, #1 801eb32: 61bb str r3, [r7, #24] 801eb34: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOE_CLK_ENABLE(); 801eb36: 2300 movs r3, #0 801eb38: 617b str r3, [r7, #20] 801eb3a: 4b42 ldr r3, [pc, #264] @ (801ec44 ) 801eb3c: 6b1b ldr r3, [r3, #48] @ 0x30 801eb3e: 4a41 ldr r2, [pc, #260] @ (801ec44 ) 801eb40: f043 0310 orr.w r3, r3, #16 801eb44: 6313 str r3, [r2, #48] @ 0x30 801eb46: 4b3f ldr r3, [pc, #252] @ (801ec44 ) 801eb48: 6b1b ldr r3, [r3, #48] @ 0x30 801eb4a: f003 0310 and.w r3, r3, #16 801eb4e: 617b str r3, [r7, #20] 801eb50: 697b ldr r3, [r7, #20] /**TIM1 GPIO Configuration PE15 ------> TIM1_BKIN */ GPIO_InitStruct.Pin = GPIO_PIN_15; 801eb52: f44f 4300 mov.w r3, #32768 @ 0x8000 801eb56: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801eb58: 2302 movs r3, #2 801eb5a: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_PULLUP; 801eb5c: 2301 movs r3, #1 801eb5e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801eb60: 2300 movs r3, #0 801eb62: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF1_TIM1; 801eb64: 2301 movs r3, #1 801eb66: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 801eb68: f107 031c add.w r3, r7, #28 801eb6c: 4619 mov r1, r3 801eb6e: 4836 ldr r0, [pc, #216] @ (801ec48 ) 801eb70: f003 fd92 bl 8022698 /* TIM1 interrupt Init */ HAL_NVIC_SetPriority(TIM1_BRK_TIM9_IRQn, 0, 0); 801eb74: 2200 movs r2, #0 801eb76: 2100 movs r1, #0 801eb78: 2018 movs r0, #24 801eb7a: f002 fd08 bl 802158e HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn); 801eb7e: 2018 movs r0, #24 801eb80: f002 fd21 bl 80215c6 HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 0, 0); 801eb84: 2200 movs r2, #0 801eb86: 2100 movs r1, #0 801eb88: 2019 movs r0, #25 801eb8a: f002 fd00 bl 802158e HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); 801eb8e: 2019 movs r0, #25 801eb90: f002 fd19 bl 80215c6 HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, 0, 0); 801eb94: 2200 movs r2, #0 801eb96: 2100 movs r1, #0 801eb98: 201a movs r0, #26 801eb9a: f002 fcf8 bl 802158e HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn); 801eb9e: 201a movs r0, #26 801eba0: f002 fd11 bl 80215c6 HAL_NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn); /* USER CODE BEGIN TIM8_MspInit 1 */ /* USER CODE END TIM8_MspInit 1 */ } } 801eba4: e048 b.n 801ec38 else if(tim_baseHandle->Instance==TIM8) 801eba6: 687b ldr r3, [r7, #4] 801eba8: 681b ldr r3, [r3, #0] 801ebaa: 4a28 ldr r2, [pc, #160] @ (801ec4c ) 801ebac: 4293 cmp r3, r2 801ebae: d143 bne.n 801ec38 __HAL_RCC_TIM8_CLK_ENABLE(); 801ebb0: 2300 movs r3, #0 801ebb2: 613b str r3, [r7, #16] 801ebb4: 4b23 ldr r3, [pc, #140] @ (801ec44 ) 801ebb6: 6c5b ldr r3, [r3, #68] @ 0x44 801ebb8: 4a22 ldr r2, [pc, #136] @ (801ec44 ) 801ebba: f043 0302 orr.w r3, r3, #2 801ebbe: 6453 str r3, [r2, #68] @ 0x44 801ebc0: 4b20 ldr r3, [pc, #128] @ (801ec44 ) 801ebc2: 6c5b ldr r3, [r3, #68] @ 0x44 801ebc4: f003 0302 and.w r3, r3, #2 801ebc8: 613b str r3, [r7, #16] 801ebca: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 801ebcc: 2300 movs r3, #0 801ebce: 60fb str r3, [r7, #12] 801ebd0: 4b1c ldr r3, [pc, #112] @ (801ec44 ) 801ebd2: 6b1b ldr r3, [r3, #48] @ 0x30 801ebd4: 4a1b ldr r2, [pc, #108] @ (801ec44 ) 801ebd6: f043 0301 orr.w r3, r3, #1 801ebda: 6313 str r3, [r2, #48] @ 0x30 801ebdc: 4b19 ldr r3, [pc, #100] @ (801ec44 ) 801ebde: 6b1b ldr r3, [r3, #48] @ 0x30 801ebe0: f003 0301 and.w r3, r3, #1 801ebe4: 60fb str r3, [r7, #12] 801ebe6: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_6; 801ebe8: 2340 movs r3, #64 @ 0x40 801ebea: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ebec: 2302 movs r3, #2 801ebee: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_PULLUP; 801ebf0: 2301 movs r3, #1 801ebf2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ebf4: 2300 movs r3, #0 801ebf6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF3_TIM8; 801ebf8: 2303 movs r3, #3 801ebfa: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 801ebfc: f107 031c add.w r3, r7, #28 801ec00: 4619 mov r1, r3 801ec02: 4813 ldr r0, [pc, #76] @ (801ec50 ) 801ec04: f003 fd48 bl 8022698 HAL_NVIC_SetPriority(TIM8_BRK_TIM12_IRQn, 0, 0); 801ec08: 2200 movs r2, #0 801ec0a: 2100 movs r1, #0 801ec0c: 202b movs r0, #43 @ 0x2b 801ec0e: f002 fcbe bl 802158e HAL_NVIC_EnableIRQ(TIM8_BRK_TIM12_IRQn); 801ec12: 202b movs r0, #43 @ 0x2b 801ec14: f002 fcd7 bl 80215c6 HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0); 801ec18: 2200 movs r2, #0 801ec1a: 2100 movs r1, #0 801ec1c: 202c movs r0, #44 @ 0x2c 801ec1e: f002 fcb6 bl 802158e HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn); 801ec22: 202c movs r0, #44 @ 0x2c 801ec24: f002 fccf bl 80215c6 HAL_NVIC_SetPriority(TIM8_TRG_COM_TIM14_IRQn, 0, 0); 801ec28: 2200 movs r2, #0 801ec2a: 2100 movs r1, #0 801ec2c: 202d movs r0, #45 @ 0x2d 801ec2e: f002 fcae bl 802158e HAL_NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn); 801ec32: 202d movs r0, #45 @ 0x2d 801ec34: f002 fcc7 bl 80215c6 } 801ec38: bf00 nop 801ec3a: 3730 adds r7, #48 @ 0x30 801ec3c: 46bd mov sp, r7 801ec3e: bd80 pop {r7, pc} 801ec40: 40010000 .word 0x40010000 801ec44: 40023800 .word 0x40023800 801ec48: 40021000 .word 0x40021000 801ec4c: 40010400 .word 0x40010400 801ec50: 40020000 .word 0x40020000 0801ec54 : void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* tim_encoderHandle) { 801ec54: b580 push {r7, lr} 801ec56: b08c sub sp, #48 @ 0x30 801ec58: af00 add r7, sp, #0 801ec5a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 801ec5c: f107 031c add.w r3, r7, #28 801ec60: 2200 movs r2, #0 801ec62: 601a str r2, [r3, #0] 801ec64: 605a str r2, [r3, #4] 801ec66: 609a str r2, [r3, #8] 801ec68: 60da str r2, [r3, #12] 801ec6a: 611a str r2, [r3, #16] if(tim_encoderHandle->Instance==TIM2) 801ec6c: 687b ldr r3, [r7, #4] 801ec6e: 681b ldr r3, [r3, #0] 801ec70: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 801ec74: d135 bne.n 801ece2 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* TIM2 clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 801ec76: 2300 movs r3, #0 801ec78: 61bb str r3, [r7, #24] 801ec7a: 4b39 ldr r3, [pc, #228] @ (801ed60 ) 801ec7c: 6c1b ldr r3, [r3, #64] @ 0x40 801ec7e: 4a38 ldr r2, [pc, #224] @ (801ed60 ) 801ec80: f043 0301 orr.w r3, r3, #1 801ec84: 6413 str r3, [r2, #64] @ 0x40 801ec86: 4b36 ldr r3, [pc, #216] @ (801ed60 ) 801ec88: 6c1b ldr r3, [r3, #64] @ 0x40 801ec8a: f003 0301 and.w r3, r3, #1 801ec8e: 61bb str r3, [r7, #24] 801ec90: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); 801ec92: 2300 movs r3, #0 801ec94: 617b str r3, [r7, #20] 801ec96: 4b32 ldr r3, [pc, #200] @ (801ed60 ) 801ec98: 6b1b ldr r3, [r3, #48] @ 0x30 801ec9a: 4a31 ldr r2, [pc, #196] @ (801ed60 ) 801ec9c: f043 0302 orr.w r3, r3, #2 801eca0: 6313 str r3, [r2, #48] @ 0x30 801eca2: 4b2f ldr r3, [pc, #188] @ (801ed60 ) 801eca4: 6b1b ldr r3, [r3, #48] @ 0x30 801eca6: f003 0302 and.w r3, r3, #2 801ecaa: 617b str r3, [r7, #20] 801ecac: 697b ldr r3, [r7, #20] /**TIM2 GPIO Configuration PB8 ------> TIM2_CH1 PB9 ------> TIM2_CH2 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 801ecae: f44f 7340 mov.w r3, #768 @ 0x300 801ecb2: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ecb4: 2302 movs r3, #2 801ecb6: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 801ecb8: 2300 movs r3, #0 801ecba: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ecbc: 2300 movs r3, #0 801ecbe: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 801ecc0: 2301 movs r3, #1 801ecc2: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 801ecc4: f107 031c add.w r3, r7, #28 801ecc8: 4619 mov r1, r3 801ecca: 4826 ldr r0, [pc, #152] @ (801ed64 ) 801eccc: f003 fce4 bl 8022698 /* TIM2 interrupt Init */ HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0); 801ecd0: 2200 movs r2, #0 801ecd2: 2100 movs r1, #0 801ecd4: 201c movs r0, #28 801ecd6: f002 fc5a bl 802158e HAL_NVIC_EnableIRQ(TIM2_IRQn); 801ecda: 201c movs r0, #28 801ecdc: f002 fc73 bl 80215c6 HAL_NVIC_EnableIRQ(TIM4_IRQn); /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 801ece0: e039 b.n 801ed56 else if(tim_encoderHandle->Instance==TIM4) 801ece2: 687b ldr r3, [r7, #4] 801ece4: 681b ldr r3, [r3, #0] 801ece6: 4a20 ldr r2, [pc, #128] @ (801ed68 ) 801ece8: 4293 cmp r3, r2 801ecea: d134 bne.n 801ed56 __HAL_RCC_TIM4_CLK_ENABLE(); 801ecec: 2300 movs r3, #0 801ecee: 613b str r3, [r7, #16] 801ecf0: 4b1b ldr r3, [pc, #108] @ (801ed60 ) 801ecf2: 6c1b ldr r3, [r3, #64] @ 0x40 801ecf4: 4a1a ldr r2, [pc, #104] @ (801ed60 ) 801ecf6: f043 0304 orr.w r3, r3, #4 801ecfa: 6413 str r3, [r2, #64] @ 0x40 801ecfc: 4b18 ldr r3, [pc, #96] @ (801ed60 ) 801ecfe: 6c1b ldr r3, [r3, #64] @ 0x40 801ed00: f003 0304 and.w r3, r3, #4 801ed04: 613b str r3, [r7, #16] 801ed06: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOD_CLK_ENABLE(); 801ed08: 2300 movs r3, #0 801ed0a: 60fb str r3, [r7, #12] 801ed0c: 4b14 ldr r3, [pc, #80] @ (801ed60 ) 801ed0e: 6b1b ldr r3, [r3, #48] @ 0x30 801ed10: 4a13 ldr r2, [pc, #76] @ (801ed60 ) 801ed12: f043 0308 orr.w r3, r3, #8 801ed16: 6313 str r3, [r2, #48] @ 0x30 801ed18: 4b11 ldr r3, [pc, #68] @ (801ed60 ) 801ed1a: 6b1b ldr r3, [r3, #48] @ 0x30 801ed1c: f003 0308 and.w r3, r3, #8 801ed20: 60fb str r3, [r7, #12] 801ed22: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13; 801ed24: f44f 5340 mov.w r3, #12288 @ 0x3000 801ed28: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ed2a: 2302 movs r3, #2 801ed2c: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 801ed2e: 2300 movs r3, #0 801ed30: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ed32: 2300 movs r3, #0 801ed34: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF2_TIM4; 801ed36: 2302 movs r3, #2 801ed38: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 801ed3a: f107 031c add.w r3, r7, #28 801ed3e: 4619 mov r1, r3 801ed40: 480a ldr r0, [pc, #40] @ (801ed6c ) 801ed42: f003 fca9 bl 8022698 HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0); 801ed46: 2200 movs r2, #0 801ed48: 2100 movs r1, #0 801ed4a: 201e movs r0, #30 801ed4c: f002 fc1f bl 802158e HAL_NVIC_EnableIRQ(TIM4_IRQn); 801ed50: 201e movs r0, #30 801ed52: f002 fc38 bl 80215c6 } 801ed56: bf00 nop 801ed58: 3730 adds r7, #48 @ 0x30 801ed5a: 46bd mov sp, r7 801ed5c: bd80 pop {r7, pc} 801ed5e: bf00 nop 801ed60: 40023800 .word 0x40023800 801ed64: 40020400 .word 0x40020400 801ed68: 40000800 .word 0x40000800 801ed6c: 40020c00 .word 0x40020c00 0801ed70 : void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle) { 801ed70: b580 push {r7, lr} 801ed72: b084 sub sp, #16 801ed74: af00 add r7, sp, #0 801ed76: 6078 str r0, [r7, #4] if(tim_pwmHandle->Instance==TIM5) 801ed78: 687b ldr r3, [r7, #4] 801ed7a: 681b ldr r3, [r3, #0] 801ed7c: 4a18 ldr r2, [pc, #96] @ (801ede0 ) 801ed7e: 4293 cmp r3, r2 801ed80: d10e bne.n 801eda0 { /* USER CODE BEGIN TIM5_MspInit 0 */ /* USER CODE END TIM5_MspInit 0 */ /* TIM5 clock enable */ __HAL_RCC_TIM5_CLK_ENABLE(); 801ed82: 2300 movs r3, #0 801ed84: 60fb str r3, [r7, #12] 801ed86: 4b17 ldr r3, [pc, #92] @ (801ede4 ) 801ed88: 6c1b ldr r3, [r3, #64] @ 0x40 801ed8a: 4a16 ldr r2, [pc, #88] @ (801ede4 ) 801ed8c: f043 0308 orr.w r3, r3, #8 801ed90: 6413 str r3, [r2, #64] @ 0x40 801ed92: 4b14 ldr r3, [pc, #80] @ (801ede4 ) 801ed94: 6c1b ldr r3, [r3, #64] @ 0x40 801ed96: f003 0308 and.w r3, r3, #8 801ed9a: 60fb str r3, [r7, #12] 801ed9c: 68fb ldr r3, [r7, #12] HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn); /* USER CODE BEGIN TIM9_MspInit 1 */ /* USER CODE END TIM9_MspInit 1 */ } } 801ed9e: e01a b.n 801edd6 else if(tim_pwmHandle->Instance==TIM9) 801eda0: 687b ldr r3, [r7, #4] 801eda2: 681b ldr r3, [r3, #0] 801eda4: 4a10 ldr r2, [pc, #64] @ (801ede8 ) 801eda6: 4293 cmp r3, r2 801eda8: d115 bne.n 801edd6 __HAL_RCC_TIM9_CLK_ENABLE(); 801edaa: 2300 movs r3, #0 801edac: 60bb str r3, [r7, #8] 801edae: 4b0d ldr r3, [pc, #52] @ (801ede4 ) 801edb0: 6c5b ldr r3, [r3, #68] @ 0x44 801edb2: 4a0c ldr r2, [pc, #48] @ (801ede4 ) 801edb4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 801edb8: 6453 str r3, [r2, #68] @ 0x44 801edba: 4b0a ldr r3, [pc, #40] @ (801ede4 ) 801edbc: 6c5b ldr r3, [r3, #68] @ 0x44 801edbe: f403 3380 and.w r3, r3, #65536 @ 0x10000 801edc2: 60bb str r3, [r7, #8] 801edc4: 68bb ldr r3, [r7, #8] HAL_NVIC_SetPriority(TIM1_BRK_TIM9_IRQn, 0, 0); 801edc6: 2200 movs r2, #0 801edc8: 2100 movs r1, #0 801edca: 2018 movs r0, #24 801edcc: f002 fbdf bl 802158e HAL_NVIC_EnableIRQ(TIM1_BRK_TIM9_IRQn); 801edd0: 2018 movs r0, #24 801edd2: f002 fbf8 bl 80215c6 } 801edd6: bf00 nop 801edd8: 3710 adds r7, #16 801edda: 46bd mov sp, r7 801eddc: bd80 pop {r7, pc} 801edde: bf00 nop 801ede0: 40000c00 .word 0x40000c00 801ede4: 40023800 .word 0x40023800 801ede8: 40014000 .word 0x40014000 0801edec : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) { 801edec: b580 push {r7, lr} 801edee: b08e sub sp, #56 @ 0x38 801edf0: af00 add r7, sp, #0 801edf2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 801edf4: f107 0324 add.w r3, r7, #36 @ 0x24 801edf8: 2200 movs r2, #0 801edfa: 601a str r2, [r3, #0] 801edfc: 605a str r2, [r3, #4] 801edfe: 609a str r2, [r3, #8] 801ee00: 60da str r2, [r3, #12] 801ee02: 611a str r2, [r3, #16] if(timHandle->Instance==TIM1) 801ee04: 687b ldr r3, [r7, #4] 801ee06: 681b ldr r3, [r3, #0] 801ee08: 4a65 ldr r2, [pc, #404] @ (801efa0 ) 801ee0a: 4293 cmp r3, r2 801ee0c: d13e bne.n 801ee8c { /* USER CODE BEGIN TIM1_MspPostInit 0 */ /* USER CODE END TIM1_MspPostInit 0 */ __HAL_RCC_GPIOE_CLK_ENABLE(); 801ee0e: 2300 movs r3, #0 801ee10: 623b str r3, [r7, #32] 801ee12: 4b64 ldr r3, [pc, #400] @ (801efa4 ) 801ee14: 6b1b ldr r3, [r3, #48] @ 0x30 801ee16: 4a63 ldr r2, [pc, #396] @ (801efa4 ) 801ee18: f043 0310 orr.w r3, r3, #16 801ee1c: 6313 str r3, [r2, #48] @ 0x30 801ee1e: 4b61 ldr r3, [pc, #388] @ (801efa4 ) 801ee20: 6b1b ldr r3, [r3, #48] @ 0x30 801ee22: f003 0310 and.w r3, r3, #16 801ee26: 623b str r3, [r7, #32] 801ee28: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOB_CLK_ENABLE(); 801ee2a: 2300 movs r3, #0 801ee2c: 61fb str r3, [r7, #28] 801ee2e: 4b5d ldr r3, [pc, #372] @ (801efa4 ) 801ee30: 6b1b ldr r3, [r3, #48] @ 0x30 801ee32: 4a5c ldr r2, [pc, #368] @ (801efa4 ) 801ee34: f043 0302 orr.w r3, r3, #2 801ee38: 6313 str r3, [r2, #48] @ 0x30 801ee3a: 4b5a ldr r3, [pc, #360] @ (801efa4 ) 801ee3c: 6b1b ldr r3, [r3, #48] @ 0x30 801ee3e: f003 0302 and.w r3, r3, #2 801ee42: 61fb str r3, [r7, #28] 801ee44: 69fb ldr r3, [r7, #28] PE11 ------> TIM1_CH2 PE12 ------> TIM1_CH3N PE13 ------> TIM1_CH3 PB13 ------> TIM1_CH1N */ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12 801ee46: f44f 5378 mov.w r3, #15872 @ 0x3e00 801ee4a: 627b str r3, [r7, #36] @ 0x24 |GPIO_PIN_13; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ee4c: 2302 movs r3, #2 801ee4e: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 801ee50: 2300 movs r3, #0 801ee52: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ee54: 2300 movs r3, #0 801ee56: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF1_TIM1; 801ee58: 2301 movs r3, #1 801ee5a: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 801ee5c: f107 0324 add.w r3, r7, #36 @ 0x24 801ee60: 4619 mov r1, r3 801ee62: 4851 ldr r0, [pc, #324] @ (801efa8 ) 801ee64: f003 fc18 bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_13; 801ee68: f44f 5300 mov.w r3, #8192 @ 0x2000 801ee6c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ee6e: 2302 movs r3, #2 801ee70: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 801ee72: 2300 movs r3, #0 801ee74: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ee76: 2300 movs r3, #0 801ee78: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF1_TIM1; 801ee7a: 2301 movs r3, #1 801ee7c: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 801ee7e: f107 0324 add.w r3, r7, #36 @ 0x24 801ee82: 4619 mov r1, r3 801ee84: 4849 ldr r0, [pc, #292] @ (801efac ) 801ee86: f003 fc07 bl 8022698 /* USER CODE BEGIN TIM9_MspPostInit 1 */ /* USER CODE END TIM9_MspPostInit 1 */ } } 801ee8a: e084 b.n 801ef96 else if(timHandle->Instance==TIM8) 801ee8c: 687b ldr r3, [r7, #4] 801ee8e: 681b ldr r3, [r3, #0] 801ee90: 4a47 ldr r2, [pc, #284] @ (801efb0 ) 801ee92: 4293 cmp r3, r2 801ee94: d15c bne.n 801ef50 __HAL_RCC_GPIOA_CLK_ENABLE(); 801ee96: 2300 movs r3, #0 801ee98: 61bb str r3, [r7, #24] 801ee9a: 4b42 ldr r3, [pc, #264] @ (801efa4 ) 801ee9c: 6b1b ldr r3, [r3, #48] @ 0x30 801ee9e: 4a41 ldr r2, [pc, #260] @ (801efa4 ) 801eea0: f043 0301 orr.w r3, r3, #1 801eea4: 6313 str r3, [r2, #48] @ 0x30 801eea6: 4b3f ldr r3, [pc, #252] @ (801efa4 ) 801eea8: 6b1b ldr r3, [r3, #48] @ 0x30 801eeaa: f003 0301 and.w r3, r3, #1 801eeae: 61bb str r3, [r7, #24] 801eeb0: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); 801eeb2: 2300 movs r3, #0 801eeb4: 617b str r3, [r7, #20] 801eeb6: 4b3b ldr r3, [pc, #236] @ (801efa4 ) 801eeb8: 6b1b ldr r3, [r3, #48] @ 0x30 801eeba: 4a3a ldr r2, [pc, #232] @ (801efa4 ) 801eebc: f043 0302 orr.w r3, r3, #2 801eec0: 6313 str r3, [r2, #48] @ 0x30 801eec2: 4b38 ldr r3, [pc, #224] @ (801efa4 ) 801eec4: 6b1b ldr r3, [r3, #48] @ 0x30 801eec6: f003 0302 and.w r3, r3, #2 801eeca: 617b str r3, [r7, #20] 801eecc: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOC_CLK_ENABLE(); 801eece: 2300 movs r3, #0 801eed0: 613b str r3, [r7, #16] 801eed2: 4b34 ldr r3, [pc, #208] @ (801efa4 ) 801eed4: 6b1b ldr r3, [r3, #48] @ 0x30 801eed6: 4a33 ldr r2, [pc, #204] @ (801efa4 ) 801eed8: f043 0304 orr.w r3, r3, #4 801eedc: 6313 str r3, [r2, #48] @ 0x30 801eede: 4b31 ldr r3, [pc, #196] @ (801efa4 ) 801eee0: 6b1b ldr r3, [r3, #48] @ 0x30 801eee2: f003 0304 and.w r3, r3, #4 801eee6: 613b str r3, [r7, #16] 801eee8: 693b ldr r3, [r7, #16] GPIO_InitStruct.Pin = GPIO_PIN_7; 801eeea: 2380 movs r3, #128 @ 0x80 801eeec: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801eeee: 2302 movs r3, #2 801eef0: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 801eef2: 2300 movs r3, #0 801eef4: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801eef6: 2300 movs r3, #0 801eef8: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF3_TIM8; 801eefa: 2303 movs r3, #3 801eefc: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 801eefe: f107 0324 add.w r3, r7, #36 @ 0x24 801ef02: 4619 mov r1, r3 801ef04: 482b ldr r0, [pc, #172] @ (801efb4 ) 801ef06: f003 fbc7 bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15; 801ef0a: f44f 4340 mov.w r3, #49152 @ 0xc000 801ef0e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ef10: 2302 movs r3, #2 801ef12: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 801ef14: 2300 movs r3, #0 801ef16: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ef18: 2300 movs r3, #0 801ef1a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF3_TIM8; 801ef1c: 2303 movs r3, #3 801ef1e: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 801ef20: f107 0324 add.w r3, r7, #36 @ 0x24 801ef24: 4619 mov r1, r3 801ef26: 4821 ldr r0, [pc, #132] @ (801efac ) 801ef28: f003 fbb6 bl 8022698 GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8; 801ef2c: f44f 73e0 mov.w r3, #448 @ 0x1c0 801ef30: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ef32: 2302 movs r3, #2 801ef34: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 801ef36: 2300 movs r3, #0 801ef38: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ef3a: 2300 movs r3, #0 801ef3c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF3_TIM8; 801ef3e: 2303 movs r3, #3 801ef40: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 801ef42: f107 0324 add.w r3, r7, #36 @ 0x24 801ef46: 4619 mov r1, r3 801ef48: 481b ldr r0, [pc, #108] @ (801efb8 ) 801ef4a: f003 fba5 bl 8022698 } 801ef4e: e022 b.n 801ef96 else if(timHandle->Instance==TIM9) 801ef50: 687b ldr r3, [r7, #4] 801ef52: 681b ldr r3, [r3, #0] 801ef54: 4a19 ldr r2, [pc, #100] @ (801efbc ) 801ef56: 4293 cmp r3, r2 801ef58: d11d bne.n 801ef96 __HAL_RCC_GPIOE_CLK_ENABLE(); 801ef5a: 2300 movs r3, #0 801ef5c: 60fb str r3, [r7, #12] 801ef5e: 4b11 ldr r3, [pc, #68] @ (801efa4 ) 801ef60: 6b1b ldr r3, [r3, #48] @ 0x30 801ef62: 4a10 ldr r2, [pc, #64] @ (801efa4 ) 801ef64: f043 0310 orr.w r3, r3, #16 801ef68: 6313 str r3, [r2, #48] @ 0x30 801ef6a: 4b0e ldr r3, [pc, #56] @ (801efa4 ) 801ef6c: 6b1b ldr r3, [r3, #48] @ 0x30 801ef6e: f003 0310 and.w r3, r3, #16 801ef72: 60fb str r3, [r7, #12] 801ef74: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; 801ef76: 2360 movs r3, #96 @ 0x60 801ef78: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801ef7a: 2302 movs r3, #2 801ef7c: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 801ef7e: 2300 movs r3, #0 801ef80: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 801ef82: 2300 movs r3, #0 801ef84: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF3_TIM9; 801ef86: 2303 movs r3, #3 801ef88: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 801ef8a: f107 0324 add.w r3, r7, #36 @ 0x24 801ef8e: 4619 mov r1, r3 801ef90: 4805 ldr r0, [pc, #20] @ (801efa8 ) 801ef92: f003 fb81 bl 8022698 } 801ef96: bf00 nop 801ef98: 3738 adds r7, #56 @ 0x38 801ef9a: 46bd mov sp, r7 801ef9c: bd80 pop {r7, pc} 801ef9e: bf00 nop 801efa0: 40010000 .word 0x40010000 801efa4: 40023800 .word 0x40023800 801efa8: 40021000 .word 0x40021000 801efac: 40020400 .word 0x40020400 801efb0: 40010400 .word 0x40010400 801efb4: 40020000 .word 0x40020000 801efb8: 40020800 .word 0x40020800 801efbc: 40014000 .word 0x40014000 0801efc0 : void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) { 801efc0: b580 push {r7, lr} 801efc2: b082 sub sp, #8 801efc4: af00 add r7, sp, #0 801efc6: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM1) 801efc8: 687b ldr r3, [r7, #4] 801efca: 681b ldr r3, [r3, #0] 801efcc: 4a21 ldr r2, [pc, #132] @ (801f054 ) 801efce: 4293 cmp r3, r2 801efd0: d119 bne.n 801f006 { /* USER CODE BEGIN TIM1_MspDeInit 0 */ /* USER CODE END TIM1_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM1_CLK_DISABLE(); 801efd2: 4b21 ldr r3, [pc, #132] @ (801f058 ) 801efd4: 6c5b ldr r3, [r3, #68] @ 0x44 801efd6: 4a20 ldr r2, [pc, #128] @ (801f058 ) 801efd8: f023 0301 bic.w r3, r3, #1 801efdc: 6453 str r3, [r2, #68] @ 0x44 PE12 ------> TIM1_CH3N PE13 ------> TIM1_CH3 PE15 ------> TIM1_BKIN PB13 ------> TIM1_CH1N */ HAL_GPIO_DeInit(GPIOE, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12 801efde: f44f 413e mov.w r1, #48640 @ 0xbe00 801efe2: 481e ldr r0, [pc, #120] @ (801f05c ) 801efe4: f003 fcec bl 80229c0 |GPIO_PIN_13|GPIO_PIN_15); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13); 801efe8: f44f 5100 mov.w r1, #8192 @ 0x2000 801efec: 481c ldr r0, [pc, #112] @ (801f060 ) 801efee: f003 fce7 bl 80229c0 /* USER CODE BEGIN TIM1:TIM1_BRK_TIM9_IRQn disable */ /** * Uncomment the line below to disable the "TIM1_BRK_TIM9_IRQn" interrupt * Be aware, disabling shared interrupt may affect other IPs */ HAL_NVIC_DisableIRQ(TIM1_BRK_TIM9_IRQn); 801eff2: 2018 movs r0, #24 801eff4: f002 faf5 bl 80215e2 /* USER CODE END TIM1:TIM1_BRK_TIM9_IRQn disable */ HAL_NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn); 801eff8: 2019 movs r0, #25 801effa: f002 faf2 bl 80215e2 HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM11_IRQn); 801effe: 201a movs r0, #26 801f000: f002 faef bl 80215e2 HAL_NVIC_DisableIRQ(TIM8_TRG_COM_TIM14_IRQn); /* USER CODE BEGIN TIM8_MspDeInit 1 */ /* USER CODE END TIM8_MspDeInit 1 */ } } 801f004: e021 b.n 801f04a else if(tim_baseHandle->Instance==TIM8) 801f006: 687b ldr r3, [r7, #4] 801f008: 681b ldr r3, [r3, #0] 801f00a: 4a16 ldr r2, [pc, #88] @ (801f064 ) 801f00c: 4293 cmp r3, r2 801f00e: d11c bne.n 801f04a __HAL_RCC_TIM8_CLK_DISABLE(); 801f010: 4b11 ldr r3, [pc, #68] @ (801f058 ) 801f012: 6c5b ldr r3, [r3, #68] @ 0x44 801f014: 4a10 ldr r2, [pc, #64] @ (801f058 ) 801f016: f023 0302 bic.w r3, r3, #2 801f01a: 6453 str r3, [r2, #68] @ 0x44 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_6|GPIO_PIN_7); 801f01c: 21c0 movs r1, #192 @ 0xc0 801f01e: 4812 ldr r0, [pc, #72] @ (801f068 ) 801f020: f003 fcce bl 80229c0 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14|GPIO_PIN_15); 801f024: f44f 4140 mov.w r1, #49152 @ 0xc000 801f028: 480d ldr r0, [pc, #52] @ (801f060 ) 801f02a: f003 fcc9 bl 80229c0 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8); 801f02e: f44f 71e0 mov.w r1, #448 @ 0x1c0 801f032: 480e ldr r0, [pc, #56] @ (801f06c ) 801f034: f003 fcc4 bl 80229c0 HAL_NVIC_DisableIRQ(TIM8_BRK_TIM12_IRQn); 801f038: 202b movs r0, #43 @ 0x2b 801f03a: f002 fad2 bl 80215e2 HAL_NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn); 801f03e: 202c movs r0, #44 @ 0x2c 801f040: f002 facf bl 80215e2 HAL_NVIC_DisableIRQ(TIM8_TRG_COM_TIM14_IRQn); 801f044: 202d movs r0, #45 @ 0x2d 801f046: f002 facc bl 80215e2 } 801f04a: bf00 nop 801f04c: 3708 adds r7, #8 801f04e: 46bd mov sp, r7 801f050: bd80 pop {r7, pc} 801f052: bf00 nop 801f054: 40010000 .word 0x40010000 801f058: 40023800 .word 0x40023800 801f05c: 40021000 .word 0x40021000 801f060: 40020400 .word 0x40020400 801f064: 40010400 .word 0x40010400 801f068: 40020000 .word 0x40020000 801f06c: 40020800 .word 0x40020800 0801f070 : void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef* tim_encoderHandle) { 801f070: b580 push {r7, lr} 801f072: b082 sub sp, #8 801f074: af00 add r7, sp, #0 801f076: 6078 str r0, [r7, #4] if(tim_encoderHandle->Instance==TIM2) 801f078: 687b ldr r3, [r7, #4] 801f07a: 681b ldr r3, [r3, #0] 801f07c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 801f080: d10e bne.n 801f0a0 { /* USER CODE BEGIN TIM2_MspDeInit 0 */ /* USER CODE END TIM2_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM2_CLK_DISABLE(); 801f082: 4b13 ldr r3, [pc, #76] @ (801f0d0 ) 801f084: 6c1b ldr r3, [r3, #64] @ 0x40 801f086: 4a12 ldr r2, [pc, #72] @ (801f0d0 ) 801f088: f023 0301 bic.w r3, r3, #1 801f08c: 6413 str r3, [r2, #64] @ 0x40 /**TIM2 GPIO Configuration PB8 ------> TIM2_CH1 PB9 ------> TIM2_CH2 */ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9); 801f08e: f44f 7140 mov.w r1, #768 @ 0x300 801f092: 4810 ldr r0, [pc, #64] @ (801f0d4 ) 801f094: f003 fc94 bl 80229c0 /* TIM2 interrupt Deinit */ HAL_NVIC_DisableIRQ(TIM2_IRQn); 801f098: 201c movs r0, #28 801f09a: f002 faa2 bl 80215e2 HAL_NVIC_DisableIRQ(TIM4_IRQn); /* USER CODE BEGIN TIM4_MspDeInit 1 */ /* USER CODE END TIM4_MspDeInit 1 */ } } 801f09e: e012 b.n 801f0c6 else if(tim_encoderHandle->Instance==TIM4) 801f0a0: 687b ldr r3, [r7, #4] 801f0a2: 681b ldr r3, [r3, #0] 801f0a4: 4a0c ldr r2, [pc, #48] @ (801f0d8 ) 801f0a6: 4293 cmp r3, r2 801f0a8: d10d bne.n 801f0c6 __HAL_RCC_TIM4_CLK_DISABLE(); 801f0aa: 4b09 ldr r3, [pc, #36] @ (801f0d0 ) 801f0ac: 6c1b ldr r3, [r3, #64] @ 0x40 801f0ae: 4a08 ldr r2, [pc, #32] @ (801f0d0 ) 801f0b0: f023 0304 bic.w r3, r3, #4 801f0b4: 6413 str r3, [r2, #64] @ 0x40 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_12|GPIO_PIN_13); 801f0b6: f44f 5140 mov.w r1, #12288 @ 0x3000 801f0ba: 4808 ldr r0, [pc, #32] @ (801f0dc ) 801f0bc: f003 fc80 bl 80229c0 HAL_NVIC_DisableIRQ(TIM4_IRQn); 801f0c0: 201e movs r0, #30 801f0c2: f002 fa8e bl 80215e2 } 801f0c6: bf00 nop 801f0c8: 3708 adds r7, #8 801f0ca: 46bd mov sp, r7 801f0cc: bd80 pop {r7, pc} 801f0ce: bf00 nop 801f0d0: 40023800 .word 0x40023800 801f0d4: 40020400 .word 0x40020400 801f0d8: 40000800 .word 0x40000800 801f0dc: 40020c00 .word 0x40020c00 0801f0e0 : void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle) { 801f0e0: b580 push {r7, lr} 801f0e2: b082 sub sp, #8 801f0e4: af00 add r7, sp, #0 801f0e6: 6078 str r0, [r7, #4] if(tim_pwmHandle->Instance==TIM5) 801f0e8: 687b ldr r3, [r7, #4] 801f0ea: 681b ldr r3, [r3, #0] 801f0ec: 4a0d ldr r2, [pc, #52] @ (801f124 ) 801f0ee: 4293 cmp r3, r2 801f0f0: d106 bne.n 801f100 { /* USER CODE BEGIN TIM5_MspDeInit 0 */ /* USER CODE END TIM5_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM5_CLK_DISABLE(); 801f0f2: 4b0d ldr r3, [pc, #52] @ (801f128 ) 801f0f4: 6c1b ldr r3, [r3, #64] @ 0x40 801f0f6: 4a0c ldr r2, [pc, #48] @ (801f128 ) 801f0f8: f023 0308 bic.w r3, r3, #8 801f0fc: 6413 str r3, [r2, #64] @ 0x40 /* USER CODE BEGIN TIM9_MspDeInit 1 */ /* USER CODE END TIM9_MspDeInit 1 */ } } 801f0fe: e00d b.n 801f11c else if(tim_pwmHandle->Instance==TIM9) 801f100: 687b ldr r3, [r7, #4] 801f102: 681b ldr r3, [r3, #0] 801f104: 4a09 ldr r2, [pc, #36] @ (801f12c ) 801f106: 4293 cmp r3, r2 801f108: d108 bne.n 801f11c __HAL_RCC_TIM9_CLK_DISABLE(); 801f10a: 4b07 ldr r3, [pc, #28] @ (801f128 ) 801f10c: 6c5b ldr r3, [r3, #68] @ 0x44 801f10e: 4a06 ldr r2, [pc, #24] @ (801f128 ) 801f110: f423 3380 bic.w r3, r3, #65536 @ 0x10000 801f114: 6453 str r3, [r2, #68] @ 0x44 HAL_NVIC_DisableIRQ(TIM1_BRK_TIM9_IRQn); 801f116: 2018 movs r0, #24 801f118: f002 fa63 bl 80215e2 } 801f11c: bf00 nop 801f11e: 3708 adds r7, #8 801f120: 46bd mov sp, r7 801f122: bd80 pop {r7, pc} 801f124: 40000c00 .word 0x40000c00 801f128: 40023800 .word 0x40023800 801f12c: 40014000 .word 0x40014000 0801f130 : //#define TIM9_PERIOD (36000-1) // 수행시간 감소에 도움될까? (2/27) #define TIM9_PERIOD (18000-1) // 이게 10kHz임 //#define TIM9_PERIOD (9000-1) //#define TIM9_PERIOD (4500-1) void Regen_Resistor_Init(void) { 801f130: b580 push {r7, lr} 801f132: af00 add r7, sp, #0 TIM9_SetCompare(TIM_CHANNEL_1, 0); 801f134: 4b09 ldr r3, [pc, #36] @ (801f15c ) 801f136: 681b ldr r3, [r3, #0] 801f138: 2200 movs r2, #0 801f13a: 635a str r2, [r3, #52] @ 0x34 TIM9_SetAutoreload(TIM9_PERIOD); //10KHz 801f13c: 4b07 ldr r3, [pc, #28] @ (801f15c ) 801f13e: 681b ldr r3, [r3, #0] 801f140: f244 624f movw r2, #17999 @ 0x464f 801f144: 62da str r2, [r3, #44] @ 0x2c 801f146: 4b05 ldr r3, [pc, #20] @ (801f15c ) 801f148: f244 624f movw r2, #17999 @ 0x464f 801f14c: 60da str r2, [r3, #12] TIM9_PWM_Start_IT(TIM_CHANNEL_1); //include TIM9_Start() 801f14e: 2100 movs r1, #0 801f150: 4802 ldr r0, [pc, #8] @ (801f15c ) 801f152: f006 ffd3 bl 80260fc } 801f156: bf00 nop 801f158: bd80 pop {r7, pc} 801f15a: bf00 nop 801f15c: 20000ed0 .word 0x20000ed0 0801f160 : // TIM9_SetCompare(TIM_CHANNEL_1, pwm); //} ///somebp 2024.02.02 void Regen_Resistor_Control_HSW(void) { 801f160: b580 push {r7, lr} 801f162: af00 add r7, sp, #0 // 0. 실제 값은 항상 모니터 WP_RegenR.Vdc_raw = Inv.Ctrl.Vdc; 801f164: 4b87 ldr r3, [pc, #540] @ (801f384 ) 801f166: 681b ldr r3, [r3, #0] 801f168: 4a87 ldr r2, [pc, #540] @ (801f388 ) 801f16a: 6253 str r3, [r2, #36] @ 0x24 WP_RegenR.Idc_raw = Get_IDC(); 801f16c: f7f9 f9fc bl 8018568 801f170: eef0 7a40 vmov.f32 s15, s0 801f174: 4b84 ldr r3, [pc, #528] @ (801f388 ) 801f176: edc3 7a0a vstr s15, [r3, #40] @ 0x28 // 1. ADC 또는 디버그 입력에서 전류(Idc), 전압(Vdc) 판정 기준값 설정 if (WP_RegenR.DebugStatus) { 801f17a: 4b83 ldr r3, [pc, #524] @ (801f388 ) 801f17c: 781b ldrb r3, [r3, #0] 801f17e: 2b00 cmp r3, #0 801f180: d008 beq.n 801f194 // 디버그 모드: 가상 입력 사용 WP_RegenR.Vdc_ref = WP_RegenR.Vdc_debug; 801f182: 4b81 ldr r3, [pc, #516] @ (801f388 ) 801f184: 69db ldr r3, [r3, #28] 801f186: 4a80 ldr r2, [pc, #512] @ (801f388 ) 801f188: 62d3 str r3, [r2, #44] @ 0x2c WP_RegenR.Idc_ref = WP_RegenR.Idc_debug; 801f18a: 4b7f ldr r3, [pc, #508] @ (801f388 ) 801f18c: 6a1b ldr r3, [r3, #32] 801f18e: 4a7e ldr r2, [pc, #504] @ (801f388 ) 801f190: 6313 str r3, [r2, #48] @ 0x30 801f192: e007 b.n 801f1a4 } else { // 실제 입력 사용 WP_RegenR.Vdc_ref = WP_RegenR.Vdc_raw; // 실제 전압 입력 801f194: 4b7c ldr r3, [pc, #496] @ (801f388 ) 801f196: 6a5b ldr r3, [r3, #36] @ 0x24 801f198: 4a7b ldr r2, [pc, #492] @ (801f388 ) 801f19a: 62d3 str r3, [r2, #44] @ 0x2c WP_RegenR.Idc_ref = WP_RegenR.Idc_raw; // 실제 전류 입력 801f19c: 4b7a ldr r3, [pc, #488] @ (801f388 ) 801f19e: 6a9b ldr r3, [r3, #40] @ 0x28 801f1a0: 4a79 ldr r2, [pc, #484] @ (801f388 ) 801f1a2: 6313 str r3, [r2, #48] @ 0x30 } // 2. 알파 기반 LPF 적용 LPF_HSW(WP_RegenR.Vdc_filtered, WP_RegenR.Vdc_ref, WP_RegenR.alpha_Vdc); 801f1a4: 4b78 ldr r3, [pc, #480] @ (801f388 ) 801f1a6: edd3 7a11 vldr s15, [r3, #68] @ 0x44 801f1aa: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 801f1ae: ee37 7a67 vsub.f32 s14, s14, s15 801f1b2: 4b75 ldr r3, [pc, #468] @ (801f388 ) 801f1b4: edd3 7a0d vldr s15, [r3, #52] @ 0x34 801f1b8: ee27 7a27 vmul.f32 s14, s14, s15 801f1bc: 4b72 ldr r3, [pc, #456] @ (801f388 ) 801f1be: edd3 6a11 vldr s13, [r3, #68] @ 0x44 801f1c2: 4b71 ldr r3, [pc, #452] @ (801f388 ) 801f1c4: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 801f1c8: ee66 7aa7 vmul.f32 s15, s13, s15 801f1cc: ee77 7a27 vadd.f32 s15, s14, s15 801f1d0: 4b6d ldr r3, [pc, #436] @ (801f388 ) 801f1d2: edc3 7a0d vstr s15, [r3, #52] @ 0x34 LPF_HSW(WP_RegenR.Idc_filtered, WP_RegenR.Idc_ref, WP_RegenR.alpha_Idc); 801f1d6: 4b6c ldr r3, [pc, #432] @ (801f388 ) 801f1d8: edd3 7a12 vldr s15, [r3, #72] @ 0x48 801f1dc: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 801f1e0: ee37 7a67 vsub.f32 s14, s14, s15 801f1e4: 4b68 ldr r3, [pc, #416] @ (801f388 ) 801f1e6: edd3 7a0e vldr s15, [r3, #56] @ 0x38 801f1ea: ee27 7a27 vmul.f32 s14, s14, s15 801f1ee: 4b66 ldr r3, [pc, #408] @ (801f388 ) 801f1f0: edd3 6a12 vldr s13, [r3, #72] @ 0x48 801f1f4: 4b64 ldr r3, [pc, #400] @ (801f388 ) 801f1f6: edd3 7a0c vldr s15, [r3, #48] @ 0x30 801f1fa: ee66 7aa7 vmul.f32 s15, s13, s15 801f1fe: ee77 7a27 vadd.f32 s15, s14, s15 801f202: 4b61 ldr r3, [pc, #388] @ (801f388 ) 801f204: edc3 7a0e vstr s15, [r3, #56] @ 0x38 // 모니터링 체크를 위해 임시 수행용 -> 수행시 위 코드는 주석 처리 반드시 해야 함!! // LPF_HSW(WP_RegenR.Idc_filtered, WP_RegenR.Idc_raw, WP_RegenR.alpha_Idc); // 방전 구간 튜닝 시, 아래 함수 수시로 초기화 필요 : 원래는 Initialize_RegenR()에서 1회 수행 # if 1 WP_RegenR.Vdc_margin_Inv = 1.0f / (WP_RegenR.Vdc_Limit - WP_RegenR.Vdc_Off); 801f208: 4b5f ldr r3, [pc, #380] @ (801f388 ) 801f20a: ed93 7a01 vldr s14, [r3, #4] 801f20e: 4b5e ldr r3, [pc, #376] @ (801f388 ) 801f210: edd3 7a02 vldr s15, [r3, #8] 801f214: ee37 7a67 vsub.f32 s14, s14, s15 801f218: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 801f21c: eec6 7a87 vdiv.f32 s15, s13, s14 801f220: 4b59 ldr r3, [pc, #356] @ (801f388 ) 801f222: edc3 7a03 vstr s15, [r3, #12] WP_RegenR.Idc_margin_Inv = 1.0f / (WP_RegenR.Idc_Charge_Limit - WP_RegenR.Idc_Off); 801f226: 4b58 ldr r3, [pc, #352] @ (801f388 ) 801f228: ed93 7a04 vldr s14, [r3, #16] 801f22c: 4b56 ldr r3, [pc, #344] @ (801f388 ) 801f22e: edd3 7a05 vldr s15, [r3, #20] 801f232: ee37 7a67 vsub.f32 s14, s14, s15 801f236: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 801f23a: eec6 7a87 vdiv.f32 s15, s13, s14 801f23e: 4b52 ldr r3, [pc, #328] @ (801f388 ) 801f240: edc3 7a06 vstr s15, [r3, #24] # endif // 3. 전압 기반 PWM 계산 if (WP_RegenR.Vdc_filtered > WP_RegenR.Vdc_Off) { 801f244: 4b50 ldr r3, [pc, #320] @ (801f388 ) 801f246: ed93 7a0d vldr s14, [r3, #52] @ 0x34 801f24a: 4b4f ldr r3, [pc, #316] @ (801f388 ) 801f24c: edd3 7a02 vldr s15, [r3, #8] 801f250: eeb4 7ae7 vcmpe.f32 s14, s15 801f254: eef1 fa10 vmrs APSR_nzcv, fpscr 801f258: dd24 ble.n 801f2a4 WP_RegenR.diff_Vdc = WP_RegenR.Vdc_filtered - WP_RegenR.Vdc_Off; 801f25a: 4b4b ldr r3, [pc, #300] @ (801f388 ) 801f25c: ed93 7a0d vldr s14, [r3, #52] @ 0x34 801f260: 4b49 ldr r3, [pc, #292] @ (801f388 ) 801f262: edd3 7a02 vldr s15, [r3, #8] 801f266: ee77 7a67 vsub.f32 s15, s14, s15 801f26a: 4b47 ldr r3, [pc, #284] @ (801f388 ) 801f26c: edc3 7a0f vstr s15, [r3, #60] @ 0x3c WP_RegenR.PWM_Vdc = (int)(WP_RegenR.diff_Vdc * WP_RegenR.Vdc_margin_Inv * WP_RegenR.RegenScale_Vdc * TIM9_PERIOD); 801f270: 4b45 ldr r3, [pc, #276] @ (801f388 ) 801f272: ed93 7a0f vldr s14, [r3, #60] @ 0x3c 801f276: 4b44 ldr r3, [pc, #272] @ (801f388 ) 801f278: edd3 7a03 vldr s15, [r3, #12] 801f27c: ee27 7a27 vmul.f32 s14, s14, s15 801f280: 4b41 ldr r3, [pc, #260] @ (801f388 ) 801f282: edd3 7a13 vldr s15, [r3, #76] @ 0x4c 801f286: ee67 7a27 vmul.f32 s15, s14, s15 801f28a: ed9f 7a40 vldr s14, [pc, #256] @ 801f38c 801f28e: ee67 7a87 vmul.f32 s15, s15, s14 801f292: eefd 7ae7 vcvt.s32.f32 s15, s15 801f296: ee17 3a90 vmov r3, s15 801f29a: b29a uxth r2, r3 801f29c: 4b3a ldr r3, [pc, #232] @ (801f388 ) 801f29e: f8a3 2054 strh.w r2, [r3, #84] @ 0x54 801f2a2: e003 b.n 801f2ac } else { WP_RegenR.PWM_Vdc = 0; // 조건에 맞지 않으면 0 801f2a4: 4b38 ldr r3, [pc, #224] @ (801f388 ) 801f2a6: 2200 movs r2, #0 801f2a8: f8a3 2054 strh.w r2, [r3, #84] @ 0x54 } // 4. 전류 기반 PWM 계산 if (WP_RegenR.Idc_filtered < WP_RegenR.Idc_Off) { 801f2ac: 4b36 ldr r3, [pc, #216] @ (801f388 ) 801f2ae: ed93 7a0e vldr s14, [r3, #56] @ 0x38 801f2b2: 4b35 ldr r3, [pc, #212] @ (801f388 ) 801f2b4: edd3 7a05 vldr s15, [r3, #20] 801f2b8: eeb4 7ae7 vcmpe.f32 s14, s15 801f2bc: eef1 fa10 vmrs APSR_nzcv, fpscr 801f2c0: d524 bpl.n 801f30c WP_RegenR.diff_Idc = - WP_RegenR.Idc_Off + WP_RegenR.Idc_filtered; // Idc_diff 음수라서 PWM에는 반전시켜줘야 함(25.03.14) 801f2c2: 4b31 ldr r3, [pc, #196] @ (801f388 ) 801f2c4: ed93 7a0e vldr s14, [r3, #56] @ 0x38 801f2c8: 4b2f ldr r3, [pc, #188] @ (801f388 ) 801f2ca: edd3 7a05 vldr s15, [r3, #20] 801f2ce: ee77 7a67 vsub.f32 s15, s14, s15 801f2d2: 4b2d ldr r3, [pc, #180] @ (801f388 ) 801f2d4: edc3 7a10 vstr s15, [r3, #64] @ 0x40 WP_RegenR.PWM_Idc = (int)(WP_RegenR.diff_Idc * WP_RegenR.Idc_margin_Inv * WP_RegenR.RegenScale_Idc * TIM9_PERIOD); 801f2d8: 4b2b ldr r3, [pc, #172] @ (801f388 ) 801f2da: ed93 7a10 vldr s14, [r3, #64] @ 0x40 801f2de: 4b2a ldr r3, [pc, #168] @ (801f388 ) 801f2e0: edd3 7a06 vldr s15, [r3, #24] 801f2e4: ee27 7a27 vmul.f32 s14, s14, s15 801f2e8: 4b27 ldr r3, [pc, #156] @ (801f388 ) 801f2ea: edd3 7a14 vldr s15, [r3, #80] @ 0x50 801f2ee: ee67 7a27 vmul.f32 s15, s14, s15 801f2f2: ed9f 7a26 vldr s14, [pc, #152] @ 801f38c 801f2f6: ee67 7a87 vmul.f32 s15, s15, s14 801f2fa: eefd 7ae7 vcvt.s32.f32 s15, s15 801f2fe: ee17 3a90 vmov r3, s15 801f302: b29a uxth r2, r3 801f304: 4b20 ldr r3, [pc, #128] @ (801f388 ) 801f306: f8a3 2056 strh.w r2, [r3, #86] @ 0x56 801f30a: e003 b.n 801f314 } else { WP_RegenR.PWM_Idc = 0; // 조건에 맞지 않으면 0 801f30c: 4b1e ldr r3, [pc, #120] @ (801f388 ) 801f30e: 2200 movs r2, #0 801f310: f8a3 2056 strh.w r2, [r3, #86] @ 0x56 } // 5. 최종 PWM 결정 : 두 조건 중 더 강한 걸 적용 WP_RegenR.PWM = (WP_RegenR.PWM_Vdc > WP_RegenR.PWM_Idc) ? WP_RegenR.PWM_Vdc : WP_RegenR.PWM_Idc; 801f314: 4b1c ldr r3, [pc, #112] @ (801f388 ) 801f316: f8b3 2056 ldrh.w r2, [r3, #86] @ 0x56 801f31a: 4b1b ldr r3, [pc, #108] @ (801f388 ) 801f31c: f8b3 3054 ldrh.w r3, [r3, #84] @ 0x54 801f320: 4293 cmp r3, r2 801f322: bf38 it cc 801f324: 4613 movcc r3, r2 801f326: b29a uxth r2, r3 801f328: 4b17 ldr r3, [pc, #92] @ (801f388 ) 801f32a: f8a3 2058 strh.w r2, [r3, #88] @ 0x58 // 6. 안전 클램프 적용 (0 이상, TIM9_PERIOD의 95% 이하 - 5%는 그냥 본능적 마진 -> 900) if (WP_RegenR.PWM > TIM9_PERIOD - 900) { 801f32e: 4b16 ldr r3, [pc, #88] @ (801f388 ) 801f330: f8b3 3058 ldrh.w r3, [r3, #88] @ 0x58 801f334: f244 22cb movw r2, #17099 @ 0x42cb 801f338: 4293 cmp r3, r2 801f33a: d904 bls.n 801f346 WP_RegenR.PWM = TIM9_PERIOD - 900; 801f33c: 4b12 ldr r3, [pc, #72] @ (801f388 ) 801f33e: f244 22cb movw r2, #17099 @ 0x42cb 801f342: f8a3 2058 strh.w r2, [r3, #88] @ 0x58 } // else if (WP_RegenR.PWM < 0) { // WP_RegenR.PWM = 0; // } if(WP_RegenR.PWM_fin < WP_RegenR.PWM) { 801f346: 4b10 ldr r3, [pc, #64] @ (801f388 ) 801f348: f8b3 205a ldrh.w r2, [r3, #90] @ 0x5a 801f34c: 4b0e ldr r3, [pc, #56] @ (801f388 ) 801f34e: f8b3 3058 ldrh.w r3, [r3, #88] @ 0x58 801f352: 429a cmp r2, r3 801f354: d208 bcs.n 801f368 WP_RegenR.PWM_fin++; 801f356: 4b0c ldr r3, [pc, #48] @ (801f388 ) 801f358: f8b3 305a ldrh.w r3, [r3, #90] @ 0x5a 801f35c: 3301 adds r3, #1 801f35e: b29a uxth r2, r3 801f360: 4b09 ldr r3, [pc, #36] @ (801f388 ) 801f362: f8a3 205a strh.w r2, [r3, #90] @ 0x5a 801f366: e005 b.n 801f374 } else { WP_RegenR.PWM_fin = WP_RegenR.PWM; 801f368: 4b07 ldr r3, [pc, #28] @ (801f388 ) 801f36a: f8b3 2058 ldrh.w r2, [r3, #88] @ 0x58 801f36e: 4b06 ldr r3, [pc, #24] @ (801f388 ) 801f370: f8a3 205a strh.w r2, [r3, #90] @ 0x5a } // ** 별도의 유사시 안전장치 추가 예정 (Iq, RPM 기반) // 7. PWM 설정 TIM9_SetCompare(TIM_CHANNEL_1, WP_RegenR.PWM_fin); 801f374: 4b04 ldr r3, [pc, #16] @ (801f388 ) 801f376: f8b3 205a ldrh.w r2, [r3, #90] @ 0x5a 801f37a: 4b05 ldr r3, [pc, #20] @ (801f390 ) 801f37c: 681b ldr r3, [r3, #0] 801f37e: 635a str r2, [r3, #52] @ 0x34 } 801f380: bf00 nop 801f382: bd80 pop {r7, pc} 801f384: 20000400 .word 0x20000400 801f388: 20000280 .word 0x20000280 801f38c: 468c9e00 .word 0x468c9e00 801f390: 20000ed0 .word 0x20000ed0 0801f394 : // 어떠한 주기로 (아마 스케쥴러에 삽입?) 정기 수행 void Derating_Control(uint8_t side) { 801f394: b480 push {r7} 801f396: b085 sub sp, #20 801f398: af00 add r7, sp, #0 801f39a: 4603 mov r3, r0 801f39c: 71fb strb r3, [r7, #7] if (0 <= side && side < 2){ 801f39e: 79fb ldrb r3, [r7, #7] 801f3a0: 2b01 cmp r3, #1 801f3a2: f200 814b bhi.w 801f63c // 로컬 변수로 계산 다 하고 나서 int Iq_x10, deltaP; // 1. 현재 전류 불러오기 (cmd로 할 지 fb으로 할 지는 고민 필요!) switch(side) { 801f3a6: 79fb ldrb r3, [r7, #7] 801f3a8: 2b00 cmp r3, #0 801f3aa: d002 beq.n 801f3b2 801f3ac: 2b01 cmp r3, #1 801f3ae: d00d beq.n 801f3cc 801f3b0: e019 b.n 801f3e6 case L: Iq_x10 = (int) (Motor1.Cmd.Icmd.q * 10); 801f3b2: 4ba5 ldr r3, [pc, #660] @ (801f648 ) 801f3b4: edd3 7a01 vldr s15, [r3, #4] 801f3b8: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0 801f3bc: ee67 7a87 vmul.f32 s15, s15, s14 801f3c0: eefd 7ae7 vcvt.s32.f32 s15, s15 801f3c4: ee17 3a90 vmov r3, s15 801f3c8: 60fb str r3, [r7, #12] break; 801f3ca: e00c b.n 801f3e6 case R: Iq_x10 = (int) (Motor2.Cmd.Icmd.q * 10); 801f3cc: 4b9f ldr r3, [pc, #636] @ (801f64c ) 801f3ce: edd3 7a01 vldr s15, [r3, #4] 801f3d2: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0 801f3d6: ee67 7a87 vmul.f32 s15, s15, s14 801f3da: eefd 7ae7 vcvt.s32.f32 s15, s15 801f3de: ee17 3a90 vmov r3, s15 801f3e2: 60fb str r3, [r7, #12] break; 801f3e4: bf00 nop } // 2. 방열량 계산 (상수 처리 할 수도 있지만, 혹시 모르니 조건부 변수처럼 처리) WP_Derating.P_diss[side] = WP_Derating.Iq_x10_cont[side] * WP_Derating.Iq_x10_cont[side]; 801f3e6: 79fb ldrb r3, [r7, #7] 801f3e8: 4a99 ldr r2, [pc, #612] @ (801f650 ) 801f3ea: 3304 adds r3, #4 801f3ec: 005b lsls r3, r3, #1 801f3ee: 4413 add r3, r2 801f3f0: f9b3 3002 ldrsh.w r3, [r3, #2] 801f3f4: 4619 mov r1, r3 801f3f6: 79fb ldrb r3, [r7, #7] 801f3f8: 4a95 ldr r2, [pc, #596] @ (801f650 ) 801f3fa: 3304 adds r3, #4 801f3fc: 005b lsls r3, r3, #1 801f3fe: 4413 add r3, r2 801f400: f9b3 3002 ldrsh.w r3, [r3, #2] 801f404: 461a mov r2, r3 801f406: 79fb ldrb r3, [r7, #7] 801f408: fb01 f202 mul.w r2, r1, r2 801f40c: 4990 ldr r1, [pc, #576] @ (801f650 ) 801f40e: 3308 adds r3, #8 801f410: 009b lsls r3, r3, #2 801f412: 440b add r3, r1 801f414: 605a str r2, [r3, #4] // 3. 현재 전류로부터 현재 발열량 계산 switch(WP_Derating.DebugStatus) { 801f416: 4b8e ldr r3, [pc, #568] @ (801f650 ) 801f418: 781b ldrb r3, [r3, #0] 801f41a: 2b00 cmp r3, #0 801f41c: d002 beq.n 801f424 801f41e: 2b01 cmp r3, #1 801f420: d00a beq.n 801f438 801f422: e022 b.n 801f46a case OFF: // 실제 전류로 동작 시 WP_Derating.P_loss[side] = (Iq_x10 * Iq_x10); 801f424: 79f9 ldrb r1, [r7, #7] 801f426: 68fb ldr r3, [r7, #12] 801f428: fb03 f203 mul.w r2, r3, r3 801f42c: 4888 ldr r0, [pc, #544] @ (801f650 ) 801f42e: 1d8b adds r3, r1, #6 801f430: 009b lsls r3, r3, #2 801f432: 4403 add r3, r0 801f434: 605a str r2, [r3, #4] break; 801f436: e018 b.n 801f46a case ON: // live expression에서 계속 바꿔가면서 해야해서 상수들도 수시 업데이트 필요 WP_Derating.P_loss[side] = (WP_Derating.Iq_x10_Debug[side] * WP_Derating.Iq_x10_Debug[side]); 801f438: 79fb ldrb r3, [r7, #7] 801f43a: 4a85 ldr r2, [pc, #532] @ (801f650 ) 801f43c: 3308 adds r3, #8 801f43e: 005b lsls r3, r3, #1 801f440: 4413 add r3, r2 801f442: f9b3 3002 ldrsh.w r3, [r3, #2] 801f446: 4619 mov r1, r3 801f448: 79fb ldrb r3, [r7, #7] 801f44a: 4a81 ldr r2, [pc, #516] @ (801f650 ) 801f44c: 3308 adds r3, #8 801f44e: 005b lsls r3, r3, #1 801f450: 4413 add r3, r2 801f452: f9b3 3002 ldrsh.w r3, [r3, #2] 801f456: 461a mov r2, r3 801f458: 79fb ldrb r3, [r7, #7] 801f45a: fb01 f202 mul.w r2, r1, r2 801f45e: 497c ldr r1, [pc, #496] @ (801f650 ) 801f460: 3306 adds r3, #6 801f462: 009b lsls r3, r3, #2 801f464: 440b add r3, r1 801f466: 605a str r2, [r3, #4] break; 801f468: bf00 nop } // 4. 온도 상승 파라미터(냉각되지 못한 에너지의 적산값) (= 방열량 - 발열량) deltaP = WP_Derating.P_loss[side] - WP_Derating.P_diss[side]; 801f46a: 79fb ldrb r3, [r7, #7] 801f46c: 4a78 ldr r2, [pc, #480] @ (801f650 ) 801f46e: 3306 adds r3, #6 801f470: 009b lsls r3, r3, #2 801f472: 4413 add r3, r2 801f474: 685a ldr r2, [r3, #4] 801f476: 79fb ldrb r3, [r7, #7] 801f478: 4975 ldr r1, [pc, #468] @ (801f650 ) 801f47a: 3308 adds r3, #8 801f47c: 009b lsls r3, r3, #2 801f47e: 440b add r3, r1 801f480: 685b ldr r3, [r3, #4] 801f482: 1ad3 subs r3, r2, r3 801f484: 60bb str r3, [r7, #8] // 방열 시에는 온도 하강이 더 느릴 수 있음을 임의로 단순하게 구현 -> 추후 실험적으로 고도화 필요 if(deltaP < 0) deltaP = (int) (deltaP * 0.5f); 801f486: 68bb ldr r3, [r7, #8] 801f488: 2b00 cmp r3, #0 801f48a: da0d bge.n 801f4a8 801f48c: 68bb ldr r3, [r7, #8] 801f48e: ee07 3a90 vmov s15, r3 801f492: eef8 7ae7 vcvt.f32.s32 s15, s15 801f496: eeb6 7a00 vmov.f32 s14, #96 @ 0x3f000000 0.5 801f49a: ee67 7a87 vmul.f32 s15, s15, s14 801f49e: eefd 7ae7 vcvt.s32.f32 s15, s15 801f4a2: ee17 3a90 vmov r3, s15 801f4a6: 60bb str r3, [r7, #8] WP_Derating.deltaT[side] = deltaP + WP_Derating.deltaT[side]; 801f4a8: 79fb ldrb r3, [r7, #7] 801f4aa: 4a69 ldr r2, [pc, #420] @ (801f650 ) 801f4ac: 330a adds r3, #10 801f4ae: 009b lsls r3, r3, #2 801f4b0: 4413 add r3, r2 801f4b2: 6859 ldr r1, [r3, #4] 801f4b4: 79fb ldrb r3, [r7, #7] 801f4b6: 68ba ldr r2, [r7, #8] 801f4b8: 440a add r2, r1 801f4ba: 4965 ldr r1, [pc, #404] @ (801f650 ) 801f4bc: 330a adds r3, #10 801f4be: 009b lsls r3, r3, #2 801f4c0: 440b add r3, r1 801f4c2: 605a str r2, [r3, #4] if(WP_Derating.deltaT[side] < 0) WP_Derating.deltaT[side] = 0 ; // 이론적으론 필요 없지만 자료형, 오버플로우 등 혹시 모를 이슈를 위해 굳이 음수로 가는 건 막아놓기 801f4c4: 79fb ldrb r3, [r7, #7] 801f4c6: 4a62 ldr r2, [pc, #392] @ (801f650 ) 801f4c8: 330a adds r3, #10 801f4ca: 009b lsls r3, r3, #2 801f4cc: 4413 add r3, r2 801f4ce: 685b ldr r3, [r3, #4] 801f4d0: 2b00 cmp r3, #0 801f4d2: da06 bge.n 801f4e2 801f4d4: 79fb ldrb r3, [r7, #7] 801f4d6: 4a5e ldr r2, [pc, #376] @ (801f650 ) 801f4d8: 330a adds r3, #10 801f4da: 009b lsls r3, r3, #2 801f4dc: 4413 add r3, r2 801f4de: 2200 movs r2, #0 801f4e0: 605a str r2, [r3, #4] if(WP_Derating.deltaT[side] > WP_Derating.deltaT_max) WP_Derating.deltaT[side] = WP_Derating.deltaT_max; 801f4e2: 79fb ldrb r3, [r7, #7] 801f4e4: 4a5a ldr r2, [pc, #360] @ (801f650 ) 801f4e6: 330a adds r3, #10 801f4e8: 009b lsls r3, r3, #2 801f4ea: 4413 add r3, r2 801f4ec: 685a ldr r2, [r3, #4] 801f4ee: 4b58 ldr r3, [pc, #352] @ (801f650 ) 801f4f0: 6b9b ldr r3, [r3, #56] @ 0x38 801f4f2: 429a cmp r2, r3 801f4f4: dd07 ble.n 801f506 801f4f6: 79fb ldrb r3, [r7, #7] 801f4f8: 4a55 ldr r2, [pc, #340] @ (801f650 ) 801f4fa: 6b92 ldr r2, [r2, #56] @ 0x38 801f4fc: 4954 ldr r1, [pc, #336] @ (801f650 ) 801f4fe: 330a adds r3, #10 801f500: 009b lsls r3, r3, #2 801f502: 440b add r3, r1 801f504: 605a str r2, [r3, #4] // 5. 온도 상승 정도에 따른 디레이팅 정도 결정 WP_Derating.DeratingScale[side] = (int) (100.0f / WP_Derating.deltaT_max * (WP_Derating.deltaT_max - WP_Derating.deltaT[side])) ; 801f506: 4b52 ldr r3, [pc, #328] @ (801f650 ) 801f508: 6b9b ldr r3, [r3, #56] @ 0x38 801f50a: ee07 3a90 vmov s15, r3 801f50e: eef8 7ae7 vcvt.f32.s32 s15, s15 801f512: eddf 6a50 vldr s13, [pc, #320] @ 801f654 801f516: ee86 7aa7 vdiv.f32 s14, s13, s15 801f51a: 4b4d ldr r3, [pc, #308] @ (801f650 ) 801f51c: 6b9a ldr r2, [r3, #56] @ 0x38 801f51e: 79fb ldrb r3, [r7, #7] 801f520: 494b ldr r1, [pc, #300] @ (801f650 ) 801f522: 330a adds r3, #10 801f524: 009b lsls r3, r3, #2 801f526: 440b add r3, r1 801f528: 685b ldr r3, [r3, #4] 801f52a: 1ad3 subs r3, r2, r3 801f52c: ee07 3a90 vmov s15, r3 801f530: eef8 7ae7 vcvt.f32.s32 s15, s15 801f534: ee67 7a27 vmul.f32 s15, s14, s15 801f538: eefd 7ae7 vcvt.s32.f32 s15, s15 801f53c: edc7 7a00 vstr s15, [r7] 801f540: 79fb ldrb r3, [r7, #7] 801f542: 7839 ldrb r1, [r7, #0] 801f544: 4a42 ldr r2, [pc, #264] @ (801f650 ) 801f546: 4413 add r3, r2 801f548: 460a mov r2, r1 801f54a: f883 203c strb.w r2, [r3, #60] @ 0x3c if(WP_Derating.DeratingScale[side] < 0) WP_Derating.DeratingScale[side] = 0; if(WP_Derating.DeratingScale[side] > 100) WP_Derating.DeratingScale[side] = 100; 801f54e: 79fb ldrb r3, [r7, #7] 801f550: 4a3f ldr r2, [pc, #252] @ (801f650 ) 801f552: 4413 add r3, r2 801f554: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 801f558: 2b64 cmp r3, #100 @ 0x64 801f55a: d905 bls.n 801f568 801f55c: 79fb ldrb r3, [r7, #7] 801f55e: 4a3c ldr r2, [pc, #240] @ (801f650 ) 801f560: 4413 add r3, r2 801f562: 2264 movs r2, #100 @ 0x64 801f564: f883 203c strb.w r2, [r3, #60] @ 0x3c // 6. DeratingScale에 따른 전류 제한치 결정 // WP_Derating.Iq_Lim[side] = 0.1f * ((WP_Machine.MaxCurrent * 10 - WP_Derating.Iq_x10_cont[side]) * (WP_Derating.DeratingScale[side] * 0.01f) + WP_Derating.Iq_x10_cont[side] * 0.5f); // WP_Derating.Iq_Lim[side] = 0.1f * (WP_Machine.MaxCurrent*10 - (WP_Derating.DeratingScale[side] * 0.01f) * (WP_Machine.MaxCurrent*10 - WP_Derating.Iq_x10_cont[side])); // WP_Derating.Iq_Lim[side] = 0.1f * (WP_Derating.Iq_x10_cont[side] + (WP_Derating.DeratingScale[side] * 0.01f) * (WP_Machine.MaxCurrent*10 - WP_Derating.Iq_x10_cont[side])); WP_Derating.Iq_Lim[side] = 0.1f * (WP_Derating.Iq_x10_Lim_Min + (WP_Derating.DeratingScale[side] * 0.01f) * (WP_Machine.MaxCurrent*10 - WP_Derating.Iq_x10_Lim_Min)); 801f568: 4b39 ldr r3, [pc, #228] @ (801f650 ) 801f56a: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 801f56e: ee07 3a90 vmov s15, r3 801f572: eeb8 7ae7 vcvt.f32.s32 s14, s15 801f576: 79fb ldrb r3, [r7, #7] 801f578: 4a35 ldr r2, [pc, #212] @ (801f650 ) 801f57a: 4413 add r3, r2 801f57c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 801f580: ee07 3a90 vmov s15, r3 801f584: eef8 7ae7 vcvt.f32.s32 s15, s15 801f588: eddf 6a33 vldr s13, [pc, #204] @ 801f658 801f58c: ee67 6aa6 vmul.f32 s13, s15, s13 801f590: 4b32 ldr r3, [pc, #200] @ (801f65c ) 801f592: edd3 7a05 vldr s15, [r3, #20] 801f596: eeb2 6a04 vmov.f32 s12, #36 @ 0x41200000 10.0 801f59a: ee27 6a86 vmul.f32 s12, s15, s12 801f59e: 4b2c ldr r3, [pc, #176] @ (801f650 ) 801f5a0: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 801f5a4: ee07 3a90 vmov s15, r3 801f5a8: eef8 7ae7 vcvt.f32.s32 s15, s15 801f5ac: ee76 7a67 vsub.f32 s15, s12, s15 801f5b0: ee66 7aa7 vmul.f32 s15, s13, s15 801f5b4: ee77 7a27 vadd.f32 s15, s14, s15 801f5b8: 79fb ldrb r3, [r7, #7] 801f5ba: ed9f 7a29 vldr s14, [pc, #164] @ 801f660 801f5be: ee67 7a87 vmul.f32 s15, s15, s14 801f5c2: 4a23 ldr r2, [pc, #140] @ (801f650 ) 801f5c4: 3310 adds r3, #16 801f5c6: 009b lsls r3, r3, #2 801f5c8: 4413 add r3, r2 801f5ca: edc3 7a00 vstr s15, [r3] WP_Derating.cnt++; 801f5ce: 4b20 ldr r3, [pc, #128] @ (801f650 ) 801f5d0: 685b ldr r3, [r3, #4] 801f5d2: 3301 adds r3, #1 801f5d4: 4a1e ldr r2, [pc, #120] @ (801f650 ) 801f5d6: 6053 str r3, [r2, #4] // 7. 전류 제한치를 적용 switch(WP_Derating.DebugStatus) { 801f5d8: 4b1d ldr r3, [pc, #116] @ (801f650 ) 801f5da: 781b ldrb r3, [r3, #0] 801f5dc: 2b00 cmp r3, #0 801f5de: d02a beq.n 801f636 801f5e0: 2b01 cmp r3, #1 801f5e2: d000 beq.n 801f5e6 WP_Derating.Iq_x10_Debug[side] = (int) (WP_Derating.Iq_Lim[side] * 10.0f); } break; } } } 801f5e4: e02a b.n 801f63c if(WP_Derating.Iq_x10_Debug[side] > WP_Derating.Iq_x10_cont[side]){ 801f5e6: 79fb ldrb r3, [r7, #7] 801f5e8: 4a19 ldr r2, [pc, #100] @ (801f650 ) 801f5ea: 3308 adds r3, #8 801f5ec: 005b lsls r3, r3, #1 801f5ee: 4413 add r3, r2 801f5f0: f9b3 2002 ldrsh.w r2, [r3, #2] 801f5f4: 79fb ldrb r3, [r7, #7] 801f5f6: 4916 ldr r1, [pc, #88] @ (801f650 ) 801f5f8: 3304 adds r3, #4 801f5fa: 005b lsls r3, r3, #1 801f5fc: 440b add r3, r1 801f5fe: f9b3 3002 ldrsh.w r3, [r3, #2] 801f602: 429a cmp r2, r3 801f604: dd19 ble.n 801f63a WP_Derating.Iq_x10_Debug[side] = (int) (WP_Derating.Iq_Lim[side] * 10.0f); 801f606: 79fb ldrb r3, [r7, #7] 801f608: 4a11 ldr r2, [pc, #68] @ (801f650 ) 801f60a: 3310 adds r3, #16 801f60c: 009b lsls r3, r3, #2 801f60e: 4413 add r3, r2 801f610: edd3 7a00 vldr s15, [r3] 801f614: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0 801f618: ee67 7a87 vmul.f32 s15, s15, s14 801f61c: eefd 7ae7 vcvt.s32.f32 s15, s15 801f620: 79fb ldrb r3, [r7, #7] 801f622: ee17 2a90 vmov r2, s15 801f626: b211 sxth r1, r2 801f628: 4a09 ldr r2, [pc, #36] @ (801f650 ) 801f62a: 3308 adds r3, #8 801f62c: 005b lsls r3, r3, #1 801f62e: 4413 add r3, r2 801f630: 460a mov r2, r1 801f632: 805a strh r2, [r3, #2] break; 801f634: e001 b.n 801f63a break; 801f636: bf00 nop 801f638: e000 b.n 801f63c break; 801f63a: bf00 nop } 801f63c: bf00 nop 801f63e: 3714 adds r7, #20 801f640: 46bd mov sp, r7 801f642: f85d 7b04 ldr.w r7, [sp], #4 801f646: 4770 bx lr 801f648: 20000574 .word 0x20000574 801f64c: 20000704 .word 0x20000704 801f650: 200002dc .word 0x200002dc 801f654: 42c80000 .word 0x42c80000 801f658: 3c23d70a .word 0x3c23d70a 801f65c: 20000110 .word 0x20000110 801f660: 3dcccccd .word 0x3dcccccd 0801f664 : //timer2,4 encoder (interrupt) void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 801f664: b480 push {r7} 801f666: b083 sub sp, #12 801f668: af00 add r7, sp, #0 801f66a: 6078 str r0, [r7, #4] #if EXAMPLE == 10 //Timer 2,4 Encoder mode HAL_GPIO_TogglePin(GPIOF, GPIO_PIN_2); UART3_printf("TIM4: %d\r\n", (int16_t)TIM4_GetCounter()); //16bit #endif } } 801f66c: bf00 nop 801f66e: 370c adds r7, #12 801f670: 46bd mov sp, r7 801f672: f85d 7b04 ldr.w r7, [sp], #4 801f676: 4770 bx lr 0801f678 : //timer1,8 pwm void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { 801f678: b480 push {r7} 801f67a: b083 sub sp, #12 801f67c: af00 add r7, sp, #0 801f67e: 6078 str r0, [r7, #4] if(htim->Instance==TIM8) { #if EXAMPLE == 18 UART3_printf("====> %5d\r\n", TIM1_GetCounter()); #endif } } 801f680: bf00 nop 801f682: 370c adds r7, #12 801f684: 46bd mov sp, r7 801f686: f85d 7b04 ldr.w r7, [sp], #4 801f68a: 4770 bx lr 0801f68c : void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 801f68c: b480 push {r7} 801f68e: b083 sub sp, #12 801f690: af00 add r7, sp, #0 801f692: 6078 str r0, [r7, #4] if(htim->Channel == HAL_TIM_ACTIVE_CHANNEL_3) { UART3_printf("[3] %5d\r\n", TIM1_GetCounter()); } #endif } } 801f694: bf00 nop 801f696: 370c adds r7, #12 801f698: 46bd mov sp, r7 801f69a: f85d 7b04 ldr.w r7, [sp], #4 801f69e: 4770 bx lr 0801f6a0 : void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 801f6a0: b480 push {r7} 801f6a2: b083 sub sp, #12 801f6a4: af00 add r7, sp, #0 801f6a6: 6078 str r0, [r7, #4] if(htim->Instance==TIM8) { #if EXAMPLE == 20 HAL_GPIO_TogglePin(GPIOF, GPIO_PIN_1); #endif } } 801f6a8: bf00 nop 801f6aa: 370c adds r7, #12 801f6ac: 46bd mov sp, r7 801f6ae: f85d 7b04 ldr.w r7, [sp], #4 801f6b2: 4770 bx lr 0801f6b4 : //timer9 pwm void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 801f6b4: b480 push {r7} 801f6b6: b083 sub sp, #12 801f6b8: af00 add r7, sp, #0 801f6ba: 6078 str r0, [r7, #4] if(htim->Instance==TIM9) { 801f6bc: 687b ldr r3, [r7, #4] 801f6be: 681b ldr r3, [r3, #0] 801f6c0: 4a03 ldr r2, [pc, #12] @ (801f6d0 ) 801f6c2: 4293 cmp r3, r2 } if(htim->Channel == HAL_TIM_ACTIVE_CHANNEL_2) { //HAL_GPIO_TogglePin(GPIOF, GPIO_PIN_2); } } } 801f6c4: bf00 nop 801f6c6: 370c adds r7, #12 801f6c8: 46bd mov sp, r7 801f6ca: f85d 7b04 ldr.w r7, [sp], #4 801f6ce: 4770 bx lr 801f6d0: 40014000 .word 0x40014000 0801f6d4 : UART_HandleTypeDef huart3; /* USART2 init function */ void MX_USART2_UART_Init(void) { 801f6d4: b580 push {r7, lr} 801f6d6: b082 sub sp, #8 801f6d8: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 801f6da: 4b16 ldr r3, [pc, #88] @ (801f734 ) 801f6dc: 4a16 ldr r2, [pc, #88] @ (801f738 ) 801f6de: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 801f6e0: 4b14 ldr r3, [pc, #80] @ (801f734 ) 801f6e2: f44f 32e1 mov.w r2, #115200 @ 0x1c200 801f6e6: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 801f6e8: 4b12 ldr r3, [pc, #72] @ (801f734 ) 801f6ea: 2200 movs r2, #0 801f6ec: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 801f6ee: 4b11 ldr r3, [pc, #68] @ (801f734 ) 801f6f0: 2200 movs r2, #0 801f6f2: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 801f6f4: 4b0f ldr r3, [pc, #60] @ (801f734 ) 801f6f6: 2200 movs r2, #0 801f6f8: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 801f6fa: 4b0e ldr r3, [pc, #56] @ (801f734 ) 801f6fc: 220c movs r2, #12 801f6fe: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 801f700: 4b0c ldr r3, [pc, #48] @ (801f734 ) 801f702: 2200 movs r2, #0 801f704: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 801f706: 4b0b ldr r3, [pc, #44] @ (801f734 ) 801f708: 2200 movs r2, #0 801f70a: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 801f70c: 4809 ldr r0, [pc, #36] @ (801f734 ) 801f70e: f007 ff1e bl 802754e 801f712: 4603 mov r3, r0 801f714: 2b00 cmp r3, #0 801f716: d001 beq.n 801f71c { Error_Handler(); 801f718: f7fa faeb bl 8019cf2 } /* USER CODE BEGIN USART2_Init 2 */ uint8_t rx_data=0; 801f71c: 2300 movs r3, #0 801f71e: 71fb strb r3, [r7, #7] Rx_Interrupt_IT(&huart2,rx_data); 801f720: 79fb ldrb r3, [r7, #7] 801f722: 4619 mov r1, r3 801f724: 4803 ldr r0, [pc, #12] @ (801f734 ) 801f726: f000 fa7b bl 801fc20 /* USER CODE END USART2_Init 2 */ } 801f72a: bf00 nop 801f72c: 3708 adds r7, #8 801f72e: 46bd mov sp, r7 801f730: bd80 pop {r7, pc} 801f732: bf00 nop 801f734: 200053a8 .word 0x200053a8 801f738: 40004400 .word 0x40004400 0801f73c : /* USART3 init function */ void MX_USART3_UART_Init(void) { 801f73c: b580 push {r7, lr} 801f73e: b082 sub sp, #8 801f740: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 801f742: 4b16 ldr r3, [pc, #88] @ (801f79c ) 801f744: 4a16 ldr r2, [pc, #88] @ (801f7a0 ) 801f746: 601a str r2, [r3, #0] // huart3.Init.BaudRate = 9600; // huart3.Init.BaudRate = 19200; // huart3.Init.BaudRate = 38400; // huart3.Init.BaudRate = 57600; huart3.Init.BaudRate = 115200; 801f748: 4b14 ldr r3, [pc, #80] @ (801f79c ) 801f74a: f44f 32e1 mov.w r2, #115200 @ 0x1c200 801f74e: 605a str r2, [r3, #4] // huart3.Init.BaudRate = 230400; huart3.Init.WordLength = UART_WORDLENGTH_8B; 801f750: 4b12 ldr r3, [pc, #72] @ (801f79c ) 801f752: 2200 movs r2, #0 801f754: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 801f756: 4b11 ldr r3, [pc, #68] @ (801f79c ) 801f758: 2200 movs r2, #0 801f75a: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 801f75c: 4b0f ldr r3, [pc, #60] @ (801f79c ) 801f75e: 2200 movs r2, #0 801f760: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 801f762: 4b0e ldr r3, [pc, #56] @ (801f79c ) 801f764: 220c movs r2, #12 801f766: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 801f768: 4b0c ldr r3, [pc, #48] @ (801f79c ) 801f76a: 2200 movs r2, #0 801f76c: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 801f76e: 4b0b ldr r3, [pc, #44] @ (801f79c ) 801f770: 2200 movs r2, #0 801f772: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 801f774: 4809 ldr r0, [pc, #36] @ (801f79c ) 801f776: f007 feea bl 802754e 801f77a: 4603 mov r3, r0 801f77c: 2b00 cmp r3, #0 801f77e: d001 beq.n 801f784 { Error_Handler(); 801f780: f7fa fab7 bl 8019cf2 } /* USER CODE BEGIN USART3_Init 2 */ uint8_t rx_data=0; 801f784: 2300 movs r3, #0 801f786: 71fb strb r3, [r7, #7] Rx_Interrupt_IT(&huart3,rx_data); 801f788: 79fb ldrb r3, [r7, #7] 801f78a: 4619 mov r1, r3 801f78c: 4803 ldr r0, [pc, #12] @ (801f79c ) 801f78e: f000 fa47 bl 801fc20 /* USER CODE END USART3_Init 2 */ } 801f792: bf00 nop 801f794: 3708 adds r7, #8 801f796: 46bd mov sp, r7 801f798: bd80 pop {r7, pc} 801f79a: bf00 nop 801f79c: 200053ec .word 0x200053ec 801f7a0: 40004800 .word 0x40004800 0801f7a4 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 801f7a4: b580 push {r7, lr} 801f7a6: b08c sub sp, #48 @ 0x30 801f7a8: af00 add r7, sp, #0 801f7aa: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 801f7ac: f107 031c add.w r3, r7, #28 801f7b0: 2200 movs r2, #0 801f7b2: 601a str r2, [r3, #0] 801f7b4: 605a str r2, [r3, #4] 801f7b6: 609a str r2, [r3, #8] 801f7b8: 60da str r2, [r3, #12] 801f7ba: 611a str r2, [r3, #16] if(uartHandle->Instance==USART2) 801f7bc: 687b ldr r3, [r7, #4] 801f7be: 681b ldr r3, [r3, #0] 801f7c0: 4a3a ldr r2, [pc, #232] @ (801f8ac ) 801f7c2: 4293 cmp r3, r2 801f7c4: d134 bne.n 801f830 { /* USER CODE BEGIN USART2_MspInit 0 */ /* USER CODE END USART2_MspInit 0 */ /* USART2 clock enable */ __HAL_RCC_USART2_CLK_ENABLE(); 801f7c6: 2300 movs r3, #0 801f7c8: 61bb str r3, [r7, #24] 801f7ca: 4b39 ldr r3, [pc, #228] @ (801f8b0 ) 801f7cc: 6c1b ldr r3, [r3, #64] @ 0x40 801f7ce: 4a38 ldr r2, [pc, #224] @ (801f8b0 ) 801f7d0: f443 3300 orr.w r3, r3, #131072 @ 0x20000 801f7d4: 6413 str r3, [r2, #64] @ 0x40 801f7d6: 4b36 ldr r3, [pc, #216] @ (801f8b0 ) 801f7d8: 6c1b ldr r3, [r3, #64] @ 0x40 801f7da: f403 3300 and.w r3, r3, #131072 @ 0x20000 801f7de: 61bb str r3, [r7, #24] 801f7e0: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 801f7e2: 2300 movs r3, #0 801f7e4: 617b str r3, [r7, #20] 801f7e6: 4b32 ldr r3, [pc, #200] @ (801f8b0 ) 801f7e8: 6b1b ldr r3, [r3, #48] @ 0x30 801f7ea: 4a31 ldr r2, [pc, #196] @ (801f8b0 ) 801f7ec: f043 0308 orr.w r3, r3, #8 801f7f0: 6313 str r3, [r2, #48] @ 0x30 801f7f2: 4b2f ldr r3, [pc, #188] @ (801f8b0 ) 801f7f4: 6b1b ldr r3, [r3, #48] @ 0x30 801f7f6: f003 0308 and.w r3, r3, #8 801f7fa: 617b str r3, [r7, #20] 801f7fc: 697b ldr r3, [r7, #20] /**USART2 GPIO Configuration PD5 ------> USART2_TX PD6 ------> USART2_RX */ GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; 801f7fe: 2360 movs r3, #96 @ 0x60 801f800: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801f802: 2302 movs r3, #2 801f804: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 801f806: 2300 movs r3, #0 801f808: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 801f80a: 2303 movs r3, #3 801f80c: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 801f80e: 2307 movs r3, #7 801f810: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 801f812: f107 031c add.w r3, r7, #28 801f816: 4619 mov r1, r3 801f818: 4826 ldr r0, [pc, #152] @ (801f8b4 ) 801f81a: f002 ff3d bl 8022698 /* USART2 interrupt Init */ HAL_NVIC_SetPriority(USART2_IRQn, 10, 0); 801f81e: 2200 movs r2, #0 801f820: 210a movs r1, #10 801f822: 2026 movs r0, #38 @ 0x26 801f824: f001 feb3 bl 802158e HAL_NVIC_EnableIRQ(USART2_IRQn); 801f828: 2026 movs r0, #38 @ 0x26 801f82a: f001 fecc bl 80215c6 HAL_NVIC_EnableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 801f82e: e039 b.n 801f8a4 else if(uartHandle->Instance==USART3) 801f830: 687b ldr r3, [r7, #4] 801f832: 681b ldr r3, [r3, #0] 801f834: 4a20 ldr r2, [pc, #128] @ (801f8b8 ) 801f836: 4293 cmp r3, r2 801f838: d134 bne.n 801f8a4 __HAL_RCC_USART3_CLK_ENABLE(); 801f83a: 2300 movs r3, #0 801f83c: 613b str r3, [r7, #16] 801f83e: 4b1c ldr r3, [pc, #112] @ (801f8b0 ) 801f840: 6c1b ldr r3, [r3, #64] @ 0x40 801f842: 4a1b ldr r2, [pc, #108] @ (801f8b0 ) 801f844: f443 2380 orr.w r3, r3, #262144 @ 0x40000 801f848: 6413 str r3, [r2, #64] @ 0x40 801f84a: 4b19 ldr r3, [pc, #100] @ (801f8b0 ) 801f84c: 6c1b ldr r3, [r3, #64] @ 0x40 801f84e: f403 2380 and.w r3, r3, #262144 @ 0x40000 801f852: 613b str r3, [r7, #16] 801f854: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOD_CLK_ENABLE(); 801f856: 2300 movs r3, #0 801f858: 60fb str r3, [r7, #12] 801f85a: 4b15 ldr r3, [pc, #84] @ (801f8b0 ) 801f85c: 6b1b ldr r3, [r3, #48] @ 0x30 801f85e: 4a14 ldr r2, [pc, #80] @ (801f8b0 ) 801f860: f043 0308 orr.w r3, r3, #8 801f864: 6313 str r3, [r2, #48] @ 0x30 801f866: 4b12 ldr r3, [pc, #72] @ (801f8b0 ) 801f868: 6b1b ldr r3, [r3, #48] @ 0x30 801f86a: f003 0308 and.w r3, r3, #8 801f86e: 60fb str r3, [r7, #12] 801f870: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; 801f872: f44f 7340 mov.w r3, #768 @ 0x300 801f876: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 801f878: 2302 movs r3, #2 801f87a: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; 801f87c: 2300 movs r3, #0 801f87e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 801f880: 2303 movs r3, #3 801f882: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; 801f884: 2307 movs r3, #7 801f886: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 801f888: f107 031c add.w r3, r7, #28 801f88c: 4619 mov r1, r3 801f88e: 4809 ldr r0, [pc, #36] @ (801f8b4 ) 801f890: f002 ff02 bl 8022698 HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); // 0으로 낮춰보기 801f894: 2201 movs r2, #1 801f896: 2100 movs r1, #0 801f898: 2027 movs r0, #39 @ 0x27 801f89a: f001 fe78 bl 802158e HAL_NVIC_EnableIRQ(USART3_IRQn); 801f89e: 2027 movs r0, #39 @ 0x27 801f8a0: f001 fe91 bl 80215c6 } 801f8a4: bf00 nop 801f8a6: 3730 adds r7, #48 @ 0x30 801f8a8: 46bd mov sp, r7 801f8aa: bd80 pop {r7, pc} 801f8ac: 40004400 .word 0x40004400 801f8b0: 40023800 .word 0x40023800 801f8b4: 40020c00 .word 0x40020c00 801f8b8: 40004800 .word 0x40004800 0801f8bc : void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) { 801f8bc: b580 push {r7, lr} 801f8be: b082 sub sp, #8 801f8c0: af00 add r7, sp, #0 801f8c2: 6078 str r0, [r7, #4] if(uartHandle->Instance==USART2) 801f8c4: 687b ldr r3, [r7, #4] 801f8c6: 681b ldr r3, [r3, #0] 801f8c8: 4a13 ldr r2, [pc, #76] @ (801f918 ) 801f8ca: 4293 cmp r3, r2 801f8cc: d10d bne.n 801f8ea { /* USER CODE BEGIN USART2_MspDeInit 0 */ /* USER CODE END USART2_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_USART2_CLK_DISABLE(); 801f8ce: 4b13 ldr r3, [pc, #76] @ (801f91c ) 801f8d0: 6c1b ldr r3, [r3, #64] @ 0x40 801f8d2: 4a12 ldr r2, [pc, #72] @ (801f91c ) 801f8d4: f423 3300 bic.w r3, r3, #131072 @ 0x20000 801f8d8: 6413 str r3, [r2, #64] @ 0x40 /**USART2 GPIO Configuration PD5 ------> USART2_TX PD6 ------> USART2_RX */ HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6); 801f8da: 2160 movs r1, #96 @ 0x60 801f8dc: 4810 ldr r0, [pc, #64] @ (801f920 ) 801f8de: f003 f86f bl 80229c0 /* USART2 interrupt Deinit */ HAL_NVIC_DisableIRQ(USART2_IRQn); 801f8e2: 2026 movs r0, #38 @ 0x26 801f8e4: f001 fe7d bl 80215e2 HAL_NVIC_DisableIRQ(USART3_IRQn); /* USER CODE BEGIN USART3_MspDeInit 1 */ /* USER CODE END USART3_MspDeInit 1 */ } } 801f8e8: e012 b.n 801f910 else if(uartHandle->Instance==USART3) 801f8ea: 687b ldr r3, [r7, #4] 801f8ec: 681b ldr r3, [r3, #0] 801f8ee: 4a0d ldr r2, [pc, #52] @ (801f924 ) 801f8f0: 4293 cmp r3, r2 801f8f2: d10d bne.n 801f910 __HAL_RCC_USART3_CLK_DISABLE(); 801f8f4: 4b09 ldr r3, [pc, #36] @ (801f91c ) 801f8f6: 6c1b ldr r3, [r3, #64] @ 0x40 801f8f8: 4a08 ldr r2, [pc, #32] @ (801f91c ) 801f8fa: f423 2380 bic.w r3, r3, #262144 @ 0x40000 801f8fe: 6413 str r3, [r2, #64] @ 0x40 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10); 801f900: f44f 61e0 mov.w r1, #1792 @ 0x700 801f904: 4806 ldr r0, [pc, #24] @ (801f920 ) 801f906: f003 f85b bl 80229c0 HAL_NVIC_DisableIRQ(USART3_IRQn); 801f90a: 2027 movs r0, #39 @ 0x27 801f90c: f001 fe69 bl 80215e2 } 801f910: bf00 nop 801f912: 3708 adds r7, #8 801f914: 46bd mov sp, r7 801f916: bd80 pop {r7, pc} 801f918: 40004400 .word 0x40004400 801f91c: 40023800 .word 0x40023800 801f920: 40020c00 .word 0x40020c00 801f924: 40004800 .word 0x40004800 0801f928 : /* USER CODE BEGIN 1 */ void UART_PutData(UART_HandleTypeDef *huart, uint8_t *data, uint8_t size ) //in queue { 801f928: b590 push {r4, r7, lr} 801f92a: b089 sub sp, #36 @ 0x24 801f92c: af00 add r7, sp, #0 801f92e: 60f8 str r0, [r7, #12] 801f930: 60b9 str r1, [r7, #8] 801f932: 4613 mov r3, r2 801f934: 71fb strb r3, [r7, #7] uint8_t *tx; if(size==0){ //string size check 801f936: 79fb ldrb r3, [r7, #7] 801f938: 2b00 cmp r3, #0 801f93a: d110 bne.n 801f95e uint8_t *str_data=data; 801f93c: 68bb ldr r3, [r7, #8] 801f93e: 61fb str r3, [r7, #28] while(*str_data++!='\0') { 801f940: e005 b.n 801f94e if(++size==MAX_PACKET_SIZE) break; 801f942: 79fb ldrb r3, [r7, #7] 801f944: 3301 adds r3, #1 801f946: 71fb strb r3, [r7, #7] 801f948: 79fb ldrb r3, [r7, #7] 801f94a: 2b80 cmp r3, #128 @ 0x80 801f94c: d006 beq.n 801f95c while(*str_data++!='\0') { 801f94e: 69fb ldr r3, [r7, #28] 801f950: 1c5a adds r2, r3, #1 801f952: 61fa str r2, [r7, #28] 801f954: 781b ldrb r3, [r3, #0] 801f956: 2b00 cmp r3, #0 801f958: d1f3 bne.n 801f942 801f95a: e000 b.n 801f95e if(++size==MAX_PACKET_SIZE) break; 801f95c: bf00 nop } } if(huart->Instance==USART2) { 801f95e: 68fb ldr r3, [r7, #12] 801f960: 681b ldr r3, [r3, #0] 801f962: 4a70 ldr r2, [pc, #448] @ (801fb24 ) 801f964: 4293 cmp r3, r2 801f966: d169 bne.n 801fa3c #if MAX_TXBUFFER_SIZE_UART2 != 0x100 if( uart_tx_uart2.head!=((uart_tx_uart2.tail+1)&(MAX_TXBUFFER_SIZE_UART2-1)) ) //not full 801f968: 4b6f ldr r3, [pc, #444] @ (801fb28 ) 801f96a: 781b ldrb r3, [r3, #0] 801f96c: 461a mov r2, r3 801f96e: 4b6e ldr r3, [pc, #440] @ (801fb28 ) 801f970: 785b ldrb r3, [r3, #1] 801f972: 3301 adds r3, #1 801f974: f003 033f and.w r3, r3, #63 @ 0x3f 801f978: 429a cmp r2, r3 801f97a: d035 beq.n 801f9e8 #else if( uart_tx_uart2.head!=(uart_tx_uart2.tail+1) ) #endif { for(uint8_t i=0; i uart_tx_uart2.buffer[uart_tx_uart2.tail][i]=data[i]; 801f982: 7efb ldrb r3, [r7, #27] 801f984: 68ba ldr r2, [r7, #8] 801f986: 441a add r2, r3 801f988: 4b67 ldr r3, [pc, #412] @ (801fb28 ) 801f98a: 785b ldrb r3, [r3, #1] 801f98c: 461c mov r4, r3 801f98e: 7efb ldrb r3, [r7, #27] 801f990: 7810 ldrb r0, [r2, #0] 801f992: 4965 ldr r1, [pc, #404] @ (801fb28 ) 801f994: 01e2 lsls r2, r4, #7 801f996: 440a add r2, r1 801f998: 4413 add r3, r2 801f99a: 3302 adds r3, #2 801f99c: 4602 mov r2, r0 801f99e: 701a strb r2, [r3, #0] for(uint8_t i=0; i } uart_tx_uart2.size[uart_tx_uart2.tail]=size; 801f9ae: 4b5e ldr r3, [pc, #376] @ (801fb28 ) 801f9b0: 785b ldrb r3, [r3, #1] 801f9b2: 461a mov r2, r3 801f9b4: 4b5c ldr r3, [pc, #368] @ (801fb28 ) 801f9b6: 4413 add r3, r2 801f9b8: f503 5300 add.w r3, r3, #8192 @ 0x2000 801f9bc: 3302 adds r3, #2 801f9be: 79fa ldrb r2, [r7, #7] 801f9c0: 701a strb r2, [r3, #0] HAL_NVIC_DisableIRQ(USART2_IRQn); 801f9c2: 2026 movs r0, #38 @ 0x26 801f9c4: f001 fe0d bl 80215e2 uart_tx_uart2.tail++; 801f9c8: 4b57 ldr r3, [pc, #348] @ (801fb28 ) 801f9ca: 785b ldrb r3, [r3, #1] 801f9cc: 3301 adds r3, #1 801f9ce: b2da uxtb r2, r3 801f9d0: 4b55 ldr r3, [pc, #340] @ (801fb28 ) 801f9d2: 705a strb r2, [r3, #1] #if MAX_TXBUFFER_SIZE_UART2 != 0x100 uart_tx_uart2.tail &= MAX_TXBUFFER_SIZE_UART2-1; //because MAX_TXBUFFER_SIZE != 0x100 801f9d4: 4b54 ldr r3, [pc, #336] @ (801fb28 ) 801f9d6: 785b ldrb r3, [r3, #1] 801f9d8: f003 033f and.w r3, r3, #63 @ 0x3f 801f9dc: b2da uxtb r2, r3 801f9de: 4b52 ldr r3, [pc, #328] @ (801fb28 ) 801f9e0: 705a strb r2, [r3, #1] #endif HAL_NVIC_EnableIRQ(USART2_IRQn); 801f9e2: 2026 movs r0, #38 @ 0x26 801f9e4: f001 fdef bl 80215c6 } HAL_NVIC_DisableIRQ(USART2_IRQn); 801f9e8: 2026 movs r0, #38 @ 0x26 801f9ea: f001 fdfa bl 80215e2 if(huart2.gState==HAL_UART_STATE_READY) { //uart ready check 801f9ee: 4b4f ldr r3, [pc, #316] @ (801fb2c ) 801f9f0: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 801f9f4: b2db uxtb r3, r3 801f9f6: 2b20 cmp r3, #32 801f9f8: d11d bne.n 801fa36 tx=uart_tx_uart2.buffer[uart_tx_uart2.head]; 801f9fa: 4b4b ldr r3, [pc, #300] @ (801fb28 ) 801f9fc: 781b ldrb r3, [r3, #0] 801f9fe: 01db lsls r3, r3, #7 801fa00: 4a49 ldr r2, [pc, #292] @ (801fb28 ) 801fa02: 4413 add r3, r2 801fa04: 3302 adds r3, #2 801fa06: 617b str r3, [r7, #20] uart_tx_uart2.head++; 801fa08: 4b47 ldr r3, [pc, #284] @ (801fb28 ) 801fa0a: 781b ldrb r3, [r3, #0] 801fa0c: 3301 adds r3, #1 801fa0e: b2da uxtb r2, r3 801fa10: 4b45 ldr r3, [pc, #276] @ (801fb28 ) 801fa12: 701a strb r2, [r3, #0] #if MAX_TXBUFFER_SIZE_UART2 != 0x100 uart_tx_uart2.head &= MAX_TXBUFFER_SIZE_UART2-1; //because MAX_TXBUFFER_SIZE != 0x100 801fa14: 4b44 ldr r3, [pc, #272] @ (801fb28 ) 801fa16: 781b ldrb r3, [r3, #0] 801fa18: f003 033f and.w r3, r3, #63 @ 0x3f 801fa1c: b2da uxtb r2, r3 801fa1e: 4b42 ldr r3, [pc, #264] @ (801fb28 ) 801fa20: 701a strb r2, [r3, #0] #endif HAL_NVIC_EnableIRQ(USART2_IRQn); 801fa22: 2026 movs r0, #38 @ 0x26 801fa24: f001 fdcf bl 80215c6 HAL_UART_Transmit_IT(huart, tx, size); 801fa28: 79fb ldrb r3, [r7, #7] 801fa2a: b29b uxth r3, r3 801fa2c: 461a mov r2, r3 801fa2e: 6979 ldr r1, [r7, #20] 801fa30: 68f8 ldr r0, [r7, #12] 801fa32: f007 fe08 bl 8027646 } HAL_NVIC_EnableIRQ(USART2_IRQn); 801fa36: 2026 movs r0, #38 @ 0x26 801fa38: f001 fdc5 bl 80215c6 } if(huart->Instance==USART3) { 801fa3c: 68fb ldr r3, [r7, #12] 801fa3e: 681b ldr r3, [r3, #0] 801fa40: 4a3b ldr r2, [pc, #236] @ (801fb30 ) 801fa42: 4293 cmp r3, r2 801fa44: d169 bne.n 801fb1a #if MAX_TXBUFFER_SIZE_UART3 != 0x100 if( uart_tx_uart3.head!=((uart_tx_uart3.tail+1)&(MAX_TXBUFFER_SIZE_UART3-1)) ) //not full 801fa46: 4b3b ldr r3, [pc, #236] @ (801fb34 ) 801fa48: 781b ldrb r3, [r3, #0] 801fa4a: 461a mov r2, r3 801fa4c: 4b39 ldr r3, [pc, #228] @ (801fb34 ) 801fa4e: 785b ldrb r3, [r3, #1] 801fa50: 3301 adds r3, #1 801fa52: f003 033f and.w r3, r3, #63 @ 0x3f 801fa56: 429a cmp r2, r3 801fa58: d035 beq.n 801fac6 #else if( uart_tx_uart3.head!=(uart_tx_uar3.tail+1) ) #endif { for(uint8_t i=0; i uart_tx_uart3.buffer[uart_tx_uart3.tail][i]=data[i]; 801fa60: 7ebb ldrb r3, [r7, #26] 801fa62: 68ba ldr r2, [r7, #8] 801fa64: 441a add r2, r3 801fa66: 4b33 ldr r3, [pc, #204] @ (801fb34 ) 801fa68: 785b ldrb r3, [r3, #1] 801fa6a: 461c mov r4, r3 801fa6c: 7ebb ldrb r3, [r7, #26] 801fa6e: 7810 ldrb r0, [r2, #0] 801fa70: 4930 ldr r1, [pc, #192] @ (801fb34 ) 801fa72: 01e2 lsls r2, r4, #7 801fa74: 440a add r2, r1 801fa76: 4413 add r3, r2 801fa78: 3302 adds r3, #2 801fa7a: 4602 mov r2, r0 801fa7c: 701a strb r2, [r3, #0] for(uint8_t i=0; i } uart_tx_uart3.size[uart_tx_uart3.tail]=size; 801fa8c: 4b29 ldr r3, [pc, #164] @ (801fb34 ) 801fa8e: 785b ldrb r3, [r3, #1] 801fa90: 461a mov r2, r3 801fa92: 4b28 ldr r3, [pc, #160] @ (801fb34 ) 801fa94: 4413 add r3, r2 801fa96: f503 5300 add.w r3, r3, #8192 @ 0x2000 801fa9a: 3302 adds r3, #2 801fa9c: 79fa ldrb r2, [r7, #7] 801fa9e: 701a strb r2, [r3, #0] HAL_NVIC_DisableIRQ(USART3_IRQn); 801faa0: 2027 movs r0, #39 @ 0x27 801faa2: f001 fd9e bl 80215e2 uart_tx_uart3.tail++; 801faa6: 4b23 ldr r3, [pc, #140] @ (801fb34 ) 801faa8: 785b ldrb r3, [r3, #1] 801faaa: 3301 adds r3, #1 801faac: b2da uxtb r2, r3 801faae: 4b21 ldr r3, [pc, #132] @ (801fb34 ) 801fab0: 705a strb r2, [r3, #1] #if MAX_TXBUFFER_SIZE_UART3 != 0x100 uart_tx_uart3.tail &= MAX_TXBUFFER_SIZE_UART3-1; //because MAX_TXBUFFER_SIZE != 0x100 801fab2: 4b20 ldr r3, [pc, #128] @ (801fb34 ) 801fab4: 785b ldrb r3, [r3, #1] 801fab6: f003 033f and.w r3, r3, #63 @ 0x3f 801faba: b2da uxtb r2, r3 801fabc: 4b1d ldr r3, [pc, #116] @ (801fb34 ) 801fabe: 705a strb r2, [r3, #1] #endif HAL_NVIC_EnableIRQ(USART3_IRQn); 801fac0: 2027 movs r0, #39 @ 0x27 801fac2: f001 fd80 bl 80215c6 } HAL_NVIC_DisableIRQ(USART3_IRQn); 801fac6: 2027 movs r0, #39 @ 0x27 801fac8: f001 fd8b bl 80215e2 if(huart3.gState==HAL_UART_STATE_READY) { //uart ready check 801facc: 4b1a ldr r3, [pc, #104] @ (801fb38 ) 801face: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 801fad2: b2db uxtb r3, r3 801fad4: 2b20 cmp r3, #32 801fad6: d11d bne.n 801fb14 tx=uart_tx_uart3.buffer[uart_tx_uart3.head]; 801fad8: 4b16 ldr r3, [pc, #88] @ (801fb34 ) 801fada: 781b ldrb r3, [r3, #0] 801fadc: 01db lsls r3, r3, #7 801fade: 4a15 ldr r2, [pc, #84] @ (801fb34 ) 801fae0: 4413 add r3, r2 801fae2: 3302 adds r3, #2 801fae4: 617b str r3, [r7, #20] uart_tx_uart3.head++; 801fae6: 4b13 ldr r3, [pc, #76] @ (801fb34 ) 801fae8: 781b ldrb r3, [r3, #0] 801faea: 3301 adds r3, #1 801faec: b2da uxtb r2, r3 801faee: 4b11 ldr r3, [pc, #68] @ (801fb34 ) 801faf0: 701a strb r2, [r3, #0] #if MAX_TXBUFFER_SIZE_UART3 != 0x100 uart_tx_uart3.head &= MAX_TXBUFFER_SIZE_UART3-1; //because MAX_TXBUFFER_SIZE != 0x100 801faf2: 4b10 ldr r3, [pc, #64] @ (801fb34 ) 801faf4: 781b ldrb r3, [r3, #0] 801faf6: f003 033f and.w r3, r3, #63 @ 0x3f 801fafa: b2da uxtb r2, r3 801fafc: 4b0d ldr r3, [pc, #52] @ (801fb34 ) 801fafe: 701a strb r2, [r3, #0] #endif HAL_NVIC_EnableIRQ(USART3_IRQn); 801fb00: 2027 movs r0, #39 @ 0x27 801fb02: f001 fd60 bl 80215c6 HAL_UART_Transmit_IT(huart, tx, size); 801fb06: 79fb ldrb r3, [r7, #7] 801fb08: b29b uxth r3, r3 801fb0a: 461a mov r2, r3 801fb0c: 6979 ldr r1, [r7, #20] 801fb0e: 68f8 ldr r0, [r7, #12] 801fb10: f007 fd99 bl 8027646 } HAL_NVIC_EnableIRQ(USART3_IRQn); 801fb14: 2027 movs r0, #39 @ 0x27 801fb16: f001 fd56 bl 80215c6 } } 801fb1a: bf00 nop 801fb1c: 3724 adds r7, #36 @ 0x24 801fb1e: 46bd mov sp, r7 801fb20: bd90 pop {r4, r7, pc} 801fb22: bf00 nop 801fb24: 40004400 .word 0x40004400 801fb28: 20000f18 .word 0x20000f18 801fb2c: 200053a8 .word 0x200053a8 801fb30: 40004800 .word 0x40004800 801fb34: 20003160 .word 0x20003160 801fb38: 200053ec .word 0x200053ec 0801fb3c : //-------interrupt tx, pull out data in queue buffer(dequeue)--------- void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 801fb3c: b580 push {r7, lr} 801fb3e: b084 sub sp, #16 801fb40: af00 add r7, sp, #0 801fb42: 6078 str r0, [r7, #4] uint8_t *tx; uint8_t size; if(huart->Instance==USART2) { 801fb44: 687b ldr r3, [r7, #4] 801fb46: 681b ldr r3, [r3, #0] 801fb48: 4a30 ldr r2, [pc, #192] @ (801fc0c ) 801fb4a: 4293 cmp r3, r2 801fb4c: d12a bne.n 801fba4 if(uart_tx_uart2.head!=uart_tx_uart2.tail) { //not empty 801fb4e: 4b30 ldr r3, [pc, #192] @ (801fc10 ) 801fb50: 781a ldrb r2, [r3, #0] 801fb52: 4b2f ldr r3, [pc, #188] @ (801fc10 ) 801fb54: 785b ldrb r3, [r3, #1] 801fb56: 429a cmp r2, r3 801fb58: d024 beq.n 801fba4 tx=uart_tx_uart2.buffer[uart_tx_uart2.head]; 801fb5a: 4b2d ldr r3, [pc, #180] @ (801fc10 ) 801fb5c: 781b ldrb r3, [r3, #0] 801fb5e: 01db lsls r3, r3, #7 801fb60: 4a2b ldr r2, [pc, #172] @ (801fc10 ) 801fb62: 4413 add r3, r2 801fb64: 3302 adds r3, #2 801fb66: 60fb str r3, [r7, #12] size=uart_tx_uart2.size[uart_tx_uart2.head]; 801fb68: 4b29 ldr r3, [pc, #164] @ (801fc10 ) 801fb6a: 781b ldrb r3, [r3, #0] 801fb6c: 461a mov r2, r3 801fb6e: 4b28 ldr r3, [pc, #160] @ (801fc10 ) 801fb70: 4413 add r3, r2 801fb72: f503 5300 add.w r3, r3, #8192 @ 0x2000 801fb76: 3302 adds r3, #2 801fb78: 781b ldrb r3, [r3, #0] 801fb7a: 72fb strb r3, [r7, #11] uart_tx_uart2.head++; 801fb7c: 4b24 ldr r3, [pc, #144] @ (801fc10 ) 801fb7e: 781b ldrb r3, [r3, #0] 801fb80: 3301 adds r3, #1 801fb82: b2da uxtb r2, r3 801fb84: 4b22 ldr r3, [pc, #136] @ (801fc10 ) 801fb86: 701a strb r2, [r3, #0] #if MAX_TXBUFFER_SIZE_UART2 != 0x100 uart_tx_uart2.head &= MAX_TXBUFFER_SIZE_UART2-1; 801fb88: 4b21 ldr r3, [pc, #132] @ (801fc10 ) 801fb8a: 781b ldrb r3, [r3, #0] 801fb8c: f003 033f and.w r3, r3, #63 @ 0x3f 801fb90: b2da uxtb r2, r3 801fb92: 4b1f ldr r3, [pc, #124] @ (801fc10 ) 801fb94: 701a strb r2, [r3, #0] #endif HAL_UART_Transmit_IT(&huart2, tx, size); 801fb96: 7afb ldrb r3, [r7, #11] 801fb98: b29b uxth r3, r3 801fb9a: 461a mov r2, r3 801fb9c: 68f9 ldr r1, [r7, #12] 801fb9e: 481d ldr r0, [pc, #116] @ (801fc14 ) 801fba0: f007 fd51 bl 8027646 } } if(huart->Instance==USART3) { 801fba4: 687b ldr r3, [r7, #4] 801fba6: 681b ldr r3, [r3, #0] 801fba8: 4a1b ldr r2, [pc, #108] @ (801fc18 ) 801fbaa: 4293 cmp r3, r2 801fbac: d12a bne.n 801fc04 if(uart_tx_uart3.head!=uart_tx_uart3.tail) { //not empty 801fbae: 4b1b ldr r3, [pc, #108] @ (801fc1c ) 801fbb0: 781a ldrb r2, [r3, #0] 801fbb2: 4b1a ldr r3, [pc, #104] @ (801fc1c ) 801fbb4: 785b ldrb r3, [r3, #1] 801fbb6: 429a cmp r2, r3 801fbb8: d024 beq.n 801fc04 tx=uart_tx_uart3.buffer[uart_tx_uart3.head]; 801fbba: 4b18 ldr r3, [pc, #96] @ (801fc1c ) 801fbbc: 781b ldrb r3, [r3, #0] 801fbbe: 01db lsls r3, r3, #7 801fbc0: 4a16 ldr r2, [pc, #88] @ (801fc1c ) 801fbc2: 4413 add r3, r2 801fbc4: 3302 adds r3, #2 801fbc6: 60fb str r3, [r7, #12] size=uart_tx_uart3.size[uart_tx_uart3.head]; 801fbc8: 4b14 ldr r3, [pc, #80] @ (801fc1c ) 801fbca: 781b ldrb r3, [r3, #0] 801fbcc: 461a mov r2, r3 801fbce: 4b13 ldr r3, [pc, #76] @ (801fc1c ) 801fbd0: 4413 add r3, r2 801fbd2: f503 5300 add.w r3, r3, #8192 @ 0x2000 801fbd6: 3302 adds r3, #2 801fbd8: 781b ldrb r3, [r3, #0] 801fbda: 72fb strb r3, [r7, #11] uart_tx_uart3.head++; 801fbdc: 4b0f ldr r3, [pc, #60] @ (801fc1c ) 801fbde: 781b ldrb r3, [r3, #0] 801fbe0: 3301 adds r3, #1 801fbe2: b2da uxtb r2, r3 801fbe4: 4b0d ldr r3, [pc, #52] @ (801fc1c ) 801fbe6: 701a strb r2, [r3, #0] #if MAX_TXBUFFER_SIZE_UART3 != 0x100 uart_tx_uart3.head &= MAX_TXBUFFER_SIZE_UART3-1; 801fbe8: 4b0c ldr r3, [pc, #48] @ (801fc1c ) 801fbea: 781b ldrb r3, [r3, #0] 801fbec: f003 033f and.w r3, r3, #63 @ 0x3f 801fbf0: b2da uxtb r2, r3 801fbf2: 4b0a ldr r3, [pc, #40] @ (801fc1c ) 801fbf4: 701a strb r2, [r3, #0] #endif HAL_UART_Transmit_IT(huart, tx, size); 801fbf6: 7afb ldrb r3, [r7, #11] 801fbf8: b29b uxth r3, r3 801fbfa: 461a mov r2, r3 801fbfc: 68f9 ldr r1, [r7, #12] 801fbfe: 6878 ldr r0, [r7, #4] 801fc00: f007 fd21 bl 8027646 } } } 801fc04: bf00 nop 801fc06: 3710 adds r7, #16 801fc08: 46bd mov sp, r7 801fc0a: bd80 pop {r7, pc} 801fc0c: 40004400 .word 0x40004400 801fc10: 20000f18 .word 0x20000f18 801fc14: 200053a8 .word 0x200053a8 801fc18: 40004800 .word 0x40004800 801fc1c: 20003160 .word 0x20003160 0801fc20 : //------interrupt rx, receive data------------------------------- void Rx_Interrupt_IT(UART_HandleTypeDef *huart,uint8_t rx_data) { 801fc20: b580 push {r7, lr} 801fc22: b082 sub sp, #8 801fc24: af00 add r7, sp, #0 801fc26: 6078 str r0, [r7, #4] 801fc28: 460b mov r3, r1 801fc2a: 70fb strb r3, [r7, #3] HAL_UART_Receive_IT(huart, &rx_data, 1); 801fc2c: 1cfb adds r3, r7, #3 801fc2e: 2201 movs r2, #1 801fc30: 4619 mov r1, r3 801fc32: 6878 ldr r0, [r7, #4] 801fc34: f007 fd4c bl 80276d0 } 801fc38: bf00 nop 801fc3a: 3708 adds r7, #8 801fc3c: 46bd mov sp, r7 801fc3e: bd80 pop {r7, pc} 0801fc40 : } */ //---------interrupt rx, data in queue buffer(enqueue) ------------- void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { 801fc40: b480 push {r7} 801fc42: b083 sub sp, #12 801fc44: af00 add r7, sp, #0 801fc46: 6078 str r0, [r7, #4] /* Check that a Rx process is ongoing */ if(huart->Instance==USART2) { 801fc48: 687b ldr r3, [r7, #4] 801fc4a: 681b ldr r3, [r3, #0] 801fc4c: 4a27 ldr r2, [pc, #156] @ (801fcec ) 801fc4e: 4293 cmp r3, r2 801fc50: d120 bne.n 801fc94 if(uart_rx_uart2.head!=((uart_rx_uart2.tail+1)&(MAX_RXBUFFER_SIZE_UART2-1)) ) { //if not full 801fc52: 4b27 ldr r3, [pc, #156] @ (801fcf0 ) 801fc54: 881b ldrh r3, [r3, #0] 801fc56: 461a mov r2, r3 801fc58: 4b25 ldr r3, [pc, #148] @ (801fcf0 ) 801fc5a: 885b ldrh r3, [r3, #2] 801fc5c: 3301 adds r3, #1 801fc5e: b2db uxtb r3, r3 801fc60: 429a cmp r2, r3 801fc62: d017 beq.n 801fc94 uart_rx_uart2.buffer[uart_rx_uart2.tail]=(uint8_t) READ_REG(huart->Instance->DR); //enqueue 801fc64: 687b ldr r3, [r7, #4] 801fc66: 681b ldr r3, [r3, #0] 801fc68: 685b ldr r3, [r3, #4] 801fc6a: b2da uxtb r2, r3 801fc6c: 4b20 ldr r3, [pc, #128] @ (801fcf0 ) 801fc6e: 885b ldrh r3, [r3, #2] 801fc70: 4611 mov r1, r2 801fc72: 4a1f ldr r2, [pc, #124] @ (801fcf0 ) 801fc74: 005b lsls r3, r3, #1 801fc76: 4413 add r3, r2 801fc78: 460a mov r2, r1 801fc7a: 809a strh r2, [r3, #4] uart_rx_uart2.tail++; 801fc7c: 4b1c ldr r3, [pc, #112] @ (801fcf0 ) 801fc7e: 885b ldrh r3, [r3, #2] 801fc80: 3301 adds r3, #1 801fc82: b29a uxth r2, r3 801fc84: 4b1a ldr r3, [pc, #104] @ (801fcf0 ) 801fc86: 805a strh r2, [r3, #2] uart_rx_uart2.tail &= MAX_RXBUFFER_SIZE_UART2-1; 801fc88: 4b19 ldr r3, [pc, #100] @ (801fcf0 ) 801fc8a: 885b ldrh r3, [r3, #2] 801fc8c: b2db uxtb r3, r3 801fc8e: b29a uxth r2, r3 801fc90: 4b17 ldr r3, [pc, #92] @ (801fcf0 ) 801fc92: 805a strh r2, [r3, #2] } } if(huart->Instance==USART3) { 801fc94: 687b ldr r3, [r7, #4] 801fc96: 681b ldr r3, [r3, #0] 801fc98: 4a16 ldr r2, [pc, #88] @ (801fcf4 ) 801fc9a: 4293 cmp r3, r2 801fc9c: d120 bne.n 801fce0 if(uart_rx_uart3.head!=((uart_rx_uart3.tail+1)&(MAX_RXBUFFER_SIZE_UART3-1)) ) { //if not full 801fc9e: 4b16 ldr r3, [pc, #88] @ (801fcf8 ) 801fca0: 881b ldrh r3, [r3, #0] 801fca2: 461a mov r2, r3 801fca4: 4b14 ldr r3, [pc, #80] @ (801fcf8 ) 801fca6: 885b ldrh r3, [r3, #2] 801fca8: 3301 adds r3, #1 801fcaa: b2db uxtb r3, r3 801fcac: 429a cmp r2, r3 801fcae: d017 beq.n 801fce0 uart_rx_uart3.buffer[uart_rx_uart3.tail]=(uint8_t) READ_REG(huart->Instance->DR); //enqueue 801fcb0: 687b ldr r3, [r7, #4] 801fcb2: 681b ldr r3, [r3, #0] 801fcb4: 685b ldr r3, [r3, #4] 801fcb6: b2da uxtb r2, r3 801fcb8: 4b0f ldr r3, [pc, #60] @ (801fcf8 ) 801fcba: 885b ldrh r3, [r3, #2] 801fcbc: 4611 mov r1, r2 801fcbe: 4a0e ldr r2, [pc, #56] @ (801fcf8 ) 801fcc0: 005b lsls r3, r3, #1 801fcc2: 4413 add r3, r2 801fcc4: 460a mov r2, r1 801fcc6: 809a strh r2, [r3, #4] uart_rx_uart3.tail++; 801fcc8: 4b0b ldr r3, [pc, #44] @ (801fcf8 ) 801fcca: 885b ldrh r3, [r3, #2] 801fccc: 3301 adds r3, #1 801fcce: b29a uxth r2, r3 801fcd0: 4b09 ldr r3, [pc, #36] @ (801fcf8 ) 801fcd2: 805a strh r2, [r3, #2] uart_rx_uart3.tail &= MAX_RXBUFFER_SIZE_UART3-1; 801fcd4: 4b08 ldr r3, [pc, #32] @ (801fcf8 ) 801fcd6: 885b ldrh r3, [r3, #2] 801fcd8: b2db uxtb r3, r3 801fcda: b29a uxth r2, r3 801fcdc: 4b06 ldr r3, [pc, #24] @ (801fcf8 ) 801fcde: 805a strh r2, [r3, #2] } } } 801fce0: bf00 nop 801fce2: 370c adds r7, #12 801fce4: 46bd mov sp, r7 801fce6: f85d 7b04 ldr.w r7, [sp], #4 801fcea: 4770 bx lr 801fcec: 40004400 .word 0x40004400 801fcf0: 20002f5c .word 0x20002f5c 801fcf4: 40004800 .word 0x40004800 801fcf8: 200051a4 .word 0x200051a4 0801fcfc : return 0xFF; } //----- data size check ------------------------------- uint16_t UART_Available(UART_HandleTypeDef *huart) { 801fcfc: b480 push {r7} 801fcfe: b085 sub sp, #20 801fd00: af00 add r7, sp, #0 801fd02: 6078 str r0, [r7, #4] if(huart->Instance==USART2) { 801fd04: 687b ldr r3, [r7, #4] 801fd06: 681b ldr r3, [r3, #0] 801fd08: 4a12 ldr r2, [pc, #72] @ (801fd54 ) 801fd0a: 4293 cmp r3, r2 801fd0c: d10a bne.n 801fd24 uint8_t data_size=uart_rx_uart2.tail-uart_rx_uart2.head; 801fd0e: 4b12 ldr r3, [pc, #72] @ (801fd58 ) 801fd10: 885b ldrh r3, [r3, #2] 801fd12: b2da uxtb r2, r3 801fd14: 4b10 ldr r3, [pc, #64] @ (801fd58 ) 801fd16: 881b ldrh r3, [r3, #0] 801fd18: b2db uxtb r3, r3 801fd1a: 1ad3 subs r3, r2, r3 801fd1c: 73bb strb r3, [r7, #14] data_size &= MAX_RXBUFFER_SIZE_UART2-1; return data_size; 801fd1e: 7bbb ldrb r3, [r7, #14] 801fd20: b29b uxth r3, r3 801fd22: e010 b.n 801fd46 } if(huart->Instance==USART3) { 801fd24: 687b ldr r3, [r7, #4] 801fd26: 681b ldr r3, [r3, #0] 801fd28: 4a0c ldr r2, [pc, #48] @ (801fd5c ) 801fd2a: 4293 cmp r3, r2 801fd2c: d10a bne.n 801fd44 uint8_t data_size=uart_rx_uart3.tail-uart_rx_uart3.head; 801fd2e: 4b0c ldr r3, [pc, #48] @ (801fd60 ) 801fd30: 885b ldrh r3, [r3, #2] 801fd32: b2da uxtb r2, r3 801fd34: 4b0a ldr r3, [pc, #40] @ (801fd60 ) 801fd36: 881b ldrh r3, [r3, #0] 801fd38: b2db uxtb r3, r3 801fd3a: 1ad3 subs r3, r2, r3 801fd3c: 73fb strb r3, [r7, #15] data_size &= MAX_RXBUFFER_SIZE_UART3-1; return data_size; 801fd3e: 7bfb ldrb r3, [r7, #15] 801fd40: b29b uxth r3, r3 801fd42: e000 b.n 801fd46 } return 0; 801fd44: 2300 movs r3, #0 } 801fd46: 4618 mov r0, r3 801fd48: 3714 adds r7, #20 801fd4a: 46bd mov sp, r7 801fd4c: f85d 7b04 ldr.w r7, [sp], #4 801fd50: 4770 bx lr 801fd52: bf00 nop 801fd54: 40004400 .word 0x40004400 801fd58: 20002f5c .word 0x20002f5c 801fd5c: 40004800 .word 0x40004800 801fd60: 200051a4 .word 0x200051a4 0801fd64 : UART_Puts(&huart2,prbuffer); } void UART3_printf(char* inbuf, ...) { 801fd64: b40f push {r0, r1, r2, r3} 801fd66: b580 push {r7, lr} 801fd68: b0c2 sub sp, #264 @ 0x108 801fd6a: af00 add r7, sp, #0 uint8_t prbuffer[255]; va_list pstart; va_start(pstart, inbuf); 801fd6c: f507 728a add.w r2, r7, #276 @ 0x114 801fd70: f507 7384 add.w r3, r7, #264 @ 0x108 801fd74: f5a3 7382 sub.w r3, r3, #260 @ 0x104 801fd78: 601a str r2, [r3, #0] vsprintf((char*)prbuffer,inbuf,pstart); 801fd7a: f507 7384 add.w r3, r7, #264 @ 0x108 801fd7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 801fd82: f107 0008 add.w r0, r7, #8 801fd86: 681a ldr r2, [r3, #0] 801fd88: f8d7 1110 ldr.w r1, [r7, #272] @ 0x110 801fd8c: f008 fb48 bl 8028420 va_end(pstart); UART_Puts(&huart3,prbuffer); 801fd90: f107 0308 add.w r3, r7, #8 801fd94: 2200 movs r2, #0 801fd96: 4619 mov r1, r3 801fd98: 4805 ldr r0, [pc, #20] @ (801fdb0 ) 801fd9a: f7ff fdc5 bl 801f928 } 801fd9e: bf00 nop 801fda0: f507 7784 add.w r7, r7, #264 @ 0x108 801fda4: 46bd mov sp, r7 801fda6: e8bd 4080 ldmia.w sp!, {r7, lr} 801fdaa: b004 add sp, #16 801fdac: 4770 bx lr 801fdae: bf00 nop 801fdb0: 200053ec .word 0x200053ec 0801fdb4 : void Debug_UART3_printf(char* inbuf, ...) // 충돌방지를 위해 선택적 출력용 (250705) { 801fdb4: b40f push {r0, r1, r2, r3} 801fdb6: b580 push {r7, lr} 801fdb8: b0c2 sub sp, #264 @ 0x108 801fdba: af00 add r7, sp, #0 if(!DebugingPrintActive) return; 801fdbc: 4b12 ldr r3, [pc, #72] @ (801fe08 ) 801fdbe: 781b ldrb r3, [r3, #0] 801fdc0: 2b00 cmp r3, #0 801fdc2: d019 beq.n 801fdf8 uint8_t prbuffer[255]; va_list pstart; va_start(pstart, inbuf); 801fdc4: f507 728a add.w r2, r7, #276 @ 0x114 801fdc8: f507 7384 add.w r3, r7, #264 @ 0x108 801fdcc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 801fdd0: 601a str r2, [r3, #0] vsprintf((char*)prbuffer,inbuf,pstart); 801fdd2: f507 7384 add.w r3, r7, #264 @ 0x108 801fdd6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 801fdda: f107 0008 add.w r0, r7, #8 801fdde: 681a ldr r2, [r3, #0] 801fde0: f8d7 1110 ldr.w r1, [r7, #272] @ 0x110 801fde4: f008 fb1c bl 8028420 va_end(pstart); UART_Puts(&huart3,prbuffer); 801fde8: f107 0308 add.w r3, r7, #8 801fdec: 2200 movs r2, #0 801fdee: 4619 mov r1, r3 801fdf0: 4806 ldr r0, [pc, #24] @ (801fe0c ) 801fdf2: f7ff fd99 bl 801f928 801fdf6: e000 b.n 801fdfa if(!DebugingPrintActive) return; 801fdf8: bf00 nop } 801fdfa: f507 7784 add.w r7, r7, #264 @ 0x108 801fdfe: 46bd mov sp, r7 801fe00: e8bd 4080 ldmia.w sp!, {r7, lr} 801fe04: b004 add sp, #16 801fe06: 4770 bx lr 801fe08: 20000c10 .word 0x20000c10 801fe0c: 200053ec .word 0x200053ec 0801fe10 : void Dummy_printf(char* inbuf, ...) { 801fe10: b40f push {r0, r1, r2, r3} 801fe12: b480 push {r7} 801fe14: af00 add r7, sp, #0 ; } 801fe16: bf00 nop 801fe18: 46bd mov sp, r7 801fe1a: f85d 7b04 ldr.w r7, [sp], #4 801fe1e: b004 add sp, #16 801fe20: 4770 bx lr ... 0801fe24 : int16_t UART_Getc_NoClear(UART_HandleTypeDef *huart,uint16_t pos) { 801fe24: b580 push {r7, lr} 801fe26: b084 sub sp, #16 801fe28: af00 add r7, sp, #0 801fe2a: 6078 str r0, [r7, #4] 801fe2c: 460b mov r3, r1 801fe2e: 807b strh r3, [r7, #2] uint8_t rcv_data; if(huart->Instance==USART2) { 801fe30: 687b ldr r3, [r7, #4] 801fe32: 681b ldr r3, [r3, #0] 801fe34: 4a1f ldr r2, [pc, #124] @ (801feb4 ) 801fe36: 4293 cmp r3, r2 801fe38: d118 bne.n 801fe6c if(UART_Available(&huart2)<=pos) return (int16_t)-1; 801fe3a: 481f ldr r0, [pc, #124] @ (801feb8 ) 801fe3c: f7ff ff5e bl 801fcfc 801fe40: 4603 mov r3, r0 801fe42: 461a mov r2, r3 801fe44: 887b ldrh r3, [r7, #2] 801fe46: 4293 cmp r3, r2 801fe48: d302 bcc.n 801fe50 801fe4a: f04f 33ff mov.w r3, #4294967295 801fe4e: e02d b.n 801feac else { rcv_data=uart_rx_uart2.buffer[(uart_rx_uart2.head+pos)&(MAX_RXBUFFER_SIZE_UART2-1)]; 801fe50: 4b1a ldr r3, [pc, #104] @ (801febc ) 801fe52: 881a ldrh r2, [r3, #0] 801fe54: 887b ldrh r3, [r7, #2] 801fe56: 4413 add r3, r2 801fe58: b29b uxth r3, r3 801fe5a: b2db uxtb r3, r3 801fe5c: 4a17 ldr r2, [pc, #92] @ (801febc ) 801fe5e: 005b lsls r3, r3, #1 801fe60: 4413 add r3, r2 801fe62: 889b ldrh r3, [r3, #4] 801fe64: 73fb strb r3, [r7, #15] return rcv_data; 801fe66: 7bfb ldrb r3, [r7, #15] 801fe68: b21b sxth r3, r3 801fe6a: e01f b.n 801feac } } if(huart->Instance==USART3) { 801fe6c: 687b ldr r3, [r7, #4] 801fe6e: 681b ldr r3, [r3, #0] 801fe70: 4a13 ldr r2, [pc, #76] @ (801fec0 ) 801fe72: 4293 cmp r3, r2 801fe74: d118 bne.n 801fea8 if(UART_Available(&huart3)<=pos) return (int16_t)-1; 801fe76: 4813 ldr r0, [pc, #76] @ (801fec4 ) 801fe78: f7ff ff40 bl 801fcfc 801fe7c: 4603 mov r3, r0 801fe7e: 461a mov r2, r3 801fe80: 887b ldrh r3, [r7, #2] 801fe82: 4293 cmp r3, r2 801fe84: d302 bcc.n 801fe8c 801fe86: f04f 33ff mov.w r3, #4294967295 801fe8a: e00f b.n 801feac else { rcv_data=uart_rx_uart3.buffer[(uart_rx_uart3.head+pos)&(MAX_RXBUFFER_SIZE_UART3-1)]; 801fe8c: 4b0e ldr r3, [pc, #56] @ (801fec8 ) 801fe8e: 881a ldrh r2, [r3, #0] 801fe90: 887b ldrh r3, [r7, #2] 801fe92: 4413 add r3, r2 801fe94: b29b uxth r3, r3 801fe96: b2db uxtb r3, r3 801fe98: 4a0b ldr r2, [pc, #44] @ (801fec8 ) 801fe9a: 005b lsls r3, r3, #1 801fe9c: 4413 add r3, r2 801fe9e: 889b ldrh r3, [r3, #4] 801fea0: 73fb strb r3, [r7, #15] return rcv_data; 801fea2: 7bfb ldrb r3, [r7, #15] 801fea4: b21b sxth r3, r3 801fea6: e001 b.n 801feac } } return (int16_t)-1; 801fea8: f04f 33ff mov.w r3, #4294967295 } 801feac: 4618 mov r0, r3 801feae: 3710 adds r7, #16 801feb0: 46bd mov sp, r7 801feb2: bd80 pop {r7, pc} 801feb4: 40004400 .word 0x40004400 801feb8: 200053a8 .word 0x200053a8 801febc: 20002f5c .word 0x20002f5c 801fec0: 40004800 .word 0x40004800 801fec4: 200053ec .word 0x200053ec 801fec8: 200051a4 .word 0x200051a4 0801fecc : void UART_Clear_Buffer(UART_HandleTypeDef *huart, uint16_t size) { 801fecc: b580 push {r7, lr} 801fece: b084 sub sp, #16 801fed0: af00 add r7, sp, #0 801fed2: 6078 str r0, [r7, #4] 801fed4: 460b mov r3, r1 801fed6: 807b strh r3, [r7, #2] uint8_t data_size; if(huart->Instance==USART2) { 801fed8: 687b ldr r3, [r7, #4] 801feda: 681b ldr r3, [r3, #0] 801fedc: 4a2c ldr r2, [pc, #176] @ (801ff90 ) 801fede: 4293 cmp r3, r2 801fee0: d126 bne.n 801ff30 HAL_NVIC_DisableIRQ(USART2_IRQn); 801fee2: 2026 movs r0, #38 @ 0x26 801fee4: f001 fb7d bl 80215e2 data_size=UART_Available(&huart2); 801fee8: 482a ldr r0, [pc, #168] @ (801ff94 ) 801feea: f7ff ff07 bl 801fcfc 801feee: 4603 mov r3, r0 801fef0: 73fb strb r3, [r7, #15] if(size==0) { //All Clear 801fef2: 887b ldrh r3, [r7, #2] 801fef4: 2b00 cmp r3, #0 801fef6: d104 bne.n 801ff02 uart_rx_uart2.head=uart_rx_uart2.tail; 801fef8: 4b27 ldr r3, [pc, #156] @ (801ff98 ) 801fefa: 885a ldrh r2, [r3, #2] 801fefc: 4b26 ldr r3, [pc, #152] @ (801ff98 ) 801fefe: 801a strh r2, [r3, #0] 801ff00: e013 b.n 801ff2a } else { if(data_size < size) size = data_size; 801ff02: 7bfb ldrb r3, [r7, #15] 801ff04: b29b uxth r3, r3 801ff06: 887a ldrh r2, [r7, #2] 801ff08: 429a cmp r2, r3 801ff0a: d901 bls.n 801ff10 801ff0c: 7bfb ldrb r3, [r7, #15] 801ff0e: 807b strh r3, [r7, #2] uart_rx_uart2.head += size; 801ff10: 4b21 ldr r3, [pc, #132] @ (801ff98 ) 801ff12: 881a ldrh r2, [r3, #0] 801ff14: 887b ldrh r3, [r7, #2] 801ff16: 4413 add r3, r2 801ff18: b29a uxth r2, r3 801ff1a: 4b1f ldr r3, [pc, #124] @ (801ff98 ) 801ff1c: 801a strh r2, [r3, #0] uart_rx_uart2.head &= MAX_RXBUFFER_SIZE_UART2-1; 801ff1e: 4b1e ldr r3, [pc, #120] @ (801ff98 ) 801ff20: 881b ldrh r3, [r3, #0] 801ff22: b2db uxtb r3, r3 801ff24: b29a uxth r2, r3 801ff26: 4b1c ldr r3, [pc, #112] @ (801ff98 ) 801ff28: 801a strh r2, [r3, #0] } HAL_NVIC_EnableIRQ(USART2_IRQn); 801ff2a: 2026 movs r0, #38 @ 0x26 801ff2c: f001 fb4b bl 80215c6 } if(huart->Instance==USART3) { 801ff30: 687b ldr r3, [r7, #4] 801ff32: 681b ldr r3, [r3, #0] 801ff34: 4a19 ldr r2, [pc, #100] @ (801ff9c ) 801ff36: 4293 cmp r3, r2 801ff38: d126 bne.n 801ff88 HAL_NVIC_DisableIRQ(USART3_IRQn); 801ff3a: 2027 movs r0, #39 @ 0x27 801ff3c: f001 fb51 bl 80215e2 data_size=UART_Available(&huart3); 801ff40: 4817 ldr r0, [pc, #92] @ (801ffa0 ) 801ff42: f7ff fedb bl 801fcfc 801ff46: 4603 mov r3, r0 801ff48: 73fb strb r3, [r7, #15] if(size==0) { //All Clear 801ff4a: 887b ldrh r3, [r7, #2] 801ff4c: 2b00 cmp r3, #0 801ff4e: d104 bne.n 801ff5a uart_rx_uart3.head=uart_rx_uart3.tail; 801ff50: 4b14 ldr r3, [pc, #80] @ (801ffa4 ) 801ff52: 885a ldrh r2, [r3, #2] 801ff54: 4b13 ldr r3, [pc, #76] @ (801ffa4 ) 801ff56: 801a strh r2, [r3, #0] 801ff58: e013 b.n 801ff82 } else { if(data_size < size) size = data_size; 801ff5a: 7bfb ldrb r3, [r7, #15] 801ff5c: b29b uxth r3, r3 801ff5e: 887a ldrh r2, [r7, #2] 801ff60: 429a cmp r2, r3 801ff62: d901 bls.n 801ff68 801ff64: 7bfb ldrb r3, [r7, #15] 801ff66: 807b strh r3, [r7, #2] uart_rx_uart3.head += size; 801ff68: 4b0e ldr r3, [pc, #56] @ (801ffa4 ) 801ff6a: 881a ldrh r2, [r3, #0] 801ff6c: 887b ldrh r3, [r7, #2] 801ff6e: 4413 add r3, r2 801ff70: b29a uxth r2, r3 801ff72: 4b0c ldr r3, [pc, #48] @ (801ffa4 ) 801ff74: 801a strh r2, [r3, #0] uart_rx_uart3.head &= MAX_RXBUFFER_SIZE_UART3-1; 801ff76: 4b0b ldr r3, [pc, #44] @ (801ffa4 ) 801ff78: 881b ldrh r3, [r3, #0] 801ff7a: b2db uxtb r3, r3 801ff7c: b29a uxth r2, r3 801ff7e: 4b09 ldr r3, [pc, #36] @ (801ffa4 ) 801ff80: 801a strh r2, [r3, #0] } HAL_NVIC_EnableIRQ(USART3_IRQn); 801ff82: 2027 movs r0, #39 @ 0x27 801ff84: f001 fb1f bl 80215c6 } } 801ff88: bf00 nop 801ff8a: 3710 adds r7, #16 801ff8c: 46bd mov sp, r7 801ff8e: bd80 pop {r7, pc} 801ff90: 40004400 .word 0x40004400 801ff94: 200053a8 .word 0x200053a8 801ff98: 20002f5c .word 0x20002f5c 801ff9c: 40004800 .word 0x40004800 801ffa0: 200053ec .word 0x200053ec 801ffa4: 200051a4 .word 0x200051a4 0801ffa8 : #include char *Float2String(float f, int point) { 801ffa8: b590 push {r4, r7, lr} 801ffaa: b087 sub sp, #28 801ffac: af00 add r7, sp, #0 801ffae: ed87 0a01 vstr s0, [r7, #4] 801ffb2: 6038 str r0, [r7, #0] static char str[20]; static char format[2][9] = {"%d.%0?d", "-%d.%0?d"}; long num, divider = 10; 801ffb4: 230a movs r3, #10 801ffb6: 617b str r3, [r7, #20] uint8_t flag; if(f<0) flag = 1, f=-f; 801ffb8: edd7 7a01 vldr s15, [r7, #4] 801ffbc: eef5 7ac0 vcmpe.f32 s15, #0.0 801ffc0: eef1 fa10 vmrs APSR_nzcv, fpscr 801ffc4: d508 bpl.n 801ffd8 801ffc6: 2301 movs r3, #1 801ffc8: 74fb strb r3, [r7, #19] 801ffca: edd7 7a01 vldr s15, [r7, #4] 801ffce: eef1 7a67 vneg.f32 s15, s15 801ffd2: edc7 7a01 vstr s15, [r7, #4] 801ffd6: e001 b.n 801ffdc else flag = 0; 801ffd8: 2300 movs r3, #0 801ffda: 74fb strb r3, [r7, #19] if(point>9) point = 9; 801ffdc: 683b ldr r3, [r7, #0] 801ffde: 2b09 cmp r3, #9 801ffe0: dd02 ble.n 801ffe8 801ffe2: 2309 movs r3, #9 801ffe4: 603b str r3, [r7, #0] 801ffe6: e004 b.n 801fff2 else if(point<1) point = 1; 801ffe8: 683b ldr r3, [r7, #0] 801ffea: 2b00 cmp r3, #0 801ffec: dc01 bgt.n 801fff2 801ffee: 2301 movs r3, #1 801fff0: 603b str r3, [r7, #0] format[flag][5+flag] = '0'+point; //Position of '?' 801fff2: 683b ldr r3, [r7, #0] 801fff4: b2db uxtb r3, r3 801fff6: 7cfa ldrb r2, [r7, #19] 801fff8: 7cf9 ldrb r1, [r7, #19] 801fffa: 3105 adds r1, #5 801fffc: 3330 adds r3, #48 @ 0x30 801fffe: b2dc uxtb r4, r3 8020000: 481f ldr r0, [pc, #124] @ (8020080 ) 8020002: 4613 mov r3, r2 8020004: 00db lsls r3, r3, #3 8020006: 4413 add r3, r2 8020008: 4403 add r3, r0 802000a: 440b add r3, r1 802000c: 4622 mov r2, r4 802000e: 701a strb r2, [r3, #0] for(; point>1; point--) divider *= 10; //divider = pow(10, point); 8020010: e008 b.n 8020024 8020012: 697a ldr r2, [r7, #20] 8020014: 4613 mov r3, r2 8020016: 009b lsls r3, r3, #2 8020018: 4413 add r3, r2 802001a: 005b lsls r3, r3, #1 802001c: 617b str r3, [r7, #20] 802001e: 683b ldr r3, [r7, #0] 8020020: 3b01 subs r3, #1 8020022: 603b str r3, [r7, #0] 8020024: 683b ldr r3, [r7, #0] 8020026: 2b01 cmp r3, #1 8020028: dcf3 bgt.n 8020012 num = (long)(f*divider); 802002a: 697b ldr r3, [r7, #20] 802002c: ee07 3a90 vmov s15, r3 8020030: eeb8 7ae7 vcvt.f32.s32 s14, s15 8020034: edd7 7a01 vldr s15, [r7, #4] 8020038: ee67 7a27 vmul.f32 s15, s14, s15 802003c: eefd 7ae7 vcvt.s32.f32 s15, s15 8020040: ee17 3a90 vmov r3, s15 8020044: 60fb str r3, [r7, #12] sprintf(str, format[flag], num/divider, num%divider); 8020046: 7cfa ldrb r2, [r7, #19] 8020048: 4613 mov r3, r2 802004a: 00db lsls r3, r3, #3 802004c: 4413 add r3, r2 802004e: 4a0c ldr r2, [pc, #48] @ (8020080 ) 8020050: 1898 adds r0, r3, r2 8020052: 68fa ldr r2, [r7, #12] 8020054: 697b ldr r3, [r7, #20] 8020056: fb92 f4f3 sdiv r4, r2, r3 802005a: 68fb ldr r3, [r7, #12] 802005c: 697a ldr r2, [r7, #20] 802005e: fb93 f2f2 sdiv r2, r3, r2 8020062: 6979 ldr r1, [r7, #20] 8020064: fb01 f202 mul.w r2, r1, r2 8020068: 1a9b subs r3, r3, r2 802006a: 4622 mov r2, r4 802006c: 4601 mov r1, r0 802006e: 4805 ldr r0, [pc, #20] @ (8020084 ) 8020070: f008 f9a0 bl 80283b4 return str; 8020074: 4b03 ldr r3, [pc, #12] @ (8020084 ) } 8020076: 4618 mov r0, r3 8020078: 371c adds r7, #28 802007a: 46bd mov sp, r7 802007c: bd90 pop {r4, r7, pc} 802007e: bf00 nop 8020080: 20000028 .word 0x20000028 8020084: 20005438 .word 0x20005438 08020088 : BLE_Sleep(); BLE_Wakeup(); } // (25.05.05) int BLE_CONN_Status, BLE_DISCON_Task; void Check_BLE_Status(void){ 8020088: b580 push {r7, lr} 802008a: b082 sub sp, #8 802008c: af00 add r7, sp, #0 int old = BLE_CONN_Status; 802008e: 4b2c ldr r3, [pc, #176] @ (8020140 ) 8020090: 681b ldr r3, [r3, #0] 8020092: 607b str r3, [r7, #4] BLE_CONN_Status =! digitalRead(BLE_CONN_PIN); 8020094: 2007 movs r0, #7 8020096: f7f8 fd29 bl 8018aec 802009a: 4603 mov r3, r0 802009c: 2b00 cmp r3, #0 802009e: bf0c ite eq 80200a0: 2301 moveq r3, #1 80200a2: 2300 movne r3, #0 80200a4: b2db uxtb r3, r3 80200a6: 461a mov r2, r3 80200a8: 4b25 ldr r3, [pc, #148] @ (8020140 ) 80200aa: 601a str r2, [r3, #0] // 0 : Not connected, 1 : Connected if(old - BLE_CONN_Status == 1) { // 연결이 해제된 경우 80200ac: 4b24 ldr r3, [pc, #144] @ (8020140 ) 80200ae: 681b ldr r3, [r3, #0] 80200b0: 687a ldr r2, [r7, #4] 80200b2: 1ad3 subs r3, r2, r3 80200b4: 2b01 cmp r3, #1 80200b6: d10d bne.n 80200d4 BLE_DISCON_Task = 1; 80200b8: 4b22 ldr r3, [pc, #136] @ (8020144 ) 80200ba: 2201 movs r2, #1 80200bc: 601a str r2, [r3, #0] WP_LEDCtrl.BLEDisconnection = 3; 80200be: 4b22 ldr r3, [pc, #136] @ (8020148 ) 80200c0: 2203 movs r2, #3 80200c2: 711a strb r2, [r3, #4] WP_Weight.Ctrl.OnOffStatus[L] = OFF; 80200c4: 4b21 ldr r3, [pc, #132] @ (802014c ) 80200c6: 2200 movs r2, #0 80200c8: f883 202a strb.w r2, [r3, #42] @ 0x2a WP_Weight.Ctrl.OnOffStatus[R] = OFF; 80200cc: 4b1f ldr r3, [pc, #124] @ (802014c ) 80200ce: 2200 movs r2, #0 80200d0: f883 202b strb.w r2, [r3, #43] @ 0x2b } if(old == 0 && BLE_CONN_Status == 1) { // 연결이 성립된 경우 80200d4: 687b ldr r3, [r7, #4] 80200d6: 2b00 cmp r3, #0 80200d8: d106 bne.n 80200e8 80200da: 4b19 ldr r3, [pc, #100] @ (8020140 ) 80200dc: 681b ldr r3, [r3, #0] 80200de: 2b01 cmp r3, #1 80200e0: d102 bne.n 80200e8 WP_LEDCtrl.BLEDisconnection = -3; // 연결 상태 LED 제어 80200e2: 4b19 ldr r3, [pc, #100] @ (8020148 ) 80200e4: 22fd movs r2, #253 @ 0xfd 80200e6: 711a strb r2, [r3, #4] // 필요시 연결 시 초기화 작업 수행 } if(BLE_DISCON_Task == 1) { // 80200e8: 4b16 ldr r3, [pc, #88] @ (8020144 ) 80200ea: 681b ldr r3, [r3, #0] 80200ec: 2b01 cmp r3, #1 80200ee: d122 bne.n 8020136 Initialize_Weight(); 80200f0: f7f0 ff86 bl 8011000 if(WP_Weight.Ctrl.OnOffScale[L] < 0.1f && WP_Weight.Ctrl.OnOffScale[R] < 0.1f ) { 80200f4: 4b15 ldr r3, [pc, #84] @ (802014c ) 80200f6: edd3 7a0b vldr s15, [r3, #44] @ 0x2c 80200fa: ed9f 7a15 vldr s14, [pc, #84] @ 8020150 80200fe: eef4 7ac7 vcmpe.f32 s15, s14 8020102: eef1 fa10 vmrs APSR_nzcv, fpscr 8020106: d400 bmi.n 802010a WP_Gym.WeightSet[L] = 0.0f; WP_Gym.WeightSet[R] = 0.0f; BLE_DISCON_Task = 0; } } } 8020108: e015 b.n 8020136 if(WP_Weight.Ctrl.OnOffScale[L] < 0.1f && WP_Weight.Ctrl.OnOffScale[R] < 0.1f ) { 802010a: 4b10 ldr r3, [pc, #64] @ (802014c ) 802010c: edd3 7a0c vldr s15, [r3, #48] @ 0x30 8020110: ed9f 7a0f vldr s14, [pc, #60] @ 8020150 8020114: eef4 7ac7 vcmpe.f32 s15, s14 8020118: eef1 fa10 vmrs APSR_nzcv, fpscr 802011c: d400 bmi.n 8020120 } 802011e: e00a b.n 8020136 WP_Gym.WeightSet[L] = 0.0f; 8020120: 4b0c ldr r3, [pc, #48] @ (8020154 ) 8020122: f04f 0200 mov.w r2, #0 8020126: 60da str r2, [r3, #12] WP_Gym.WeightSet[R] = 0.0f; 8020128: 4b0a ldr r3, [pc, #40] @ (8020154 ) 802012a: f04f 0200 mov.w r2, #0 802012e: 611a str r2, [r3, #16] BLE_DISCON_Task = 0; 8020130: 4b04 ldr r3, [pc, #16] @ (8020144 ) 8020132: 2200 movs r2, #0 8020134: 601a str r2, [r3, #0] } 8020136: bf00 nop 8020138: 3708 adds r7, #8 802013a: 46bd mov sp, r7 802013c: bd80 pop {r7, pc} 802013e: bf00 nop 8020140: 20005430 .word 0x20005430 8020144: 20005434 .word 0x20005434 8020148: 20000328 .word 0x20000328 802014c: 200001d8 .word 0x200001d8 8020150: 3dcccccd .word 0x3dcccccd 8020154: 20000148 .word 0x20000148 08020158 : /* USER CODE END 0 */ /* USB_OTG_FS init function */ void MX_USB_OTG_FS_USB_Init(void) { 8020158: b480 push {r7} 802015a: af00 add r7, sp, #0 /* USER CODE END USB_OTG_FS_Init 1 */ /* USER CODE BEGIN USB_OTG_FS_Init 2 */ /* USER CODE END USB_OTG_FS_Init 2 */ } 802015c: bf00 nop 802015e: 46bd mov sp, r7 8020160: f85d 7b04 ldr.w r7, [sp], #4 8020164: 4770 bx lr ... 08020168 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 8020168: f8df d034 ldr.w sp, [pc, #52] @ 80201a0 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 802016c: 480d ldr r0, [pc, #52] @ (80201a4 ) ldr r1, =_edata 802016e: 490e ldr r1, [pc, #56] @ (80201a8 ) ldr r2, =_sidata 8020170: 4a0e ldr r2, [pc, #56] @ (80201ac ) movs r3, #0 8020172: 2300 movs r3, #0 b LoopCopyDataInit 8020174: e002 b.n 802017c 08020176 : CopyDataInit: ldr r4, [r2, r3] 8020176: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8020178: 50c4 str r4, [r0, r3] adds r3, r3, #4 802017a: 3304 adds r3, #4 0802017c : LoopCopyDataInit: adds r4, r0, r3 802017c: 18c4 adds r4, r0, r3 cmp r4, r1 802017e: 428c cmp r4, r1 bcc CopyDataInit 8020180: d3f9 bcc.n 8020176 /* Zero fill the bss segment. */ ldr r2, =_sbss 8020182: 4a0b ldr r2, [pc, #44] @ (80201b0 ) ldr r4, =_ebss 8020184: 4c0b ldr r4, [pc, #44] @ (80201b4 ) movs r3, #0 8020186: 2300 movs r3, #0 b LoopFillZerobss 8020188: e001 b.n 802018e 0802018a : FillZerobss: str r3, [r2] 802018a: 6013 str r3, [r2, #0] adds r2, r2, #4 802018c: 3204 adds r2, #4 0802018e : LoopFillZerobss: cmp r2, r4 802018e: 42a2 cmp r2, r4 bcc FillZerobss 8020190: d3fb bcc.n 802018a /* Call the clock system initialization function.*/ bl SystemInit 8020192: f7fe f9c7 bl 801e524 /* Call static constructors */ bl __libc_init_array 8020196: f008 f95b bl 8028450 <__libc_init_array> /* Call the application's entry point.*/ bl main 802019a: f7f9 fb03 bl 80197a4
bx lr 802019e: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 80201a0: 20020000 .word 0x20020000 ldr r0, =_sdata 80201a4: 20000000 .word 0x20000000 ldr r1, =_edata 80201a8: 20000094 .word 0x20000094 ldr r2, =_sidata 80201ac: 0802db24 .word 0x0802db24 ldr r2, =_sbss 80201b0: 20000094 .word 0x20000094 ldr r4, =_ebss 80201b4: 200055b8 .word 0x200055b8 080201b8 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80201b8: e7fe b.n 80201b8 ... 080201bc : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 80201bc: b580 push {r7, lr} 80201be: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); 80201c0: 4b0e ldr r3, [pc, #56] @ (80201fc ) 80201c2: 681b ldr r3, [r3, #0] 80201c4: 4a0d ldr r2, [pc, #52] @ (80201fc ) 80201c6: f443 7300 orr.w r3, r3, #512 @ 0x200 80201ca: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); 80201cc: 4b0b ldr r3, [pc, #44] @ (80201fc ) 80201ce: 681b ldr r3, [r3, #0] 80201d0: 4a0a ldr r2, [pc, #40] @ (80201fc ) 80201d2: f443 6380 orr.w r3, r3, #1024 @ 0x400 80201d6: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 80201d8: 4b08 ldr r3, [pc, #32] @ (80201fc ) 80201da: 681b ldr r3, [r3, #0] 80201dc: 4a07 ldr r2, [pc, #28] @ (80201fc ) 80201de: f443 7380 orr.w r3, r3, #256 @ 0x100 80201e2: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80201e4: 2003 movs r0, #3 80201e6: f001 f9c7 bl 8021578 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 80201ea: 200f movs r0, #15 80201ec: f7f9 faaa bl 8019744 /* Init the low level hardware */ HAL_MspInit(); 80201f0: f7fd ffc6 bl 801e180 /* Return function status */ return HAL_OK; 80201f4: 2300 movs r3, #0 } 80201f6: 4618 mov r0, r3 80201f8: bd80 pop {r7, pc} 80201fa: bf00 nop 80201fc: 40023c00 .word 0x40023c00 08020200 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8020200: b480 push {r7} 8020202: af00 add r7, sp, #0 uwTick += uwTickFreq; 8020204: 4b06 ldr r3, [pc, #24] @ (8020220 ) 8020206: 781b ldrb r3, [r3, #0] 8020208: 461a mov r2, r3 802020a: 4b06 ldr r3, [pc, #24] @ (8020224 ) 802020c: 681b ldr r3, [r3, #0] 802020e: 4413 add r3, r2 8020210: 4a04 ldr r2, [pc, #16] @ (8020224 ) 8020212: 6013 str r3, [r2, #0] } 8020214: bf00 nop 8020216: 46bd mov sp, r7 8020218: f85d 7b04 ldr.w r7, [sp], #4 802021c: 4770 bx lr 802021e: bf00 nop 8020220: 20000040 .word 0x20000040 8020224: 2000544c .word 0x2000544c 08020228 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8020228: b480 push {r7} 802022a: af00 add r7, sp, #0 return uwTick; 802022c: 4b03 ldr r3, [pc, #12] @ (802023c ) 802022e: 681b ldr r3, [r3, #0] } 8020230: 4618 mov r0, r3 8020232: 46bd mov sp, r7 8020234: f85d 7b04 ldr.w r7, [sp], #4 8020238: 4770 bx lr 802023a: bf00 nop 802023c: 2000544c .word 0x2000544c 08020240 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8020240: b580 push {r7, lr} 8020242: b084 sub sp, #16 8020244: af00 add r7, sp, #0 8020246: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8020248: f7ff ffee bl 8020228 802024c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 802024e: 687b ldr r3, [r7, #4] 8020250: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8020252: 68fb ldr r3, [r7, #12] 8020254: f1b3 3fff cmp.w r3, #4294967295 8020258: d005 beq.n 8020266 { wait += (uint32_t)(uwTickFreq); 802025a: 4b0a ldr r3, [pc, #40] @ (8020284 ) 802025c: 781b ldrb r3, [r3, #0] 802025e: 461a mov r2, r3 8020260: 68fb ldr r3, [r7, #12] 8020262: 4413 add r3, r2 8020264: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) 8020266: bf00 nop 8020268: f7ff ffde bl 8020228 802026c: 4602 mov r2, r0 802026e: 68bb ldr r3, [r7, #8] 8020270: 1ad3 subs r3, r2, r3 8020272: 68fa ldr r2, [r7, #12] 8020274: 429a cmp r2, r3 8020276: d8f7 bhi.n 8020268 { } } 8020278: bf00 nop 802027a: bf00 nop 802027c: 3710 adds r7, #16 802027e: 46bd mov sp, r7 8020280: bd80 pop {r7, pc} 8020282: bf00 nop 8020284: 20000040 .word 0x20000040 08020288 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_SuspendTick(void) { 8020288: b480 push {r7} 802028a: af00 add r7, sp, #0 /* Disable SysTick Interrupt */ SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; 802028c: 4b05 ldr r3, [pc, #20] @ (80202a4 ) 802028e: 681b ldr r3, [r3, #0] 8020290: 4a04 ldr r2, [pc, #16] @ (80202a4 ) 8020292: f023 0302 bic.w r3, r3, #2 8020296: 6013 str r3, [r2, #0] } 8020298: bf00 nop 802029a: 46bd mov sp, r7 802029c: f85d 7b04 ldr.w r7, [sp], #4 80202a0: 4770 bx lr 80202a2: bf00 nop 80202a4: e000e010 .word 0xe000e010 080202a8 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_ResumeTick(void) { 80202a8: b480 push {r7} 80202aa: af00 add r7, sp, #0 /* Enable SysTick Interrupt */ SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; 80202ac: 4b05 ldr r3, [pc, #20] @ (80202c4 ) 80202ae: 681b ldr r3, [r3, #0] 80202b0: 4a04 ldr r2, [pc, #16] @ (80202c4 ) 80202b2: f043 0302 orr.w r3, r3, #2 80202b6: 6013 str r3, [r2, #0] } 80202b8: bf00 nop 80202ba: 46bd mov sp, r7 80202bc: f85d 7b04 ldr.w r7, [sp], #4 80202c0: 4770 bx lr 80202c2: bf00 nop 80202c4: e000e010 .word 0xe000e010 080202c8 : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 80202c8: b580 push {r7, lr} 80202ca: b084 sub sp, #16 80202cc: af00 add r7, sp, #0 80202ce: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80202d0: 2300 movs r3, #0 80202d2: 73fb strb r3, [r7, #15] /* Check ADC handle */ if(hadc == NULL) 80202d4: 687b ldr r3, [r7, #4] 80202d6: 2b00 cmp r3, #0 80202d8: d101 bne.n 80202de { return HAL_ERROR; 80202da: 2301 movs r3, #1 80202dc: e033 b.n 8020346 if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) { assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); } if(hadc->State == HAL_ADC_STATE_RESET) 80202de: 687b ldr r3, [r7, #4] 80202e0: 6c1b ldr r3, [r3, #64] @ 0x40 80202e2: 2b00 cmp r3, #0 80202e4: d109 bne.n 80202fa /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 80202e6: 6878 ldr r0, [r7, #4] 80202e8: f7f7 fdc8 bl 8017e7c #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 80202ec: 687b ldr r3, [r7, #4] 80202ee: 2200 movs r2, #0 80202f0: 645a str r2, [r3, #68] @ 0x44 /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 80202f2: 687b ldr r3, [r7, #4] 80202f4: 2200 movs r2, #0 80202f6: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) 80202fa: 687b ldr r3, [r7, #4] 80202fc: 6c1b ldr r3, [r3, #64] @ 0x40 80202fe: f003 0310 and.w r3, r3, #16 8020302: 2b00 cmp r3, #0 8020304: d118 bne.n 8020338 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8020306: 687b ldr r3, [r7, #4] 8020308: 6c1b ldr r3, [r3, #64] @ 0x40 802030a: f423 5388 bic.w r3, r3, #4352 @ 0x1100 802030e: f023 0302 bic.w r3, r3, #2 8020312: f043 0202 orr.w r2, r3, #2 8020316: 687b ldr r3, [r7, #4] 8020318: 641a str r2, [r3, #64] @ 0x40 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_BUSY_INTERNAL); /* Set ADC parameters */ ADC_Init(hadc); 802031a: 6878 ldr r0, [r7, #4] 802031c: f000 fbba bl 8020a94 /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8020320: 687b ldr r3, [r7, #4] 8020322: 2200 movs r2, #0 8020324: 645a str r2, [r3, #68] @ 0x44 /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 8020326: 687b ldr r3, [r7, #4] 8020328: 6c1b ldr r3, [r3, #64] @ 0x40 802032a: f023 0303 bic.w r3, r3, #3 802032e: f043 0201 orr.w r2, r3, #1 8020332: 687b ldr r3, [r7, #4] 8020334: 641a str r2, [r3, #64] @ 0x40 8020336: e001 b.n 802033c HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); } else { tmp_hal_status = HAL_ERROR; 8020338: 2301 movs r3, #1 802033a: 73fb strb r3, [r7, #15] } /* Release Lock */ __HAL_UNLOCK(hadc); 802033c: 687b ldr r3, [r7, #4] 802033e: 2200 movs r2, #0 8020340: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Return function status */ return tmp_hal_status; 8020344: 7bfb ldrb r3, [r7, #15] } 8020346: 4618 mov r0, r3 8020348: 3710 adds r7, #16 802034a: 46bd mov sp, r7 802034c: bd80 pop {r7, pc} 0802034e : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) { 802034e: b580 push {r7, lr} 8020350: b084 sub sp, #16 8020352: af00 add r7, sp, #0 8020354: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8020356: 2300 movs r3, #0 8020358: 73fb strb r3, [r7, #15] /* Check ADC handle */ if(hadc == NULL) 802035a: 687b ldr r3, [r7, #4] 802035c: 2b00 cmp r3, #0 802035e: d101 bne.n 8020364 { return HAL_ERROR; 8020360: 2301 movs r3, #1 8020362: e022 b.n 80203aa /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); 8020364: 687b ldr r3, [r7, #4] 8020366: 6c1b ldr r3, [r3, #64] @ 0x40 8020368: f043 0202 orr.w r2, r3, #2 802036c: 687b ldr r3, [r7, #4] 802036e: 641a str r2, [r3, #64] @ 0x40 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ __HAL_ADC_DISABLE(hadc); 8020370: 687b ldr r3, [r7, #4] 8020372: 681b ldr r3, [r3, #0] 8020374: 689a ldr r2, [r3, #8] 8020376: 687b ldr r3, [r7, #4] 8020378: 681b ldr r3, [r3, #0] 802037a: f022 0201 bic.w r2, r2, #1 802037e: 609a str r2, [r3, #8] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON)) 8020380: 687b ldr r3, [r7, #4] 8020382: 681b ldr r3, [r3, #0] 8020384: 689b ldr r3, [r3, #8] 8020386: f003 0301 and.w r3, r3, #1 802038a: 2b00 cmp r3, #0 802038c: d108 bne.n 80203a0 /* DeInit the low level hardware: RCC clock, NVIC */ hadc->MspDeInitCallback(hadc); #else /* DeInit the low level hardware: RCC clock, NVIC */ HAL_ADC_MspDeInit(hadc); 802038e: 6878 ldr r0, [r7, #4] 8020390: f7f7 ff0e bl 80181b0 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8020394: 687b ldr r3, [r7, #4] 8020396: 2200 movs r2, #0 8020398: 645a str r2, [r3, #68] @ 0x44 /* Set ADC state */ hadc->State = HAL_ADC_STATE_RESET; 802039a: 687b ldr r3, [r7, #4] 802039c: 2200 movs r2, #0 802039e: 641a str r2, [r3, #64] @ 0x40 } /* Process unlocked */ __HAL_UNLOCK(hadc); 80203a0: 687b ldr r3, [r7, #4] 80203a2: 2200 movs r2, #0 80203a4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Return function status */ return tmp_hal_status; 80203a8: 7bfb ldrb r3, [r7, #15] } 80203aa: 4618 mov r0, r3 80203ac: 3710 adds r7, #16 80203ae: 46bd mov sp, r7 80203b0: bd80 pop {r7, pc} 080203b2 : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval None */ void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) { 80203b2: b580 push {r7, lr} 80203b4: b086 sub sp, #24 80203b6: af00 add r7, sp, #0 80203b8: 6078 str r0, [r7, #4] uint32_t tmp1 = 0U, tmp2 = 0U; 80203ba: 2300 movs r3, #0 80203bc: 617b str r3, [r7, #20] 80203be: 2300 movs r3, #0 80203c0: 613b str r3, [r7, #16] uint32_t tmp_sr = hadc->Instance->SR; 80203c2: 687b ldr r3, [r7, #4] 80203c4: 681b ldr r3, [r3, #0] 80203c6: 681b ldr r3, [r3, #0] 80203c8: 60fb str r3, [r7, #12] uint32_t tmp_cr1 = hadc->Instance->CR1; 80203ca: 687b ldr r3, [r7, #4] 80203cc: 681b ldr r3, [r3, #0] 80203ce: 685b ldr r3, [r3, #4] 80203d0: 60bb str r3, [r7, #8] /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion)); assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection)); tmp1 = tmp_sr & ADC_FLAG_EOC; 80203d2: 68fb ldr r3, [r7, #12] 80203d4: f003 0302 and.w r3, r3, #2 80203d8: 617b str r3, [r7, #20] tmp2 = tmp_cr1 & ADC_IT_EOC; 80203da: 68bb ldr r3, [r7, #8] 80203dc: f003 0320 and.w r3, r3, #32 80203e0: 613b str r3, [r7, #16] /* Check End of conversion flag for regular channels */ if(tmp1 && tmp2) 80203e2: 697b ldr r3, [r7, #20] 80203e4: 2b00 cmp r3, #0 80203e6: d049 beq.n 802047c 80203e8: 693b ldr r3, [r7, #16] 80203ea: 2b00 cmp r3, #0 80203ec: d046 beq.n 802047c { /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) 80203ee: 687b ldr r3, [r7, #4] 80203f0: 6c1b ldr r3, [r3, #64] @ 0x40 80203f2: f003 0310 and.w r3, r3, #16 80203f6: 2b00 cmp r3, #0 80203f8: d105 bne.n 8020406 { /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 80203fa: 687b ldr r3, [r7, #4] 80203fc: 6c1b ldr r3, [r3, #64] @ 0x40 80203fe: f443 7200 orr.w r2, r3, #512 @ 0x200 8020402: 687b ldr r3, [r7, #4] 8020404: 641a str r2, [r3, #64] @ 0x40 /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F4, there is no independent flag of end of sequence. */ /* The test of scan sequence on going is done either with scan */ /* sequence disabled or with end of conversion flag set to */ /* of end of sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8020406: 687b ldr r3, [r7, #4] 8020408: 681b ldr r3, [r3, #0] 802040a: 689b ldr r3, [r3, #8] 802040c: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 8020410: 2b00 cmp r3, #0 8020412: d12b bne.n 802046c (hadc->Init.ContinuousConvMode == DISABLE) && 8020414: 687b ldr r3, [r7, #4] 8020416: 7e1b ldrb r3, [r3, #24] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8020418: 2b00 cmp r3, #0 802041a: d127 bne.n 802046c (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || 802041c: 687b ldr r3, [r7, #4] 802041e: 681b ldr r3, [r3, #0] 8020420: 6adb ldr r3, [r3, #44] @ 0x2c 8020422: f403 0370 and.w r3, r3, #15728640 @ 0xf00000 (hadc->Init.ContinuousConvMode == DISABLE) && 8020426: 2b00 cmp r3, #0 8020428: d006 beq.n 8020438 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) ) 802042a: 687b ldr r3, [r7, #4] 802042c: 681b ldr r3, [r3, #0] 802042e: 689b ldr r3, [r3, #8] 8020430: f403 6380 and.w r3, r3, #1024 @ 0x400 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || 8020434: 2b00 cmp r3, #0 8020436: d119 bne.n 802046c { /* Disable ADC end of single conversion interrupt on group regular */ /* Note: Overrun interrupt was enabled with EOC interrupt in */ /* HAL_ADC_Start_IT(), but is not disabled here because can be used */ /* by overrun IRQ process below. */ __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); 8020438: 687b ldr r3, [r7, #4] 802043a: 681b ldr r3, [r3, #0] 802043c: 685a ldr r2, [r3, #4] 802043e: 687b ldr r3, [r7, #4] 8020440: 681b ldr r3, [r3, #0] 8020442: f022 0220 bic.w r2, r2, #32 8020446: 605a str r2, [r3, #4] /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 8020448: 687b ldr r3, [r7, #4] 802044a: 6c1b ldr r3, [r3, #64] @ 0x40 802044c: f423 7280 bic.w r2, r3, #256 @ 0x100 8020450: 687b ldr r3, [r7, #4] 8020452: 641a str r2, [r3, #64] @ 0x40 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8020454: 687b ldr r3, [r7, #4] 8020456: 6c1b ldr r3, [r3, #64] @ 0x40 8020458: f403 5380 and.w r3, r3, #4096 @ 0x1000 802045c: 2b00 cmp r3, #0 802045e: d105 bne.n 802046c { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8020460: 687b ldr r3, [r7, #4] 8020462: 6c1b ldr r3, [r3, #64] @ 0x40 8020464: f043 0201 orr.w r2, r3, #1 8020468: 687b ldr r3, [r7, #4] 802046a: 641a str r2, [r3, #64] @ 0x40 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 802046c: 6878 ldr r0, [r7, #4] 802046e: f7f8 f871 bl 8018554 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear regular group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); 8020472: 687b ldr r3, [r7, #4] 8020474: 681b ldr r3, [r3, #0] 8020476: f06f 0212 mvn.w r2, #18 802047a: 601a str r2, [r3, #0] } tmp1 = tmp_sr & ADC_FLAG_JEOC; 802047c: 68fb ldr r3, [r7, #12] 802047e: f003 0304 and.w r3, r3, #4 8020482: 617b str r3, [r7, #20] tmp2 = tmp_cr1 & ADC_IT_JEOC; 8020484: 68bb ldr r3, [r7, #8] 8020486: f003 0380 and.w r3, r3, #128 @ 0x80 802048a: 613b str r3, [r7, #16] /* Check End of conversion flag for injected channels */ if(tmp1 && tmp2) 802048c: 697b ldr r3, [r7, #20] 802048e: 2b00 cmp r3, #0 8020490: d057 beq.n 8020542 8020492: 693b ldr r3, [r7, #16] 8020494: 2b00 cmp r3, #0 8020496: d054 beq.n 8020542 { /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) 8020498: 687b ldr r3, [r7, #4] 802049a: 6c1b ldr r3, [r3, #64] @ 0x40 802049c: f003 0310 and.w r3, r3, #16 80204a0: 2b00 cmp r3, #0 80204a2: d105 bne.n 80204b0 { /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); 80204a4: 687b ldr r3, [r7, #4] 80204a6: 6c1b ldr r3, [r3, #64] @ 0x40 80204a8: f443 5200 orr.w r2, r3, #8192 @ 0x2000 80204ac: 687b ldr r3, [r7, #4] 80204ae: 641a str r2, [r3, #64] @ 0x40 /* Determine whether any further conversion upcoming on group injected */ /* by external trigger, scan sequence on going or by automatic injected */ /* conversion from group regular (same conditions as group regular */ /* interruption disabling above). */ if(ADC_IS_SOFTWARE_START_INJECTED(hadc) && 80204b0: 687b ldr r3, [r7, #4] 80204b2: 681b ldr r3, [r3, #0] 80204b4: 689b ldr r3, [r3, #8] 80204b6: f403 1340 and.w r3, r3, #3145728 @ 0x300000 80204ba: 2b00 cmp r3, #0 80204bc: d139 bne.n 8020532 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) || 80204be: 687b ldr r3, [r7, #4] 80204c0: 681b ldr r3, [r3, #0] 80204c2: 6b9b ldr r3, [r3, #56] @ 0x38 80204c4: f403 1340 and.w r3, r3, #3145728 @ 0x300000 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) && 80204c8: 2b00 cmp r3, #0 80204ca: d006 beq.n 80204da HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) && 80204cc: 687b ldr r3, [r7, #4] 80204ce: 681b ldr r3, [r3, #0] 80204d0: 689b ldr r3, [r3, #8] 80204d2: f403 6380 and.w r3, r3, #1024 @ 0x400 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) || 80204d6: 2b00 cmp r3, #0 80204d8: d12b bne.n 8020532 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && 80204da: 687b ldr r3, [r7, #4] 80204dc: 681b ldr r3, [r3, #0] 80204de: 685b ldr r3, [r3, #4] 80204e0: f403 6380 and.w r3, r3, #1024 @ 0x400 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) && 80204e4: 2b00 cmp r3, #0 80204e6: d124 bne.n 8020532 (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 80204e8: 687b ldr r3, [r7, #4] 80204ea: 681b ldr r3, [r3, #0] 80204ec: 689b ldr r3, [r3, #8] 80204ee: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && 80204f2: 2b00 cmp r3, #0 80204f4: d11d bne.n 8020532 (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) 80204f6: 687b ldr r3, [r7, #4] 80204f8: 7e1b ldrb r3, [r3, #24] (ADC_IS_SOFTWARE_START_REGULAR(hadc) && 80204fa: 2b00 cmp r3, #0 80204fc: d119 bne.n 8020532 { /* Disable ADC end of single conversion interrupt on group injected */ __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); 80204fe: 687b ldr r3, [r7, #4] 8020500: 681b ldr r3, [r3, #0] 8020502: 685a ldr r2, [r3, #4] 8020504: 687b ldr r3, [r7, #4] 8020506: 681b ldr r3, [r3, #0] 8020508: f022 0280 bic.w r2, r2, #128 @ 0x80 802050c: 605a str r2, [r3, #4] /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); 802050e: 687b ldr r3, [r7, #4] 8020510: 6c1b ldr r3, [r3, #64] @ 0x40 8020512: f423 5280 bic.w r2, r3, #4096 @ 0x1000 8020516: 687b ldr r3, [r7, #4] 8020518: 641a str r2, [r3, #64] @ 0x40 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) 802051a: 687b ldr r3, [r7, #4] 802051c: 6c1b ldr r3, [r3, #64] @ 0x40 802051e: f403 7380 and.w r3, r3, #256 @ 0x100 8020522: 2b00 cmp r3, #0 8020524: d105 bne.n 8020532 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8020526: 687b ldr r3, [r7, #4] 8020528: 6c1b ldr r3, [r3, #64] @ 0x40 802052a: f043 0201 orr.w r2, r3, #1 802052e: 687b ldr r3, [r7, #4] 8020530: 641a str r2, [r3, #64] @ 0x40 /* Conversion complete callback */ /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->InjectedConvCpltCallback(hadc); #else HAL_ADCEx_InjectedConvCpltCallback(hadc); 8020532: 6878 ldr r0, [r7, #4] 8020534: f7f7 feaa bl 801828c #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear injected group conversion flag */ __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC)); 8020538: 687b ldr r3, [r7, #4] 802053a: 681b ldr r3, [r3, #0] 802053c: f06f 020c mvn.w r2, #12 8020540: 601a str r2, [r3, #0] } tmp1 = tmp_sr & ADC_FLAG_AWD; 8020542: 68fb ldr r3, [r7, #12] 8020544: f003 0301 and.w r3, r3, #1 8020548: 617b str r3, [r7, #20] tmp2 = tmp_cr1 & ADC_IT_AWD; 802054a: 68bb ldr r3, [r7, #8] 802054c: f003 0340 and.w r3, r3, #64 @ 0x40 8020550: 613b str r3, [r7, #16] /* Check Analog watchdog flag */ if(tmp1 && tmp2) 8020552: 697b ldr r3, [r7, #20] 8020554: 2b00 cmp r3, #0 8020556: d017 beq.n 8020588 8020558: 693b ldr r3, [r7, #16] 802055a: 2b00 cmp r3, #0 802055c: d014 beq.n 8020588 { if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD)) 802055e: 687b ldr r3, [r7, #4] 8020560: 681b ldr r3, [r3, #0] 8020562: 681b ldr r3, [r3, #0] 8020564: f003 0301 and.w r3, r3, #1 8020568: 2b01 cmp r3, #1 802056a: d10d bne.n 8020588 { /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); 802056c: 687b ldr r3, [r7, #4] 802056e: 6c1b ldr r3, [r3, #64] @ 0x40 8020570: f443 3280 orr.w r2, r3, #65536 @ 0x10000 8020574: 687b ldr r3, [r7, #4] 8020576: 641a str r2, [r3, #64] @ 0x40 /* Level out of window callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->LevelOutOfWindowCallback(hadc); #else HAL_ADC_LevelOutOfWindowCallback(hadc); 8020578: 6878 ldr r0, [r7, #4] 802057a: f000 f945 bl 8020808 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear the ADC analog watchdog flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); 802057e: 687b ldr r3, [r7, #4] 8020580: 681b ldr r3, [r3, #0] 8020582: f06f 0201 mvn.w r2, #1 8020586: 601a str r2, [r3, #0] } } tmp1 = tmp_sr & ADC_FLAG_OVR; 8020588: 68fb ldr r3, [r7, #12] 802058a: f003 0320 and.w r3, r3, #32 802058e: 617b str r3, [r7, #20] tmp2 = tmp_cr1 & ADC_IT_OVR; 8020590: 68bb ldr r3, [r7, #8] 8020592: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8020596: 613b str r3, [r7, #16] /* Check Overrun flag */ if(tmp1 && tmp2) 8020598: 697b ldr r3, [r7, #20] 802059a: 2b00 cmp r3, #0 802059c: d015 beq.n 80205ca 802059e: 693b ldr r3, [r7, #16] 80205a0: 2b00 cmp r3, #0 80205a2: d012 beq.n 80205ca /* Note: On STM32F4, ADC overrun can be set through other parameters */ /* refer to description of parameter "EOCSelection" for more */ /* details. */ /* Set ADC error code to overrun */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); 80205a4: 687b ldr r3, [r7, #4] 80205a6: 6c5b ldr r3, [r3, #68] @ 0x44 80205a8: f043 0202 orr.w r2, r3, #2 80205ac: 687b ldr r3, [r7, #4] 80205ae: 645a str r2, [r3, #68] @ 0x44 /* Clear ADC overrun flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); 80205b0: 687b ldr r3, [r7, #4] 80205b2: 681b ldr r3, [r3, #0] 80205b4: f06f 0220 mvn.w r2, #32 80205b8: 601a str r2, [r3, #0] /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 80205ba: 6878 ldr r0, [r7, #4] 80205bc: f000 f92e bl 802081c #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Clear the Overrun flag */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); 80205c0: 687b ldr r3, [r7, #4] 80205c2: 681b ldr r3, [r3, #0] 80205c4: f06f 0220 mvn.w r2, #32 80205c8: 601a str r2, [r3, #0] } } 80205ca: bf00 nop 80205cc: 3718 adds r7, #24 80205ce: 46bd mov sp, r7 80205d0: bd80 pop {r7, pc} ... 080205d4 : * @param pData The destination Buffer address. * @param Length The length of data to be transferred from ADC peripheral to memory. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 80205d4: b580 push {r7, lr} 80205d6: b086 sub sp, #24 80205d8: af00 add r7, sp, #0 80205da: 60f8 str r0, [r7, #12] 80205dc: 60b9 str r1, [r7, #8] 80205de: 607a str r2, [r7, #4] __IO uint32_t counter = 0U; 80205e0: 2300 movs r3, #0 80205e2: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); /* Process locked */ __HAL_LOCK(hadc); 80205e4: 68fb ldr r3, [r7, #12] 80205e6: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80205ea: 2b01 cmp r3, #1 80205ec: d101 bne.n 80205f2 80205ee: 2302 movs r3, #2 80205f0: e0e9 b.n 80207c6 80205f2: 68fb ldr r3, [r7, #12] 80205f4: 2201 movs r2, #1 80205f6: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Enable the ADC peripheral */ /* Check if ADC peripheral is disabled in order to enable it and wait during Tstab time the ADC's stabilization */ if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) 80205fa: 68fb ldr r3, [r7, #12] 80205fc: 681b ldr r3, [r3, #0] 80205fe: 689b ldr r3, [r3, #8] 8020600: f003 0301 and.w r3, r3, #1 8020604: 2b01 cmp r3, #1 8020606: d018 beq.n 802063a { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 8020608: 68fb ldr r3, [r7, #12] 802060a: 681b ldr r3, [r3, #0] 802060c: 689a ldr r2, [r3, #8] 802060e: 68fb ldr r3, [r7, #12] 8020610: 681b ldr r3, [r3, #0] 8020612: f042 0201 orr.w r2, r2, #1 8020616: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 8020618: 4b6d ldr r3, [pc, #436] @ (80207d0 ) 802061a: 681b ldr r3, [r3, #0] 802061c: 4a6d ldr r2, [pc, #436] @ (80207d4 ) 802061e: fba2 2303 umull r2, r3, r2, r3 8020622: 0c9a lsrs r2, r3, #18 8020624: 4613 mov r3, r2 8020626: 005b lsls r3, r3, #1 8020628: 4413 add r3, r2 802062a: 613b str r3, [r7, #16] while(counter != 0U) 802062c: e002 b.n 8020634 { counter--; 802062e: 693b ldr r3, [r7, #16] 8020630: 3b01 subs r3, #1 8020632: 613b str r3, [r7, #16] while(counter != 0U) 8020634: 693b ldr r3, [r7, #16] 8020636: 2b00 cmp r3, #0 8020638: d1f9 bne.n 802062e } } /* Check ADC DMA Mode */ /* - disable the DMA Mode if it is already enabled */ if((hadc->Instance->CR2 & ADC_CR2_DMA) == ADC_CR2_DMA) 802063a: 68fb ldr r3, [r7, #12] 802063c: 681b ldr r3, [r3, #0] 802063e: 689b ldr r3, [r3, #8] 8020640: f403 7380 and.w r3, r3, #256 @ 0x100 8020644: f5b3 7f80 cmp.w r3, #256 @ 0x100 8020648: d107 bne.n 802065a { CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 802064a: 68fb ldr r3, [r7, #12] 802064c: 681b ldr r3, [r3, #0] 802064e: 689a ldr r2, [r3, #8] 8020650: 68fb ldr r3, [r7, #12] 8020652: 681b ldr r3, [r3, #0] 8020654: f422 7280 bic.w r2, r2, #256 @ 0x100 8020658: 609a str r2, [r3, #8] } /* Start conversion if ADC is effectively enabled */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON)) 802065a: 68fb ldr r3, [r7, #12] 802065c: 681b ldr r3, [r3, #0] 802065e: 689b ldr r3, [r3, #8] 8020660: f003 0301 and.w r3, r3, #1 8020664: 2b01 cmp r3, #1 8020666: f040 80a1 bne.w 80207ac { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular group operation */ ADC_STATE_CLR_SET(hadc->State, 802066a: 68fb ldr r3, [r7, #12] 802066c: 6c1b ldr r3, [r3, #64] @ 0x40 802066e: f423 63e0 bic.w r3, r3, #1792 @ 0x700 8020672: f023 0301 bic.w r3, r3, #1 8020676: f443 7280 orr.w r2, r3, #256 @ 0x100 802067a: 68fb ldr r3, [r7, #12] 802067c: 641a str r2, [r3, #64] @ 0x40 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR, HAL_ADC_STATE_REG_BUSY); /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 802067e: 68fb ldr r3, [r7, #12] 8020680: 681b ldr r3, [r3, #0] 8020682: 685b ldr r3, [r3, #4] 8020684: f403 6380 and.w r3, r3, #1024 @ 0x400 8020688: 2b00 cmp r3, #0 802068a: d007 beq.n 802069c { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 802068c: 68fb ldr r3, [r7, #12] 802068e: 6c1b ldr r3, [r3, #64] @ 0x40 8020690: f423 5340 bic.w r3, r3, #12288 @ 0x3000 8020694: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8020698: 68fb ldr r3, [r7, #12] 802069a: 641a str r2, [r3, #64] @ 0x40 } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 802069c: 68fb ldr r3, [r7, #12] 802069e: 6c1b ldr r3, [r3, #64] @ 0x40 80206a0: f403 5380 and.w r3, r3, #4096 @ 0x1000 80206a4: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80206a8: d106 bne.n 80206b8 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 80206aa: 68fb ldr r3, [r7, #12] 80206ac: 6c5b ldr r3, [r3, #68] @ 0x44 80206ae: f023 0206 bic.w r2, r3, #6 80206b2: 68fb ldr r3, [r7, #12] 80206b4: 645a str r2, [r3, #68] @ 0x44 80206b6: e002 b.n 80206be } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 80206b8: 68fb ldr r3, [r7, #12] 80206ba: 2200 movs r2, #0 80206bc: 645a str r2, [r3, #68] @ 0x44 } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 80206be: 68fb ldr r3, [r7, #12] 80206c0: 2200 movs r2, #0 80206c2: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Pointer to the common control register to which is belonging hadc */ /* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */ /* control register) */ tmpADC_Common = ADC_COMMON_REGISTER(hadc); 80206c6: 4b44 ldr r3, [pc, #272] @ (80207d8 ) 80206c8: 617b str r3, [r7, #20] /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 80206ca: 68fb ldr r3, [r7, #12] 80206cc: 6b9b ldr r3, [r3, #56] @ 0x38 80206ce: 4a43 ldr r2, [pc, #268] @ (80207dc ) 80206d0: 63da str r2, [r3, #60] @ 0x3c /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 80206d2: 68fb ldr r3, [r7, #12] 80206d4: 6b9b ldr r3, [r3, #56] @ 0x38 80206d6: 4a42 ldr r2, [pc, #264] @ (80207e0 ) 80206d8: 641a str r2, [r3, #64] @ 0x40 /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 80206da: 68fb ldr r3, [r7, #12] 80206dc: 6b9b ldr r3, [r3, #56] @ 0x38 80206de: 4a41 ldr r2, [pc, #260] @ (80207e4 ) 80206e0: 64da str r2, [r3, #76] @ 0x4c /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR); 80206e2: 68fb ldr r3, [r7, #12] 80206e4: 681b ldr r3, [r3, #0] 80206e6: f06f 0222 mvn.w r2, #34 @ 0x22 80206ea: 601a str r2, [r3, #0] /* Enable ADC overrun interrupt */ __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 80206ec: 68fb ldr r3, [r7, #12] 80206ee: 681b ldr r3, [r3, #0] 80206f0: 685a ldr r2, [r3, #4] 80206f2: 68fb ldr r3, [r7, #12] 80206f4: 681b ldr r3, [r3, #0] 80206f6: f042 6280 orr.w r2, r2, #67108864 @ 0x4000000 80206fa: 605a str r2, [r3, #4] /* Enable ADC DMA mode */ hadc->Instance->CR2 |= ADC_CR2_DMA; 80206fc: 68fb ldr r3, [r7, #12] 80206fe: 681b ldr r3, [r3, #0] 8020700: 689a ldr r2, [r3, #8] 8020702: 68fb ldr r3, [r7, #12] 8020704: 681b ldr r3, [r3, #0] 8020706: f442 7280 orr.w r2, r2, #256 @ 0x100 802070a: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 802070c: 68fb ldr r3, [r7, #12] 802070e: 6b98 ldr r0, [r3, #56] @ 0x38 8020710: 68fb ldr r3, [r7, #12] 8020712: 681b ldr r3, [r3, #0] 8020714: 334c adds r3, #76 @ 0x4c 8020716: 4619 mov r1, r3 8020718: 68ba ldr r2, [r7, #8] 802071a: 687b ldr r3, [r7, #4] 802071c: f001 f972 bl 8021a04 /* Check if Multimode enabled */ if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI)) 8020720: 697b ldr r3, [r7, #20] 8020722: 685b ldr r3, [r3, #4] 8020724: f003 031f and.w r3, r3, #31 8020728: 2b00 cmp r3, #0 802072a: d12a bne.n 8020782 { #if defined(ADC2) && defined(ADC3) if((hadc->Instance == ADC1) || ((hadc->Instance == ADC2) && ((ADC->CCR & ADC_CCR_MULTI_Msk) < ADC_CCR_MULTI_0)) \ 802072c: 68fb ldr r3, [r7, #12] 802072e: 681b ldr r3, [r3, #0] 8020730: 4a2d ldr r2, [pc, #180] @ (80207e8 ) 8020732: 4293 cmp r3, r2 8020734: d015 beq.n 8020762 8020736: 68fb ldr r3, [r7, #12] 8020738: 681b ldr r3, [r3, #0] 802073a: 4a2c ldr r2, [pc, #176] @ (80207ec ) 802073c: 4293 cmp r3, r2 802073e: d105 bne.n 802074c 8020740: 4b25 ldr r3, [pc, #148] @ (80207d8 ) 8020742: 685b ldr r3, [r3, #4] 8020744: f003 031f and.w r3, r3, #31 8020748: 2b00 cmp r3, #0 802074a: d00a beq.n 8020762 || ((hadc->Instance == ADC3) && ((ADC->CCR & ADC_CCR_MULTI_Msk) < ADC_CCR_MULTI_4))) 802074c: 68fb ldr r3, [r7, #12] 802074e: 681b ldr r3, [r3, #0] 8020750: 4a27 ldr r2, [pc, #156] @ (80207f0 ) 8020752: 4293 cmp r3, r2 8020754: d136 bne.n 80207c4 8020756: 4b20 ldr r3, [pc, #128] @ (80207d8 ) 8020758: 685b ldr r3, [r3, #4] 802075a: f003 0310 and.w r3, r3, #16 802075e: 2b00 cmp r3, #0 8020760: d130 bne.n 80207c4 { #endif /* ADC2 || ADC3 */ /* if no external trigger present enable software conversion of regular channels */ if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) 8020762: 68fb ldr r3, [r7, #12] 8020764: 681b ldr r3, [r3, #0] 8020766: 689b ldr r3, [r3, #8] 8020768: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 802076c: 2b00 cmp r3, #0 802076e: d129 bne.n 80207c4 { /* Enable the selected ADC software conversion for regular group */ hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; 8020770: 68fb ldr r3, [r7, #12] 8020772: 681b ldr r3, [r3, #0] 8020774: 689a ldr r2, [r3, #8] 8020776: 68fb ldr r3, [r7, #12] 8020778: 681b ldr r3, [r3, #0] 802077a: f042 4280 orr.w r2, r2, #1073741824 @ 0x40000000 802077e: 609a str r2, [r3, #8] 8020780: e020 b.n 80207c4 #endif /* ADC2 || ADC3 */ } else { /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */ if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)) 8020782: 68fb ldr r3, [r7, #12] 8020784: 681b ldr r3, [r3, #0] 8020786: 4a18 ldr r2, [pc, #96] @ (80207e8 ) 8020788: 4293 cmp r3, r2 802078a: d11b bne.n 80207c4 802078c: 68fb ldr r3, [r7, #12] 802078e: 681b ldr r3, [r3, #0] 8020790: 689b ldr r3, [r3, #8] 8020792: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 8020796: 2b00 cmp r3, #0 8020798: d114 bne.n 80207c4 { /* Enable the selected ADC software conversion for regular group */ hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; 802079a: 68fb ldr r3, [r7, #12] 802079c: 681b ldr r3, [r3, #0] 802079e: 689a ldr r2, [r3, #8] 80207a0: 68fb ldr r3, [r7, #12] 80207a2: 681b ldr r3, [r3, #0] 80207a4: f042 4280 orr.w r2, r2, #1073741824 @ 0x40000000 80207a8: 609a str r2, [r3, #8] 80207aa: e00b b.n 80207c4 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80207ac: 68fb ldr r3, [r7, #12] 80207ae: 6c1b ldr r3, [r3, #64] @ 0x40 80207b0: f043 0210 orr.w r2, r3, #16 80207b4: 68fb ldr r3, [r7, #12] 80207b6: 641a str r2, [r3, #64] @ 0x40 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80207b8: 68fb ldr r3, [r7, #12] 80207ba: 6c5b ldr r3, [r3, #68] @ 0x44 80207bc: f043 0201 orr.w r2, r3, #1 80207c0: 68fb ldr r3, [r7, #12] 80207c2: 645a str r2, [r3, #68] @ 0x44 } /* Return function status */ return HAL_OK; 80207c4: 2300 movs r3, #0 } 80207c6: 4618 mov r0, r3 80207c8: 3718 adds r7, #24 80207ca: 46bd mov sp, r7 80207cc: bd80 pop {r7, pc} 80207ce: bf00 nop 80207d0: 20000024 .word 0x20000024 80207d4: 431bde83 .word 0x431bde83 80207d8: 40012300 .word 0x40012300 80207dc: 08020c8d .word 0x08020c8d 80207e0: 08020d47 .word 0x08020d47 80207e4: 08020d63 .word 0x08020d63 80207e8: 40012000 .word 0x40012000 80207ec: 40012100 .word 0x40012100 80207f0: 40012200 .word 0x40012200 080207f4 : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 80207f4: b480 push {r7} 80207f6: b083 sub sp, #12 80207f8: af00 add r7, sp, #0 80207fa: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file */ } 80207fc: bf00 nop 80207fe: 370c adds r7, #12 8020800: 46bd mov sp, r7 8020802: f85d 7b04 ldr.w r7, [sp], #4 8020806: 4770 bx lr 08020808 : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval None */ __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) { 8020808: b480 push {r7} 802080a: b083 sub sp, #12 802080c: af00 add r7, sp, #0 802080e: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file */ } 8020810: bf00 nop 8020812: 370c adds r7, #12 8020814: 46bd mov sp, r7 8020816: f85d 7b04 ldr.w r7, [sp], #4 802081a: 4770 bx lr 0802081c : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 802081c: b480 push {r7} 802081e: b083 sub sp, #12 8020820: af00 add r7, sp, #0 8020822: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ADC_ErrorCallback could be implemented in the user file */ } 8020824: bf00 nop 8020826: 370c adds r7, #12 8020828: 46bd mov sp, r7 802082a: f85d 7b04 ldr.w r7, [sp], #4 802082e: 4770 bx lr 08020830 : * the configuration information for the specified ADC. * @param sConfig ADC configuration structure. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 8020830: b480 push {r7} 8020832: b085 sub sp, #20 8020834: af00 add r7, sp, #0 8020836: 6078 str r0, [r7, #4] 8020838: 6039 str r1, [r7, #0] __IO uint32_t counter = 0U; 802083a: 2300 movs r3, #0 802083c: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 802083e: 687b ldr r3, [r7, #4] 8020840: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8020844: 2b01 cmp r3, #1 8020846: d101 bne.n 802084c 8020848: 2302 movs r3, #2 802084a: e113 b.n 8020a74 802084c: 687b ldr r3, [r7, #4] 802084e: 2201 movs r2, #1 8020850: f883 203c strb.w r2, [r3, #60] @ 0x3c /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ if (sConfig->Channel > ADC_CHANNEL_9) 8020854: 683b ldr r3, [r7, #0] 8020856: 681b ldr r3, [r3, #0] 8020858: 2b09 cmp r3, #9 802085a: d925 bls.n 80208a8 { /* Clear the old sample time */ hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel); 802085c: 687b ldr r3, [r7, #4] 802085e: 681b ldr r3, [r3, #0] 8020860: 68d9 ldr r1, [r3, #12] 8020862: 683b ldr r3, [r7, #0] 8020864: 681b ldr r3, [r3, #0] 8020866: b29b uxth r3, r3 8020868: 461a mov r2, r3 802086a: 4613 mov r3, r2 802086c: 005b lsls r3, r3, #1 802086e: 4413 add r3, r2 8020870: 3b1e subs r3, #30 8020872: 2207 movs r2, #7 8020874: fa02 f303 lsl.w r3, r2, r3 8020878: 43da mvns r2, r3 802087a: 687b ldr r3, [r7, #4] 802087c: 681b ldr r3, [r3, #0] 802087e: 400a ands r2, r1 8020880: 60da str r2, [r3, #12] /* Set the new sample time */ hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel); 8020882: 687b ldr r3, [r7, #4] 8020884: 681b ldr r3, [r3, #0] 8020886: 68d9 ldr r1, [r3, #12] 8020888: 683b ldr r3, [r7, #0] 802088a: 689a ldr r2, [r3, #8] 802088c: 683b ldr r3, [r7, #0] 802088e: 681b ldr r3, [r3, #0] 8020890: b29b uxth r3, r3 8020892: 4618 mov r0, r3 8020894: 4603 mov r3, r0 8020896: 005b lsls r3, r3, #1 8020898: 4403 add r3, r0 802089a: 3b1e subs r3, #30 802089c: 409a lsls r2, r3 802089e: 687b ldr r3, [r7, #4] 80208a0: 681b ldr r3, [r3, #0] 80208a2: 430a orrs r2, r1 80208a4: 60da str r2, [r3, #12] 80208a6: e022 b.n 80208ee } else /* ADC_Channel include in ADC_Channel_[0..9] */ { /* Clear the old sample time */ hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel); 80208a8: 687b ldr r3, [r7, #4] 80208aa: 681b ldr r3, [r3, #0] 80208ac: 6919 ldr r1, [r3, #16] 80208ae: 683b ldr r3, [r7, #0] 80208b0: 681b ldr r3, [r3, #0] 80208b2: b29b uxth r3, r3 80208b4: 461a mov r2, r3 80208b6: 4613 mov r3, r2 80208b8: 005b lsls r3, r3, #1 80208ba: 4413 add r3, r2 80208bc: 2207 movs r2, #7 80208be: fa02 f303 lsl.w r3, r2, r3 80208c2: 43da mvns r2, r3 80208c4: 687b ldr r3, [r7, #4] 80208c6: 681b ldr r3, [r3, #0] 80208c8: 400a ands r2, r1 80208ca: 611a str r2, [r3, #16] /* Set the new sample time */ hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel); 80208cc: 687b ldr r3, [r7, #4] 80208ce: 681b ldr r3, [r3, #0] 80208d0: 6919 ldr r1, [r3, #16] 80208d2: 683b ldr r3, [r7, #0] 80208d4: 689a ldr r2, [r3, #8] 80208d6: 683b ldr r3, [r7, #0] 80208d8: 681b ldr r3, [r3, #0] 80208da: b29b uxth r3, r3 80208dc: 4618 mov r0, r3 80208de: 4603 mov r3, r0 80208e0: 005b lsls r3, r3, #1 80208e2: 4403 add r3, r0 80208e4: 409a lsls r2, r3 80208e6: 687b ldr r3, [r7, #4] 80208e8: 681b ldr r3, [r3, #0] 80208ea: 430a orrs r2, r1 80208ec: 611a str r2, [r3, #16] } /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 80208ee: 683b ldr r3, [r7, #0] 80208f0: 685b ldr r3, [r3, #4] 80208f2: 2b06 cmp r3, #6 80208f4: d824 bhi.n 8020940 { /* Clear the old SQx bits for the selected rank */ hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank); 80208f6: 687b ldr r3, [r7, #4] 80208f8: 681b ldr r3, [r3, #0] 80208fa: 6b59 ldr r1, [r3, #52] @ 0x34 80208fc: 683b ldr r3, [r7, #0] 80208fe: 685a ldr r2, [r3, #4] 8020900: 4613 mov r3, r2 8020902: 009b lsls r3, r3, #2 8020904: 4413 add r3, r2 8020906: 3b05 subs r3, #5 8020908: 221f movs r2, #31 802090a: fa02 f303 lsl.w r3, r2, r3 802090e: 43da mvns r2, r3 8020910: 687b ldr r3, [r7, #4] 8020912: 681b ldr r3, [r3, #0] 8020914: 400a ands r2, r1 8020916: 635a str r2, [r3, #52] @ 0x34 /* Set the SQx bits for the selected rank */ hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank); 8020918: 687b ldr r3, [r7, #4] 802091a: 681b ldr r3, [r3, #0] 802091c: 6b59 ldr r1, [r3, #52] @ 0x34 802091e: 683b ldr r3, [r7, #0] 8020920: 681b ldr r3, [r3, #0] 8020922: b29b uxth r3, r3 8020924: 4618 mov r0, r3 8020926: 683b ldr r3, [r7, #0] 8020928: 685a ldr r2, [r3, #4] 802092a: 4613 mov r3, r2 802092c: 009b lsls r3, r3, #2 802092e: 4413 add r3, r2 8020930: 3b05 subs r3, #5 8020932: fa00 f203 lsl.w r2, r0, r3 8020936: 687b ldr r3, [r7, #4] 8020938: 681b ldr r3, [r3, #0] 802093a: 430a orrs r2, r1 802093c: 635a str r2, [r3, #52] @ 0x34 802093e: e04c b.n 80209da } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8020940: 683b ldr r3, [r7, #0] 8020942: 685b ldr r3, [r3, #4] 8020944: 2b0c cmp r3, #12 8020946: d824 bhi.n 8020992 { /* Clear the old SQx bits for the selected rank */ hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank); 8020948: 687b ldr r3, [r7, #4] 802094a: 681b ldr r3, [r3, #0] 802094c: 6b19 ldr r1, [r3, #48] @ 0x30 802094e: 683b ldr r3, [r7, #0] 8020950: 685a ldr r2, [r3, #4] 8020952: 4613 mov r3, r2 8020954: 009b lsls r3, r3, #2 8020956: 4413 add r3, r2 8020958: 3b23 subs r3, #35 @ 0x23 802095a: 221f movs r2, #31 802095c: fa02 f303 lsl.w r3, r2, r3 8020960: 43da mvns r2, r3 8020962: 687b ldr r3, [r7, #4] 8020964: 681b ldr r3, [r3, #0] 8020966: 400a ands r2, r1 8020968: 631a str r2, [r3, #48] @ 0x30 /* Set the SQx bits for the selected rank */ hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank); 802096a: 687b ldr r3, [r7, #4] 802096c: 681b ldr r3, [r3, #0] 802096e: 6b19 ldr r1, [r3, #48] @ 0x30 8020970: 683b ldr r3, [r7, #0] 8020972: 681b ldr r3, [r3, #0] 8020974: b29b uxth r3, r3 8020976: 4618 mov r0, r3 8020978: 683b ldr r3, [r7, #0] 802097a: 685a ldr r2, [r3, #4] 802097c: 4613 mov r3, r2 802097e: 009b lsls r3, r3, #2 8020980: 4413 add r3, r2 8020982: 3b23 subs r3, #35 @ 0x23 8020984: fa00 f203 lsl.w r2, r0, r3 8020988: 687b ldr r3, [r7, #4] 802098a: 681b ldr r3, [r3, #0] 802098c: 430a orrs r2, r1 802098e: 631a str r2, [r3, #48] @ 0x30 8020990: e023 b.n 80209da } /* For Rank 13 to 16 */ else { /* Clear the old SQx bits for the selected rank */ hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank); 8020992: 687b ldr r3, [r7, #4] 8020994: 681b ldr r3, [r3, #0] 8020996: 6ad9 ldr r1, [r3, #44] @ 0x2c 8020998: 683b ldr r3, [r7, #0] 802099a: 685a ldr r2, [r3, #4] 802099c: 4613 mov r3, r2 802099e: 009b lsls r3, r3, #2 80209a0: 4413 add r3, r2 80209a2: 3b41 subs r3, #65 @ 0x41 80209a4: 221f movs r2, #31 80209a6: fa02 f303 lsl.w r3, r2, r3 80209aa: 43da mvns r2, r3 80209ac: 687b ldr r3, [r7, #4] 80209ae: 681b ldr r3, [r3, #0] 80209b0: 400a ands r2, r1 80209b2: 62da str r2, [r3, #44] @ 0x2c /* Set the SQx bits for the selected rank */ hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank); 80209b4: 687b ldr r3, [r7, #4] 80209b6: 681b ldr r3, [r3, #0] 80209b8: 6ad9 ldr r1, [r3, #44] @ 0x2c 80209ba: 683b ldr r3, [r7, #0] 80209bc: 681b ldr r3, [r3, #0] 80209be: b29b uxth r3, r3 80209c0: 4618 mov r0, r3 80209c2: 683b ldr r3, [r7, #0] 80209c4: 685a ldr r2, [r3, #4] 80209c6: 4613 mov r3, r2 80209c8: 009b lsls r3, r3, #2 80209ca: 4413 add r3, r2 80209cc: 3b41 subs r3, #65 @ 0x41 80209ce: fa00 f203 lsl.w r2, r0, r3 80209d2: 687b ldr r3, [r7, #4] 80209d4: 681b ldr r3, [r3, #0] 80209d6: 430a orrs r2, r1 80209d8: 62da str r2, [r3, #44] @ 0x2c } /* Pointer to the common control register to which is belonging hadc */ /* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */ /* control register) */ tmpADC_Common = ADC_COMMON_REGISTER(hadc); 80209da: 4b29 ldr r3, [pc, #164] @ (8020a80 ) 80209dc: 60fb str r3, [r7, #12] /* if ADC1 Channel_18 is selected for VBAT Channel ennable VBATE */ if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT)) 80209de: 687b ldr r3, [r7, #4] 80209e0: 681b ldr r3, [r3, #0] 80209e2: 4a28 ldr r2, [pc, #160] @ (8020a84 ) 80209e4: 4293 cmp r3, r2 80209e6: d10f bne.n 8020a08 80209e8: 683b ldr r3, [r7, #0] 80209ea: 681b ldr r3, [r3, #0] 80209ec: 2b12 cmp r3, #18 80209ee: d10b bne.n 8020a08 { /* Disable the TEMPSENSOR channel in case of using board with multiplixed ADC_CHANNEL_VBAT & ADC_CHANNEL_TEMPSENSOR*/ if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT) { tmpADC_Common->CCR &= ~ADC_CCR_TSVREFE; 80209f0: 68fb ldr r3, [r7, #12] 80209f2: 685b ldr r3, [r3, #4] 80209f4: f423 0200 bic.w r2, r3, #8388608 @ 0x800000 80209f8: 68fb ldr r3, [r7, #12] 80209fa: 605a str r2, [r3, #4] } /* Enable the VBAT channel*/ tmpADC_Common->CCR |= ADC_CCR_VBATE; 80209fc: 68fb ldr r3, [r7, #12] 80209fe: 685b ldr r3, [r3, #4] 8020a00: f443 0280 orr.w r2, r3, #4194304 @ 0x400000 8020a04: 68fb ldr r3, [r7, #12] 8020a06: 605a str r2, [r3, #4] } /* if ADC1 Channel_16 or Channel_18 is selected for Temperature sensor or Channel_17 is selected for VREFINT enable TSVREFE */ if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT))) 8020a08: 687b ldr r3, [r7, #4] 8020a0a: 681b ldr r3, [r3, #0] 8020a0c: 4a1d ldr r2, [pc, #116] @ (8020a84 ) 8020a0e: 4293 cmp r3, r2 8020a10: d12b bne.n 8020a6a 8020a12: 683b ldr r3, [r7, #0] 8020a14: 681b ldr r3, [r3, #0] 8020a16: 4a1c ldr r2, [pc, #112] @ (8020a88 ) 8020a18: 4293 cmp r3, r2 8020a1a: d003 beq.n 8020a24 8020a1c: 683b ldr r3, [r7, #0] 8020a1e: 681b ldr r3, [r3, #0] 8020a20: 2b11 cmp r3, #17 8020a22: d122 bne.n 8020a6a { /* Disable the VBAT channel in case of using board with multiplixed ADC_CHANNEL_VBAT & ADC_CHANNEL_TEMPSENSOR*/ if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT) { tmpADC_Common->CCR &= ~ADC_CCR_VBATE; 8020a24: 68fb ldr r3, [r7, #12] 8020a26: 685b ldr r3, [r3, #4] 8020a28: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8020a2c: 68fb ldr r3, [r7, #12] 8020a2e: 605a str r2, [r3, #4] } /* Enable the Temperature sensor and VREFINT channel*/ tmpADC_Common->CCR |= ADC_CCR_TSVREFE; 8020a30: 68fb ldr r3, [r7, #12] 8020a32: 685b ldr r3, [r3, #4] 8020a34: f443 0200 orr.w r2, r3, #8388608 @ 0x800000 8020a38: 68fb ldr r3, [r7, #12] 8020a3a: 605a str r2, [r3, #4] if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 8020a3c: 683b ldr r3, [r7, #0] 8020a3e: 681b ldr r3, [r3, #0] 8020a40: 4a11 ldr r2, [pc, #68] @ (8020a88 ) 8020a42: 4293 cmp r3, r2 8020a44: d111 bne.n 8020a6a { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8020a46: 4b11 ldr r3, [pc, #68] @ (8020a8c ) 8020a48: 681b ldr r3, [r3, #0] 8020a4a: 4a11 ldr r2, [pc, #68] @ (8020a90 ) 8020a4c: fba2 2303 umull r2, r3, r2, r3 8020a50: 0c9a lsrs r2, r3, #18 8020a52: 4613 mov r3, r2 8020a54: 009b lsls r3, r3, #2 8020a56: 4413 add r3, r2 8020a58: 005b lsls r3, r3, #1 8020a5a: 60bb str r3, [r7, #8] while(counter != 0U) 8020a5c: e002 b.n 8020a64 { counter--; 8020a5e: 68bb ldr r3, [r7, #8] 8020a60: 3b01 subs r3, #1 8020a62: 60bb str r3, [r7, #8] while(counter != 0U) 8020a64: 68bb ldr r3, [r7, #8] 8020a66: 2b00 cmp r3, #0 8020a68: d1f9 bne.n 8020a5e } } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8020a6a: 687b ldr r3, [r7, #4] 8020a6c: 2200 movs r2, #0 8020a6e: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Return function status */ return HAL_OK; 8020a72: 2300 movs r3, #0 } 8020a74: 4618 mov r0, r3 8020a76: 3714 adds r7, #20 8020a78: 46bd mov sp, r7 8020a7a: f85d 7b04 ldr.w r7, [sp], #4 8020a7e: 4770 bx lr 8020a80: 40012300 .word 0x40012300 8020a84: 40012000 .word 0x40012000 8020a88: 10000012 .word 0x10000012 8020a8c: 20000024 .word 0x20000024 8020a90: 431bde83 .word 0x431bde83 08020a94 : * @param hadc pointer to a ADC_HandleTypeDef structure that contains * the configuration information for the specified ADC. * @retval None */ static void ADC_Init(ADC_HandleTypeDef* hadc) { 8020a94: b480 push {r7} 8020a96: b085 sub sp, #20 8020a98: af00 add r7, sp, #0 8020a9a: 6078 str r0, [r7, #4] /* Set ADC parameters */ /* Pointer to the common control register to which is belonging hadc */ /* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */ /* control register) */ tmpADC_Common = ADC_COMMON_REGISTER(hadc); 8020a9c: 4b79 ldr r3, [pc, #484] @ (8020c84 ) 8020a9e: 60fb str r3, [r7, #12] /* Set the ADC clock prescaler */ tmpADC_Common->CCR &= ~(ADC_CCR_ADCPRE); 8020aa0: 68fb ldr r3, [r7, #12] 8020aa2: 685b ldr r3, [r3, #4] 8020aa4: f423 3240 bic.w r2, r3, #196608 @ 0x30000 8020aa8: 68fb ldr r3, [r7, #12] 8020aaa: 605a str r2, [r3, #4] tmpADC_Common->CCR |= hadc->Init.ClockPrescaler; 8020aac: 68fb ldr r3, [r7, #12] 8020aae: 685a ldr r2, [r3, #4] 8020ab0: 687b ldr r3, [r7, #4] 8020ab2: 685b ldr r3, [r3, #4] 8020ab4: 431a orrs r2, r3 8020ab6: 68fb ldr r3, [r7, #12] 8020ab8: 605a str r2, [r3, #4] /* Set ADC scan mode */ hadc->Instance->CR1 &= ~(ADC_CR1_SCAN); 8020aba: 687b ldr r3, [r7, #4] 8020abc: 681b ldr r3, [r3, #0] 8020abe: 685a ldr r2, [r3, #4] 8020ac0: 687b ldr r3, [r7, #4] 8020ac2: 681b ldr r3, [r3, #0] 8020ac4: f422 7280 bic.w r2, r2, #256 @ 0x100 8020ac8: 605a str r2, [r3, #4] hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode); 8020aca: 687b ldr r3, [r7, #4] 8020acc: 681b ldr r3, [r3, #0] 8020ace: 6859 ldr r1, [r3, #4] 8020ad0: 687b ldr r3, [r7, #4] 8020ad2: 691b ldr r3, [r3, #16] 8020ad4: 021a lsls r2, r3, #8 8020ad6: 687b ldr r3, [r7, #4] 8020ad8: 681b ldr r3, [r3, #0] 8020ada: 430a orrs r2, r1 8020adc: 605a str r2, [r3, #4] /* Set ADC resolution */ hadc->Instance->CR1 &= ~(ADC_CR1_RES); 8020ade: 687b ldr r3, [r7, #4] 8020ae0: 681b ldr r3, [r3, #0] 8020ae2: 685a ldr r2, [r3, #4] 8020ae4: 687b ldr r3, [r7, #4] 8020ae6: 681b ldr r3, [r3, #0] 8020ae8: f022 7240 bic.w r2, r2, #50331648 @ 0x3000000 8020aec: 605a str r2, [r3, #4] hadc->Instance->CR1 |= hadc->Init.Resolution; 8020aee: 687b ldr r3, [r7, #4] 8020af0: 681b ldr r3, [r3, #0] 8020af2: 6859 ldr r1, [r3, #4] 8020af4: 687b ldr r3, [r7, #4] 8020af6: 689a ldr r2, [r3, #8] 8020af8: 687b ldr r3, [r7, #4] 8020afa: 681b ldr r3, [r3, #0] 8020afc: 430a orrs r2, r1 8020afe: 605a str r2, [r3, #4] /* Set ADC data alignment */ hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN); 8020b00: 687b ldr r3, [r7, #4] 8020b02: 681b ldr r3, [r3, #0] 8020b04: 689a ldr r2, [r3, #8] 8020b06: 687b ldr r3, [r7, #4] 8020b08: 681b ldr r3, [r3, #0] 8020b0a: f422 6200 bic.w r2, r2, #2048 @ 0x800 8020b0e: 609a str r2, [r3, #8] hadc->Instance->CR2 |= hadc->Init.DataAlign; 8020b10: 687b ldr r3, [r7, #4] 8020b12: 681b ldr r3, [r3, #0] 8020b14: 6899 ldr r1, [r3, #8] 8020b16: 687b ldr r3, [r7, #4] 8020b18: 68da ldr r2, [r3, #12] 8020b1a: 687b ldr r3, [r7, #4] 8020b1c: 681b ldr r3, [r3, #0] 8020b1e: 430a orrs r2, r1 8020b20: 609a str r2, [r3, #8] /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) 8020b22: 687b ldr r3, [r7, #4] 8020b24: 6a9b ldr r3, [r3, #40] @ 0x28 8020b26: 4a58 ldr r2, [pc, #352] @ (8020c88 ) 8020b28: 4293 cmp r3, r2 8020b2a: d022 beq.n 8020b72 { /* Select external trigger to start conversion */ hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL); 8020b2c: 687b ldr r3, [r7, #4] 8020b2e: 681b ldr r3, [r3, #0] 8020b30: 689a ldr r2, [r3, #8] 8020b32: 687b ldr r3, [r7, #4] 8020b34: 681b ldr r3, [r3, #0] 8020b36: f022 6270 bic.w r2, r2, #251658240 @ 0xf000000 8020b3a: 609a str r2, [r3, #8] hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv; 8020b3c: 687b ldr r3, [r7, #4] 8020b3e: 681b ldr r3, [r3, #0] 8020b40: 6899 ldr r1, [r3, #8] 8020b42: 687b ldr r3, [r7, #4] 8020b44: 6a9a ldr r2, [r3, #40] @ 0x28 8020b46: 687b ldr r3, [r7, #4] 8020b48: 681b ldr r3, [r3, #0] 8020b4a: 430a orrs r2, r1 8020b4c: 609a str r2, [r3, #8] /* Select external trigger polarity */ hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN); 8020b4e: 687b ldr r3, [r7, #4] 8020b50: 681b ldr r3, [r3, #0] 8020b52: 689a ldr r2, [r3, #8] 8020b54: 687b ldr r3, [r7, #4] 8020b56: 681b ldr r3, [r3, #0] 8020b58: f022 5240 bic.w r2, r2, #805306368 @ 0x30000000 8020b5c: 609a str r2, [r3, #8] hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge; 8020b5e: 687b ldr r3, [r7, #4] 8020b60: 681b ldr r3, [r3, #0] 8020b62: 6899 ldr r1, [r3, #8] 8020b64: 687b ldr r3, [r7, #4] 8020b66: 6ada ldr r2, [r3, #44] @ 0x2c 8020b68: 687b ldr r3, [r7, #4] 8020b6a: 681b ldr r3, [r3, #0] 8020b6c: 430a orrs r2, r1 8020b6e: 609a str r2, [r3, #8] 8020b70: e00f b.n 8020b92 } else { /* Reset the external trigger */ hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL); 8020b72: 687b ldr r3, [r7, #4] 8020b74: 681b ldr r3, [r3, #0] 8020b76: 689a ldr r2, [r3, #8] 8020b78: 687b ldr r3, [r7, #4] 8020b7a: 681b ldr r3, [r3, #0] 8020b7c: f022 6270 bic.w r2, r2, #251658240 @ 0xf000000 8020b80: 609a str r2, [r3, #8] hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN); 8020b82: 687b ldr r3, [r7, #4] 8020b84: 681b ldr r3, [r3, #0] 8020b86: 689a ldr r2, [r3, #8] 8020b88: 687b ldr r3, [r7, #4] 8020b8a: 681b ldr r3, [r3, #0] 8020b8c: f022 5240 bic.w r2, r2, #805306368 @ 0x30000000 8020b90: 609a str r2, [r3, #8] } /* Enable or disable ADC continuous conversion mode */ hadc->Instance->CR2 &= ~(ADC_CR2_CONT); 8020b92: 687b ldr r3, [r7, #4] 8020b94: 681b ldr r3, [r3, #0] 8020b96: 689a ldr r2, [r3, #8] 8020b98: 687b ldr r3, [r7, #4] 8020b9a: 681b ldr r3, [r3, #0] 8020b9c: f022 0202 bic.w r2, r2, #2 8020ba0: 609a str r2, [r3, #8] hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode); 8020ba2: 687b ldr r3, [r7, #4] 8020ba4: 681b ldr r3, [r3, #0] 8020ba6: 6899 ldr r1, [r3, #8] 8020ba8: 687b ldr r3, [r7, #4] 8020baa: 7e1b ldrb r3, [r3, #24] 8020bac: 005a lsls r2, r3, #1 8020bae: 687b ldr r3, [r7, #4] 8020bb0: 681b ldr r3, [r3, #0] 8020bb2: 430a orrs r2, r1 8020bb4: 609a str r2, [r3, #8] if(hadc->Init.DiscontinuousConvMode != DISABLE) 8020bb6: 687b ldr r3, [r7, #4] 8020bb8: f893 3020 ldrb.w r3, [r3, #32] 8020bbc: 2b00 cmp r3, #0 8020bbe: d01b beq.n 8020bf8 { assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion)); /* Enable the selected ADC regular discontinuous mode */ hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN; 8020bc0: 687b ldr r3, [r7, #4] 8020bc2: 681b ldr r3, [r3, #0] 8020bc4: 685a ldr r2, [r3, #4] 8020bc6: 687b ldr r3, [r7, #4] 8020bc8: 681b ldr r3, [r3, #0] 8020bca: f442 6200 orr.w r2, r2, #2048 @ 0x800 8020bce: 605a str r2, [r3, #4] /* Set the number of channels to be converted in discontinuous mode */ hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM); 8020bd0: 687b ldr r3, [r7, #4] 8020bd2: 681b ldr r3, [r3, #0] 8020bd4: 685a ldr r2, [r3, #4] 8020bd6: 687b ldr r3, [r7, #4] 8020bd8: 681b ldr r3, [r3, #0] 8020bda: f422 4260 bic.w r2, r2, #57344 @ 0xe000 8020bde: 605a str r2, [r3, #4] hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion); 8020be0: 687b ldr r3, [r7, #4] 8020be2: 681b ldr r3, [r3, #0] 8020be4: 6859 ldr r1, [r3, #4] 8020be6: 687b ldr r3, [r7, #4] 8020be8: 6a5b ldr r3, [r3, #36] @ 0x24 8020bea: 3b01 subs r3, #1 8020bec: 035a lsls r2, r3, #13 8020bee: 687b ldr r3, [r7, #4] 8020bf0: 681b ldr r3, [r3, #0] 8020bf2: 430a orrs r2, r1 8020bf4: 605a str r2, [r3, #4] 8020bf6: e007 b.n 8020c08 } else { /* Disable the selected ADC regular discontinuous mode */ hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN); 8020bf8: 687b ldr r3, [r7, #4] 8020bfa: 681b ldr r3, [r3, #0] 8020bfc: 685a ldr r2, [r3, #4] 8020bfe: 687b ldr r3, [r7, #4] 8020c00: 681b ldr r3, [r3, #0] 8020c02: f422 6200 bic.w r2, r2, #2048 @ 0x800 8020c06: 605a str r2, [r3, #4] } /* Set ADC number of conversion */ hadc->Instance->SQR1 &= ~(ADC_SQR1_L); 8020c08: 687b ldr r3, [r7, #4] 8020c0a: 681b ldr r3, [r3, #0] 8020c0c: 6ada ldr r2, [r3, #44] @ 0x2c 8020c0e: 687b ldr r3, [r7, #4] 8020c10: 681b ldr r3, [r3, #0] 8020c12: f422 0270 bic.w r2, r2, #15728640 @ 0xf00000 8020c16: 62da str r2, [r3, #44] @ 0x2c hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion); 8020c18: 687b ldr r3, [r7, #4] 8020c1a: 681b ldr r3, [r3, #0] 8020c1c: 6ad9 ldr r1, [r3, #44] @ 0x2c 8020c1e: 687b ldr r3, [r7, #4] 8020c20: 69db ldr r3, [r3, #28] 8020c22: 3b01 subs r3, #1 8020c24: 051a lsls r2, r3, #20 8020c26: 687b ldr r3, [r7, #4] 8020c28: 681b ldr r3, [r3, #0] 8020c2a: 430a orrs r2, r1 8020c2c: 62da str r2, [r3, #44] @ 0x2c /* Enable or disable ADC DMA continuous request */ hadc->Instance->CR2 &= ~(ADC_CR2_DDS); 8020c2e: 687b ldr r3, [r7, #4] 8020c30: 681b ldr r3, [r3, #0] 8020c32: 689a ldr r2, [r3, #8] 8020c34: 687b ldr r3, [r7, #4] 8020c36: 681b ldr r3, [r3, #0] 8020c38: f422 7200 bic.w r2, r2, #512 @ 0x200 8020c3c: 609a str r2, [r3, #8] hadc->Instance->CR2 |= ADC_CR2_DMAContReq((uint32_t)hadc->Init.DMAContinuousRequests); 8020c3e: 687b ldr r3, [r7, #4] 8020c40: 681b ldr r3, [r3, #0] 8020c42: 6899 ldr r1, [r3, #8] 8020c44: 687b ldr r3, [r7, #4] 8020c46: f893 3030 ldrb.w r3, [r3, #48] @ 0x30 8020c4a: 025a lsls r2, r3, #9 8020c4c: 687b ldr r3, [r7, #4] 8020c4e: 681b ldr r3, [r3, #0] 8020c50: 430a orrs r2, r1 8020c52: 609a str r2, [r3, #8] /* Enable or disable ADC end of conversion selection */ hadc->Instance->CR2 &= ~(ADC_CR2_EOCS); 8020c54: 687b ldr r3, [r7, #4] 8020c56: 681b ldr r3, [r3, #0] 8020c58: 689a ldr r2, [r3, #8] 8020c5a: 687b ldr r3, [r7, #4] 8020c5c: 681b ldr r3, [r3, #0] 8020c5e: f422 6280 bic.w r2, r2, #1024 @ 0x400 8020c62: 609a str r2, [r3, #8] hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection); 8020c64: 687b ldr r3, [r7, #4] 8020c66: 681b ldr r3, [r3, #0] 8020c68: 6899 ldr r1, [r3, #8] 8020c6a: 687b ldr r3, [r7, #4] 8020c6c: 695b ldr r3, [r3, #20] 8020c6e: 029a lsls r2, r3, #10 8020c70: 687b ldr r3, [r7, #4] 8020c72: 681b ldr r3, [r3, #0] 8020c74: 430a orrs r2, r1 8020c76: 609a str r2, [r3, #8] } 8020c78: bf00 nop 8020c7a: 3714 adds r7, #20 8020c7c: 46bd mov sp, r7 8020c7e: f85d 7b04 ldr.w r7, [sp], #4 8020c82: 4770 bx lr 8020c84: 40012300 .word 0x40012300 8020c88: 0f000001 .word 0x0f000001 08020c8c : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 8020c8c: b580 push {r7, lr} 8020c8e: b084 sub sp, #16 8020c90: af00 add r7, sp, #0 8020c92: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8020c94: 687b ldr r3, [r7, #4] 8020c96: 6b9b ldr r3, [r3, #56] @ 0x38 8020c98: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 8020c9a: 68fb ldr r3, [r7, #12] 8020c9c: 6c1b ldr r3, [r3, #64] @ 0x40 8020c9e: f003 0350 and.w r3, r3, #80 @ 0x50 8020ca2: 2b00 cmp r3, #0 8020ca4: d13c bne.n 8020d20 { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 8020ca6: 68fb ldr r3, [r7, #12] 8020ca8: 6c1b ldr r3, [r3, #64] @ 0x40 8020caa: f443 7200 orr.w r2, r3, #512 @ 0x200 8020cae: 68fb ldr r3, [r7, #12] 8020cb0: 641a str r2, [r3, #64] @ 0x40 /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F4, there is no independent flag of end of sequence. */ /* The test of scan sequence on going is done either with scan */ /* sequence disabled or with end of conversion flag set to */ /* of end of sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8020cb2: 68fb ldr r3, [r7, #12] 8020cb4: 681b ldr r3, [r3, #0] 8020cb6: 689b ldr r3, [r3, #8] 8020cb8: f003 5340 and.w r3, r3, #805306368 @ 0x30000000 8020cbc: 2b00 cmp r3, #0 8020cbe: d12b bne.n 8020d18 (hadc->Init.ContinuousConvMode == DISABLE) && 8020cc0: 68fb ldr r3, [r7, #12] 8020cc2: 7e1b ldrb r3, [r3, #24] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8020cc4: 2b00 cmp r3, #0 8020cc6: d127 bne.n 8020d18 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || 8020cc8: 68fb ldr r3, [r7, #12] 8020cca: 681b ldr r3, [r3, #0] 8020ccc: 6adb ldr r3, [r3, #44] @ 0x2c 8020cce: f403 0370 and.w r3, r3, #15728640 @ 0xf00000 (hadc->Init.ContinuousConvMode == DISABLE) && 8020cd2: 2b00 cmp r3, #0 8020cd4: d006 beq.n 8020ce4 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) ) 8020cd6: 68fb ldr r3, [r7, #12] 8020cd8: 681b ldr r3, [r3, #0] 8020cda: 689b ldr r3, [r3, #8] 8020cdc: f403 6380 and.w r3, r3, #1024 @ 0x400 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || 8020ce0: 2b00 cmp r3, #0 8020ce2: d119 bne.n 8020d18 { /* Disable ADC end of single conversion interrupt on group regular */ /* Note: Overrun interrupt was enabled with EOC interrupt in */ /* HAL_ADC_Start_IT(), but is not disabled here because can be used */ /* by overrun IRQ process below. */ __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); 8020ce4: 68fb ldr r3, [r7, #12] 8020ce6: 681b ldr r3, [r3, #0] 8020ce8: 685a ldr r2, [r3, #4] 8020cea: 68fb ldr r3, [r7, #12] 8020cec: 681b ldr r3, [r3, #0] 8020cee: f022 0220 bic.w r2, r2, #32 8020cf2: 605a str r2, [r3, #4] /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 8020cf4: 68fb ldr r3, [r7, #12] 8020cf6: 6c1b ldr r3, [r3, #64] @ 0x40 8020cf8: f423 7280 bic.w r2, r3, #256 @ 0x100 8020cfc: 68fb ldr r3, [r7, #12] 8020cfe: 641a str r2, [r3, #64] @ 0x40 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8020d00: 68fb ldr r3, [r7, #12] 8020d02: 6c1b ldr r3, [r3, #64] @ 0x40 8020d04: f403 5380 and.w r3, r3, #4096 @ 0x1000 8020d08: 2b00 cmp r3, #0 8020d0a: d105 bne.n 8020d18 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8020d0c: 68fb ldr r3, [r7, #12] 8020d0e: 6c1b ldr r3, [r3, #64] @ 0x40 8020d10: f043 0201 orr.w r2, r3, #1 8020d14: 68fb ldr r3, [r7, #12] 8020d16: 641a str r2, [r3, #64] @ 0x40 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 8020d18: 68f8 ldr r0, [r7, #12] 8020d1a: f7f7 fc1b bl 8018554 { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } } 8020d1e: e00e b.n 8020d3e if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) != 0UL) 8020d20: 68fb ldr r3, [r7, #12] 8020d22: 6c1b ldr r3, [r3, #64] @ 0x40 8020d24: f003 0310 and.w r3, r3, #16 8020d28: 2b00 cmp r3, #0 8020d2a: d003 beq.n 8020d34 HAL_ADC_ErrorCallback(hadc); 8020d2c: 68f8 ldr r0, [r7, #12] 8020d2e: f7ff fd75 bl 802081c } 8020d32: e004 b.n 8020d3e hadc->DMA_Handle->XferErrorCallback(hdma); 8020d34: 68fb ldr r3, [r7, #12] 8020d36: 6b9b ldr r3, [r3, #56] @ 0x38 8020d38: 6cdb ldr r3, [r3, #76] @ 0x4c 8020d3a: 6878 ldr r0, [r7, #4] 8020d3c: 4798 blx r3 } 8020d3e: bf00 nop 8020d40: 3710 adds r7, #16 8020d42: 46bd mov sp, r7 8020d44: bd80 pop {r7, pc} 08020d46 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 8020d46: b580 push {r7, lr} 8020d48: b084 sub sp, #16 8020d4a: af00 add r7, sp, #0 8020d4c: 6078 str r0, [r7, #4] ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8020d4e: 687b ldr r3, [r7, #4] 8020d50: 6b9b ldr r3, [r3, #56] @ 0x38 8020d52: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 8020d54: 68f8 ldr r0, [r7, #12] 8020d56: f7ff fd4d bl 80207f4 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8020d5a: bf00 nop 8020d5c: 3710 adds r7, #16 8020d5e: 46bd mov sp, r7 8020d60: bd80 pop {r7, pc} 08020d62 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void ADC_DMAError(DMA_HandleTypeDef *hdma) { 8020d62: b580 push {r7, lr} 8020d64: b084 sub sp, #16 8020d66: af00 add r7, sp, #0 8020d68: 6078 str r0, [r7, #4] ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8020d6a: 687b ldr r3, [r7, #4] 8020d6c: 6b9b ldr r3, [r3, #56] @ 0x38 8020d6e: 60fb str r3, [r7, #12] hadc->State= HAL_ADC_STATE_ERROR_DMA; 8020d70: 68fb ldr r3, [r7, #12] 8020d72: 2240 movs r2, #64 @ 0x40 8020d74: 641a str r2, [r3, #64] @ 0x40 /* Set ADC error code to DMA error */ hadc->ErrorCode |= HAL_ADC_ERROR_DMA; 8020d76: 68fb ldr r3, [r7, #12] 8020d78: 6c5b ldr r3, [r3, #68] @ 0x44 8020d7a: f043 0204 orr.w r2, r3, #4 8020d7e: 68fb ldr r3, [r7, #12] 8020d80: 645a str r2, [r3, #68] @ 0x44 /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 8020d82: 68f8 ldr r0, [r7, #12] 8020d84: f7ff fd4a bl 802081c #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8020d88: bf00 nop 8020d8a: 3710 adds r7, #16 8020d8c: 46bd mov sp, r7 8020d8e: bd80 pop {r7, pc} 08020d90 : * the configuration information for the specified ADC. * * @retval HAL status. */ HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc) { 8020d90: b480 push {r7} 8020d92: b087 sub sp, #28 8020d94: af00 add r7, sp, #0 8020d96: 6078 str r0, [r7, #4] __IO uint32_t counter = 0U; 8020d98: 2300 movs r3, #0 8020d9a: 60bb str r3, [r7, #8] uint32_t tmp1 = 0U, tmp2 = 0U; 8020d9c: 2300 movs r3, #0 8020d9e: 617b str r3, [r7, #20] 8020da0: 2300 movs r3, #0 8020da2: 613b str r3, [r7, #16] ADC_Common_TypeDef *tmpADC_Common; /* Process locked */ __HAL_LOCK(hadc); 8020da4: 687b ldr r3, [r7, #4] 8020da6: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8020daa: 2b01 cmp r3, #1 8020dac: d101 bne.n 8020db2 8020dae: 2302 movs r3, #2 8020db0: e0b2 b.n 8020f18 8020db2: 687b ldr r3, [r7, #4] 8020db4: 2201 movs r2, #1 8020db6: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Enable the ADC peripheral */ /* Check if ADC peripheral is disabled in order to enable it and wait during Tstab time the ADC's stabilization */ if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) 8020dba: 687b ldr r3, [r7, #4] 8020dbc: 681b ldr r3, [r3, #0] 8020dbe: 689b ldr r3, [r3, #8] 8020dc0: f003 0301 and.w r3, r3, #1 8020dc4: 2b01 cmp r3, #1 8020dc6: d018 beq.n 8020dfa { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 8020dc8: 687b ldr r3, [r7, #4] 8020dca: 681b ldr r3, [r3, #0] 8020dcc: 689a ldr r2, [r3, #8] 8020dce: 687b ldr r3, [r7, #4] 8020dd0: 681b ldr r3, [r3, #0] 8020dd2: f042 0201 orr.w r2, r2, #1 8020dd6: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 8020dd8: 4b52 ldr r3, [pc, #328] @ (8020f24 ) 8020dda: 681b ldr r3, [r3, #0] 8020ddc: 4a52 ldr r2, [pc, #328] @ (8020f28 ) 8020dde: fba2 2303 umull r2, r3, r2, r3 8020de2: 0c9a lsrs r2, r3, #18 8020de4: 4613 mov r3, r2 8020de6: 005b lsls r3, r3, #1 8020de8: 4413 add r3, r2 8020dea: 60bb str r3, [r7, #8] while(counter != 0U) 8020dec: e002 b.n 8020df4 { counter--; 8020dee: 68bb ldr r3, [r7, #8] 8020df0: 3b01 subs r3, #1 8020df2: 60bb str r3, [r7, #8] while(counter != 0U) 8020df4: 68bb ldr r3, [r7, #8] 8020df6: 2b00 cmp r3, #0 8020df8: d1f9 bne.n 8020dee } } /* Start conversion if ADC is effectively enabled */ if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON)) 8020dfa: 687b ldr r3, [r7, #4] 8020dfc: 681b ldr r3, [r3, #0] 8020dfe: 689b ldr r3, [r3, #8] 8020e00: f003 0301 and.w r3, r3, #1 8020e04: 2b01 cmp r3, #1 8020e06: d17a bne.n 8020efe { /* Set ADC state */ /* - Clear state bitfield related to injected group conversion results */ /* - Set state bitfield related to injected operation */ ADC_STATE_CLR_SET(hadc->State, 8020e08: 687b ldr r3, [r7, #4] 8020e0a: 6c1b ldr r3, [r3, #64] @ 0x40 8020e0c: f423 5340 bic.w r3, r3, #12288 @ 0x3000 8020e10: f023 0301 bic.w r3, r3, #1 8020e14: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8020e18: 687b ldr r3, [r7, #4] 8020e1a: 641a str r2, [r3, #64] @ 0x40 /* Check if a regular conversion is ongoing */ /* Note: On this device, there is no ADC error code fields related to */ /* conversions on group injected only. In case of conversion on */ /* going on group regular, no error code is reset. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) 8020e1c: 687b ldr r3, [r7, #4] 8020e1e: 6c1b ldr r3, [r3, #64] @ 0x40 8020e20: f403 7380 and.w r3, r3, #256 @ 0x100 8020e24: 2b00 cmp r3, #0 8020e26: d102 bne.n 8020e2e { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 8020e28: 687b ldr r3, [r7, #4] 8020e2a: 2200 movs r2, #0 8020e2c: 645a str r2, [r3, #68] @ 0x44 } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 8020e2e: 687b ldr r3, [r7, #4] 8020e30: 2200 movs r2, #0 8020e32: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Clear injected group conversion flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); 8020e36: 687b ldr r3, [r7, #4] 8020e38: 681b ldr r3, [r3, #0] 8020e3a: f06f 0204 mvn.w r2, #4 8020e3e: 601a str r2, [r3, #0] /* Enable end of conversion interrupt for injected channels */ __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); 8020e40: 687b ldr r3, [r7, #4] 8020e42: 681b ldr r3, [r3, #0] 8020e44: 685a ldr r2, [r3, #4] 8020e46: 687b ldr r3, [r7, #4] 8020e48: 681b ldr r3, [r3, #0] 8020e4a: f042 0280 orr.w r2, r2, #128 @ 0x80 8020e4e: 605a str r2, [r3, #4] /* Pointer to the common control register to which is belonging hadc */ /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ /* control register) */ tmpADC_Common = ADC_COMMON_REGISTER(hadc); 8020e50: 4b36 ldr r3, [pc, #216] @ (8020f2c ) 8020e52: 60fb str r3, [r7, #12] /* Check if Multimode enabled */ if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI)) 8020e54: 68fb ldr r3, [r7, #12] 8020e56: 685b ldr r3, [r3, #4] 8020e58: f003 031f and.w r3, r3, #31 8020e5c: 2b00 cmp r3, #0 8020e5e: d124 bne.n 8020eaa { tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); 8020e60: 687b ldr r3, [r7, #4] 8020e62: 681b ldr r3, [r3, #0] 8020e64: 689b ldr r3, [r3, #8] 8020e66: f403 1340 and.w r3, r3, #3145728 @ 0x300000 8020e6a: 2b00 cmp r3, #0 8020e6c: bf0c ite eq 8020e6e: 2301 moveq r3, #1 8020e70: 2300 movne r3, #0 8020e72: b2db uxtb r3, r3 8020e74: 617b str r3, [r7, #20] tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); 8020e76: 687b ldr r3, [r7, #4] 8020e78: 681b ldr r3, [r3, #0] 8020e7a: 685b ldr r3, [r3, #4] 8020e7c: f403 6380 and.w r3, r3, #1024 @ 0x400 8020e80: 2b00 cmp r3, #0 8020e82: bf0c ite eq 8020e84: 2301 moveq r3, #1 8020e86: 2300 movne r3, #0 8020e88: b2db uxtb r3, r3 8020e8a: 613b str r3, [r7, #16] if(tmp1 && tmp2) 8020e8c: 697b ldr r3, [r7, #20] 8020e8e: 2b00 cmp r3, #0 8020e90: d041 beq.n 8020f16 8020e92: 693b ldr r3, [r7, #16] 8020e94: 2b00 cmp r3, #0 8020e96: d03e beq.n 8020f16 { /* Enable the selected ADC software conversion for injected group */ hadc->Instance->CR2 |= ADC_CR2_JSWSTART; 8020e98: 687b ldr r3, [r7, #4] 8020e9a: 681b ldr r3, [r3, #0] 8020e9c: 689a ldr r2, [r3, #8] 8020e9e: 687b ldr r3, [r7, #4] 8020ea0: 681b ldr r3, [r3, #0] 8020ea2: f442 0280 orr.w r2, r2, #4194304 @ 0x400000 8020ea6: 609a str r2, [r3, #8] 8020ea8: e035 b.n 8020f16 } } else { tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); 8020eaa: 687b ldr r3, [r7, #4] 8020eac: 681b ldr r3, [r3, #0] 8020eae: 689b ldr r3, [r3, #8] 8020eb0: f403 1340 and.w r3, r3, #3145728 @ 0x300000 8020eb4: 2b00 cmp r3, #0 8020eb6: bf0c ite eq 8020eb8: 2301 moveq r3, #1 8020eba: 2300 movne r3, #0 8020ebc: b2db uxtb r3, r3 8020ebe: 617b str r3, [r7, #20] tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); 8020ec0: 687b ldr r3, [r7, #4] 8020ec2: 681b ldr r3, [r3, #0] 8020ec4: 685b ldr r3, [r3, #4] 8020ec6: f403 6380 and.w r3, r3, #1024 @ 0x400 8020eca: 2b00 cmp r3, #0 8020ecc: bf0c ite eq 8020ece: 2301 moveq r3, #1 8020ed0: 2300 movne r3, #0 8020ed2: b2db uxtb r3, r3 8020ed4: 613b str r3, [r7, #16] if((hadc->Instance == ADC1) && tmp1 && tmp2) 8020ed6: 687b ldr r3, [r7, #4] 8020ed8: 681b ldr r3, [r3, #0] 8020eda: 4a15 ldr r2, [pc, #84] @ (8020f30 ) 8020edc: 4293 cmp r3, r2 8020ede: d11a bne.n 8020f16 8020ee0: 697b ldr r3, [r7, #20] 8020ee2: 2b00 cmp r3, #0 8020ee4: d017 beq.n 8020f16 8020ee6: 693b ldr r3, [r7, #16] 8020ee8: 2b00 cmp r3, #0 8020eea: d014 beq.n 8020f16 { /* Enable the selected ADC software conversion for injected group */ hadc->Instance->CR2 |= ADC_CR2_JSWSTART; 8020eec: 687b ldr r3, [r7, #4] 8020eee: 681b ldr r3, [r3, #0] 8020ef0: 689a ldr r2, [r3, #8] 8020ef2: 687b ldr r3, [r7, #4] 8020ef4: 681b ldr r3, [r3, #0] 8020ef6: f442 0280 orr.w r2, r2, #4194304 @ 0x400000 8020efa: 609a str r2, [r3, #8] 8020efc: e00b b.n 8020f16 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8020efe: 687b ldr r3, [r7, #4] 8020f00: 6c1b ldr r3, [r3, #64] @ 0x40 8020f02: f043 0210 orr.w r2, r3, #16 8020f06: 687b ldr r3, [r7, #4] 8020f08: 641a str r2, [r3, #64] @ 0x40 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8020f0a: 687b ldr r3, [r7, #4] 8020f0c: 6c5b ldr r3, [r3, #68] @ 0x44 8020f0e: f043 0201 orr.w r2, r3, #1 8020f12: 687b ldr r3, [r7, #4] 8020f14: 645a str r2, [r3, #68] @ 0x44 } /* Return function status */ return HAL_OK; 8020f16: 2300 movs r3, #0 } 8020f18: 4618 mov r0, r3 8020f1a: 371c adds r7, #28 8020f1c: 46bd mov sp, r7 8020f1e: f85d 7b04 ldr.w r7, [sp], #4 8020f22: 4770 bx lr 8020f24: 20000024 .word 0x20000024 8020f28: 431bde83 .word 0x431bde83 8020f2c: 40012300 .word 0x40012300 8020f30: 40012000 .word 0x40012000 08020f34 : * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected * @retval None */ uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank) { 8020f34: b480 push {r7} 8020f36: b085 sub sp, #20 8020f38: af00 add r7, sp, #0 8020f3a: 6078 str r0, [r7, #4] 8020f3c: 6039 str r1, [r7, #0] __IO uint32_t tmp = 0U; 8020f3e: 2300 movs r3, #0 8020f40: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); /* Clear injected group conversion flag to have similar behaviour as */ /* regular group: reading data register also clears end of conversion flag. */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); 8020f42: 687b ldr r3, [r7, #4] 8020f44: 681b ldr r3, [r3, #0] 8020f46: f06f 0204 mvn.w r2, #4 8020f4a: 601a str r2, [r3, #0] /* Return the selected ADC converted value */ switch(InjectedRank) 8020f4c: 683b ldr r3, [r7, #0] 8020f4e: 3b01 subs r3, #1 8020f50: 2b03 cmp r3, #3 8020f52: d81f bhi.n 8020f94 8020f54: a201 add r2, pc, #4 @ (adr r2, 8020f5c ) 8020f56: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8020f5a: bf00 nop 8020f5c: 08020f8b .word 0x08020f8b 8020f60: 08020f81 .word 0x08020f81 8020f64: 08020f77 .word 0x08020f77 8020f68: 08020f6d .word 0x08020f6d { case ADC_INJECTED_RANK_4: { tmp = hadc->Instance->JDR4; 8020f6c: 687b ldr r3, [r7, #4] 8020f6e: 681b ldr r3, [r3, #0] 8020f70: 6c9b ldr r3, [r3, #72] @ 0x48 8020f72: 60fb str r3, [r7, #12] } break; 8020f74: e00f b.n 8020f96 case ADC_INJECTED_RANK_3: { tmp = hadc->Instance->JDR3; 8020f76: 687b ldr r3, [r7, #4] 8020f78: 681b ldr r3, [r3, #0] 8020f7a: 6c5b ldr r3, [r3, #68] @ 0x44 8020f7c: 60fb str r3, [r7, #12] } break; 8020f7e: e00a b.n 8020f96 case ADC_INJECTED_RANK_2: { tmp = hadc->Instance->JDR2; 8020f80: 687b ldr r3, [r7, #4] 8020f82: 681b ldr r3, [r3, #0] 8020f84: 6c1b ldr r3, [r3, #64] @ 0x40 8020f86: 60fb str r3, [r7, #12] } break; 8020f88: e005 b.n 8020f96 case ADC_INJECTED_RANK_1: { tmp = hadc->Instance->JDR1; 8020f8a: 687b ldr r3, [r7, #4] 8020f8c: 681b ldr r3, [r3, #0] 8020f8e: 6bdb ldr r3, [r3, #60] @ 0x3c 8020f90: 60fb str r3, [r7, #12] } break; 8020f92: e000 b.n 8020f96 default: break; 8020f94: bf00 nop } return tmp; 8020f96: 68fb ldr r3, [r7, #12] } 8020f98: 4618 mov r0, r3 8020f9a: 3714 adds r7, #20 8020f9c: 46bd mov sp, r7 8020f9e: f85d 7b04 ldr.w r7, [sp], #4 8020fa2: 4770 bx lr 08020fa4 : * the configuration information for the specified ADC. * @param sConfigInjected ADC configuration structure for injected channel. * @retval None */ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected) { 8020fa4: b480 push {r7} 8020fa6: b085 sub sp, #20 8020fa8: af00 add r7, sp, #0 8020faa: 6078 str r0, [r7, #4] 8020fac: 6039 str r1, [r7, #0] { assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); } /* Process locked */ __HAL_LOCK(hadc); 8020fae: 687b ldr r3, [r7, #4] 8020fb0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8020fb4: 2b01 cmp r3, #1 8020fb6: d101 bne.n 8020fbc 8020fb8: 2302 movs r3, #2 8020fba: e17e b.n 80212ba 8020fbc: 687b ldr r3, [r7, #4] 8020fbe: 2201 movs r2, #1 8020fc0: f883 203c strb.w r2, [r3, #60] @ 0x3c /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9) 8020fc4: 683b ldr r3, [r7, #0] 8020fc6: 681b ldr r3, [r3, #0] 8020fc8: 2b09 cmp r3, #9 8020fca: d925 bls.n 8021018 { /* Clear the old sample time */ hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel); 8020fcc: 687b ldr r3, [r7, #4] 8020fce: 681b ldr r3, [r3, #0] 8020fd0: 68d9 ldr r1, [r3, #12] 8020fd2: 683b ldr r3, [r7, #0] 8020fd4: 681b ldr r3, [r3, #0] 8020fd6: b29b uxth r3, r3 8020fd8: 461a mov r2, r3 8020fda: 4613 mov r3, r2 8020fdc: 005b lsls r3, r3, #1 8020fde: 4413 add r3, r2 8020fe0: 3b1e subs r3, #30 8020fe2: 2207 movs r2, #7 8020fe4: fa02 f303 lsl.w r3, r2, r3 8020fe8: 43da mvns r2, r3 8020fea: 687b ldr r3, [r7, #4] 8020fec: 681b ldr r3, [r3, #0] 8020fee: 400a ands r2, r1 8020ff0: 60da str r2, [r3, #12] /* Set the new sample time */ hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); 8020ff2: 687b ldr r3, [r7, #4] 8020ff4: 681b ldr r3, [r3, #0] 8020ff6: 68d9 ldr r1, [r3, #12] 8020ff8: 683b ldr r3, [r7, #0] 8020ffa: 689a ldr r2, [r3, #8] 8020ffc: 683b ldr r3, [r7, #0] 8020ffe: 681b ldr r3, [r3, #0] 8021000: b29b uxth r3, r3 8021002: 4618 mov r0, r3 8021004: 4603 mov r3, r0 8021006: 005b lsls r3, r3, #1 8021008: 4403 add r3, r0 802100a: 3b1e subs r3, #30 802100c: 409a lsls r2, r3 802100e: 687b ldr r3, [r7, #4] 8021010: 681b ldr r3, [r3, #0] 8021012: 430a orrs r2, r1 8021014: 60da str r2, [r3, #12] 8021016: e022 b.n 802105e } else /* ADC_Channel include in ADC_Channel_[0..9] */ { /* Clear the old sample time */ hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel); 8021018: 687b ldr r3, [r7, #4] 802101a: 681b ldr r3, [r3, #0] 802101c: 6919 ldr r1, [r3, #16] 802101e: 683b ldr r3, [r7, #0] 8021020: 681b ldr r3, [r3, #0] 8021022: b29b uxth r3, r3 8021024: 461a mov r2, r3 8021026: 4613 mov r3, r2 8021028: 005b lsls r3, r3, #1 802102a: 4413 add r3, r2 802102c: 2207 movs r2, #7 802102e: fa02 f303 lsl.w r3, r2, r3 8021032: 43da mvns r2, r3 8021034: 687b ldr r3, [r7, #4] 8021036: 681b ldr r3, [r3, #0] 8021038: 400a ands r2, r1 802103a: 611a str r2, [r3, #16] /* Set the new sample time */ hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); 802103c: 687b ldr r3, [r7, #4] 802103e: 681b ldr r3, [r3, #0] 8021040: 6919 ldr r1, [r3, #16] 8021042: 683b ldr r3, [r7, #0] 8021044: 689a ldr r2, [r3, #8] 8021046: 683b ldr r3, [r7, #0] 8021048: 681b ldr r3, [r3, #0] 802104a: b29b uxth r3, r3 802104c: 4618 mov r0, r3 802104e: 4603 mov r3, r0 8021050: 005b lsls r3, r3, #1 8021052: 4403 add r3, r0 8021054: 409a lsls r2, r3 8021056: 687b ldr r3, [r7, #4] 8021058: 681b ldr r3, [r3, #0] 802105a: 430a orrs r2, r1 802105c: 611a str r2, [r3, #16] } /*---------------------------- ADCx JSQR Configuration -----------------*/ hadc->Instance->JSQR &= ~(ADC_JSQR_JL); 802105e: 687b ldr r3, [r7, #4] 8021060: 681b ldr r3, [r3, #0] 8021062: 6b9a ldr r2, [r3, #56] @ 0x38 8021064: 687b ldr r3, [r7, #4] 8021066: 681b ldr r3, [r3, #0] 8021068: f422 1240 bic.w r2, r2, #3145728 @ 0x300000 802106c: 639a str r2, [r3, #56] @ 0x38 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion); 802106e: 687b ldr r3, [r7, #4] 8021070: 681b ldr r3, [r3, #0] 8021072: 6b99 ldr r1, [r3, #56] @ 0x38 8021074: 683b ldr r3, [r7, #0] 8021076: 691b ldr r3, [r3, #16] 8021078: 3b01 subs r3, #1 802107a: 051a lsls r2, r3, #20 802107c: 687b ldr r3, [r7, #4] 802107e: 681b ldr r3, [r3, #0] 8021080: 430a orrs r2, r1 8021082: 639a str r2, [r3, #56] @ 0x38 /* Rank configuration */ /* Clear the old SQx bits for the selected rank */ hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); 8021084: 687b ldr r3, [r7, #4] 8021086: 681b ldr r3, [r3, #0] 8021088: 6b99 ldr r1, [r3, #56] @ 0x38 802108a: 683b ldr r3, [r7, #0] 802108c: 685b ldr r3, [r3, #4] 802108e: b2da uxtb r2, r3 8021090: 683b ldr r3, [r7, #0] 8021092: 691b ldr r3, [r3, #16] 8021094: b2db uxtb r3, r3 8021096: 1ad3 subs r3, r2, r3 8021098: b2db uxtb r3, r3 802109a: 3303 adds r3, #3 802109c: b2db uxtb r3, r3 802109e: 461a mov r2, r3 80210a0: 4613 mov r3, r2 80210a2: 009b lsls r3, r3, #2 80210a4: 4413 add r3, r2 80210a6: 221f movs r2, #31 80210a8: fa02 f303 lsl.w r3, r2, r3 80210ac: 43da mvns r2, r3 80210ae: 687b ldr r3, [r7, #4] 80210b0: 681b ldr r3, [r3, #0] 80210b2: 400a ands r2, r1 80210b4: 639a str r2, [r3, #56] @ 0x38 /* Set the SQx bits for the selected rank */ hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); 80210b6: 687b ldr r3, [r7, #4] 80210b8: 681b ldr r3, [r3, #0] 80210ba: 6b99 ldr r1, [r3, #56] @ 0x38 80210bc: 683b ldr r3, [r7, #0] 80210be: 681b ldr r3, [r3, #0] 80210c0: b29b uxth r3, r3 80210c2: 4618 mov r0, r3 80210c4: 683b ldr r3, [r7, #0] 80210c6: 685b ldr r3, [r3, #4] 80210c8: b2da uxtb r2, r3 80210ca: 683b ldr r3, [r7, #0] 80210cc: 691b ldr r3, [r3, #16] 80210ce: b2db uxtb r3, r3 80210d0: 1ad3 subs r3, r2, r3 80210d2: b2db uxtb r3, r3 80210d4: 3303 adds r3, #3 80210d6: b2db uxtb r3, r3 80210d8: 461a mov r2, r3 80210da: 4613 mov r3, r2 80210dc: 009b lsls r3, r3, #2 80210de: 4413 add r3, r2 80210e0: fa00 f203 lsl.w r2, r0, r3 80210e4: 687b ldr r3, [r7, #4] 80210e6: 681b ldr r3, [r3, #0] 80210e8: 430a orrs r2, r1 80210ea: 639a str r2, [r3, #56] @ 0x38 /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) 80210ec: 683b ldr r3, [r7, #0] 80210ee: 699b ldr r3, [r3, #24] 80210f0: 4a75 ldr r2, [pc, #468] @ (80212c8 ) 80210f2: 4293 cmp r3, r2 80210f4: d022 beq.n 802113c { /* Select external trigger to start conversion */ hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); 80210f6: 687b ldr r3, [r7, #4] 80210f8: 681b ldr r3, [r3, #0] 80210fa: 689a ldr r2, [r3, #8] 80210fc: 687b ldr r3, [r7, #4] 80210fe: 681b ldr r3, [r3, #0] 8021100: f422 2270 bic.w r2, r2, #983040 @ 0xf0000 8021104: 609a str r2, [r3, #8] hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv; 8021106: 687b ldr r3, [r7, #4] 8021108: 681b ldr r3, [r3, #0] 802110a: 6899 ldr r1, [r3, #8] 802110c: 683b ldr r3, [r7, #0] 802110e: 699a ldr r2, [r3, #24] 8021110: 687b ldr r3, [r7, #4] 8021112: 681b ldr r3, [r3, #0] 8021114: 430a orrs r2, r1 8021116: 609a str r2, [r3, #8] /* Select external trigger polarity */ hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); 8021118: 687b ldr r3, [r7, #4] 802111a: 681b ldr r3, [r3, #0] 802111c: 689a ldr r2, [r3, #8] 802111e: 687b ldr r3, [r7, #4] 8021120: 681b ldr r3, [r3, #0] 8021122: f422 1240 bic.w r2, r2, #3145728 @ 0x300000 8021126: 609a str r2, [r3, #8] hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge; 8021128: 687b ldr r3, [r7, #4] 802112a: 681b ldr r3, [r3, #0] 802112c: 6899 ldr r1, [r3, #8] 802112e: 683b ldr r3, [r7, #0] 8021130: 69da ldr r2, [r3, #28] 8021132: 687b ldr r3, [r7, #4] 8021134: 681b ldr r3, [r3, #0] 8021136: 430a orrs r2, r1 8021138: 609a str r2, [r3, #8] 802113a: e00f b.n 802115c } else { /* Reset the external trigger */ hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); 802113c: 687b ldr r3, [r7, #4] 802113e: 681b ldr r3, [r3, #0] 8021140: 689a ldr r2, [r3, #8] 8021142: 687b ldr r3, [r7, #4] 8021144: 681b ldr r3, [r3, #0] 8021146: f422 2270 bic.w r2, r2, #983040 @ 0xf0000 802114a: 609a str r2, [r3, #8] hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); 802114c: 687b ldr r3, [r7, #4] 802114e: 681b ldr r3, [r3, #0] 8021150: 689a ldr r2, [r3, #8] 8021152: 687b ldr r3, [r7, #4] 8021154: 681b ldr r3, [r3, #0] 8021156: f422 1240 bic.w r2, r2, #3145728 @ 0x300000 802115a: 609a str r2, [r3, #8] } if (sConfigInjected->AutoInjectedConv != DISABLE) 802115c: 683b ldr r3, [r7, #0] 802115e: 7d5b ldrb r3, [r3, #21] 8021160: 2b00 cmp r3, #0 8021162: d008 beq.n 8021176 { /* Enable the selected ADC automatic injected group conversion */ hadc->Instance->CR1 |= ADC_CR1_JAUTO; 8021164: 687b ldr r3, [r7, #4] 8021166: 681b ldr r3, [r3, #0] 8021168: 685a ldr r2, [r3, #4] 802116a: 687b ldr r3, [r7, #4] 802116c: 681b ldr r3, [r3, #0] 802116e: f442 6280 orr.w r2, r2, #1024 @ 0x400 8021172: 605a str r2, [r3, #4] 8021174: e007 b.n 8021186 } else { /* Disable the selected ADC automatic injected group conversion */ hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO); 8021176: 687b ldr r3, [r7, #4] 8021178: 681b ldr r3, [r3, #0] 802117a: 685a ldr r2, [r3, #4] 802117c: 687b ldr r3, [r7, #4] 802117e: 681b ldr r3, [r3, #0] 8021180: f422 6280 bic.w r2, r2, #1024 @ 0x400 8021184: 605a str r2, [r3, #4] } if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE) 8021186: 683b ldr r3, [r7, #0] 8021188: 7d1b ldrb r3, [r3, #20] 802118a: 2b00 cmp r3, #0 802118c: d008 beq.n 80211a0 { /* Enable the selected ADC injected discontinuous mode */ hadc->Instance->CR1 |= ADC_CR1_JDISCEN; 802118e: 687b ldr r3, [r7, #4] 8021190: 681b ldr r3, [r3, #0] 8021192: 685a ldr r2, [r3, #4] 8021194: 687b ldr r3, [r7, #4] 8021196: 681b ldr r3, [r3, #0] 8021198: f442 5280 orr.w r2, r2, #4096 @ 0x1000 802119c: 605a str r2, [r3, #4] 802119e: e007 b.n 80211b0 } else { /* Disable the selected ADC injected discontinuous mode */ hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN); 80211a0: 687b ldr r3, [r7, #4] 80211a2: 681b ldr r3, [r3, #0] 80211a4: 685a ldr r2, [r3, #4] 80211a6: 687b ldr r3, [r7, #4] 80211a8: 681b ldr r3, [r3, #0] 80211aa: f422 5280 bic.w r2, r2, #4096 @ 0x1000 80211ae: 605a str r2, [r3, #4] } switch(sConfigInjected->InjectedRank) 80211b0: 683b ldr r3, [r7, #0] 80211b2: 685b ldr r3, [r3, #4] 80211b4: 2b03 cmp r3, #3 80211b6: d02e beq.n 8021216 80211b8: 2b03 cmp r3, #3 80211ba: d840 bhi.n 802123e 80211bc: 2b01 cmp r3, #1 80211be: d002 beq.n 80211c6 80211c0: 2b02 cmp r3, #2 80211c2: d014 beq.n 80211ee 80211c4: e03b b.n 802123e { case 1U: /* Set injected channel 1 offset */ hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1); 80211c6: 687b ldr r3, [r7, #4] 80211c8: 681b ldr r3, [r3, #0] 80211ca: 695b ldr r3, [r3, #20] 80211cc: 687a ldr r2, [r7, #4] 80211ce: 6812 ldr r2, [r2, #0] 80211d0: f423 637f bic.w r3, r3, #4080 @ 0xff0 80211d4: f023 030f bic.w r3, r3, #15 80211d8: 6153 str r3, [r2, #20] hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset; 80211da: 687b ldr r3, [r7, #4] 80211dc: 681b ldr r3, [r3, #0] 80211de: 6959 ldr r1, [r3, #20] 80211e0: 683b ldr r3, [r7, #0] 80211e2: 68da ldr r2, [r3, #12] 80211e4: 687b ldr r3, [r7, #4] 80211e6: 681b ldr r3, [r3, #0] 80211e8: 430a orrs r2, r1 80211ea: 615a str r2, [r3, #20] break; 80211ec: e03b b.n 8021266 case 2U: /* Set injected channel 2 offset */ hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2); 80211ee: 687b ldr r3, [r7, #4] 80211f0: 681b ldr r3, [r3, #0] 80211f2: 699b ldr r3, [r3, #24] 80211f4: 687a ldr r2, [r7, #4] 80211f6: 6812 ldr r2, [r2, #0] 80211f8: f423 637f bic.w r3, r3, #4080 @ 0xff0 80211fc: f023 030f bic.w r3, r3, #15 8021200: 6193 str r3, [r2, #24] hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset; 8021202: 687b ldr r3, [r7, #4] 8021204: 681b ldr r3, [r3, #0] 8021206: 6999 ldr r1, [r3, #24] 8021208: 683b ldr r3, [r7, #0] 802120a: 68da ldr r2, [r3, #12] 802120c: 687b ldr r3, [r7, #4] 802120e: 681b ldr r3, [r3, #0] 8021210: 430a orrs r2, r1 8021212: 619a str r2, [r3, #24] break; 8021214: e027 b.n 8021266 case 3U: /* Set injected channel 3 offset */ hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3); 8021216: 687b ldr r3, [r7, #4] 8021218: 681b ldr r3, [r3, #0] 802121a: 69db ldr r3, [r3, #28] 802121c: 687a ldr r2, [r7, #4] 802121e: 6812 ldr r2, [r2, #0] 8021220: f423 637f bic.w r3, r3, #4080 @ 0xff0 8021224: f023 030f bic.w r3, r3, #15 8021228: 61d3 str r3, [r2, #28] hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset; 802122a: 687b ldr r3, [r7, #4] 802122c: 681b ldr r3, [r3, #0] 802122e: 69d9 ldr r1, [r3, #28] 8021230: 683b ldr r3, [r7, #0] 8021232: 68da ldr r2, [r3, #12] 8021234: 687b ldr r3, [r7, #4] 8021236: 681b ldr r3, [r3, #0] 8021238: 430a orrs r2, r1 802123a: 61da str r2, [r3, #28] break; 802123c: e013 b.n 8021266 default: /* Set injected channel 4 offset */ hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4); 802123e: 687b ldr r3, [r7, #4] 8021240: 681b ldr r3, [r3, #0] 8021242: 6a1b ldr r3, [r3, #32] 8021244: 687a ldr r2, [r7, #4] 8021246: 6812 ldr r2, [r2, #0] 8021248: f423 637f bic.w r3, r3, #4080 @ 0xff0 802124c: f023 030f bic.w r3, r3, #15 8021250: 6213 str r3, [r2, #32] hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset; 8021252: 687b ldr r3, [r7, #4] 8021254: 681b ldr r3, [r3, #0] 8021256: 6a19 ldr r1, [r3, #32] 8021258: 683b ldr r3, [r7, #0] 802125a: 68da ldr r2, [r3, #12] 802125c: 687b ldr r3, [r7, #4] 802125e: 681b ldr r3, [r3, #0] 8021260: 430a orrs r2, r1 8021262: 621a str r2, [r3, #32] break; 8021264: bf00 nop } /* Pointer to the common control register to which is belonging hadc */ /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ /* control register) */ tmpADC_Common = ADC_COMMON_REGISTER(hadc); 8021266: 4b19 ldr r3, [pc, #100] @ (80212cc ) 8021268: 60fb str r3, [r7, #12] /* if ADC1 Channel_18 is selected enable VBAT Channel */ if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)) 802126a: 687b ldr r3, [r7, #4] 802126c: 681b ldr r3, [r3, #0] 802126e: 4a18 ldr r2, [pc, #96] @ (80212d0 ) 8021270: 4293 cmp r3, r2 8021272: d109 bne.n 8021288 8021274: 683b ldr r3, [r7, #0] 8021276: 681b ldr r3, [r3, #0] 8021278: 2b12 cmp r3, #18 802127a: d105 bne.n 8021288 { /* Enable the VBAT channel*/ tmpADC_Common->CCR |= ADC_CCR_VBATE; 802127c: 68fb ldr r3, [r7, #12] 802127e: 685b ldr r3, [r3, #4] 8021280: f443 0280 orr.w r2, r3, #4194304 @ 0x400000 8021284: 68fb ldr r3, [r7, #12] 8021286: 605a str r2, [r3, #4] } /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */ if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT))) 8021288: 687b ldr r3, [r7, #4] 802128a: 681b ldr r3, [r3, #0] 802128c: 4a10 ldr r2, [pc, #64] @ (80212d0 ) 802128e: 4293 cmp r3, r2 8021290: d10e bne.n 80212b0 8021292: 683b ldr r3, [r7, #0] 8021294: 681b ldr r3, [r3, #0] 8021296: 4a0f ldr r2, [pc, #60] @ (80212d4 ) 8021298: 4293 cmp r3, r2 802129a: d003 beq.n 80212a4 802129c: 683b ldr r3, [r7, #0] 802129e: 681b ldr r3, [r3, #0] 80212a0: 2b11 cmp r3, #17 80212a2: d105 bne.n 80212b0 { /* Enable the TSVREFE channel*/ tmpADC_Common->CCR |= ADC_CCR_TSVREFE; 80212a4: 68fb ldr r3, [r7, #12] 80212a6: 685b ldr r3, [r3, #4] 80212a8: f443 0200 orr.w r2, r3, #8388608 @ 0x800000 80212ac: 68fb ldr r3, [r7, #12] 80212ae: 605a str r2, [r3, #4] } /* Process unlocked */ __HAL_UNLOCK(hadc); 80212b0: 687b ldr r3, [r7, #4] 80212b2: 2200 movs r2, #0 80212b4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Return function status */ return HAL_OK; 80212b8: 2300 movs r3, #0 } 80212ba: 4618 mov r0, r3 80212bc: 3714 adds r7, #20 80212be: 46bd mov sp, r7 80212c0: f85d 7b04 ldr.w r7, [sp], #4 80212c4: 4770 bx lr 80212c6: bf00 nop 80212c8: 000f0001 .word 0x000f0001 80212cc: 40012300 .word 0x40012300 80212d0: 40012000 .word 0x40012000 80212d4: 10000012 .word 0x10000012 080212d8 : * @param multimode pointer to an ADC_MultiModeTypeDef structure that contains * the configuration information for multimode. * @retval HAL status */ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode) { 80212d8: b480 push {r7} 80212da: b085 sub sp, #20 80212dc: af00 add r7, sp, #0 80212de: 6078 str r0, [r7, #4] 80212e0: 6039 str r1, [r7, #0] assert_param(IS_ADC_MODE(multimode->Mode)); assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode)); assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); /* Process locked */ __HAL_LOCK(hadc); 80212e2: 687b ldr r3, [r7, #4] 80212e4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80212e8: 2b01 cmp r3, #1 80212ea: d101 bne.n 80212f0 80212ec: 2302 movs r3, #2 80212ee: e031 b.n 8021354 80212f0: 687b ldr r3, [r7, #4] 80212f2: 2201 movs r2, #1 80212f4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Pointer to the common control register to which is belonging hadc */ /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ /* control register) */ tmpADC_Common = ADC_COMMON_REGISTER(hadc); 80212f8: 4b19 ldr r3, [pc, #100] @ (8021360 ) 80212fa: 60fb str r3, [r7, #12] /* Set ADC mode */ tmpADC_Common->CCR &= ~(ADC_CCR_MULTI); 80212fc: 68fb ldr r3, [r7, #12] 80212fe: 685b ldr r3, [r3, #4] 8021300: f023 021f bic.w r2, r3, #31 8021304: 68fb ldr r3, [r7, #12] 8021306: 605a str r2, [r3, #4] tmpADC_Common->CCR |= multimode->Mode; 8021308: 68fb ldr r3, [r7, #12] 802130a: 685a ldr r2, [r3, #4] 802130c: 683b ldr r3, [r7, #0] 802130e: 681b ldr r3, [r3, #0] 8021310: 431a orrs r2, r3 8021312: 68fb ldr r3, [r7, #12] 8021314: 605a str r2, [r3, #4] /* Set the ADC DMA access mode */ tmpADC_Common->CCR &= ~(ADC_CCR_DMA); 8021316: 68fb ldr r3, [r7, #12] 8021318: 685b ldr r3, [r3, #4] 802131a: f423 4240 bic.w r2, r3, #49152 @ 0xc000 802131e: 68fb ldr r3, [r7, #12] 8021320: 605a str r2, [r3, #4] tmpADC_Common->CCR |= multimode->DMAAccessMode; 8021322: 68fb ldr r3, [r7, #12] 8021324: 685a ldr r2, [r3, #4] 8021326: 683b ldr r3, [r7, #0] 8021328: 685b ldr r3, [r3, #4] 802132a: 431a orrs r2, r3 802132c: 68fb ldr r3, [r7, #12] 802132e: 605a str r2, [r3, #4] /* Set delay between two sampling phases */ tmpADC_Common->CCR &= ~(ADC_CCR_DELAY); 8021330: 68fb ldr r3, [r7, #12] 8021332: 685b ldr r3, [r3, #4] 8021334: f423 6270 bic.w r2, r3, #3840 @ 0xf00 8021338: 68fb ldr r3, [r7, #12] 802133a: 605a str r2, [r3, #4] tmpADC_Common->CCR |= multimode->TwoSamplingDelay; 802133c: 68fb ldr r3, [r7, #12] 802133e: 685a ldr r2, [r3, #4] 8021340: 683b ldr r3, [r7, #0] 8021342: 689b ldr r3, [r3, #8] 8021344: 431a orrs r2, r3 8021346: 68fb ldr r3, [r7, #12] 8021348: 605a str r2, [r3, #4] /* Process unlocked */ __HAL_UNLOCK(hadc); 802134a: 687b ldr r3, [r7, #4] 802134c: 2200 movs r2, #0 802134e: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Return function status */ return HAL_OK; 8021352: 2300 movs r3, #0 } 8021354: 4618 mov r0, r3 8021356: 3714 adds r7, #20 8021358: 46bd mov sp, r7 802135a: f85d 7b04 ldr.w r7, [sp], #4 802135e: 4770 bx lr 8021360: 40012300 .word 0x40012300 08021364 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8021364: b480 push {r7} 8021366: b085 sub sp, #20 8021368: af00 add r7, sp, #0 802136a: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 802136c: 687b ldr r3, [r7, #4] 802136e: f003 0307 and.w r3, r3, #7 8021372: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8021374: 4b0c ldr r3, [pc, #48] @ (80213a8 <__NVIC_SetPriorityGrouping+0x44>) 8021376: 68db ldr r3, [r3, #12] 8021378: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 802137a: 68ba ldr r2, [r7, #8] 802137c: f64f 03ff movw r3, #63743 @ 0xf8ff 8021380: 4013 ands r3, r2 8021382: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8021384: 68fb ldr r3, [r7, #12] 8021386: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8021388: 68bb ldr r3, [r7, #8] 802138a: 4313 orrs r3, r2 reg_value = (reg_value | 802138c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8021390: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8021394: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8021396: 4a04 ldr r2, [pc, #16] @ (80213a8 <__NVIC_SetPriorityGrouping+0x44>) 8021398: 68bb ldr r3, [r7, #8] 802139a: 60d3 str r3, [r2, #12] } 802139c: bf00 nop 802139e: 3714 adds r7, #20 80213a0: 46bd mov sp, r7 80213a2: f85d 7b04 ldr.w r7, [sp], #4 80213a6: 4770 bx lr 80213a8: e000ed00 .word 0xe000ed00 080213ac <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 80213ac: b480 push {r7} 80213ae: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80213b0: 4b04 ldr r3, [pc, #16] @ (80213c4 <__NVIC_GetPriorityGrouping+0x18>) 80213b2: 68db ldr r3, [r3, #12] 80213b4: 0a1b lsrs r3, r3, #8 80213b6: f003 0307 and.w r3, r3, #7 } 80213ba: 4618 mov r0, r3 80213bc: 46bd mov sp, r7 80213be: f85d 7b04 ldr.w r7, [sp], #4 80213c2: 4770 bx lr 80213c4: e000ed00 .word 0xe000ed00 080213c8 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 80213c8: b480 push {r7} 80213ca: b083 sub sp, #12 80213cc: af00 add r7, sp, #0 80213ce: 4603 mov r3, r0 80213d0: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80213d2: f997 3007 ldrsb.w r3, [r7, #7] 80213d6: 2b00 cmp r3, #0 80213d8: db0b blt.n 80213f2 <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 80213da: 79fb ldrb r3, [r7, #7] 80213dc: f003 021f and.w r2, r3, #31 80213e0: 4907 ldr r1, [pc, #28] @ (8021400 <__NVIC_EnableIRQ+0x38>) 80213e2: f997 3007 ldrsb.w r3, [r7, #7] 80213e6: 095b lsrs r3, r3, #5 80213e8: 2001 movs r0, #1 80213ea: fa00 f202 lsl.w r2, r0, r2 80213ee: f841 2023 str.w r2, [r1, r3, lsl #2] } } 80213f2: bf00 nop 80213f4: 370c adds r7, #12 80213f6: 46bd mov sp, r7 80213f8: f85d 7b04 ldr.w r7, [sp], #4 80213fc: 4770 bx lr 80213fe: bf00 nop 8021400: e000e100 .word 0xe000e100 08021404 <__NVIC_DisableIRQ>: \details Disables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) { 8021404: b480 push {r7} 8021406: b083 sub sp, #12 8021408: af00 add r7, sp, #0 802140a: 4603 mov r3, r0 802140c: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 802140e: f997 3007 ldrsb.w r3, [r7, #7] 8021412: 2b00 cmp r3, #0 8021414: db12 blt.n 802143c <__NVIC_DisableIRQ+0x38> { NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8021416: 79fb ldrb r3, [r7, #7] 8021418: f003 021f and.w r2, r3, #31 802141c: 490a ldr r1, [pc, #40] @ (8021448 <__NVIC_DisableIRQ+0x44>) 802141e: f997 3007 ldrsb.w r3, [r7, #7] 8021422: 095b lsrs r3, r3, #5 8021424: 2001 movs r0, #1 8021426: fa00 f202 lsl.w r2, r0, r2 802142a: 3320 adds r3, #32 802142c: f841 2023 str.w r2, [r1, r3, lsl #2] \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 8021430: f3bf 8f4f dsb sy } 8021434: bf00 nop __ASM volatile ("isb 0xF":::"memory"); 8021436: f3bf 8f6f isb sy } 802143a: bf00 nop __DSB(); __ISB(); } } 802143c: bf00 nop 802143e: 370c adds r7, #12 8021440: 46bd mov sp, r7 8021442: f85d 7b04 ldr.w r7, [sp], #4 8021446: 4770 bx lr 8021448: e000e100 .word 0xe000e100 0802144c <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 802144c: b480 push {r7} 802144e: b083 sub sp, #12 8021450: af00 add r7, sp, #0 8021452: 4603 mov r3, r0 8021454: 6039 str r1, [r7, #0] 8021456: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8021458: f997 3007 ldrsb.w r3, [r7, #7] 802145c: 2b00 cmp r3, #0 802145e: db0a blt.n 8021476 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8021460: 683b ldr r3, [r7, #0] 8021462: b2da uxtb r2, r3 8021464: 490c ldr r1, [pc, #48] @ (8021498 <__NVIC_SetPriority+0x4c>) 8021466: f997 3007 ldrsb.w r3, [r7, #7] 802146a: 0112 lsls r2, r2, #4 802146c: b2d2 uxtb r2, r2 802146e: 440b add r3, r1 8021470: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8021474: e00a b.n 802148c <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8021476: 683b ldr r3, [r7, #0] 8021478: b2da uxtb r2, r3 802147a: 4908 ldr r1, [pc, #32] @ (802149c <__NVIC_SetPriority+0x50>) 802147c: 79fb ldrb r3, [r7, #7] 802147e: f003 030f and.w r3, r3, #15 8021482: 3b04 subs r3, #4 8021484: 0112 lsls r2, r2, #4 8021486: b2d2 uxtb r2, r2 8021488: 440b add r3, r1 802148a: 761a strb r2, [r3, #24] } 802148c: bf00 nop 802148e: 370c adds r7, #12 8021490: 46bd mov sp, r7 8021492: f85d 7b04 ldr.w r7, [sp], #4 8021496: 4770 bx lr 8021498: e000e100 .word 0xe000e100 802149c: e000ed00 .word 0xe000ed00 080214a0 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80214a0: b480 push {r7} 80214a2: b089 sub sp, #36 @ 0x24 80214a4: af00 add r7, sp, #0 80214a6: 60f8 str r0, [r7, #12] 80214a8: 60b9 str r1, [r7, #8] 80214aa: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80214ac: 68fb ldr r3, [r7, #12] 80214ae: f003 0307 and.w r3, r3, #7 80214b2: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80214b4: 69fb ldr r3, [r7, #28] 80214b6: f1c3 0307 rsb r3, r3, #7 80214ba: 2b04 cmp r3, #4 80214bc: bf28 it cs 80214be: 2304 movcs r3, #4 80214c0: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80214c2: 69fb ldr r3, [r7, #28] 80214c4: 3304 adds r3, #4 80214c6: 2b06 cmp r3, #6 80214c8: d902 bls.n 80214d0 80214ca: 69fb ldr r3, [r7, #28] 80214cc: 3b03 subs r3, #3 80214ce: e000 b.n 80214d2 80214d0: 2300 movs r3, #0 80214d2: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80214d4: f04f 32ff mov.w r2, #4294967295 80214d8: 69bb ldr r3, [r7, #24] 80214da: fa02 f303 lsl.w r3, r2, r3 80214de: 43da mvns r2, r3 80214e0: 68bb ldr r3, [r7, #8] 80214e2: 401a ands r2, r3 80214e4: 697b ldr r3, [r7, #20] 80214e6: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 80214e8: f04f 31ff mov.w r1, #4294967295 80214ec: 697b ldr r3, [r7, #20] 80214ee: fa01 f303 lsl.w r3, r1, r3 80214f2: 43d9 mvns r1, r3 80214f4: 687b ldr r3, [r7, #4] 80214f6: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80214f8: 4313 orrs r3, r2 ); } 80214fa: 4618 mov r0, r3 80214fc: 3724 adds r7, #36 @ 0x24 80214fe: 46bd mov sp, r7 8021500: f85d 7b04 ldr.w r7, [sp], #4 8021504: 4770 bx lr ... 08021508 <__NVIC_SystemReset>: /** \brief System Reset \details Initiates a system reset request to reset the MCU. */ __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) { 8021508: b480 push {r7} 802150a: af00 add r7, sp, #0 __ASM volatile ("dsb 0xF":::"memory"); 802150c: f3bf 8f4f dsb sy } 8021510: bf00 nop __DSB(); /* Ensure all outstanding memory accesses included buffered write are completed before reset */ SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | 8021512: 4b06 ldr r3, [pc, #24] @ (802152c <__NVIC_SystemReset+0x24>) 8021514: 68db ldr r3, [r3, #12] 8021516: f403 62e0 and.w r2, r3, #1792 @ 0x700 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 802151a: 4904 ldr r1, [pc, #16] @ (802152c <__NVIC_SystemReset+0x24>) 802151c: 4b04 ldr r3, [pc, #16] @ (8021530 <__NVIC_SystemReset+0x28>) 802151e: 4313 orrs r3, r2 8021520: 60cb str r3, [r1, #12] __ASM volatile ("dsb 0xF":::"memory"); 8021522: f3bf 8f4f dsb sy } 8021526: bf00 nop SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ __DSB(); /* Ensure completion of memory access */ for(;;) /* wait until reset */ { __NOP(); 8021528: bf00 nop 802152a: e7fd b.n 8021528 <__NVIC_SystemReset+0x20> 802152c: e000ed00 .word 0xe000ed00 8021530: 05fa0004 .word 0x05fa0004 08021534 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8021534: b580 push {r7, lr} 8021536: b082 sub sp, #8 8021538: af00 add r7, sp, #0 802153a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 802153c: 687b ldr r3, [r7, #4] 802153e: 3b01 subs r3, #1 8021540: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8021544: d301 bcc.n 802154a { return (1UL); /* Reload value impossible */ 8021546: 2301 movs r3, #1 8021548: e00f b.n 802156a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 802154a: 4a0a ldr r2, [pc, #40] @ (8021574 ) 802154c: 687b ldr r3, [r7, #4] 802154e: 3b01 subs r3, #1 8021550: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8021552: 210f movs r1, #15 8021554: f04f 30ff mov.w r0, #4294967295 8021558: f7ff ff78 bl 802144c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 802155c: 4b05 ldr r3, [pc, #20] @ (8021574 ) 802155e: 2200 movs r2, #0 8021560: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8021562: 4b04 ldr r3, [pc, #16] @ (8021574 ) 8021564: 2207 movs r2, #7 8021566: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8021568: 2300 movs r3, #0 } 802156a: 4618 mov r0, r3 802156c: 3708 adds r7, #8 802156e: 46bd mov sp, r7 8021570: bd80 pop {r7, pc} 8021572: bf00 nop 8021574: e000e010 .word 0xe000e010 08021578 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8021578: b580 push {r7, lr} 802157a: b082 sub sp, #8 802157c: af00 add r7, sp, #0 802157e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8021580: 6878 ldr r0, [r7, #4] 8021582: f7ff feef bl 8021364 <__NVIC_SetPriorityGrouping> } 8021586: bf00 nop 8021588: 3708 adds r7, #8 802158a: 46bd mov sp, r7 802158c: bd80 pop {r7, pc} 0802158e : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 802158e: b580 push {r7, lr} 8021590: b086 sub sp, #24 8021592: af00 add r7, sp, #0 8021594: 4603 mov r3, r0 8021596: 60b9 str r1, [r7, #8] 8021598: 607a str r2, [r7, #4] 802159a: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 802159c: 2300 movs r3, #0 802159e: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 80215a0: f7ff ff04 bl 80213ac <__NVIC_GetPriorityGrouping> 80215a4: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 80215a6: 687a ldr r2, [r7, #4] 80215a8: 68b9 ldr r1, [r7, #8] 80215aa: 6978 ldr r0, [r7, #20] 80215ac: f7ff ff78 bl 80214a0 80215b0: 4602 mov r2, r0 80215b2: f997 300f ldrsb.w r3, [r7, #15] 80215b6: 4611 mov r1, r2 80215b8: 4618 mov r0, r3 80215ba: f7ff ff47 bl 802144c <__NVIC_SetPriority> } 80215be: bf00 nop 80215c0: 3718 adds r7, #24 80215c2: 46bd mov sp, r7 80215c4: bd80 pop {r7, pc} 080215c6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80215c6: b580 push {r7, lr} 80215c8: b082 sub sp, #8 80215ca: af00 add r7, sp, #0 80215cc: 4603 mov r3, r0 80215ce: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80215d0: f997 3007 ldrsb.w r3, [r7, #7] 80215d4: 4618 mov r0, r3 80215d6: f7ff fef7 bl 80213c8 <__NVIC_EnableIRQ> } 80215da: bf00 nop 80215dc: 3708 adds r7, #8 80215de: 46bd mov sp, r7 80215e0: bd80 pop {r7, pc} 080215e2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) * @retval None */ void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) { 80215e2: b580 push {r7, lr} 80215e4: b082 sub sp, #8 80215e6: af00 add r7, sp, #0 80215e8: 4603 mov r3, r0 80215ea: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Disable interrupt */ NVIC_DisableIRQ(IRQn); 80215ec: f997 3007 ldrsb.w r3, [r7, #7] 80215f0: 4618 mov r0, r3 80215f2: f7ff ff07 bl 8021404 <__NVIC_DisableIRQ> } 80215f6: bf00 nop 80215f8: 3708 adds r7, #8 80215fa: 46bd mov sp, r7 80215fc: bd80 pop {r7, pc} 080215fe : /** * @brief Initiates a system reset request to reset the MCU. * @retval None */ void HAL_NVIC_SystemReset(void) { 80215fe: b580 push {r7, lr} 8021600: af00 add r7, sp, #0 /* System Reset */ NVIC_SystemReset(); 8021602: f7ff ff81 bl 8021508 <__NVIC_SystemReset> 08021606 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8021606: b580 push {r7, lr} 8021608: b082 sub sp, #8 802160a: af00 add r7, sp, #0 802160c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 802160e: 6878 ldr r0, [r7, #4] 8021610: f7ff ff90 bl 8021534 8021614: 4603 mov r3, r0 } 8021616: 4618 mov r0, r3 8021618: 3708 adds r7, #8 802161a: 46bd mov sp, r7 802161c: bd80 pop {r7, pc} 0802161e : /** * @brief This function handles SYSTICK interrupt request. * @retval None */ void HAL_SYSTICK_IRQHandler(void) { 802161e: b580 push {r7, lr} 8021620: af00 add r7, sp, #0 HAL_SYSTICK_Callback(); 8021622: f7fc fa8f bl 801db44 } 8021626: bf00 nop 8021628: bd80 pop {r7, pc} 0802162a : * @param hdac pointer to a DAC_HandleTypeDef structure that contains * the configuration information for the specified DAC. * @retval HAL status */ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) { 802162a: b580 push {r7, lr} 802162c: b082 sub sp, #8 802162e: af00 add r7, sp, #0 8021630: 6078 str r0, [r7, #4] /* Check DAC handle */ if (hdac == NULL) 8021632: 687b ldr r3, [r7, #4] 8021634: 2b00 cmp r3, #0 8021636: d101 bne.n 802163c { return HAL_ERROR; 8021638: 2301 movs r3, #1 802163a: e014 b.n 8021666 } /* Check the parameters */ assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); if (hdac->State == HAL_DAC_STATE_RESET) 802163c: 687b ldr r3, [r7, #4] 802163e: 791b ldrb r3, [r3, #4] 8021640: b2db uxtb r3, r3 8021642: 2b00 cmp r3, #0 8021644: d105 bne.n 8021652 hdac->MspInitCallback = HAL_DAC_MspInit; } #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ /* Allocate lock resource and initialize it */ hdac->Lock = HAL_UNLOCKED; 8021646: 687b ldr r3, [r7, #4] 8021648: 2200 movs r2, #0 802164a: 715a strb r2, [r3, #5] #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) /* Init the low level hardware */ hdac->MspInitCallback(hdac); #else /* Init the low level hardware */ HAL_DAC_MspInit(hdac); 802164c: 6878 ldr r0, [r7, #4] 802164e: f7f7 f813 bl 8018678 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ } /* Initialize the DAC state*/ hdac->State = HAL_DAC_STATE_BUSY; 8021652: 687b ldr r3, [r7, #4] 8021654: 2202 movs r2, #2 8021656: 711a strb r2, [r3, #4] /* Set DAC error code to none */ hdac->ErrorCode = HAL_DAC_ERROR_NONE; 8021658: 687b ldr r3, [r7, #4] 802165a: 2200 movs r2, #0 802165c: 611a str r2, [r3, #16] /* Initialize the DAC state*/ hdac->State = HAL_DAC_STATE_READY; 802165e: 687b ldr r3, [r7, #4] 8021660: 2201 movs r2, #1 8021662: 711a strb r2, [r3, #4] /* Return function status */ return HAL_OK; 8021664: 2300 movs r3, #0 } 8021666: 4618 mov r0, r3 8021668: 3708 adds r7, #8 802166a: 46bd mov sp, r7 802166c: bd80 pop {r7, pc} 0802166e : * @param hdac pointer to a DAC_HandleTypeDef structure that contains * the configuration information for the specified DAC. * @retval HAL status */ HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) { 802166e: b580 push {r7, lr} 8021670: b082 sub sp, #8 8021672: af00 add r7, sp, #0 8021674: 6078 str r0, [r7, #4] /* Check DAC handle */ if (hdac == NULL) 8021676: 687b ldr r3, [r7, #4] 8021678: 2b00 cmp r3, #0 802167a: d101 bne.n 8021680 { return HAL_ERROR; 802167c: 2301 movs r3, #1 802167e: e00f b.n 80216a0 /* Check the parameters */ assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); /* Change DAC state */ hdac->State = HAL_DAC_STATE_BUSY; 8021680: 687b ldr r3, [r7, #4] 8021682: 2202 movs r2, #2 8021684: 711a strb r2, [r3, #4] } /* DeInit the low level hardware */ hdac->MspDeInitCallback(hdac); #else /* DeInit the low level hardware */ HAL_DAC_MspDeInit(hdac); 8021686: 6878 ldr r0, [r7, #4] 8021688: f7f7 f83a bl 8018700 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ /* Set DAC error code to none */ hdac->ErrorCode = HAL_DAC_ERROR_NONE; 802168c: 687b ldr r3, [r7, #4] 802168e: 2200 movs r2, #0 8021690: 611a str r2, [r3, #16] /* Change DAC state */ hdac->State = HAL_DAC_STATE_RESET; 8021692: 687b ldr r3, [r7, #4] 8021694: 2200 movs r2, #0 8021696: 711a strb r2, [r3, #4] /* Release Lock */ __HAL_UNLOCK(hdac); 8021698: 687b ldr r3, [r7, #4] 802169a: 2200 movs r2, #0 802169c: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 802169e: 2300 movs r3, #0 } 80216a0: 4618 mov r0, r3 80216a2: 3708 adds r7, #8 80216a4: 46bd mov sp, r7 80216a6: bd80 pop {r7, pc} 080216a8 : * @arg DAC_CHANNEL_1: DAC Channel1 selected * @arg DAC_CHANNEL_2: DAC Channel2 selected * @retval HAL status */ HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) { 80216a8: b480 push {r7} 80216aa: b083 sub sp, #12 80216ac: af00 add r7, sp, #0 80216ae: 6078 str r0, [r7, #4] 80216b0: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_DAC_CHANNEL(Channel)); /* Process locked */ __HAL_LOCK(hdac); 80216b2: 687b ldr r3, [r7, #4] 80216b4: 795b ldrb r3, [r3, #5] 80216b6: 2b01 cmp r3, #1 80216b8: d101 bne.n 80216be 80216ba: 2302 movs r3, #2 80216bc: e040 b.n 8021740 80216be: 687b ldr r3, [r7, #4] 80216c0: 2201 movs r2, #1 80216c2: 715a strb r2, [r3, #5] /* Change DAC state */ hdac->State = HAL_DAC_STATE_BUSY; 80216c4: 687b ldr r3, [r7, #4] 80216c6: 2202 movs r2, #2 80216c8: 711a strb r2, [r3, #4] /* Enable the Peripheral */ __HAL_DAC_ENABLE(hdac, Channel); 80216ca: 687b ldr r3, [r7, #4] 80216cc: 681b ldr r3, [r3, #0] 80216ce: 6819 ldr r1, [r3, #0] 80216d0: 683b ldr r3, [r7, #0] 80216d2: f003 0310 and.w r3, r3, #16 80216d6: 2201 movs r2, #1 80216d8: 409a lsls r2, r3 80216da: 687b ldr r3, [r7, #4] 80216dc: 681b ldr r3, [r3, #0] 80216de: 430a orrs r2, r1 80216e0: 601a str r2, [r3, #0] if (Channel == DAC_CHANNEL_1) 80216e2: 683b ldr r3, [r7, #0] 80216e4: 2b00 cmp r3, #0 80216e6: d10f bne.n 8021708 { /* Check if software trigger enabled */ if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) 80216e8: 687b ldr r3, [r7, #4] 80216ea: 681b ldr r3, [r3, #0] 80216ec: 681b ldr r3, [r3, #0] 80216ee: f003 033c and.w r3, r3, #60 @ 0x3c 80216f2: 2b3c cmp r3, #60 @ 0x3c 80216f4: d11d bne.n 8021732 { /* Enable the selected DAC software conversion */ SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); 80216f6: 687b ldr r3, [r7, #4] 80216f8: 681b ldr r3, [r3, #0] 80216fa: 685a ldr r2, [r3, #4] 80216fc: 687b ldr r3, [r7, #4] 80216fe: 681b ldr r3, [r3, #0] 8021700: f042 0201 orr.w r2, r2, #1 8021704: 605a str r2, [r3, #4] 8021706: e014 b.n 8021732 } #if defined(DAC_CHANNEL2_SUPPORT) else { /* Check if software trigger enabled */ if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) 8021708: 687b ldr r3, [r7, #4] 802170a: 681b ldr r3, [r3, #0] 802170c: 681b ldr r3, [r3, #0] 802170e: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8021712: 683b ldr r3, [r7, #0] 8021714: f003 0310 and.w r3, r3, #16 8021718: 213c movs r1, #60 @ 0x3c 802171a: fa01 f303 lsl.w r3, r1, r3 802171e: 429a cmp r2, r3 8021720: d107 bne.n 8021732 { /* Enable the selected DAC software conversion*/ SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); 8021722: 687b ldr r3, [r7, #4] 8021724: 681b ldr r3, [r3, #0] 8021726: 685a ldr r2, [r3, #4] 8021728: 687b ldr r3, [r7, #4] 802172a: 681b ldr r3, [r3, #0] 802172c: f042 0202 orr.w r2, r2, #2 8021730: 605a str r2, [r3, #4] } } #endif /* DAC_CHANNEL2_SUPPORT */ /* Change DAC state */ hdac->State = HAL_DAC_STATE_READY; 8021732: 687b ldr r3, [r7, #4] 8021734: 2201 movs r2, #1 8021736: 711a strb r2, [r3, #4] /* Process unlocked */ __HAL_UNLOCK(hdac); 8021738: 687b ldr r3, [r7, #4] 802173a: 2200 movs r2, #0 802173c: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 802173e: 2300 movs r3, #0 } 8021740: 4618 mov r0, r3 8021742: 370c adds r7, #12 8021744: 46bd mov sp, r7 8021746: f85d 7b04 ldr.w r7, [sp], #4 802174a: 4770 bx lr 0802174c : * @arg DAC_CHANNEL_1: DAC Channel1 selected * @arg DAC_CHANNEL_2: DAC Channel2 selected * @retval HAL status */ HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) { 802174c: b480 push {r7} 802174e: b087 sub sp, #28 8021750: af00 add r7, sp, #0 8021752: 60f8 str r0, [r7, #12] 8021754: 60b9 str r1, [r7, #8] 8021756: 607a str r2, [r7, #4] assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); assert_param(IS_DAC_CHANNEL(Channel)); /* Process locked */ __HAL_LOCK(hdac); 8021758: 68fb ldr r3, [r7, #12] 802175a: 795b ldrb r3, [r3, #5] 802175c: 2b01 cmp r3, #1 802175e: d101 bne.n 8021764 8021760: 2302 movs r3, #2 8021762: e03c b.n 80217de 8021764: 68fb ldr r3, [r7, #12] 8021766: 2201 movs r2, #1 8021768: 715a strb r2, [r3, #5] /* Change DAC state */ hdac->State = HAL_DAC_STATE_BUSY; 802176a: 68fb ldr r3, [r7, #12] 802176c: 2202 movs r2, #2 802176e: 711a strb r2, [r3, #4] /* Get the DAC CR value */ tmpreg1 = hdac->Instance->CR; 8021770: 68fb ldr r3, [r7, #12] 8021772: 681b ldr r3, [r3, #0] 8021774: 681b ldr r3, [r3, #0] 8021776: 617b str r3, [r7, #20] /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << (Channel & 0x10UL)); 8021778: 687b ldr r3, [r7, #4] 802177a: f003 0310 and.w r3, r3, #16 802177e: f640 72fe movw r2, #4094 @ 0xffe 8021782: fa02 f303 lsl.w r3, r2, r3 8021786: 43db mvns r3, r3 8021788: 697a ldr r2, [r7, #20] 802178a: 4013 ands r3, r2 802178c: 617b str r3, [r7, #20] /* Configure for the selected DAC channel: buffer output, trigger */ /* Set TSELx and TENx bits according to DAC_Trigger value */ /* Set BOFFx bit according to DAC_OutputBuffer value */ tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); 802178e: 68bb ldr r3, [r7, #8] 8021790: 681a ldr r2, [r3, #0] 8021792: 68bb ldr r3, [r7, #8] 8021794: 685b ldr r3, [r3, #4] 8021796: 4313 orrs r3, r2 8021798: 613b str r3, [r7, #16] /* Calculate CR register value depending on DAC_Channel */ tmpreg1 |= tmpreg2 << (Channel & 0x10UL); 802179a: 687b ldr r3, [r7, #4] 802179c: f003 0310 and.w r3, r3, #16 80217a0: 693a ldr r2, [r7, #16] 80217a2: fa02 f303 lsl.w r3, r2, r3 80217a6: 697a ldr r2, [r7, #20] 80217a8: 4313 orrs r3, r2 80217aa: 617b str r3, [r7, #20] /* Write to DAC CR */ hdac->Instance->CR = tmpreg1; 80217ac: 68fb ldr r3, [r7, #12] 80217ae: 681b ldr r3, [r3, #0] 80217b0: 697a ldr r2, [r7, #20] 80217b2: 601a str r2, [r3, #0] /* Disable wave generation */ CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); 80217b4: 68fb ldr r3, [r7, #12] 80217b6: 681b ldr r3, [r3, #0] 80217b8: 6819 ldr r1, [r3, #0] 80217ba: 687b ldr r3, [r7, #4] 80217bc: f003 0310 and.w r3, r3, #16 80217c0: 22c0 movs r2, #192 @ 0xc0 80217c2: fa02 f303 lsl.w r3, r2, r3 80217c6: 43da mvns r2, r3 80217c8: 68fb ldr r3, [r7, #12] 80217ca: 681b ldr r3, [r3, #0] 80217cc: 400a ands r2, r1 80217ce: 601a str r2, [r3, #0] /* Change DAC state */ hdac->State = HAL_DAC_STATE_READY; 80217d0: 68fb ldr r3, [r7, #12] 80217d2: 2201 movs r2, #1 80217d4: 711a strb r2, [r3, #4] /* Process unlocked */ __HAL_UNLOCK(hdac); 80217d6: 68fb ldr r3, [r7, #12] 80217d8: 2200 movs r2, #0 80217da: 715a strb r2, [r3, #5] /* Return function status */ return HAL_OK; 80217dc: 2300 movs r3, #0 } 80217de: 4618 mov r0, r3 80217e0: 371c adds r7, #28 80217e2: 46bd mov sp, r7 80217e4: f85d 7b04 ldr.w r7, [sp], #4 80217e8: 4770 bx lr ... 080217ec : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 80217ec: b580 push {r7, lr} 80217ee: b086 sub sp, #24 80217f0: af00 add r7, sp, #0 80217f2: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 80217f4: 2300 movs r3, #0 80217f6: 617b str r3, [r7, #20] uint32_t tickstart = HAL_GetTick(); 80217f8: f7fe fd16 bl 8020228 80217fc: 6138 str r0, [r7, #16] DMA_Base_Registers *regs; /* Check the DMA peripheral state */ if(hdma == NULL) 80217fe: 687b ldr r3, [r7, #4] 8021800: 2b00 cmp r3, #0 8021802: d101 bne.n 8021808 { return HAL_ERROR; 8021804: 2301 movs r3, #1 8021806: e099 b.n 802193c assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst)); assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst)); } /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8021808: 687b ldr r3, [r7, #4] 802180a: 2202 movs r2, #2 802180c: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Allocate lock resource */ __HAL_UNLOCK(hdma); 8021810: 687b ldr r3, [r7, #4] 8021812: 2200 movs r2, #0 8021814: f883 2034 strb.w r2, [r3, #52] @ 0x34 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8021818: 687b ldr r3, [r7, #4] 802181a: 681b ldr r3, [r3, #0] 802181c: 681a ldr r2, [r3, #0] 802181e: 687b ldr r3, [r7, #4] 8021820: 681b ldr r3, [r3, #0] 8021822: f022 0201 bic.w r2, r2, #1 8021826: 601a str r2, [r3, #0] /* Check if the DMA Stream is effectively disabled */ while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) 8021828: e00f b.n 802184a { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) 802182a: f7fe fcfd bl 8020228 802182e: 4602 mov r2, r0 8021830: 693b ldr r3, [r7, #16] 8021832: 1ad3 subs r3, r2, r3 8021834: 2b05 cmp r3, #5 8021836: d908 bls.n 802184a { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; 8021838: 687b ldr r3, [r7, #4] 802183a: 2220 movs r2, #32 802183c: 655a str r2, [r3, #84] @ 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_TIMEOUT; 802183e: 687b ldr r3, [r7, #4] 8021840: 2203 movs r2, #3 8021842: f883 2035 strb.w r2, [r3, #53] @ 0x35 return HAL_TIMEOUT; 8021846: 2303 movs r3, #3 8021848: e078 b.n 802193c while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) 802184a: 687b ldr r3, [r7, #4] 802184c: 681b ldr r3, [r3, #0] 802184e: 681b ldr r3, [r3, #0] 8021850: f003 0301 and.w r3, r3, #1 8021854: 2b00 cmp r3, #0 8021856: d1e8 bne.n 802182a } } /* Get the CR register value */ tmp = hdma->Instance->CR; 8021858: 687b ldr r3, [r7, #4] 802185a: 681b ldr r3, [r3, #0] 802185c: 681b ldr r3, [r3, #0] 802185e: 617b str r3, [r7, #20] /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */ tmp &= ((uint32_t)~(DMA_SxCR_CHSEL | DMA_SxCR_MBURST | DMA_SxCR_PBURST | \ 8021860: 697a ldr r2, [r7, #20] 8021862: 4b38 ldr r3, [pc, #224] @ (8021944 ) 8021864: 4013 ands r3, r2 8021866: 617b str r3, [r7, #20] DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \ DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \ DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM)); /* Prepare the DMA Stream configuration */ tmp |= hdma->Init.Channel | hdma->Init.Direction | 8021868: 687b ldr r3, [r7, #4] 802186a: 685a ldr r2, [r3, #4] 802186c: 687b ldr r3, [r7, #4] 802186e: 689b ldr r3, [r3, #8] 8021870: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8021872: 687b ldr r3, [r7, #4] 8021874: 68db ldr r3, [r3, #12] tmp |= hdma->Init.Channel | hdma->Init.Direction | 8021876: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8021878: 687b ldr r3, [r7, #4] 802187a: 691b ldr r3, [r3, #16] 802187c: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 802187e: 687b ldr r3, [r7, #4] 8021880: 695b ldr r3, [r3, #20] hdma->Init.PeriphInc | hdma->Init.MemInc | 8021882: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8021884: 687b ldr r3, [r7, #4] 8021886: 699b ldr r3, [r3, #24] 8021888: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 802188a: 687b ldr r3, [r7, #4] 802188c: 69db ldr r3, [r3, #28] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 802188e: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8021890: 687b ldr r3, [r7, #4] 8021892: 6a1b ldr r3, [r3, #32] 8021894: 4313 orrs r3, r2 tmp |= hdma->Init.Channel | hdma->Init.Direction | 8021896: 697a ldr r2, [r7, #20] 8021898: 4313 orrs r3, r2 802189a: 617b str r3, [r7, #20] /* the Memory burst and peripheral burst are not used when the FIFO is disabled */ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) 802189c: 687b ldr r3, [r7, #4] 802189e: 6a5b ldr r3, [r3, #36] @ 0x24 80218a0: 2b04 cmp r3, #4 80218a2: d107 bne.n 80218b4 { /* Get memory burst and peripheral burst */ tmp |= hdma->Init.MemBurst | hdma->Init.PeriphBurst; 80218a4: 687b ldr r3, [r7, #4] 80218a6: 6ada ldr r2, [r3, #44] @ 0x2c 80218a8: 687b ldr r3, [r7, #4] 80218aa: 6b1b ldr r3, [r3, #48] @ 0x30 80218ac: 4313 orrs r3, r2 80218ae: 697a ldr r2, [r7, #20] 80218b0: 4313 orrs r3, r2 80218b2: 617b str r3, [r7, #20] } /* Write to DMA Stream CR register */ hdma->Instance->CR = tmp; 80218b4: 687b ldr r3, [r7, #4] 80218b6: 681b ldr r3, [r3, #0] 80218b8: 697a ldr r2, [r7, #20] 80218ba: 601a str r2, [r3, #0] /* Get the FCR register value */ tmp = hdma->Instance->FCR; 80218bc: 687b ldr r3, [r7, #4] 80218be: 681b ldr r3, [r3, #0] 80218c0: 695b ldr r3, [r3, #20] 80218c2: 617b str r3, [r7, #20] /* Clear Direct mode and FIFO threshold bits */ tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); 80218c4: 697b ldr r3, [r7, #20] 80218c6: f023 0307 bic.w r3, r3, #7 80218ca: 617b str r3, [r7, #20] /* Prepare the DMA Stream FIFO configuration */ tmp |= hdma->Init.FIFOMode; 80218cc: 687b ldr r3, [r7, #4] 80218ce: 6a5b ldr r3, [r3, #36] @ 0x24 80218d0: 697a ldr r2, [r7, #20] 80218d2: 4313 orrs r3, r2 80218d4: 617b str r3, [r7, #20] /* The FIFO threshold is not used when the FIFO mode is disabled */ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) 80218d6: 687b ldr r3, [r7, #4] 80218d8: 6a5b ldr r3, [r3, #36] @ 0x24 80218da: 2b04 cmp r3, #4 80218dc: d117 bne.n 802190e { /* Get the FIFO threshold */ tmp |= hdma->Init.FIFOThreshold; 80218de: 687b ldr r3, [r7, #4] 80218e0: 6a9b ldr r3, [r3, #40] @ 0x28 80218e2: 697a ldr r2, [r7, #20] 80218e4: 4313 orrs r3, r2 80218e6: 617b str r3, [r7, #20] /* Check compatibility between FIFO threshold level and size of the memory burst */ /* for INCR4, INCR8, INCR16 bursts */ if (hdma->Init.MemBurst != DMA_MBURST_SINGLE) 80218e8: 687b ldr r3, [r7, #4] 80218ea: 6adb ldr r3, [r3, #44] @ 0x2c 80218ec: 2b00 cmp r3, #0 80218ee: d00e beq.n 802190e { if (DMA_CheckFifoParam(hdma) != HAL_OK) 80218f0: 6878 ldr r0, [r7, #4] 80218f2: f000 fb6d bl 8021fd0 80218f6: 4603 mov r3, r0 80218f8: 2b00 cmp r3, #0 80218fa: d008 beq.n 802190e { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_PARAM; 80218fc: 687b ldr r3, [r7, #4] 80218fe: 2240 movs r2, #64 @ 0x40 8021900: 655a str r2, [r3, #84] @ 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8021902: 687b ldr r3, [r7, #4] 8021904: 2201 movs r2, #1 8021906: f883 2035 strb.w r2, [r3, #53] @ 0x35 return HAL_ERROR; 802190a: 2301 movs r3, #1 802190c: e016 b.n 802193c } } } /* Write to DMA Stream FCR */ hdma->Instance->FCR = tmp; 802190e: 687b ldr r3, [r7, #4] 8021910: 681b ldr r3, [r3, #0] 8021912: 697a ldr r2, [r7, #20] 8021914: 615a str r2, [r3, #20] /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); 8021916: 6878 ldr r0, [r7, #4] 8021918: f000 fb24 bl 8021f64 802191c: 4603 mov r3, r0 802191e: 60fb str r3, [r7, #12] /* Clear all interrupt flags */ regs->IFCR = 0x3FU << hdma->StreamIndex; 8021920: 687b ldr r3, [r7, #4] 8021922: 6ddb ldr r3, [r3, #92] @ 0x5c 8021924: 223f movs r2, #63 @ 0x3f 8021926: 409a lsls r2, r3 8021928: 68fb ldr r3, [r7, #12] 802192a: 609a str r2, [r3, #8] /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 802192c: 687b ldr r3, [r7, #4] 802192e: 2200 movs r2, #0 8021930: 655a str r2, [r3, #84] @ 0x54 /* Initialize the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8021932: 687b ldr r3, [r7, #4] 8021934: 2201 movs r2, #1 8021936: f883 2035 strb.w r2, [r3, #53] @ 0x35 return HAL_OK; 802193a: 2300 movs r3, #0 } 802193c: 4618 mov r0, r3 802193e: 3718 adds r7, #24 8021940: 46bd mov sp, r7 8021942: bd80 pop {r7, pc} 8021944: f010803f .word 0xf010803f 08021948 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) { 8021948: b580 push {r7, lr} 802194a: b084 sub sp, #16 802194c: af00 add r7, sp, #0 802194e: 6078 str r0, [r7, #4] DMA_Base_Registers *regs; /* Check the DMA peripheral state */ if(hdma == NULL) 8021950: 687b ldr r3, [r7, #4] 8021952: 2b00 cmp r3, #0 8021954: d101 bne.n 802195a { return HAL_ERROR; 8021956: 2301 movs r3, #1 8021958: e050 b.n 80219fc } /* Check the DMA peripheral state */ if(hdma->State == HAL_DMA_STATE_BUSY) 802195a: 687b ldr r3, [r7, #4] 802195c: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 8021960: b2db uxtb r3, r3 8021962: 2b02 cmp r3, #2 8021964: d101 bne.n 802196a { /* Return error status */ return HAL_BUSY; 8021966: 2302 movs r3, #2 8021968: e048 b.n 80219fc /* Check the parameters */ assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance)); /* Disable the selected DMA Streamx */ __HAL_DMA_DISABLE(hdma); 802196a: 687b ldr r3, [r7, #4] 802196c: 681b ldr r3, [r3, #0] 802196e: 681a ldr r2, [r3, #0] 8021970: 687b ldr r3, [r7, #4] 8021972: 681b ldr r3, [r3, #0] 8021974: f022 0201 bic.w r2, r2, #1 8021978: 601a str r2, [r3, #0] /* Reset DMA Streamx control register */ hdma->Instance->CR = 0U; 802197a: 687b ldr r3, [r7, #4] 802197c: 681b ldr r3, [r3, #0] 802197e: 2200 movs r2, #0 8021980: 601a str r2, [r3, #0] /* Reset DMA Streamx number of data to transfer register */ hdma->Instance->NDTR = 0U; 8021982: 687b ldr r3, [r7, #4] 8021984: 681b ldr r3, [r3, #0] 8021986: 2200 movs r2, #0 8021988: 605a str r2, [r3, #4] /* Reset DMA Streamx peripheral address register */ hdma->Instance->PAR = 0U; 802198a: 687b ldr r3, [r7, #4] 802198c: 681b ldr r3, [r3, #0] 802198e: 2200 movs r2, #0 8021990: 609a str r2, [r3, #8] /* Reset DMA Streamx memory 0 address register */ hdma->Instance->M0AR = 0U; 8021992: 687b ldr r3, [r7, #4] 8021994: 681b ldr r3, [r3, #0] 8021996: 2200 movs r2, #0 8021998: 60da str r2, [r3, #12] /* Reset DMA Streamx memory 1 address register */ hdma->Instance->M1AR = 0U; 802199a: 687b ldr r3, [r7, #4] 802199c: 681b ldr r3, [r3, #0] 802199e: 2200 movs r2, #0 80219a0: 611a str r2, [r3, #16] /* Reset DMA Streamx FIFO control register */ hdma->Instance->FCR = 0x00000021U; 80219a2: 687b ldr r3, [r7, #4] 80219a4: 681b ldr r3, [r3, #0] 80219a6: 2221 movs r2, #33 @ 0x21 80219a8: 615a str r2, [r3, #20] /* Get DMA steam Base Address */ regs = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); 80219aa: 6878 ldr r0, [r7, #4] 80219ac: f000 fada bl 8021f64 80219b0: 4603 mov r3, r0 80219b2: 60fb str r3, [r7, #12] /* Clean all callbacks */ hdma->XferCpltCallback = NULL; 80219b4: 687b ldr r3, [r7, #4] 80219b6: 2200 movs r2, #0 80219b8: 63da str r2, [r3, #60] @ 0x3c hdma->XferHalfCpltCallback = NULL; 80219ba: 687b ldr r3, [r7, #4] 80219bc: 2200 movs r2, #0 80219be: 641a str r2, [r3, #64] @ 0x40 hdma->XferM1CpltCallback = NULL; 80219c0: 687b ldr r3, [r7, #4] 80219c2: 2200 movs r2, #0 80219c4: 645a str r2, [r3, #68] @ 0x44 hdma->XferM1HalfCpltCallback = NULL; 80219c6: 687b ldr r3, [r7, #4] 80219c8: 2200 movs r2, #0 80219ca: 649a str r2, [r3, #72] @ 0x48 hdma->XferErrorCallback = NULL; 80219cc: 687b ldr r3, [r7, #4] 80219ce: 2200 movs r2, #0 80219d0: 64da str r2, [r3, #76] @ 0x4c hdma->XferAbortCallback = NULL; 80219d2: 687b ldr r3, [r7, #4] 80219d4: 2200 movs r2, #0 80219d6: 651a str r2, [r3, #80] @ 0x50 /* Clear all interrupt flags at correct offset within the register */ regs->IFCR = 0x3FU << hdma->StreamIndex; 80219d8: 687b ldr r3, [r7, #4] 80219da: 6ddb ldr r3, [r3, #92] @ 0x5c 80219dc: 223f movs r2, #63 @ 0x3f 80219de: 409a lsls r2, r3 80219e0: 68fb ldr r3, [r7, #12] 80219e2: 609a str r2, [r3, #8] /* Reset the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80219e4: 687b ldr r3, [r7, #4] 80219e6: 2200 movs r2, #0 80219e8: 655a str r2, [r3, #84] @ 0x54 /* Reset the DMA state */ hdma->State = HAL_DMA_STATE_RESET; 80219ea: 687b ldr r3, [r7, #4] 80219ec: 2200 movs r2, #0 80219ee: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Release Lock */ __HAL_UNLOCK(hdma); 80219f2: 687b ldr r3, [r7, #4] 80219f4: 2200 movs r2, #0 80219f6: f883 2034 strb.w r2, [r3, #52] @ 0x34 return HAL_OK; 80219fa: 2300 movs r3, #0 } 80219fc: 4618 mov r0, r3 80219fe: 3710 adds r7, #16 8021a00: 46bd mov sp, r7 8021a02: bd80 pop {r7, pc} 08021a04 : * @param DstAddress The destination memory Buffer address * @param DataLength The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8021a04: b580 push {r7, lr} 8021a06: b086 sub sp, #24 8021a08: af00 add r7, sp, #0 8021a0a: 60f8 str r0, [r7, #12] 8021a0c: 60b9 str r1, [r7, #8] 8021a0e: 607a str r2, [r7, #4] 8021a10: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8021a12: 2300 movs r3, #0 8021a14: 75fb strb r3, [r7, #23] /* calculate DMA base and stream number */ DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; 8021a16: 68fb ldr r3, [r7, #12] 8021a18: 6d9b ldr r3, [r3, #88] @ 0x58 8021a1a: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8021a1c: 68fb ldr r3, [r7, #12] 8021a1e: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 8021a22: 2b01 cmp r3, #1 8021a24: d101 bne.n 8021a2a 8021a26: 2302 movs r3, #2 8021a28: e040 b.n 8021aac 8021a2a: 68fb ldr r3, [r7, #12] 8021a2c: 2201 movs r2, #1 8021a2e: f883 2034 strb.w r2, [r3, #52] @ 0x34 if(HAL_DMA_STATE_READY == hdma->State) 8021a32: 68fb ldr r3, [r7, #12] 8021a34: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 8021a38: b2db uxtb r3, r3 8021a3a: 2b01 cmp r3, #1 8021a3c: d12f bne.n 8021a9e { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8021a3e: 68fb ldr r3, [r7, #12] 8021a40: 2202 movs r2, #2 8021a42: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8021a46: 68fb ldr r3, [r7, #12] 8021a48: 2200 movs r2, #0 8021a4a: 655a str r2, [r3, #84] @ 0x54 /* Configure the source, destination address and the data length */ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 8021a4c: 683b ldr r3, [r7, #0] 8021a4e: 687a ldr r2, [r7, #4] 8021a50: 68b9 ldr r1, [r7, #8] 8021a52: 68f8 ldr r0, [r7, #12] 8021a54: f000 fa58 bl 8021f08 /* Clear all interrupt flags at correct offset within the register */ regs->IFCR = 0x3FU << hdma->StreamIndex; 8021a58: 68fb ldr r3, [r7, #12] 8021a5a: 6ddb ldr r3, [r3, #92] @ 0x5c 8021a5c: 223f movs r2, #63 @ 0x3f 8021a5e: 409a lsls r2, r3 8021a60: 693b ldr r3, [r7, #16] 8021a62: 609a str r2, [r3, #8] /* Enable Common interrupts*/ hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME; 8021a64: 68fb ldr r3, [r7, #12] 8021a66: 681b ldr r3, [r3, #0] 8021a68: 681a ldr r2, [r3, #0] 8021a6a: 68fb ldr r3, [r7, #12] 8021a6c: 681b ldr r3, [r3, #0] 8021a6e: f042 0216 orr.w r2, r2, #22 8021a72: 601a str r2, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) 8021a74: 68fb ldr r3, [r7, #12] 8021a76: 6c1b ldr r3, [r3, #64] @ 0x40 8021a78: 2b00 cmp r3, #0 8021a7a: d007 beq.n 8021a8c { hdma->Instance->CR |= DMA_IT_HT; 8021a7c: 68fb ldr r3, [r7, #12] 8021a7e: 681b ldr r3, [r3, #0] 8021a80: 681a ldr r2, [r3, #0] 8021a82: 68fb ldr r3, [r7, #12] 8021a84: 681b ldr r3, [r3, #0] 8021a86: f042 0208 orr.w r2, r2, #8 8021a8a: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8021a8c: 68fb ldr r3, [r7, #12] 8021a8e: 681b ldr r3, [r3, #0] 8021a90: 681a ldr r2, [r3, #0] 8021a92: 68fb ldr r3, [r7, #12] 8021a94: 681b ldr r3, [r3, #0] 8021a96: f042 0201 orr.w r2, r2, #1 8021a9a: 601a str r2, [r3, #0] 8021a9c: e005 b.n 8021aaa } else { /* Process unlocked */ __HAL_UNLOCK(hdma); 8021a9e: 68fb ldr r3, [r7, #12] 8021aa0: 2200 movs r2, #0 8021aa2: f883 2034 strb.w r2, [r3, #52] @ 0x34 /* Return error status */ status = HAL_BUSY; 8021aa6: 2302 movs r3, #2 8021aa8: 75fb strb r3, [r7, #23] } return status; 8021aaa: 7dfb ldrb r3, [r7, #23] } 8021aac: 4618 mov r0, r3 8021aae: 3718 adds r7, #24 8021ab0: 46bd mov sp, r7 8021ab2: bd80 pop {r7, pc} 08021ab4 : * and the Stream will be effectively disabled only after the transfer of * this single data is finished. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 8021ab4: b580 push {r7, lr} 8021ab6: b084 sub sp, #16 8021ab8: af00 add r7, sp, #0 8021aba: 6078 str r0, [r7, #4] /* calculate DMA base and stream number */ DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; 8021abc: 687b ldr r3, [r7, #4] 8021abe: 6d9b ldr r3, [r3, #88] @ 0x58 8021ac0: 60fb str r3, [r7, #12] uint32_t tickstart = HAL_GetTick(); 8021ac2: f7fe fbb1 bl 8020228 8021ac6: 60b8 str r0, [r7, #8] if(hdma->State != HAL_DMA_STATE_BUSY) 8021ac8: 687b ldr r3, [r7, #4] 8021aca: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 8021ace: b2db uxtb r3, r3 8021ad0: 2b02 cmp r3, #2 8021ad2: d008 beq.n 8021ae6 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8021ad4: 687b ldr r3, [r7, #4] 8021ad6: 2280 movs r2, #128 @ 0x80 8021ad8: 655a str r2, [r3, #84] @ 0x54 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8021ada: 687b ldr r3, [r7, #4] 8021adc: 2200 movs r2, #0 8021ade: f883 2034 strb.w r2, [r3, #52] @ 0x34 return HAL_ERROR; 8021ae2: 2301 movs r3, #1 8021ae4: e052 b.n 8021b8c } else { /* Disable all the transfer interrupts */ hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); 8021ae6: 687b ldr r3, [r7, #4] 8021ae8: 681b ldr r3, [r3, #0] 8021aea: 681a ldr r2, [r3, #0] 8021aec: 687b ldr r3, [r7, #4] 8021aee: 681b ldr r3, [r3, #0] 8021af0: f022 0216 bic.w r2, r2, #22 8021af4: 601a str r2, [r3, #0] hdma->Instance->FCR &= ~(DMA_IT_FE); 8021af6: 687b ldr r3, [r7, #4] 8021af8: 681b ldr r3, [r3, #0] 8021afa: 695a ldr r2, [r3, #20] 8021afc: 687b ldr r3, [r7, #4] 8021afe: 681b ldr r3, [r3, #0] 8021b00: f022 0280 bic.w r2, r2, #128 @ 0x80 8021b04: 615a str r2, [r3, #20] if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) 8021b06: 687b ldr r3, [r7, #4] 8021b08: 6c1b ldr r3, [r3, #64] @ 0x40 8021b0a: 2b00 cmp r3, #0 8021b0c: d103 bne.n 8021b16 8021b0e: 687b ldr r3, [r7, #4] 8021b10: 6c9b ldr r3, [r3, #72] @ 0x48 8021b12: 2b00 cmp r3, #0 8021b14: d007 beq.n 8021b26 { hdma->Instance->CR &= ~(DMA_IT_HT); 8021b16: 687b ldr r3, [r7, #4] 8021b18: 681b ldr r3, [r3, #0] 8021b1a: 681a ldr r2, [r3, #0] 8021b1c: 687b ldr r3, [r7, #4] 8021b1e: 681b ldr r3, [r3, #0] 8021b20: f022 0208 bic.w r2, r2, #8 8021b24: 601a str r2, [r3, #0] } /* Disable the stream */ __HAL_DMA_DISABLE(hdma); 8021b26: 687b ldr r3, [r7, #4] 8021b28: 681b ldr r3, [r3, #0] 8021b2a: 681a ldr r2, [r3, #0] 8021b2c: 687b ldr r3, [r7, #4] 8021b2e: 681b ldr r3, [r3, #0] 8021b30: f022 0201 bic.w r2, r2, #1 8021b34: 601a str r2, [r3, #0] /* Check if the DMA Stream is effectively disabled */ while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) 8021b36: e013 b.n 8021b60 { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) 8021b38: f7fe fb76 bl 8020228 8021b3c: 4602 mov r2, r0 8021b3e: 68bb ldr r3, [r7, #8] 8021b40: 1ad3 subs r3, r2, r3 8021b42: 2b05 cmp r3, #5 8021b44: d90c bls.n 8021b60 { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; 8021b46: 687b ldr r3, [r7, #4] 8021b48: 2220 movs r2, #32 8021b4a: 655a str r2, [r3, #84] @ 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_TIMEOUT; 8021b4c: 687b ldr r3, [r7, #4] 8021b4e: 2203 movs r2, #3 8021b50: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8021b54: 687b ldr r3, [r7, #4] 8021b56: 2200 movs r2, #0 8021b58: f883 2034 strb.w r2, [r3, #52] @ 0x34 return HAL_TIMEOUT; 8021b5c: 2303 movs r3, #3 8021b5e: e015 b.n 8021b8c while((hdma->Instance->CR & DMA_SxCR_EN) != RESET) 8021b60: 687b ldr r3, [r7, #4] 8021b62: 681b ldr r3, [r3, #0] 8021b64: 681b ldr r3, [r3, #0] 8021b66: f003 0301 and.w r3, r3, #1 8021b6a: 2b00 cmp r3, #0 8021b6c: d1e4 bne.n 8021b38 } } /* Clear all interrupt flags at correct offset within the register */ regs->IFCR = 0x3FU << hdma->StreamIndex; 8021b6e: 687b ldr r3, [r7, #4] 8021b70: 6ddb ldr r3, [r3, #92] @ 0x5c 8021b72: 223f movs r2, #63 @ 0x3f 8021b74: 409a lsls r2, r3 8021b76: 68fb ldr r3, [r7, #12] 8021b78: 609a str r2, [r3, #8] /* Change the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8021b7a: 687b ldr r3, [r7, #4] 8021b7c: 2201 movs r2, #1 8021b7e: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8021b82: 687b ldr r3, [r7, #4] 8021b84: 2200 movs r2, #0 8021b86: f883 2034 strb.w r2, [r3, #52] @ 0x34 } return HAL_OK; 8021b8a: 2300 movs r3, #0 } 8021b8c: 4618 mov r0, r3 8021b8e: 3710 adds r7, #16 8021b90: 46bd mov sp, r7 8021b92: bd80 pop {r7, pc} 08021b94 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 8021b94: b480 push {r7} 8021b96: b083 sub sp, #12 8021b98: af00 add r7, sp, #0 8021b9a: 6078 str r0, [r7, #4] if(hdma->State != HAL_DMA_STATE_BUSY) 8021b9c: 687b ldr r3, [r7, #4] 8021b9e: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 8021ba2: b2db uxtb r3, r3 8021ba4: 2b02 cmp r3, #2 8021ba6: d004 beq.n 8021bb2 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8021ba8: 687b ldr r3, [r7, #4] 8021baa: 2280 movs r2, #128 @ 0x80 8021bac: 655a str r2, [r3, #84] @ 0x54 return HAL_ERROR; 8021bae: 2301 movs r3, #1 8021bb0: e00c b.n 8021bcc } else { /* Set Abort State */ hdma->State = HAL_DMA_STATE_ABORT; 8021bb2: 687b ldr r3, [r7, #4] 8021bb4: 2205 movs r2, #5 8021bb6: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Disable the stream */ __HAL_DMA_DISABLE(hdma); 8021bba: 687b ldr r3, [r7, #4] 8021bbc: 681b ldr r3, [r3, #0] 8021bbe: 681a ldr r2, [r3, #0] 8021bc0: 687b ldr r3, [r7, #4] 8021bc2: 681b ldr r3, [r3, #0] 8021bc4: f022 0201 bic.w r2, r2, #1 8021bc8: 601a str r2, [r3, #0] } return HAL_OK; 8021bca: 2300 movs r3, #0 } 8021bcc: 4618 mov r0, r3 8021bce: 370c adds r7, #12 8021bd0: 46bd mov sp, r7 8021bd2: f85d 7b04 ldr.w r7, [sp], #4 8021bd6: 4770 bx lr 08021bd8 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8021bd8: b580 push {r7, lr} 8021bda: b086 sub sp, #24 8021bdc: af00 add r7, sp, #0 8021bde: 6078 str r0, [r7, #4] uint32_t tmpisr; __IO uint32_t count = 0U; 8021be0: 2300 movs r3, #0 8021be2: 60bb str r3, [r7, #8] uint32_t timeout = SystemCoreClock / 9600U; 8021be4: 4b8e ldr r3, [pc, #568] @ (8021e20 ) 8021be6: 681b ldr r3, [r3, #0] 8021be8: 4a8e ldr r2, [pc, #568] @ (8021e24 ) 8021bea: fba2 2303 umull r2, r3, r2, r3 8021bee: 0a9b lsrs r3, r3, #10 8021bf0: 617b str r3, [r7, #20] /* calculate DMA base and stream number */ DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; 8021bf2: 687b ldr r3, [r7, #4] 8021bf4: 6d9b ldr r3, [r3, #88] @ 0x58 8021bf6: 613b str r3, [r7, #16] tmpisr = regs->ISR; 8021bf8: 693b ldr r3, [r7, #16] 8021bfa: 681b ldr r3, [r3, #0] 8021bfc: 60fb str r3, [r7, #12] /* Transfer Error Interrupt management ***************************************/ if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET) 8021bfe: 687b ldr r3, [r7, #4] 8021c00: 6ddb ldr r3, [r3, #92] @ 0x5c 8021c02: 2208 movs r2, #8 8021c04: 409a lsls r2, r3 8021c06: 68fb ldr r3, [r7, #12] 8021c08: 4013 ands r3, r2 8021c0a: 2b00 cmp r3, #0 8021c0c: d01a beq.n 8021c44 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) 8021c0e: 687b ldr r3, [r7, #4] 8021c10: 681b ldr r3, [r3, #0] 8021c12: 681b ldr r3, [r3, #0] 8021c14: f003 0304 and.w r3, r3, #4 8021c18: 2b00 cmp r3, #0 8021c1a: d013 beq.n 8021c44 { /* Disable the transfer error interrupt */ hdma->Instance->CR &= ~(DMA_IT_TE); 8021c1c: 687b ldr r3, [r7, #4] 8021c1e: 681b ldr r3, [r3, #0] 8021c20: 681a ldr r2, [r3, #0] 8021c22: 687b ldr r3, [r7, #4] 8021c24: 681b ldr r3, [r3, #0] 8021c26: f022 0204 bic.w r2, r2, #4 8021c2a: 601a str r2, [r3, #0] /* Clear the transfer error flag */ regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; 8021c2c: 687b ldr r3, [r7, #4] 8021c2e: 6ddb ldr r3, [r3, #92] @ 0x5c 8021c30: 2208 movs r2, #8 8021c32: 409a lsls r2, r3 8021c34: 693b ldr r3, [r7, #16] 8021c36: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_TE; 8021c38: 687b ldr r3, [r7, #4] 8021c3a: 6d5b ldr r3, [r3, #84] @ 0x54 8021c3c: f043 0201 orr.w r2, r3, #1 8021c40: 687b ldr r3, [r7, #4] 8021c42: 655a str r2, [r3, #84] @ 0x54 } } /* FIFO Error Interrupt management ******************************************/ if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET) 8021c44: 687b ldr r3, [r7, #4] 8021c46: 6ddb ldr r3, [r3, #92] @ 0x5c 8021c48: 2201 movs r2, #1 8021c4a: 409a lsls r2, r3 8021c4c: 68fb ldr r3, [r7, #12] 8021c4e: 4013 ands r3, r2 8021c50: 2b00 cmp r3, #0 8021c52: d012 beq.n 8021c7a { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET) 8021c54: 687b ldr r3, [r7, #4] 8021c56: 681b ldr r3, [r3, #0] 8021c58: 695b ldr r3, [r3, #20] 8021c5a: f003 0380 and.w r3, r3, #128 @ 0x80 8021c5e: 2b00 cmp r3, #0 8021c60: d00b beq.n 8021c7a { /* Clear the FIFO error flag */ regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex; 8021c62: 687b ldr r3, [r7, #4] 8021c64: 6ddb ldr r3, [r3, #92] @ 0x5c 8021c66: 2201 movs r2, #1 8021c68: 409a lsls r2, r3 8021c6a: 693b ldr r3, [r7, #16] 8021c6c: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_FE; 8021c6e: 687b ldr r3, [r7, #4] 8021c70: 6d5b ldr r3, [r3, #84] @ 0x54 8021c72: f043 0202 orr.w r2, r3, #2 8021c76: 687b ldr r3, [r7, #4] 8021c78: 655a str r2, [r3, #84] @ 0x54 } } /* Direct Mode Error Interrupt management ***********************************/ if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET) 8021c7a: 687b ldr r3, [r7, #4] 8021c7c: 6ddb ldr r3, [r3, #92] @ 0x5c 8021c7e: 2204 movs r2, #4 8021c80: 409a lsls r2, r3 8021c82: 68fb ldr r3, [r7, #12] 8021c84: 4013 ands r3, r2 8021c86: 2b00 cmp r3, #0 8021c88: d012 beq.n 8021cb0 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET) 8021c8a: 687b ldr r3, [r7, #4] 8021c8c: 681b ldr r3, [r3, #0] 8021c8e: 681b ldr r3, [r3, #0] 8021c90: f003 0302 and.w r3, r3, #2 8021c94: 2b00 cmp r3, #0 8021c96: d00b beq.n 8021cb0 { /* Clear the direct mode error flag */ regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex; 8021c98: 687b ldr r3, [r7, #4] 8021c9a: 6ddb ldr r3, [r3, #92] @ 0x5c 8021c9c: 2204 movs r2, #4 8021c9e: 409a lsls r2, r3 8021ca0: 693b ldr r3, [r7, #16] 8021ca2: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_DME; 8021ca4: 687b ldr r3, [r7, #4] 8021ca6: 6d5b ldr r3, [r3, #84] @ 0x54 8021ca8: f043 0204 orr.w r2, r3, #4 8021cac: 687b ldr r3, [r7, #4] 8021cae: 655a str r2, [r3, #84] @ 0x54 } } /* Half Transfer Complete Interrupt management ******************************/ if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET) 8021cb0: 687b ldr r3, [r7, #4] 8021cb2: 6ddb ldr r3, [r3, #92] @ 0x5c 8021cb4: 2210 movs r2, #16 8021cb6: 409a lsls r2, r3 8021cb8: 68fb ldr r3, [r7, #12] 8021cba: 4013 ands r3, r2 8021cbc: 2b00 cmp r3, #0 8021cbe: d043 beq.n 8021d48 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) 8021cc0: 687b ldr r3, [r7, #4] 8021cc2: 681b ldr r3, [r3, #0] 8021cc4: 681b ldr r3, [r3, #0] 8021cc6: f003 0308 and.w r3, r3, #8 8021cca: 2b00 cmp r3, #0 8021ccc: d03c beq.n 8021d48 { /* Clear the half transfer complete flag */ regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex; 8021cce: 687b ldr r3, [r7, #4] 8021cd0: 6ddb ldr r3, [r3, #92] @ 0x5c 8021cd2: 2210 movs r2, #16 8021cd4: 409a lsls r2, r3 8021cd6: 693b ldr r3, [r7, #16] 8021cd8: 609a str r2, [r3, #8] /* Multi_Buffering mode enabled */ if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET) 8021cda: 687b ldr r3, [r7, #4] 8021cdc: 681b ldr r3, [r3, #0] 8021cde: 681b ldr r3, [r3, #0] 8021ce0: f403 2380 and.w r3, r3, #262144 @ 0x40000 8021ce4: 2b00 cmp r3, #0 8021ce6: d018 beq.n 8021d1a { /* Current memory buffer used is Memory 0 */ if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) 8021ce8: 687b ldr r3, [r7, #4] 8021cea: 681b ldr r3, [r3, #0] 8021cec: 681b ldr r3, [r3, #0] 8021cee: f403 2300 and.w r3, r3, #524288 @ 0x80000 8021cf2: 2b00 cmp r3, #0 8021cf4: d108 bne.n 8021d08 { if(hdma->XferHalfCpltCallback != NULL) 8021cf6: 687b ldr r3, [r7, #4] 8021cf8: 6c1b ldr r3, [r3, #64] @ 0x40 8021cfa: 2b00 cmp r3, #0 8021cfc: d024 beq.n 8021d48 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 8021cfe: 687b ldr r3, [r7, #4] 8021d00: 6c1b ldr r3, [r3, #64] @ 0x40 8021d02: 6878 ldr r0, [r7, #4] 8021d04: 4798 blx r3 8021d06: e01f b.n 8021d48 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferM1HalfCpltCallback != NULL) 8021d08: 687b ldr r3, [r7, #4] 8021d0a: 6c9b ldr r3, [r3, #72] @ 0x48 8021d0c: 2b00 cmp r3, #0 8021d0e: d01b beq.n 8021d48 { /* Half transfer callback */ hdma->XferM1HalfCpltCallback(hdma); 8021d10: 687b ldr r3, [r7, #4] 8021d12: 6c9b ldr r3, [r3, #72] @ 0x48 8021d14: 6878 ldr r0, [r7, #4] 8021d16: 4798 blx r3 8021d18: e016 b.n 8021d48 } } else { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET) 8021d1a: 687b ldr r3, [r7, #4] 8021d1c: 681b ldr r3, [r3, #0] 8021d1e: 681b ldr r3, [r3, #0] 8021d20: f403 7380 and.w r3, r3, #256 @ 0x100 8021d24: 2b00 cmp r3, #0 8021d26: d107 bne.n 8021d38 { /* Disable the half transfer interrupt */ hdma->Instance->CR &= ~(DMA_IT_HT); 8021d28: 687b ldr r3, [r7, #4] 8021d2a: 681b ldr r3, [r3, #0] 8021d2c: 681a ldr r2, [r3, #0] 8021d2e: 687b ldr r3, [r7, #4] 8021d30: 681b ldr r3, [r3, #0] 8021d32: f022 0208 bic.w r2, r2, #8 8021d36: 601a str r2, [r3, #0] } if(hdma->XferHalfCpltCallback != NULL) 8021d38: 687b ldr r3, [r7, #4] 8021d3a: 6c1b ldr r3, [r3, #64] @ 0x40 8021d3c: 2b00 cmp r3, #0 8021d3e: d003 beq.n 8021d48 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 8021d40: 687b ldr r3, [r7, #4] 8021d42: 6c1b ldr r3, [r3, #64] @ 0x40 8021d44: 6878 ldr r0, [r7, #4] 8021d46: 4798 blx r3 } } } } /* Transfer Complete Interrupt management ***********************************/ if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET) 8021d48: 687b ldr r3, [r7, #4] 8021d4a: 6ddb ldr r3, [r3, #92] @ 0x5c 8021d4c: 2220 movs r2, #32 8021d4e: 409a lsls r2, r3 8021d50: 68fb ldr r3, [r7, #12] 8021d52: 4013 ands r3, r2 8021d54: 2b00 cmp r3, #0 8021d56: f000 808f beq.w 8021e78 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) 8021d5a: 687b ldr r3, [r7, #4] 8021d5c: 681b ldr r3, [r3, #0] 8021d5e: 681b ldr r3, [r3, #0] 8021d60: f003 0310 and.w r3, r3, #16 8021d64: 2b00 cmp r3, #0 8021d66: f000 8087 beq.w 8021e78 { /* Clear the transfer complete flag */ regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex; 8021d6a: 687b ldr r3, [r7, #4] 8021d6c: 6ddb ldr r3, [r3, #92] @ 0x5c 8021d6e: 2220 movs r2, #32 8021d70: 409a lsls r2, r3 8021d72: 693b ldr r3, [r7, #16] 8021d74: 609a str r2, [r3, #8] if(HAL_DMA_STATE_ABORT == hdma->State) 8021d76: 687b ldr r3, [r7, #4] 8021d78: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 8021d7c: b2db uxtb r3, r3 8021d7e: 2b05 cmp r3, #5 8021d80: d136 bne.n 8021df0 { /* Disable all the transfer interrupts */ hdma->Instance->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); 8021d82: 687b ldr r3, [r7, #4] 8021d84: 681b ldr r3, [r3, #0] 8021d86: 681a ldr r2, [r3, #0] 8021d88: 687b ldr r3, [r7, #4] 8021d8a: 681b ldr r3, [r3, #0] 8021d8c: f022 0216 bic.w r2, r2, #22 8021d90: 601a str r2, [r3, #0] hdma->Instance->FCR &= ~(DMA_IT_FE); 8021d92: 687b ldr r3, [r7, #4] 8021d94: 681b ldr r3, [r3, #0] 8021d96: 695a ldr r2, [r3, #20] 8021d98: 687b ldr r3, [r7, #4] 8021d9a: 681b ldr r3, [r3, #0] 8021d9c: f022 0280 bic.w r2, r2, #128 @ 0x80 8021da0: 615a str r2, [r3, #20] if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) 8021da2: 687b ldr r3, [r7, #4] 8021da4: 6c1b ldr r3, [r3, #64] @ 0x40 8021da6: 2b00 cmp r3, #0 8021da8: d103 bne.n 8021db2 8021daa: 687b ldr r3, [r7, #4] 8021dac: 6c9b ldr r3, [r3, #72] @ 0x48 8021dae: 2b00 cmp r3, #0 8021db0: d007 beq.n 8021dc2 { hdma->Instance->CR &= ~(DMA_IT_HT); 8021db2: 687b ldr r3, [r7, #4] 8021db4: 681b ldr r3, [r3, #0] 8021db6: 681a ldr r2, [r3, #0] 8021db8: 687b ldr r3, [r7, #4] 8021dba: 681b ldr r3, [r3, #0] 8021dbc: f022 0208 bic.w r2, r2, #8 8021dc0: 601a str r2, [r3, #0] } /* Clear all interrupt flags at correct offset within the register */ regs->IFCR = 0x3FU << hdma->StreamIndex; 8021dc2: 687b ldr r3, [r7, #4] 8021dc4: 6ddb ldr r3, [r3, #92] @ 0x5c 8021dc6: 223f movs r2, #63 @ 0x3f 8021dc8: 409a lsls r2, r3 8021dca: 693b ldr r3, [r7, #16] 8021dcc: 609a str r2, [r3, #8] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8021dce: 687b ldr r3, [r7, #4] 8021dd0: 2201 movs r2, #1 8021dd2: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8021dd6: 687b ldr r3, [r7, #4] 8021dd8: 2200 movs r2, #0 8021dda: f883 2034 strb.w r2, [r3, #52] @ 0x34 if(hdma->XferAbortCallback != NULL) 8021dde: 687b ldr r3, [r7, #4] 8021de0: 6d1b ldr r3, [r3, #80] @ 0x50 8021de2: 2b00 cmp r3, #0 8021de4: d07e beq.n 8021ee4 { hdma->XferAbortCallback(hdma); 8021de6: 687b ldr r3, [r7, #4] 8021de8: 6d1b ldr r3, [r3, #80] @ 0x50 8021dea: 6878 ldr r0, [r7, #4] 8021dec: 4798 blx r3 } return; 8021dee: e079 b.n 8021ee4 } if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET) 8021df0: 687b ldr r3, [r7, #4] 8021df2: 681b ldr r3, [r3, #0] 8021df4: 681b ldr r3, [r3, #0] 8021df6: f403 2380 and.w r3, r3, #262144 @ 0x40000 8021dfa: 2b00 cmp r3, #0 8021dfc: d01d beq.n 8021e3a { /* Current memory buffer used is Memory 0 */ if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) 8021dfe: 687b ldr r3, [r7, #4] 8021e00: 681b ldr r3, [r3, #0] 8021e02: 681b ldr r3, [r3, #0] 8021e04: f403 2300 and.w r3, r3, #524288 @ 0x80000 8021e08: 2b00 cmp r3, #0 8021e0a: d10d bne.n 8021e28 { if(hdma->XferM1CpltCallback != NULL) 8021e0c: 687b ldr r3, [r7, #4] 8021e0e: 6c5b ldr r3, [r3, #68] @ 0x44 8021e10: 2b00 cmp r3, #0 8021e12: d031 beq.n 8021e78 { /* Transfer complete Callback for memory1 */ hdma->XferM1CpltCallback(hdma); 8021e14: 687b ldr r3, [r7, #4] 8021e16: 6c5b ldr r3, [r3, #68] @ 0x44 8021e18: 6878 ldr r0, [r7, #4] 8021e1a: 4798 blx r3 8021e1c: e02c b.n 8021e78 8021e1e: bf00 nop 8021e20: 20000024 .word 0x20000024 8021e24: 1b4e81b5 .word 0x1b4e81b5 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferCpltCallback != NULL) 8021e28: 687b ldr r3, [r7, #4] 8021e2a: 6bdb ldr r3, [r3, #60] @ 0x3c 8021e2c: 2b00 cmp r3, #0 8021e2e: d023 beq.n 8021e78 { /* Transfer complete Callback for memory0 */ hdma->XferCpltCallback(hdma); 8021e30: 687b ldr r3, [r7, #4] 8021e32: 6bdb ldr r3, [r3, #60] @ 0x3c 8021e34: 6878 ldr r0, [r7, #4] 8021e36: 4798 blx r3 8021e38: e01e b.n 8021e78 } } /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */ else { if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET) 8021e3a: 687b ldr r3, [r7, #4] 8021e3c: 681b ldr r3, [r3, #0] 8021e3e: 681b ldr r3, [r3, #0] 8021e40: f403 7380 and.w r3, r3, #256 @ 0x100 8021e44: 2b00 cmp r3, #0 8021e46: d10f bne.n 8021e68 { /* Disable the transfer complete interrupt */ hdma->Instance->CR &= ~(DMA_IT_TC); 8021e48: 687b ldr r3, [r7, #4] 8021e4a: 681b ldr r3, [r3, #0] 8021e4c: 681a ldr r2, [r3, #0] 8021e4e: 687b ldr r3, [r7, #4] 8021e50: 681b ldr r3, [r3, #0] 8021e52: f022 0210 bic.w r2, r2, #16 8021e56: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8021e58: 687b ldr r3, [r7, #4] 8021e5a: 2201 movs r2, #1 8021e5c: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8021e60: 687b ldr r3, [r7, #4] 8021e62: 2200 movs r2, #0 8021e64: f883 2034 strb.w r2, [r3, #52] @ 0x34 } if(hdma->XferCpltCallback != NULL) 8021e68: 687b ldr r3, [r7, #4] 8021e6a: 6bdb ldr r3, [r3, #60] @ 0x3c 8021e6c: 2b00 cmp r3, #0 8021e6e: d003 beq.n 8021e78 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 8021e70: 687b ldr r3, [r7, #4] 8021e72: 6bdb ldr r3, [r3, #60] @ 0x3c 8021e74: 6878 ldr r0, [r7, #4] 8021e76: 4798 blx r3 } } } /* manage error case */ if(hdma->ErrorCode != HAL_DMA_ERROR_NONE) 8021e78: 687b ldr r3, [r7, #4] 8021e7a: 6d5b ldr r3, [r3, #84] @ 0x54 8021e7c: 2b00 cmp r3, #0 8021e7e: d032 beq.n 8021ee6 { if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET) 8021e80: 687b ldr r3, [r7, #4] 8021e82: 6d5b ldr r3, [r3, #84] @ 0x54 8021e84: f003 0301 and.w r3, r3, #1 8021e88: 2b00 cmp r3, #0 8021e8a: d022 beq.n 8021ed2 { hdma->State = HAL_DMA_STATE_ABORT; 8021e8c: 687b ldr r3, [r7, #4] 8021e8e: 2205 movs r2, #5 8021e90: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Disable the stream */ __HAL_DMA_DISABLE(hdma); 8021e94: 687b ldr r3, [r7, #4] 8021e96: 681b ldr r3, [r3, #0] 8021e98: 681a ldr r2, [r3, #0] 8021e9a: 687b ldr r3, [r7, #4] 8021e9c: 681b ldr r3, [r3, #0] 8021e9e: f022 0201 bic.w r2, r2, #1 8021ea2: 601a str r2, [r3, #0] do { if (++count > timeout) 8021ea4: 68bb ldr r3, [r7, #8] 8021ea6: 3301 adds r3, #1 8021ea8: 60bb str r3, [r7, #8] 8021eaa: 697a ldr r2, [r7, #20] 8021eac: 429a cmp r2, r3 8021eae: d307 bcc.n 8021ec0 { break; } } while((hdma->Instance->CR & DMA_SxCR_EN) != RESET); 8021eb0: 687b ldr r3, [r7, #4] 8021eb2: 681b ldr r3, [r3, #0] 8021eb4: 681b ldr r3, [r3, #0] 8021eb6: f003 0301 and.w r3, r3, #1 8021eba: 2b00 cmp r3, #0 8021ebc: d1f2 bne.n 8021ea4 8021ebe: e000 b.n 8021ec2 break; 8021ec0: bf00 nop /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8021ec2: 687b ldr r3, [r7, #4] 8021ec4: 2201 movs r2, #1 8021ec6: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8021eca: 687b ldr r3, [r7, #4] 8021ecc: 2200 movs r2, #0 8021ece: f883 2034 strb.w r2, [r3, #52] @ 0x34 } if(hdma->XferErrorCallback != NULL) 8021ed2: 687b ldr r3, [r7, #4] 8021ed4: 6cdb ldr r3, [r3, #76] @ 0x4c 8021ed6: 2b00 cmp r3, #0 8021ed8: d005 beq.n 8021ee6 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 8021eda: 687b ldr r3, [r7, #4] 8021edc: 6cdb ldr r3, [r3, #76] @ 0x4c 8021ede: 6878 ldr r0, [r7, #4] 8021ee0: 4798 blx r3 8021ee2: e000 b.n 8021ee6 return; 8021ee4: bf00 nop } } } 8021ee6: 3718 adds r7, #24 8021ee8: 46bd mov sp, r7 8021eea: bd80 pop {r7, pc} 08021eec : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL state */ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) { 8021eec: b480 push {r7} 8021eee: b083 sub sp, #12 8021ef0: af00 add r7, sp, #0 8021ef2: 6078 str r0, [r7, #4] return hdma->State; 8021ef4: 687b ldr r3, [r7, #4] 8021ef6: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 8021efa: b2db uxtb r3, r3 } 8021efc: 4618 mov r0, r3 8021efe: 370c adds r7, #12 8021f00: 46bd mov sp, r7 8021f02: f85d 7b04 ldr.w r7, [sp], #4 8021f06: 4770 bx lr 08021f08 : * @param DstAddress The destination memory Buffer address * @param DataLength The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8021f08: b480 push {r7} 8021f0a: b085 sub sp, #20 8021f0c: af00 add r7, sp, #0 8021f0e: 60f8 str r0, [r7, #12] 8021f10: 60b9 str r1, [r7, #8] 8021f12: 607a str r2, [r7, #4] 8021f14: 603b str r3, [r7, #0] /* Clear DBM bit */ hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM); 8021f16: 68fb ldr r3, [r7, #12] 8021f18: 681b ldr r3, [r3, #0] 8021f1a: 681a ldr r2, [r3, #0] 8021f1c: 68fb ldr r3, [r7, #12] 8021f1e: 681b ldr r3, [r3, #0] 8021f20: f422 2280 bic.w r2, r2, #262144 @ 0x40000 8021f24: 601a str r2, [r3, #0] /* Configure DMA Stream data length */ hdma->Instance->NDTR = DataLength; 8021f26: 68fb ldr r3, [r7, #12] 8021f28: 681b ldr r3, [r3, #0] 8021f2a: 683a ldr r2, [r7, #0] 8021f2c: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8021f2e: 68fb ldr r3, [r7, #12] 8021f30: 689b ldr r3, [r3, #8] 8021f32: 2b40 cmp r3, #64 @ 0x40 8021f34: d108 bne.n 8021f48 { /* Configure DMA Stream destination address */ hdma->Instance->PAR = DstAddress; 8021f36: 68fb ldr r3, [r7, #12] 8021f38: 681b ldr r3, [r3, #0] 8021f3a: 687a ldr r2, [r7, #4] 8021f3c: 609a str r2, [r3, #8] /* Configure DMA Stream source address */ hdma->Instance->M0AR = SrcAddress; 8021f3e: 68fb ldr r3, [r7, #12] 8021f40: 681b ldr r3, [r3, #0] 8021f42: 68ba ldr r2, [r7, #8] 8021f44: 60da str r2, [r3, #12] hdma->Instance->PAR = SrcAddress; /* Configure DMA Stream destination address */ hdma->Instance->M0AR = DstAddress; } } 8021f46: e007 b.n 8021f58 hdma->Instance->PAR = SrcAddress; 8021f48: 68fb ldr r3, [r7, #12] 8021f4a: 681b ldr r3, [r3, #0] 8021f4c: 68ba ldr r2, [r7, #8] 8021f4e: 609a str r2, [r3, #8] hdma->Instance->M0AR = DstAddress; 8021f50: 68fb ldr r3, [r7, #12] 8021f52: 681b ldr r3, [r3, #0] 8021f54: 687a ldr r2, [r7, #4] 8021f56: 60da str r2, [r3, #12] } 8021f58: bf00 nop 8021f5a: 3714 adds r7, #20 8021f5c: 46bd mov sp, r7 8021f5e: f85d 7b04 ldr.w r7, [sp], #4 8021f62: 4770 bx lr 08021f64 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval Stream base address */ static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) { 8021f64: b480 push {r7} 8021f66: b085 sub sp, #20 8021f68: af00 add r7, sp, #0 8021f6a: 6078 str r0, [r7, #4] uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U; 8021f6c: 687b ldr r3, [r7, #4] 8021f6e: 681b ldr r3, [r3, #0] 8021f70: b2db uxtb r3, r3 8021f72: 3b10 subs r3, #16 8021f74: 4a14 ldr r2, [pc, #80] @ (8021fc8 ) 8021f76: fba2 2303 umull r2, r3, r2, r3 8021f7a: 091b lsrs r3, r3, #4 8021f7c: 60fb str r3, [r7, #12] /* lookup table for necessary bitshift of flags within status registers */ static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U}; hdma->StreamIndex = flagBitshiftOffset[stream_number]; 8021f7e: 4a13 ldr r2, [pc, #76] @ (8021fcc ) 8021f80: 68fb ldr r3, [r7, #12] 8021f82: 4413 add r3, r2 8021f84: 781b ldrb r3, [r3, #0] 8021f86: 461a mov r2, r3 8021f88: 687b ldr r3, [r7, #4] 8021f8a: 65da str r2, [r3, #92] @ 0x5c if (stream_number > 3U) 8021f8c: 68fb ldr r3, [r7, #12] 8021f8e: 2b03 cmp r3, #3 8021f90: d909 bls.n 8021fa6 { /* return pointer to HISR and HIFCR */ hdma->StreamBaseAddress = (((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)) + 4U); 8021f92: 687b ldr r3, [r7, #4] 8021f94: 681b ldr r3, [r3, #0] 8021f96: f423 737f bic.w r3, r3, #1020 @ 0x3fc 8021f9a: f023 0303 bic.w r3, r3, #3 8021f9e: 1d1a adds r2, r3, #4 8021fa0: 687b ldr r3, [r7, #4] 8021fa2: 659a str r2, [r3, #88] @ 0x58 8021fa4: e007 b.n 8021fb6 } else { /* return pointer to LISR and LIFCR */ hdma->StreamBaseAddress = ((uint32_t)hdma->Instance & (uint32_t)(~0x3FFU)); 8021fa6: 687b ldr r3, [r7, #4] 8021fa8: 681b ldr r3, [r3, #0] 8021faa: f423 737f bic.w r3, r3, #1020 @ 0x3fc 8021fae: f023 0303 bic.w r3, r3, #3 8021fb2: 687a ldr r2, [r7, #4] 8021fb4: 6593 str r3, [r2, #88] @ 0x58 } return hdma->StreamBaseAddress; 8021fb6: 687b ldr r3, [r7, #4] 8021fb8: 6d9b ldr r3, [r3, #88] @ 0x58 } 8021fba: 4618 mov r0, r3 8021fbc: 3714 adds r7, #20 8021fbe: 46bd mov sp, r7 8021fc0: f85d 7b04 ldr.w r7, [sp], #4 8021fc4: 4770 bx lr 8021fc6: bf00 nop 8021fc8: aaaaaaab .word 0xaaaaaaab 8021fcc: 0802d6f0 .word 0x0802d6f0 08021fd0 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma) { 8021fd0: b480 push {r7} 8021fd2: b085 sub sp, #20 8021fd4: af00 add r7, sp, #0 8021fd6: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8021fd8: 2300 movs r3, #0 8021fda: 73fb strb r3, [r7, #15] uint32_t tmp = hdma->Init.FIFOThreshold; 8021fdc: 687b ldr r3, [r7, #4] 8021fde: 6a9b ldr r3, [r3, #40] @ 0x28 8021fe0: 60bb str r3, [r7, #8] /* Memory Data size equal to Byte */ if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE) 8021fe2: 687b ldr r3, [r7, #4] 8021fe4: 699b ldr r3, [r3, #24] 8021fe6: 2b00 cmp r3, #0 8021fe8: d11f bne.n 802202a { switch (tmp) 8021fea: 68bb ldr r3, [r7, #8] 8021fec: 2b03 cmp r3, #3 8021fee: d856 bhi.n 802209e 8021ff0: a201 add r2, pc, #4 @ (adr r2, 8021ff8 ) 8021ff2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8021ff6: bf00 nop 8021ff8: 08022009 .word 0x08022009 8021ffc: 0802201b .word 0x0802201b 8022000: 08022009 .word 0x08022009 8022004: 0802209f .word 0x0802209f { case DMA_FIFO_THRESHOLD_1QUARTERFULL: case DMA_FIFO_THRESHOLD_3QUARTERSFULL: if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) 8022008: 687b ldr r3, [r7, #4] 802200a: 6adb ldr r3, [r3, #44] @ 0x2c 802200c: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 8022010: 2b00 cmp r3, #0 8022012: d046 beq.n 80220a2 { status = HAL_ERROR; 8022014: 2301 movs r3, #1 8022016: 73fb strb r3, [r7, #15] } break; 8022018: e043 b.n 80220a2 case DMA_FIFO_THRESHOLD_HALFFULL: if (hdma->Init.MemBurst == DMA_MBURST_INC16) 802201a: 687b ldr r3, [r7, #4] 802201c: 6adb ldr r3, [r3, #44] @ 0x2c 802201e: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000 8022022: d140 bne.n 80220a6 { status = HAL_ERROR; 8022024: 2301 movs r3, #1 8022026: 73fb strb r3, [r7, #15] } break; 8022028: e03d b.n 80220a6 break; } } /* Memory Data size equal to Half-Word */ else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) 802202a: 687b ldr r3, [r7, #4] 802202c: 699b ldr r3, [r3, #24] 802202e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8022032: d121 bne.n 8022078 { switch (tmp) 8022034: 68bb ldr r3, [r7, #8] 8022036: 2b03 cmp r3, #3 8022038: d837 bhi.n 80220aa 802203a: a201 add r2, pc, #4 @ (adr r2, 8022040 ) 802203c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8022040: 08022051 .word 0x08022051 8022044: 08022057 .word 0x08022057 8022048: 08022051 .word 0x08022051 802204c: 08022069 .word 0x08022069 { case DMA_FIFO_THRESHOLD_1QUARTERFULL: case DMA_FIFO_THRESHOLD_3QUARTERSFULL: status = HAL_ERROR; 8022050: 2301 movs r3, #1 8022052: 73fb strb r3, [r7, #15] break; 8022054: e030 b.n 80220b8 case DMA_FIFO_THRESHOLD_HALFFULL: if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) 8022056: 687b ldr r3, [r7, #4] 8022058: 6adb ldr r3, [r3, #44] @ 0x2c 802205a: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 802205e: 2b00 cmp r3, #0 8022060: d025 beq.n 80220ae { status = HAL_ERROR; 8022062: 2301 movs r3, #1 8022064: 73fb strb r3, [r7, #15] } break; 8022066: e022 b.n 80220ae case DMA_FIFO_THRESHOLD_FULL: if (hdma->Init.MemBurst == DMA_MBURST_INC16) 8022068: 687b ldr r3, [r7, #4] 802206a: 6adb ldr r3, [r3, #44] @ 0x2c 802206c: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000 8022070: d11f bne.n 80220b2 { status = HAL_ERROR; 8022072: 2301 movs r3, #1 8022074: 73fb strb r3, [r7, #15] } break; 8022076: e01c b.n 80220b2 } /* Memory Data size equal to Word */ else { switch (tmp) 8022078: 68bb ldr r3, [r7, #8] 802207a: 2b02 cmp r3, #2 802207c: d903 bls.n 8022086 802207e: 68bb ldr r3, [r7, #8] 8022080: 2b03 cmp r3, #3 8022082: d003 beq.n 802208c { status = HAL_ERROR; } break; default: break; 8022084: e018 b.n 80220b8 status = HAL_ERROR; 8022086: 2301 movs r3, #1 8022088: 73fb strb r3, [r7, #15] break; 802208a: e015 b.n 80220b8 if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) 802208c: 687b ldr r3, [r7, #4] 802208e: 6adb ldr r3, [r3, #44] @ 0x2c 8022090: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 8022094: 2b00 cmp r3, #0 8022096: d00e beq.n 80220b6 status = HAL_ERROR; 8022098: 2301 movs r3, #1 802209a: 73fb strb r3, [r7, #15] break; 802209c: e00b b.n 80220b6 break; 802209e: bf00 nop 80220a0: e00a b.n 80220b8 break; 80220a2: bf00 nop 80220a4: e008 b.n 80220b8 break; 80220a6: bf00 nop 80220a8: e006 b.n 80220b8 break; 80220aa: bf00 nop 80220ac: e004 b.n 80220b8 break; 80220ae: bf00 nop 80220b0: e002 b.n 80220b8 break; 80220b2: bf00 nop 80220b4: e000 b.n 80220b8 break; 80220b6: bf00 nop } } return status; 80220b8: 7bfb ldrb r3, [r7, #15] } 80220ba: 4618 mov r0, r3 80220bc: 3714 adds r7, #20 80220be: 46bd mov sp, r7 80220c0: f85d 7b04 ldr.w r7, [sp], #4 80220c4: 4770 bx lr 80220c6: bf00 nop 080220c8 : * @param Data specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 80220c8: b580 push {r7, lr} 80220ca: b086 sub sp, #24 80220cc: af00 add r7, sp, #0 80220ce: 60f8 str r0, [r7, #12] 80220d0: 60b9 str r1, [r7, #8] 80220d2: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 80220d6: 2301 movs r3, #1 80220d8: 75fb strb r3, [r7, #23] /* Process Locked */ __HAL_LOCK(&pFlash); 80220da: 4b23 ldr r3, [pc, #140] @ (8022168 ) 80220dc: 7e1b ldrb r3, [r3, #24] 80220de: 2b01 cmp r3, #1 80220e0: d101 bne.n 80220e6 80220e2: 2302 movs r3, #2 80220e4: e03b b.n 802215e 80220e6: 4b20 ldr r3, [pc, #128] @ (8022168 ) 80220e8: 2201 movs r2, #1 80220ea: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80220ec: f24c 3050 movw r0, #50000 @ 0xc350 80220f0: f000 f870 bl 80221d4 80220f4: 4603 mov r3, r0 80220f6: 75fb strb r3, [r7, #23] if(status == HAL_OK) 80220f8: 7dfb ldrb r3, [r7, #23] 80220fa: 2b00 cmp r3, #0 80220fc: d12b bne.n 8022156 { if(TypeProgram == FLASH_TYPEPROGRAM_BYTE) 80220fe: 68fb ldr r3, [r7, #12] 8022100: 2b00 cmp r3, #0 8022102: d105 bne.n 8022110 { /*Program byte (8-bit) at a specified address.*/ FLASH_Program_Byte(Address, (uint8_t) Data); 8022104: 783b ldrb r3, [r7, #0] 8022106: 4619 mov r1, r3 8022108: 68b8 ldr r0, [r7, #8] 802210a: f000 f91b bl 8022344 802210e: e016 b.n 802213e } else if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8022110: 68fb ldr r3, [r7, #12] 8022112: 2b01 cmp r3, #1 8022114: d105 bne.n 8022122 { /*Program halfword (16-bit) at a specified address.*/ FLASH_Program_HalfWord(Address, (uint16_t) Data); 8022116: 883b ldrh r3, [r7, #0] 8022118: 4619 mov r1, r3 802211a: 68b8 ldr r0, [r7, #8] 802211c: f000 f8ee bl 80222fc 8022120: e00d b.n 802213e } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 8022122: 68fb ldr r3, [r7, #12] 8022124: 2b02 cmp r3, #2 8022126: d105 bne.n 8022134 { /*Program word (32-bit) at a specified address.*/ FLASH_Program_Word(Address, (uint32_t) Data); 8022128: 683b ldr r3, [r7, #0] 802212a: 4619 mov r1, r3 802212c: 68b8 ldr r0, [r7, #8] 802212e: f000 f8c3 bl 80222b8 8022132: e004 b.n 802213e } else { /*Program double word (64-bit) at a specified address.*/ FLASH_Program_DoubleWord(Address, Data); 8022134: e9d7 2300 ldrd r2, r3, [r7] 8022138: 68b8 ldr r0, [r7, #8] 802213a: f000 f88b bl 8022254 } /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 802213e: f24c 3050 movw r0, #50000 @ 0xc350 8022142: f000 f847 bl 80221d4 8022146: 4603 mov r3, r0 8022148: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ FLASH->CR &= (~FLASH_CR_PG); 802214a: 4b08 ldr r3, [pc, #32] @ (802216c ) 802214c: 691b ldr r3, [r3, #16] 802214e: 4a07 ldr r2, [pc, #28] @ (802216c ) 8022150: f023 0301 bic.w r3, r3, #1 8022154: 6113 str r3, [r2, #16] } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 8022156: 4b04 ldr r3, [pc, #16] @ (8022168 ) 8022158: 2200 movs r2, #0 802215a: 761a strb r2, [r3, #24] return status; 802215c: 7dfb ldrb r3, [r7, #23] } 802215e: 4618 mov r0, r3 8022160: 3718 adds r7, #24 8022162: 46bd mov sp, r7 8022164: bd80 pop {r7, pc} 8022166: bf00 nop 8022168: 20005450 .word 0x20005450 802216c: 40023c00 .word 0x40023c00 08022170 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { 8022170: b480 push {r7} 8022172: b083 sub sp, #12 8022174: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8022176: 2300 movs r3, #0 8022178: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 802217a: 4b0b ldr r3, [pc, #44] @ (80221a8 ) 802217c: 691b ldr r3, [r3, #16] 802217e: 2b00 cmp r3, #0 8022180: da0b bge.n 802219a { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8022182: 4b09 ldr r3, [pc, #36] @ (80221a8 ) 8022184: 4a09 ldr r2, [pc, #36] @ (80221ac ) 8022186: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 8022188: 4b07 ldr r3, [pc, #28] @ (80221a8 ) 802218a: 4a09 ldr r2, [pc, #36] @ (80221b0 ) 802218c: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 802218e: 4b06 ldr r3, [pc, #24] @ (80221a8 ) 8022190: 691b ldr r3, [r3, #16] 8022192: 2b00 cmp r3, #0 8022194: da01 bge.n 802219a { status = HAL_ERROR; 8022196: 2301 movs r3, #1 8022198: 71fb strb r3, [r7, #7] } } return status; 802219a: 79fb ldrb r3, [r7, #7] } 802219c: 4618 mov r0, r3 802219e: 370c adds r7, #12 80221a0: 46bd mov sp, r7 80221a2: f85d 7b04 ldr.w r7, [sp], #4 80221a6: 4770 bx lr 80221a8: 40023c00 .word 0x40023c00 80221ac: 45670123 .word 0x45670123 80221b0: cdef89ab .word 0xcdef89ab 080221b4 : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { 80221b4: b480 push {r7} 80221b6: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ FLASH->CR |= FLASH_CR_LOCK; 80221b8: 4b05 ldr r3, [pc, #20] @ (80221d0 ) 80221ba: 691b ldr r3, [r3, #16] 80221bc: 4a04 ldr r2, [pc, #16] @ (80221d0 ) 80221be: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 80221c2: 6113 str r3, [r2, #16] return HAL_OK; 80221c4: 2300 movs r3, #0 } 80221c6: 4618 mov r0, r3 80221c8: 46bd mov sp, r7 80221ca: f85d 7b04 ldr.w r7, [sp], #4 80221ce: 4770 bx lr 80221d0: 40023c00 .word 0x40023c00 080221d4 : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operationtimeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { 80221d4: b580 push {r7, lr} 80221d6: b084 sub sp, #16 80221d8: af00 add r7, sp, #0 80221da: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 80221dc: 2300 movs r3, #0 80221de: 60fb str r3, [r7, #12] /* Clear Error Code */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80221e0: 4b1a ldr r3, [pc, #104] @ (802224c ) 80221e2: 2200 movs r2, #0 80221e4: 61da str r2, [r3, #28] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ /* Get tick */ tickstart = HAL_GetTick(); 80221e6: f7fe f81f bl 8020228 80221ea: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET) 80221ec: e010 b.n 8022210 { if(Timeout != HAL_MAX_DELAY) 80221ee: 687b ldr r3, [r7, #4] 80221f0: f1b3 3fff cmp.w r3, #4294967295 80221f4: d00c beq.n 8022210 { if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) 80221f6: 687b ldr r3, [r7, #4] 80221f8: 2b00 cmp r3, #0 80221fa: d007 beq.n 802220c 80221fc: f7fe f814 bl 8020228 8022200: 4602 mov r2, r0 8022202: 68fb ldr r3, [r7, #12] 8022204: 1ad3 subs r3, r2, r3 8022206: 687a ldr r2, [r7, #4] 8022208: 429a cmp r2, r3 802220a: d201 bcs.n 8022210 { return HAL_TIMEOUT; 802220c: 2303 movs r3, #3 802220e: e019 b.n 8022244 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET) 8022210: 4b0f ldr r3, [pc, #60] @ (8022250 ) 8022212: 68db ldr r3, [r3, #12] 8022214: f403 3380 and.w r3, r3, #65536 @ 0x10000 8022218: 2b00 cmp r3, #0 802221a: d1e8 bne.n 80221ee } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET) 802221c: 4b0c ldr r3, [pc, #48] @ (8022250 ) 802221e: 68db ldr r3, [r3, #12] 8022220: f003 0301 and.w r3, r3, #1 8022224: 2b00 cmp r3, #0 8022226: d002 beq.n 802222e { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 8022228: 4b09 ldr r3, [pc, #36] @ (8022250 ) 802222a: 2201 movs r2, #1 802222c: 60da str r2, [r3, #12] } #if defined(FLASH_SR_RDERR) if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \ 802222e: 4b08 ldr r3, [pc, #32] @ (8022250 ) 8022230: 68db ldr r3, [r3, #12] 8022232: f403 73f9 and.w r3, r3, #498 @ 0x1f2 8022236: 2b00 cmp r3, #0 8022238: d003 beq.n 8022242 if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \ FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR)) != RESET) #endif /* FLASH_SR_RDERR */ { /*Save the error code*/ FLASH_SetErrorCode(); 802223a: f000 f8a5 bl 8022388 return HAL_ERROR; 802223e: 2301 movs r3, #1 8022240: e000 b.n 8022244 } /* If there is no error flag set */ return HAL_OK; 8022242: 2300 movs r3, #0 } 8022244: 4618 mov r0, r3 8022246: 3710 adds r7, #16 8022248: 46bd mov sp, r7 802224a: bd80 pop {r7, pc} 802224c: 20005450 .word 0x20005450 8022250: 40023c00 .word 0x40023c00 08022254 : * @param Address specifies the address to be programmed. * @param Data specifies the data to be programmed. * @retval None */ static void FLASH_Program_DoubleWord(uint32_t Address, uint64_t Data) { 8022254: b480 push {r7} 8022256: b085 sub sp, #20 8022258: af00 add r7, sp, #0 802225a: 60f8 str r0, [r7, #12] 802225c: e9c7 2300 strd r2, r3, [r7] /* Check the parameters */ assert_param(IS_FLASH_ADDRESS(Address)); /* If the previous operation is completed, proceed to program the new data */ CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); 8022260: 4b14 ldr r3, [pc, #80] @ (80222b4 ) 8022262: 691b ldr r3, [r3, #16] 8022264: 4a13 ldr r2, [pc, #76] @ (80222b4 ) 8022266: f423 7340 bic.w r3, r3, #768 @ 0x300 802226a: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD; 802226c: 4b11 ldr r3, [pc, #68] @ (80222b4 ) 802226e: 691b ldr r3, [r3, #16] 8022270: 4a10 ldr r2, [pc, #64] @ (80222b4 ) 8022272: f443 7340 orr.w r3, r3, #768 @ 0x300 8022276: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_PG; 8022278: 4b0e ldr r3, [pc, #56] @ (80222b4 ) 802227a: 691b ldr r3, [r3, #16] 802227c: 4a0d ldr r2, [pc, #52] @ (80222b4 ) 802227e: f043 0301 orr.w r3, r3, #1 8022282: 6113 str r3, [r2, #16] /* Program first word */ *(__IO uint32_t*)Address = (uint32_t)Data; 8022284: 68fb ldr r3, [r7, #12] 8022286: 683a ldr r2, [r7, #0] 8022288: 601a str r2, [r3, #0] __ASM volatile ("isb 0xF":::"memory"); 802228a: f3bf 8f6f isb sy } 802228e: bf00 nop /* Barrier to ensure programming is performed in 2 steps, in right order (independently of compiler optimization behavior) */ __ISB(); /* Program second word */ *(__IO uint32_t*)(Address+4) = (uint32_t)(Data >> 32); 8022290: e9d7 0100 ldrd r0, r1, [r7] 8022294: f04f 0200 mov.w r2, #0 8022298: f04f 0300 mov.w r3, #0 802229c: 000a movs r2, r1 802229e: 2300 movs r3, #0 80222a0: 68f9 ldr r1, [r7, #12] 80222a2: 3104 adds r1, #4 80222a4: 4613 mov r3, r2 80222a6: 600b str r3, [r1, #0] } 80222a8: bf00 nop 80222aa: 3714 adds r7, #20 80222ac: 46bd mov sp, r7 80222ae: f85d 7b04 ldr.w r7, [sp], #4 80222b2: 4770 bx lr 80222b4: 40023c00 .word 0x40023c00 080222b8 : * @param Address specifies the address to be programmed. * @param Data specifies the data to be programmed. * @retval None */ static void FLASH_Program_Word(uint32_t Address, uint32_t Data) { 80222b8: b480 push {r7} 80222ba: b083 sub sp, #12 80222bc: af00 add r7, sp, #0 80222be: 6078 str r0, [r7, #4] 80222c0: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_FLASH_ADDRESS(Address)); /* If the previous operation is completed, proceed to program the new data */ CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); 80222c2: 4b0d ldr r3, [pc, #52] @ (80222f8 ) 80222c4: 691b ldr r3, [r3, #16] 80222c6: 4a0c ldr r2, [pc, #48] @ (80222f8 ) 80222c8: f423 7340 bic.w r3, r3, #768 @ 0x300 80222cc: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_PSIZE_WORD; 80222ce: 4b0a ldr r3, [pc, #40] @ (80222f8 ) 80222d0: 691b ldr r3, [r3, #16] 80222d2: 4a09 ldr r2, [pc, #36] @ (80222f8 ) 80222d4: f443 7300 orr.w r3, r3, #512 @ 0x200 80222d8: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_PG; 80222da: 4b07 ldr r3, [pc, #28] @ (80222f8 ) 80222dc: 691b ldr r3, [r3, #16] 80222de: 4a06 ldr r2, [pc, #24] @ (80222f8 ) 80222e0: f043 0301 orr.w r3, r3, #1 80222e4: 6113 str r3, [r2, #16] *(__IO uint32_t*)Address = Data; 80222e6: 687b ldr r3, [r7, #4] 80222e8: 683a ldr r2, [r7, #0] 80222ea: 601a str r2, [r3, #0] } 80222ec: bf00 nop 80222ee: 370c adds r7, #12 80222f0: 46bd mov sp, r7 80222f2: f85d 7b04 ldr.w r7, [sp], #4 80222f6: 4770 bx lr 80222f8: 40023c00 .word 0x40023c00 080222fc : * @param Address specifies the address to be programmed. * @param Data specifies the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { 80222fc: b480 push {r7} 80222fe: b083 sub sp, #12 8022300: af00 add r7, sp, #0 8022302: 6078 str r0, [r7, #4] 8022304: 460b mov r3, r1 8022306: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_FLASH_ADDRESS(Address)); /* If the previous operation is completed, proceed to program the new data */ CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); 8022308: 4b0d ldr r3, [pc, #52] @ (8022340 ) 802230a: 691b ldr r3, [r3, #16] 802230c: 4a0c ldr r2, [pc, #48] @ (8022340 ) 802230e: f423 7340 bic.w r3, r3, #768 @ 0x300 8022312: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_PSIZE_HALF_WORD; 8022314: 4b0a ldr r3, [pc, #40] @ (8022340 ) 8022316: 691b ldr r3, [r3, #16] 8022318: 4a09 ldr r2, [pc, #36] @ (8022340 ) 802231a: f443 7380 orr.w r3, r3, #256 @ 0x100 802231e: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_PG; 8022320: 4b07 ldr r3, [pc, #28] @ (8022340 ) 8022322: 691b ldr r3, [r3, #16] 8022324: 4a06 ldr r2, [pc, #24] @ (8022340 ) 8022326: f043 0301 orr.w r3, r3, #1 802232a: 6113 str r3, [r2, #16] *(__IO uint16_t*)Address = Data; 802232c: 687b ldr r3, [r7, #4] 802232e: 887a ldrh r2, [r7, #2] 8022330: 801a strh r2, [r3, #0] } 8022332: bf00 nop 8022334: 370c adds r7, #12 8022336: 46bd mov sp, r7 8022338: f85d 7b04 ldr.w r7, [sp], #4 802233c: 4770 bx lr 802233e: bf00 nop 8022340: 40023c00 .word 0x40023c00 08022344 : * @param Address specifies the address to be programmed. * @param Data specifies the data to be programmed. * @retval None */ static void FLASH_Program_Byte(uint32_t Address, uint8_t Data) { 8022344: b480 push {r7} 8022346: b083 sub sp, #12 8022348: af00 add r7, sp, #0 802234a: 6078 str r0, [r7, #4] 802234c: 460b mov r3, r1 802234e: 70fb strb r3, [r7, #3] /* Check the parameters */ assert_param(IS_FLASH_ADDRESS(Address)); /* If the previous operation is completed, proceed to program the new data */ CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); 8022350: 4b0c ldr r3, [pc, #48] @ (8022384 ) 8022352: 691b ldr r3, [r3, #16] 8022354: 4a0b ldr r2, [pc, #44] @ (8022384 ) 8022356: f423 7340 bic.w r3, r3, #768 @ 0x300 802235a: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_PSIZE_BYTE; 802235c: 4b09 ldr r3, [pc, #36] @ (8022384 ) 802235e: 4a09 ldr r2, [pc, #36] @ (8022384 ) 8022360: 691b ldr r3, [r3, #16] 8022362: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_PG; 8022364: 4b07 ldr r3, [pc, #28] @ (8022384 ) 8022366: 691b ldr r3, [r3, #16] 8022368: 4a06 ldr r2, [pc, #24] @ (8022384 ) 802236a: f043 0301 orr.w r3, r3, #1 802236e: 6113 str r3, [r2, #16] *(__IO uint8_t*)Address = Data; 8022370: 687b ldr r3, [r7, #4] 8022372: 78fa ldrb r2, [r7, #3] 8022374: 701a strb r2, [r3, #0] } 8022376: bf00 nop 8022378: 370c adds r7, #12 802237a: 46bd mov sp, r7 802237c: f85d 7b04 ldr.w r7, [sp], #4 8022380: 4770 bx lr 8022382: bf00 nop 8022384: 40023c00 .word 0x40023c00 08022388 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { 8022388: b480 push {r7} 802238a: af00 add r7, sp, #0 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) != RESET) 802238c: 4b2f ldr r3, [pc, #188] @ (802244c ) 802238e: 68db ldr r3, [r3, #12] 8022390: f003 0310 and.w r3, r3, #16 8022394: 2b00 cmp r3, #0 8022396: d008 beq.n 80223aa { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8022398: 4b2d ldr r3, [pc, #180] @ (8022450 ) 802239a: 69db ldr r3, [r3, #28] 802239c: f043 0310 orr.w r3, r3, #16 80223a0: 4a2b ldr r2, [pc, #172] @ (8022450 ) 80223a2: 61d3 str r3, [r2, #28] /* Clear FLASH write protection error pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_WRPERR); 80223a4: 4b29 ldr r3, [pc, #164] @ (802244c ) 80223a6: 2210 movs r2, #16 80223a8: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) != RESET) 80223aa: 4b28 ldr r3, [pc, #160] @ (802244c ) 80223ac: 68db ldr r3, [r3, #12] 80223ae: f003 0320 and.w r3, r3, #32 80223b2: 2b00 cmp r3, #0 80223b4: d008 beq.n 80223c8 { pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; 80223b6: 4b26 ldr r3, [pc, #152] @ (8022450 ) 80223b8: 69db ldr r3, [r3, #28] 80223ba: f043 0308 orr.w r3, r3, #8 80223be: 4a24 ldr r2, [pc, #144] @ (8022450 ) 80223c0: 61d3 str r3, [r2, #28] /* Clear FLASH Programming alignment error pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGAERR); 80223c2: 4b22 ldr r3, [pc, #136] @ (802244c ) 80223c4: 2220 movs r2, #32 80223c6: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGPERR) != RESET) 80223c8: 4b20 ldr r3, [pc, #128] @ (802244c ) 80223ca: 68db ldr r3, [r3, #12] 80223cc: f003 0340 and.w r3, r3, #64 @ 0x40 80223d0: 2b00 cmp r3, #0 80223d2: d008 beq.n 80223e6 { pFlash.ErrorCode |= HAL_FLASH_ERROR_PGP; 80223d4: 4b1e ldr r3, [pc, #120] @ (8022450 ) 80223d6: 69db ldr r3, [r3, #28] 80223d8: f043 0304 orr.w r3, r3, #4 80223dc: 4a1c ldr r2, [pc, #112] @ (8022450 ) 80223de: 61d3 str r3, [r2, #28] /* Clear FLASH Programming parallelism error pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGPERR); 80223e0: 4b1a ldr r3, [pc, #104] @ (802244c ) 80223e2: 2240 movs r2, #64 @ 0x40 80223e4: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGSERR) != RESET) 80223e6: 4b19 ldr r3, [pc, #100] @ (802244c ) 80223e8: 68db ldr r3, [r3, #12] 80223ea: f003 0380 and.w r3, r3, #128 @ 0x80 80223ee: 2b00 cmp r3, #0 80223f0: d008 beq.n 8022404 { pFlash.ErrorCode |= HAL_FLASH_ERROR_PGS; 80223f2: 4b17 ldr r3, [pc, #92] @ (8022450 ) 80223f4: 69db ldr r3, [r3, #28] 80223f6: f043 0302 orr.w r3, r3, #2 80223fa: 4a15 ldr r2, [pc, #84] @ (8022450 ) 80223fc: 61d3 str r3, [r2, #28] /* Clear FLASH Programming sequence error pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_PGSERR); 80223fe: 4b13 ldr r3, [pc, #76] @ (802244c ) 8022400: 2280 movs r2, #128 @ 0x80 8022402: 60da str r2, [r3, #12] } #if defined(FLASH_SR_RDERR) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) != RESET) 8022404: 4b11 ldr r3, [pc, #68] @ (802244c ) 8022406: 68db ldr r3, [r3, #12] 8022408: f403 7380 and.w r3, r3, #256 @ 0x100 802240c: 2b00 cmp r3, #0 802240e: d009 beq.n 8022424 { pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; 8022410: 4b0f ldr r3, [pc, #60] @ (8022450 ) 8022412: 69db ldr r3, [r3, #28] 8022414: f043 0301 orr.w r3, r3, #1 8022418: 4a0d ldr r2, [pc, #52] @ (8022450 ) 802241a: 61d3 str r3, [r2, #28] /* Clear FLASH Proprietary readout protection error pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_RDERR); 802241c: 4b0b ldr r3, [pc, #44] @ (802244c ) 802241e: f44f 7280 mov.w r2, #256 @ 0x100 8022422: 60da str r2, [r3, #12] } #endif /* FLASH_SR_RDERR */ if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET) 8022424: 4b09 ldr r3, [pc, #36] @ (802244c ) 8022426: 68db ldr r3, [r3, #12] 8022428: f003 0302 and.w r3, r3, #2 802242c: 2b00 cmp r3, #0 802242e: d008 beq.n 8022442 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION; 8022430: 4b07 ldr r3, [pc, #28] @ (8022450 ) 8022432: 69db ldr r3, [r3, #28] 8022434: f043 0320 orr.w r3, r3, #32 8022438: 4a05 ldr r2, [pc, #20] @ (8022450 ) 802243a: 61d3 str r3, [r2, #28] /* Clear FLASH Operation error pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPERR); 802243c: 4b03 ldr r3, [pc, #12] @ (802244c ) 802243e: 2202 movs r2, #2 8022440: 60da str r2, [r3, #12] } } 8022442: bf00 nop 8022444: 46bd mov sp, r7 8022446: f85d 7b04 ldr.w r7, [sp], #4 802244a: 4770 bx lr 802244c: 40023c00 .word 0x40023c00 8022450: 20005450 .word 0x20005450 08022454 : * (0xFFFFFFFFU means that all the sectors have been correctly erased) * * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) { 8022454: b580 push {r7, lr} 8022456: b084 sub sp, #16 8022458: af00 add r7, sp, #0 802245a: 6078 str r0, [r7, #4] 802245c: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; 802245e: 2301 movs r3, #1 8022460: 73fb strb r3, [r7, #15] uint32_t index = 0U; 8022462: 2300 movs r3, #0 8022464: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); 8022466: 4b31 ldr r3, [pc, #196] @ (802252c ) 8022468: 7e1b ldrb r3, [r3, #24] 802246a: 2b01 cmp r3, #1 802246c: d101 bne.n 8022472 802246e: 2302 movs r3, #2 8022470: e058 b.n 8022524 8022472: 4b2e ldr r3, [pc, #184] @ (802252c ) 8022474: 2201 movs r2, #1 8022476: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8022478: f24c 3050 movw r0, #50000 @ 0xc350 802247c: f7ff feaa bl 80221d4 8022480: 4603 mov r3, r0 8022482: 73fb strb r3, [r7, #15] if (status == HAL_OK) 8022484: 7bfb ldrb r3, [r7, #15] 8022486: 2b00 cmp r3, #0 8022488: d148 bne.n 802251c { /*Initialization of SectorError variable*/ *SectorError = 0xFFFFFFFFU; 802248a: 683b ldr r3, [r7, #0] 802248c: f04f 32ff mov.w r2, #4294967295 8022490: 601a str r2, [r3, #0] if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8022492: 687b ldr r3, [r7, #4] 8022494: 681b ldr r3, [r3, #0] 8022496: 2b01 cmp r3, #1 8022498: d115 bne.n 80224c6 { /*Mass erase to be done*/ FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); 802249a: 687b ldr r3, [r7, #4] 802249c: 691b ldr r3, [r3, #16] 802249e: b2da uxtb r2, r3 80224a0: 687b ldr r3, [r7, #4] 80224a2: 685b ldr r3, [r3, #4] 80224a4: 4619 mov r1, r3 80224a6: 4610 mov r0, r2 80224a8: f000 f844 bl 8022534 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80224ac: f24c 3050 movw r0, #50000 @ 0xc350 80224b0: f7ff fe90 bl 80221d4 80224b4: 4603 mov r3, r0 80224b6: 73fb strb r3, [r7, #15] /* if the erase operation is completed, disable the MER Bit */ FLASH->CR &= (~FLASH_MER_BIT); 80224b8: 4b1d ldr r3, [pc, #116] @ (8022530 ) 80224ba: 691b ldr r3, [r3, #16] 80224bc: 4a1c ldr r2, [pc, #112] @ (8022530 ) 80224be: f023 0304 bic.w r3, r3, #4 80224c2: 6113 str r3, [r2, #16] 80224c4: e028 b.n 8022518 { /* Check the parameters */ assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); /* Erase by sector by sector to be done*/ for (index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++) 80224c6: 687b ldr r3, [r7, #4] 80224c8: 689b ldr r3, [r3, #8] 80224ca: 60bb str r3, [r7, #8] 80224cc: e01c b.n 8022508 { FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange); 80224ce: 687b ldr r3, [r7, #4] 80224d0: 691b ldr r3, [r3, #16] 80224d2: b2db uxtb r3, r3 80224d4: 4619 mov r1, r3 80224d6: 68b8 ldr r0, [r7, #8] 80224d8: f000 f850 bl 802257c /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80224dc: f24c 3050 movw r0, #50000 @ 0xc350 80224e0: f7ff fe78 bl 80221d4 80224e4: 4603 mov r3, r0 80224e6: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the SER and SNB Bits */ CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB)); 80224e8: 4b11 ldr r3, [pc, #68] @ (8022530 ) 80224ea: 691b ldr r3, [r3, #16] 80224ec: 4a10 ldr r2, [pc, #64] @ (8022530 ) 80224ee: f023 03fa bic.w r3, r3, #250 @ 0xfa 80224f2: 6113 str r3, [r2, #16] if (status != HAL_OK) 80224f4: 7bfb ldrb r3, [r7, #15] 80224f6: 2b00 cmp r3, #0 80224f8: d003 beq.n 8022502 { /* In case of error, stop erase procedure and return the faulty sector*/ *SectorError = index; 80224fa: 683b ldr r3, [r7, #0] 80224fc: 68ba ldr r2, [r7, #8] 80224fe: 601a str r2, [r3, #0] break; 8022500: e00a b.n 8022518 for (index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++) 8022502: 68bb ldr r3, [r7, #8] 8022504: 3301 adds r3, #1 8022506: 60bb str r3, [r7, #8] 8022508: 687b ldr r3, [r7, #4] 802250a: 68da ldr r2, [r3, #12] 802250c: 687b ldr r3, [r7, #4] 802250e: 689b ldr r3, [r3, #8] 8022510: 4413 add r3, r2 8022512: 68ba ldr r2, [r7, #8] 8022514: 429a cmp r2, r3 8022516: d3da bcc.n 80224ce } } } /* Flush the caches to be sure of the data consistency */ FLASH_FlushCaches(); 8022518: f000 f878 bl 802260c } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 802251c: 4b03 ldr r3, [pc, #12] @ (802252c ) 802251e: 2200 movs r2, #0 8022520: 761a strb r2, [r3, #24] return status; 8022522: 7bfb ldrb r3, [r7, #15] } 8022524: 4618 mov r0, r3 8022526: 3710 adds r7, #16 8022528: 46bd mov sp, r7 802252a: bd80 pop {r7, pc} 802252c: 20005450 .word 0x20005450 8022530: 40023c00 .word 0x40023c00 08022534 : * @arg FLASH_BANK_1: Bank1 to be erased * * @retval None */ static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) { 8022534: b480 push {r7} 8022536: b083 sub sp, #12 8022538: af00 add r7, sp, #0 802253a: 4603 mov r3, r0 802253c: 6039 str r1, [r7, #0] 802253e: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_VOLTAGERANGE(VoltageRange)); assert_param(IS_FLASH_BANK(Banks)); /* If the previous operation is completed, proceed to erase all sectors */ CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); 8022540: 4b0d ldr r3, [pc, #52] @ (8022578 ) 8022542: 691b ldr r3, [r3, #16] 8022544: 4a0c ldr r2, [pc, #48] @ (8022578 ) 8022546: f423 7340 bic.w r3, r3, #768 @ 0x300 802254a: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_MER; 802254c: 4b0a ldr r3, [pc, #40] @ (8022578 ) 802254e: 691b ldr r3, [r3, #16] 8022550: 4a09 ldr r2, [pc, #36] @ (8022578 ) 8022552: f043 0304 orr.w r3, r3, #4 8022556: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange << 8U); 8022558: 4b07 ldr r3, [pc, #28] @ (8022578 ) 802255a: 691a ldr r2, [r3, #16] 802255c: 79fb ldrb r3, [r7, #7] 802255e: 021b lsls r3, r3, #8 8022560: 4313 orrs r3, r2 8022562: 4a05 ldr r2, [pc, #20] @ (8022578 ) 8022564: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8022568: 6113 str r3, [r2, #16] } 802256a: bf00 nop 802256c: 370c adds r7, #12 802256e: 46bd mov sp, r7 8022570: f85d 7b04 ldr.w r7, [sp], #4 8022574: 4770 bx lr 8022576: bf00 nop 8022578: 40023c00 .word 0x40023c00 0802257c : * the operation will be done by double word (64-bit) * * @retval None */ void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) { 802257c: b480 push {r7} 802257e: b085 sub sp, #20 8022580: af00 add r7, sp, #0 8022582: 6078 str r0, [r7, #4] 8022584: 460b mov r3, r1 8022586: 70fb strb r3, [r7, #3] uint32_t tmp_psize = 0U; 8022588: 2300 movs r3, #0 802258a: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_FLASH_SECTOR(Sector)); assert_param(IS_VOLTAGERANGE(VoltageRange)); if (VoltageRange == FLASH_VOLTAGE_RANGE_1) 802258c: 78fb ldrb r3, [r7, #3] 802258e: 2b00 cmp r3, #0 8022590: d102 bne.n 8022598 { tmp_psize = FLASH_PSIZE_BYTE; 8022592: 2300 movs r3, #0 8022594: 60fb str r3, [r7, #12] 8022596: e010 b.n 80225ba } else if (VoltageRange == FLASH_VOLTAGE_RANGE_2) 8022598: 78fb ldrb r3, [r7, #3] 802259a: 2b01 cmp r3, #1 802259c: d103 bne.n 80225a6 { tmp_psize = FLASH_PSIZE_HALF_WORD; 802259e: f44f 7380 mov.w r3, #256 @ 0x100 80225a2: 60fb str r3, [r7, #12] 80225a4: e009 b.n 80225ba } else if (VoltageRange == FLASH_VOLTAGE_RANGE_3) 80225a6: 78fb ldrb r3, [r7, #3] 80225a8: 2b02 cmp r3, #2 80225aa: d103 bne.n 80225b4 { tmp_psize = FLASH_PSIZE_WORD; 80225ac: f44f 7300 mov.w r3, #512 @ 0x200 80225b0: 60fb str r3, [r7, #12] 80225b2: e002 b.n 80225ba } else { tmp_psize = FLASH_PSIZE_DOUBLE_WORD; 80225b4: f44f 7340 mov.w r3, #768 @ 0x300 80225b8: 60fb str r3, [r7, #12] } /* If the previous operation is completed, proceed to erase the sector */ CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); 80225ba: 4b13 ldr r3, [pc, #76] @ (8022608 ) 80225bc: 691b ldr r3, [r3, #16] 80225be: 4a12 ldr r2, [pc, #72] @ (8022608 ) 80225c0: f423 7340 bic.w r3, r3, #768 @ 0x300 80225c4: 6113 str r3, [r2, #16] FLASH->CR |= tmp_psize; 80225c6: 4b10 ldr r3, [pc, #64] @ (8022608 ) 80225c8: 691a ldr r2, [r3, #16] 80225ca: 490f ldr r1, [pc, #60] @ (8022608 ) 80225cc: 68fb ldr r3, [r7, #12] 80225ce: 4313 orrs r3, r2 80225d0: 610b str r3, [r1, #16] CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); 80225d2: 4b0d ldr r3, [pc, #52] @ (8022608 ) 80225d4: 691b ldr r3, [r3, #16] 80225d6: 4a0c ldr r2, [pc, #48] @ (8022608 ) 80225d8: f023 03f8 bic.w r3, r3, #248 @ 0xf8 80225dc: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); 80225de: 4b0a ldr r3, [pc, #40] @ (8022608 ) 80225e0: 691a ldr r2, [r3, #16] 80225e2: 687b ldr r3, [r7, #4] 80225e4: 00db lsls r3, r3, #3 80225e6: 4313 orrs r3, r2 80225e8: 4a07 ldr r2, [pc, #28] @ (8022608 ) 80225ea: f043 0302 orr.w r3, r3, #2 80225ee: 6113 str r3, [r2, #16] FLASH->CR |= FLASH_CR_STRT; 80225f0: 4b05 ldr r3, [pc, #20] @ (8022608 ) 80225f2: 691b ldr r3, [r3, #16] 80225f4: 4a04 ldr r2, [pc, #16] @ (8022608 ) 80225f6: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80225fa: 6113 str r3, [r2, #16] } 80225fc: bf00 nop 80225fe: 3714 adds r7, #20 8022600: 46bd mov sp, r7 8022602: f85d 7b04 ldr.w r7, [sp], #4 8022606: 4770 bx lr 8022608: 40023c00 .word 0x40023c00 0802260c : /** * @brief Flush the instruction and data caches * @retval None */ void FLASH_FlushCaches(void) { 802260c: b480 push {r7} 802260e: af00 add r7, sp, #0 /* Flush instruction cache */ if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) 8022610: 4b20 ldr r3, [pc, #128] @ (8022694 ) 8022612: 681b ldr r3, [r3, #0] 8022614: f403 7300 and.w r3, r3, #512 @ 0x200 8022618: 2b00 cmp r3, #0 802261a: d017 beq.n 802264c { /* Disable instruction cache */ __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); 802261c: 4b1d ldr r3, [pc, #116] @ (8022694 ) 802261e: 681b ldr r3, [r3, #0] 8022620: 4a1c ldr r2, [pc, #112] @ (8022694 ) 8022622: f423 7300 bic.w r3, r3, #512 @ 0x200 8022626: 6013 str r3, [r2, #0] /* Reset instruction cache */ __HAL_FLASH_INSTRUCTION_CACHE_RESET(); 8022628: 4b1a ldr r3, [pc, #104] @ (8022694 ) 802262a: 681b ldr r3, [r3, #0] 802262c: 4a19 ldr r2, [pc, #100] @ (8022694 ) 802262e: f443 6300 orr.w r3, r3, #2048 @ 0x800 8022632: 6013 str r3, [r2, #0] 8022634: 4b17 ldr r3, [pc, #92] @ (8022694 ) 8022636: 681b ldr r3, [r3, #0] 8022638: 4a16 ldr r2, [pc, #88] @ (8022694 ) 802263a: f423 6300 bic.w r3, r3, #2048 @ 0x800 802263e: 6013 str r3, [r2, #0] /* Enable instruction cache */ __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); 8022640: 4b14 ldr r3, [pc, #80] @ (8022694 ) 8022642: 681b ldr r3, [r3, #0] 8022644: 4a13 ldr r2, [pc, #76] @ (8022694 ) 8022646: f443 7300 orr.w r3, r3, #512 @ 0x200 802264a: 6013 str r3, [r2, #0] } /* Flush data cache */ if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) 802264c: 4b11 ldr r3, [pc, #68] @ (8022694 ) 802264e: 681b ldr r3, [r3, #0] 8022650: f403 6380 and.w r3, r3, #1024 @ 0x400 8022654: 2b00 cmp r3, #0 8022656: d017 beq.n 8022688 { /* Disable data cache */ __HAL_FLASH_DATA_CACHE_DISABLE(); 8022658: 4b0e ldr r3, [pc, #56] @ (8022694 ) 802265a: 681b ldr r3, [r3, #0] 802265c: 4a0d ldr r2, [pc, #52] @ (8022694 ) 802265e: f423 6380 bic.w r3, r3, #1024 @ 0x400 8022662: 6013 str r3, [r2, #0] /* Reset data cache */ __HAL_FLASH_DATA_CACHE_RESET(); 8022664: 4b0b ldr r3, [pc, #44] @ (8022694 ) 8022666: 681b ldr r3, [r3, #0] 8022668: 4a0a ldr r2, [pc, #40] @ (8022694 ) 802266a: f443 5380 orr.w r3, r3, #4096 @ 0x1000 802266e: 6013 str r3, [r2, #0] 8022670: 4b08 ldr r3, [pc, #32] @ (8022694 ) 8022672: 681b ldr r3, [r3, #0] 8022674: 4a07 ldr r2, [pc, #28] @ (8022694 ) 8022676: f423 5380 bic.w r3, r3, #4096 @ 0x1000 802267a: 6013 str r3, [r2, #0] /* Enable data cache */ __HAL_FLASH_DATA_CACHE_ENABLE(); 802267c: 4b05 ldr r3, [pc, #20] @ (8022694 ) 802267e: 681b ldr r3, [r3, #0] 8022680: 4a04 ldr r2, [pc, #16] @ (8022694 ) 8022682: f443 6380 orr.w r3, r3, #1024 @ 0x400 8022686: 6013 str r3, [r2, #0] } } 8022688: bf00 nop 802268a: 46bd mov sp, r7 802268c: f85d 7b04 ldr.w r7, [sp], #4 8022690: 4770 bx lr 8022692: bf00 nop 8022694: 40023c00 .word 0x40023c00 08022698 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8022698: b480 push {r7} 802269a: b089 sub sp, #36 @ 0x24 802269c: af00 add r7, sp, #0 802269e: 6078 str r0, [r7, #4] 80226a0: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; 80226a2: 2300 movs r3, #0 80226a4: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; 80226a6: 2300 movs r3, #0 80226a8: 613b str r3, [r7, #16] uint32_t temp = 0x00U; 80226aa: 2300 movs r3, #0 80226ac: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) 80226ae: 2300 movs r3, #0 80226b0: 61fb str r3, [r7, #28] 80226b2: e165 b.n 8022980 { /* Get the IO position */ ioposition = 0x01U << position; 80226b4: 2201 movs r2, #1 80226b6: 69fb ldr r3, [r7, #28] 80226b8: fa02 f303 lsl.w r3, r2, r3 80226bc: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80226be: 683b ldr r3, [r7, #0] 80226c0: 681b ldr r3, [r3, #0] 80226c2: 697a ldr r2, [r7, #20] 80226c4: 4013 ands r3, r2 80226c6: 613b str r3, [r7, #16] if(iocurrent == ioposition) 80226c8: 693a ldr r2, [r7, #16] 80226ca: 697b ldr r3, [r7, #20] 80226cc: 429a cmp r2, r3 80226ce: f040 8154 bne.w 802297a { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ 80226d2: 683b ldr r3, [r7, #0] 80226d4: 685b ldr r3, [r3, #4] 80226d6: f003 0303 and.w r3, r3, #3 80226da: 2b01 cmp r3, #1 80226dc: d005 beq.n 80226ea (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80226de: 683b ldr r3, [r7, #0] 80226e0: 685b ldr r3, [r3, #4] 80226e2: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ 80226e6: 2b02 cmp r3, #2 80226e8: d130 bne.n 802274c { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 80226ea: 687b ldr r3, [r7, #4] 80226ec: 689b ldr r3, [r3, #8] 80226ee: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); 80226f0: 69fb ldr r3, [r7, #28] 80226f2: 005b lsls r3, r3, #1 80226f4: 2203 movs r2, #3 80226f6: fa02 f303 lsl.w r3, r2, r3 80226fa: 43db mvns r3, r3 80226fc: 69ba ldr r2, [r7, #24] 80226fe: 4013 ands r3, r2 8022700: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); 8022702: 683b ldr r3, [r7, #0] 8022704: 68da ldr r2, [r3, #12] 8022706: 69fb ldr r3, [r7, #28] 8022708: 005b lsls r3, r3, #1 802270a: fa02 f303 lsl.w r3, r2, r3 802270e: 69ba ldr r2, [r7, #24] 8022710: 4313 orrs r3, r2 8022712: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; 8022714: 687b ldr r3, [r7, #4] 8022716: 69ba ldr r2, [r7, #24] 8022718: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 802271a: 687b ldr r3, [r7, #4] 802271c: 685b ldr r3, [r3, #4] 802271e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; 8022720: 2201 movs r2, #1 8022722: 69fb ldr r3, [r7, #28] 8022724: fa02 f303 lsl.w r3, r2, r3 8022728: 43db mvns r3, r3 802272a: 69ba ldr r2, [r7, #24] 802272c: 4013 ands r3, r2 802272e: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8022730: 683b ldr r3, [r7, #0] 8022732: 685b ldr r3, [r3, #4] 8022734: 091b lsrs r3, r3, #4 8022736: f003 0201 and.w r2, r3, #1 802273a: 69fb ldr r3, [r7, #28] 802273c: fa02 f303 lsl.w r3, r2, r3 8022740: 69ba ldr r2, [r7, #24] 8022742: 4313 orrs r3, r2 8022744: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; 8022746: 687b ldr r3, [r7, #4] 8022748: 69ba ldr r2, [r7, #24] 802274a: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 802274c: 683b ldr r3, [r7, #0] 802274e: 685b ldr r3, [r3, #4] 8022750: f003 0303 and.w r3, r3, #3 8022754: 2b03 cmp r3, #3 8022756: d017 beq.n 8022788 { /* Check the parameters */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; 8022758: 687b ldr r3, [r7, #4] 802275a: 68db ldr r3, [r3, #12] 802275c: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); 802275e: 69fb ldr r3, [r7, #28] 8022760: 005b lsls r3, r3, #1 8022762: 2203 movs r2, #3 8022764: fa02 f303 lsl.w r3, r2, r3 8022768: 43db mvns r3, r3 802276a: 69ba ldr r2, [r7, #24] 802276c: 4013 ands r3, r2 802276e: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); 8022770: 683b ldr r3, [r7, #0] 8022772: 689a ldr r2, [r3, #8] 8022774: 69fb ldr r3, [r7, #28] 8022776: 005b lsls r3, r3, #1 8022778: fa02 f303 lsl.w r3, r2, r3 802277c: 69ba ldr r2, [r7, #24] 802277e: 4313 orrs r3, r2 8022780: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; 8022782: 687b ldr r3, [r7, #4] 8022784: 69ba ldr r2, [r7, #24] 8022786: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 8022788: 683b ldr r3, [r7, #0] 802278a: 685b ldr r3, [r3, #4] 802278c: f003 0303 and.w r3, r3, #3 8022790: 2b02 cmp r3, #2 8022792: d123 bne.n 80227dc { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; 8022794: 69fb ldr r3, [r7, #28] 8022796: 08da lsrs r2, r3, #3 8022798: 687b ldr r3, [r7, #4] 802279a: 3208 adds r2, #8 802279c: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80227a0: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; 80227a2: 69fb ldr r3, [r7, #28] 80227a4: f003 0307 and.w r3, r3, #7 80227a8: 009b lsls r3, r3, #2 80227aa: 220f movs r2, #15 80227ac: fa02 f303 lsl.w r3, r2, r3 80227b0: 43db mvns r3, r3 80227b2: 69ba ldr r2, [r7, #24] 80227b4: 4013 ands r3, r2 80227b6: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); 80227b8: 683b ldr r3, [r7, #0] 80227ba: 691a ldr r2, [r3, #16] 80227bc: 69fb ldr r3, [r7, #28] 80227be: f003 0307 and.w r3, r3, #7 80227c2: 009b lsls r3, r3, #2 80227c4: fa02 f303 lsl.w r3, r2, r3 80227c8: 69ba ldr r2, [r7, #24] 80227ca: 4313 orrs r3, r2 80227cc: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; 80227ce: 69fb ldr r3, [r7, #28] 80227d0: 08da lsrs r2, r3, #3 80227d2: 687b ldr r3, [r7, #4] 80227d4: 3208 adds r2, #8 80227d6: 69b9 ldr r1, [r7, #24] 80227d8: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 80227dc: 687b ldr r3, [r7, #4] 80227de: 681b ldr r3, [r3, #0] 80227e0: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); 80227e2: 69fb ldr r3, [r7, #28] 80227e4: 005b lsls r3, r3, #1 80227e6: 2203 movs r2, #3 80227e8: fa02 f303 lsl.w r3, r2, r3 80227ec: 43db mvns r3, r3 80227ee: 69ba ldr r2, [r7, #24] 80227f0: 4013 ands r3, r2 80227f2: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); 80227f4: 683b ldr r3, [r7, #0] 80227f6: 685b ldr r3, [r3, #4] 80227f8: f003 0203 and.w r2, r3, #3 80227fc: 69fb ldr r3, [r7, #28] 80227fe: 005b lsls r3, r3, #1 8022800: fa02 f303 lsl.w r3, r2, r3 8022804: 69ba ldr r2, [r7, #24] 8022806: 4313 orrs r3, r2 8022808: 61bb str r3, [r7, #24] GPIOx->MODER = temp; 802280a: 687b ldr r3, [r7, #4] 802280c: 69ba ldr r2, [r7, #24] 802280e: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) 8022810: 683b ldr r3, [r7, #0] 8022812: 685b ldr r3, [r3, #4] 8022814: f403 3340 and.w r3, r3, #196608 @ 0x30000 8022818: 2b00 cmp r3, #0 802281a: f000 80ae beq.w 802297a { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 802281e: 2300 movs r3, #0 8022820: 60fb str r3, [r7, #12] 8022822: 4b5d ldr r3, [pc, #372] @ (8022998 ) 8022824: 6c5b ldr r3, [r3, #68] @ 0x44 8022826: 4a5c ldr r2, [pc, #368] @ (8022998 ) 8022828: f443 4380 orr.w r3, r3, #16384 @ 0x4000 802282c: 6453 str r3, [r2, #68] @ 0x44 802282e: 4b5a ldr r3, [pc, #360] @ (8022998 ) 8022830: 6c5b ldr r3, [r3, #68] @ 0x44 8022832: f403 4380 and.w r3, r3, #16384 @ 0x4000 8022836: 60fb str r3, [r7, #12] 8022838: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; 802283a: 4a58 ldr r2, [pc, #352] @ (802299c ) 802283c: 69fb ldr r3, [r7, #28] 802283e: 089b lsrs r3, r3, #2 8022840: 3302 adds r3, #2 8022842: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8022846: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); 8022848: 69fb ldr r3, [r7, #28] 802284a: f003 0303 and.w r3, r3, #3 802284e: 009b lsls r3, r3, #2 8022850: 220f movs r2, #15 8022852: fa02 f303 lsl.w r3, r2, r3 8022856: 43db mvns r3, r3 8022858: 69ba ldr r2, [r7, #24] 802285a: 4013 ands r3, r2 802285c: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 802285e: 687b ldr r3, [r7, #4] 8022860: 4a4f ldr r2, [pc, #316] @ (80229a0 ) 8022862: 4293 cmp r3, r2 8022864: d025 beq.n 80228b2 8022866: 687b ldr r3, [r7, #4] 8022868: 4a4e ldr r2, [pc, #312] @ (80229a4 ) 802286a: 4293 cmp r3, r2 802286c: d01f beq.n 80228ae 802286e: 687b ldr r3, [r7, #4] 8022870: 4a4d ldr r2, [pc, #308] @ (80229a8 ) 8022872: 4293 cmp r3, r2 8022874: d019 beq.n 80228aa 8022876: 687b ldr r3, [r7, #4] 8022878: 4a4c ldr r2, [pc, #304] @ (80229ac ) 802287a: 4293 cmp r3, r2 802287c: d013 beq.n 80228a6 802287e: 687b ldr r3, [r7, #4] 8022880: 4a4b ldr r2, [pc, #300] @ (80229b0 ) 8022882: 4293 cmp r3, r2 8022884: d00d beq.n 80228a2 8022886: 687b ldr r3, [r7, #4] 8022888: 4a4a ldr r2, [pc, #296] @ (80229b4 ) 802288a: 4293 cmp r3, r2 802288c: d007 beq.n 802289e 802288e: 687b ldr r3, [r7, #4] 8022890: 4a49 ldr r2, [pc, #292] @ (80229b8 ) 8022892: 4293 cmp r3, r2 8022894: d101 bne.n 802289a 8022896: 2306 movs r3, #6 8022898: e00c b.n 80228b4 802289a: 2307 movs r3, #7 802289c: e00a b.n 80228b4 802289e: 2305 movs r3, #5 80228a0: e008 b.n 80228b4 80228a2: 2304 movs r3, #4 80228a4: e006 b.n 80228b4 80228a6: 2303 movs r3, #3 80228a8: e004 b.n 80228b4 80228aa: 2302 movs r3, #2 80228ac: e002 b.n 80228b4 80228ae: 2301 movs r3, #1 80228b0: e000 b.n 80228b4 80228b2: 2300 movs r3, #0 80228b4: 69fa ldr r2, [r7, #28] 80228b6: f002 0203 and.w r2, r2, #3 80228ba: 0092 lsls r2, r2, #2 80228bc: 4093 lsls r3, r2 80228be: 69ba ldr r2, [r7, #24] 80228c0: 4313 orrs r3, r2 80228c2: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; 80228c4: 4935 ldr r1, [pc, #212] @ (802299c ) 80228c6: 69fb ldr r3, [r7, #28] 80228c8: 089b lsrs r3, r3, #2 80228ca: 3302 adds r3, #2 80228cc: 69ba ldr r2, [r7, #24] 80228ce: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; 80228d2: 4b3a ldr r3, [pc, #232] @ (80229bc ) 80228d4: 689b ldr r3, [r3, #8] 80228d6: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 80228d8: 693b ldr r3, [r7, #16] 80228da: 43db mvns r3, r3 80228dc: 69ba ldr r2, [r7, #24] 80228de: 4013 ands r3, r2 80228e0: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) 80228e2: 683b ldr r3, [r7, #0] 80228e4: 685b ldr r3, [r3, #4] 80228e6: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80228ea: 2b00 cmp r3, #0 80228ec: d003 beq.n 80228f6 { temp |= iocurrent; 80228ee: 69ba ldr r2, [r7, #24] 80228f0: 693b ldr r3, [r7, #16] 80228f2: 4313 orrs r3, r2 80228f4: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; 80228f6: 4a31 ldr r2, [pc, #196] @ (80229bc ) 80228f8: 69bb ldr r3, [r7, #24] 80228fa: 6093 str r3, [r2, #8] temp = EXTI->FTSR; 80228fc: 4b2f ldr r3, [pc, #188] @ (80229bc ) 80228fe: 68db ldr r3, [r3, #12] 8022900: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8022902: 693b ldr r3, [r7, #16] 8022904: 43db mvns r3, r3 8022906: 69ba ldr r2, [r7, #24] 8022908: 4013 ands r3, r2 802290a: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) 802290c: 683b ldr r3, [r7, #0] 802290e: 685b ldr r3, [r3, #4] 8022910: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8022914: 2b00 cmp r3, #0 8022916: d003 beq.n 8022920 { temp |= iocurrent; 8022918: 69ba ldr r2, [r7, #24] 802291a: 693b ldr r3, [r7, #16] 802291c: 4313 orrs r3, r2 802291e: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; 8022920: 4a26 ldr r2, [pc, #152] @ (80229bc ) 8022922: 69bb ldr r3, [r7, #24] 8022924: 60d3 str r3, [r2, #12] temp = EXTI->EMR; 8022926: 4b25 ldr r3, [pc, #148] @ (80229bc ) 8022928: 685b ldr r3, [r3, #4] 802292a: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 802292c: 693b ldr r3, [r7, #16] 802292e: 43db mvns r3, r3 8022930: 69ba ldr r2, [r7, #24] 8022932: 4013 ands r3, r2 8022934: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) 8022936: 683b ldr r3, [r7, #0] 8022938: 685b ldr r3, [r3, #4] 802293a: f403 3300 and.w r3, r3, #131072 @ 0x20000 802293e: 2b00 cmp r3, #0 8022940: d003 beq.n 802294a { temp |= iocurrent; 8022942: 69ba ldr r2, [r7, #24] 8022944: 693b ldr r3, [r7, #16] 8022946: 4313 orrs r3, r2 8022948: 61bb str r3, [r7, #24] } EXTI->EMR = temp; 802294a: 4a1c ldr r2, [pc, #112] @ (80229bc ) 802294c: 69bb ldr r3, [r7, #24] 802294e: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; 8022950: 4b1a ldr r3, [pc, #104] @ (80229bc ) 8022952: 681b ldr r3, [r3, #0] 8022954: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8022956: 693b ldr r3, [r7, #16] 8022958: 43db mvns r3, r3 802295a: 69ba ldr r2, [r7, #24] 802295c: 4013 ands r3, r2 802295e: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_IT) != 0x00U) 8022960: 683b ldr r3, [r7, #0] 8022962: 685b ldr r3, [r3, #4] 8022964: f403 3380 and.w r3, r3, #65536 @ 0x10000 8022968: 2b00 cmp r3, #0 802296a: d003 beq.n 8022974 { temp |= iocurrent; 802296c: 69ba ldr r2, [r7, #24] 802296e: 693b ldr r3, [r7, #16] 8022970: 4313 orrs r3, r2 8022972: 61bb str r3, [r7, #24] } EXTI->IMR = temp; 8022974: 4a11 ldr r2, [pc, #68] @ (80229bc ) 8022976: 69bb ldr r3, [r7, #24] 8022978: 6013 str r3, [r2, #0] for(position = 0U; position < GPIO_NUMBER; position++) 802297a: 69fb ldr r3, [r7, #28] 802297c: 3301 adds r3, #1 802297e: 61fb str r3, [r7, #28] 8022980: 69fb ldr r3, [r7, #28] 8022982: 2b0f cmp r3, #15 8022984: f67f ae96 bls.w 80226b4 } } } } 8022988: bf00 nop 802298a: bf00 nop 802298c: 3724 adds r7, #36 @ 0x24 802298e: 46bd mov sp, r7 8022990: f85d 7b04 ldr.w r7, [sp], #4 8022994: 4770 bx lr 8022996: bf00 nop 8022998: 40023800 .word 0x40023800 802299c: 40013800 .word 0x40013800 80229a0: 40020000 .word 0x40020000 80229a4: 40020400 .word 0x40020400 80229a8: 40020800 .word 0x40020800 80229ac: 40020c00 .word 0x40020c00 80229b0: 40021000 .word 0x40021000 80229b4: 40021400 .word 0x40021400 80229b8: 40021800 .word 0x40021800 80229bc: 40013c00 .word 0x40013c00 080229c0 : * @param GPIO_Pin specifies the port bit to be written. * This parameter can be one of GPIO_PIN_x where x can be (0..15). * @retval None */ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { 80229c0: b480 push {r7} 80229c2: b087 sub sp, #28 80229c4: af00 add r7, sp, #0 80229c6: 6078 str r0, [r7, #4] 80229c8: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; 80229ca: 2300 movs r3, #0 80229cc: 613b str r3, [r7, #16] uint32_t iocurrent = 0x00U; 80229ce: 2300 movs r3, #0 80229d0: 60fb str r3, [r7, #12] uint32_t tmp = 0x00U; 80229d2: 2300 movs r3, #0 80229d4: 60bb str r3, [r7, #8] /* Check the parameters */ assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) 80229d6: 2300 movs r3, #0 80229d8: 617b str r3, [r7, #20] 80229da: e0c7 b.n 8022b6c { /* Get the IO position */ ioposition = 0x01U << position; 80229dc: 2201 movs r2, #1 80229de: 697b ldr r3, [r7, #20] 80229e0: fa02 f303 lsl.w r3, r2, r3 80229e4: 613b str r3, [r7, #16] /* Get the current IO position */ iocurrent = (GPIO_Pin) & ioposition; 80229e6: 683a ldr r2, [r7, #0] 80229e8: 693b ldr r3, [r7, #16] 80229ea: 4013 ands r3, r2 80229ec: 60fb str r3, [r7, #12] if(iocurrent == ioposition) 80229ee: 68fa ldr r2, [r7, #12] 80229f0: 693b ldr r3, [r7, #16] 80229f2: 429a cmp r2, r3 80229f4: f040 80b7 bne.w 8022b66 { /*------------------------- EXTI Mode Configuration --------------------*/ tmp = SYSCFG->EXTICR[position >> 2U]; 80229f8: 4a62 ldr r2, [pc, #392] @ (8022b84 ) 80229fa: 697b ldr r3, [r7, #20] 80229fc: 089b lsrs r3, r3, #2 80229fe: 3302 adds r3, #2 8022a00: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8022a04: 60bb str r3, [r7, #8] tmp &= (0x0FU << (4U * (position & 0x03U))); 8022a06: 697b ldr r3, [r7, #20] 8022a08: f003 0303 and.w r3, r3, #3 8022a0c: 009b lsls r3, r3, #2 8022a0e: 220f movs r2, #15 8022a10: fa02 f303 lsl.w r3, r2, r3 8022a14: 68ba ldr r2, [r7, #8] 8022a16: 4013 ands r3, r2 8022a18: 60bb str r3, [r7, #8] if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)))) 8022a1a: 687b ldr r3, [r7, #4] 8022a1c: 4a5a ldr r2, [pc, #360] @ (8022b88 ) 8022a1e: 4293 cmp r3, r2 8022a20: d025 beq.n 8022a6e 8022a22: 687b ldr r3, [r7, #4] 8022a24: 4a59 ldr r2, [pc, #356] @ (8022b8c ) 8022a26: 4293 cmp r3, r2 8022a28: d01f beq.n 8022a6a 8022a2a: 687b ldr r3, [r7, #4] 8022a2c: 4a58 ldr r2, [pc, #352] @ (8022b90 ) 8022a2e: 4293 cmp r3, r2 8022a30: d019 beq.n 8022a66 8022a32: 687b ldr r3, [r7, #4] 8022a34: 4a57 ldr r2, [pc, #348] @ (8022b94 ) 8022a36: 4293 cmp r3, r2 8022a38: d013 beq.n 8022a62 8022a3a: 687b ldr r3, [r7, #4] 8022a3c: 4a56 ldr r2, [pc, #344] @ (8022b98 ) 8022a3e: 4293 cmp r3, r2 8022a40: d00d beq.n 8022a5e 8022a42: 687b ldr r3, [r7, #4] 8022a44: 4a55 ldr r2, [pc, #340] @ (8022b9c ) 8022a46: 4293 cmp r3, r2 8022a48: d007 beq.n 8022a5a 8022a4a: 687b ldr r3, [r7, #4] 8022a4c: 4a54 ldr r2, [pc, #336] @ (8022ba0 ) 8022a4e: 4293 cmp r3, r2 8022a50: d101 bne.n 8022a56 8022a52: 2306 movs r3, #6 8022a54: e00c b.n 8022a70 8022a56: 2307 movs r3, #7 8022a58: e00a b.n 8022a70 8022a5a: 2305 movs r3, #5 8022a5c: e008 b.n 8022a70 8022a5e: 2304 movs r3, #4 8022a60: e006 b.n 8022a70 8022a62: 2303 movs r3, #3 8022a64: e004 b.n 8022a70 8022a66: 2302 movs r3, #2 8022a68: e002 b.n 8022a70 8022a6a: 2301 movs r3, #1 8022a6c: e000 b.n 8022a70 8022a6e: 2300 movs r3, #0 8022a70: 697a ldr r2, [r7, #20] 8022a72: f002 0203 and.w r2, r2, #3 8022a76: 0092 lsls r2, r2, #2 8022a78: 4093 lsls r3, r2 8022a7a: 68ba ldr r2, [r7, #8] 8022a7c: 429a cmp r2, r3 8022a7e: d132 bne.n 8022ae6 { /* Clear EXTI line configuration */ EXTI->IMR &= ~((uint32_t)iocurrent); 8022a80: 4b48 ldr r3, [pc, #288] @ (8022ba4 ) 8022a82: 681a ldr r2, [r3, #0] 8022a84: 68fb ldr r3, [r7, #12] 8022a86: 43db mvns r3, r3 8022a88: 4946 ldr r1, [pc, #280] @ (8022ba4 ) 8022a8a: 4013 ands r3, r2 8022a8c: 600b str r3, [r1, #0] EXTI->EMR &= ~((uint32_t)iocurrent); 8022a8e: 4b45 ldr r3, [pc, #276] @ (8022ba4 ) 8022a90: 685a ldr r2, [r3, #4] 8022a92: 68fb ldr r3, [r7, #12] 8022a94: 43db mvns r3, r3 8022a96: 4943 ldr r1, [pc, #268] @ (8022ba4 ) 8022a98: 4013 ands r3, r2 8022a9a: 604b str r3, [r1, #4] /* Clear Rising Falling edge configuration */ EXTI->FTSR &= ~((uint32_t)iocurrent); 8022a9c: 4b41 ldr r3, [pc, #260] @ (8022ba4 ) 8022a9e: 68da ldr r2, [r3, #12] 8022aa0: 68fb ldr r3, [r7, #12] 8022aa2: 43db mvns r3, r3 8022aa4: 493f ldr r1, [pc, #252] @ (8022ba4 ) 8022aa6: 4013 ands r3, r2 8022aa8: 60cb str r3, [r1, #12] EXTI->RTSR &= ~((uint32_t)iocurrent); 8022aaa: 4b3e ldr r3, [pc, #248] @ (8022ba4 ) 8022aac: 689a ldr r2, [r3, #8] 8022aae: 68fb ldr r3, [r7, #12] 8022ab0: 43db mvns r3, r3 8022ab2: 493c ldr r1, [pc, #240] @ (8022ba4 ) 8022ab4: 4013 ands r3, r2 8022ab6: 608b str r3, [r1, #8] /* Configure the External Interrupt or event for the current IO */ tmp = 0x0FU << (4U * (position & 0x03U)); 8022ab8: 697b ldr r3, [r7, #20] 8022aba: f003 0303 and.w r3, r3, #3 8022abe: 009b lsls r3, r3, #2 8022ac0: 220f movs r2, #15 8022ac2: fa02 f303 lsl.w r3, r2, r3 8022ac6: 60bb str r3, [r7, #8] SYSCFG->EXTICR[position >> 2U] &= ~tmp; 8022ac8: 4a2e ldr r2, [pc, #184] @ (8022b84 ) 8022aca: 697b ldr r3, [r7, #20] 8022acc: 089b lsrs r3, r3, #2 8022ace: 3302 adds r3, #2 8022ad0: f852 1023 ldr.w r1, [r2, r3, lsl #2] 8022ad4: 68bb ldr r3, [r7, #8] 8022ad6: 43da mvns r2, r3 8022ad8: 482a ldr r0, [pc, #168] @ (8022b84 ) 8022ada: 697b ldr r3, [r7, #20] 8022adc: 089b lsrs r3, r3, #2 8022ade: 400a ands r2, r1 8022ae0: 3302 adds r3, #2 8022ae2: f840 2023 str.w r2, [r0, r3, lsl #2] } /*------------------------- GPIO Mode Configuration --------------------*/ /* Configure IO Direction in Input Floating Mode */ GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U)); 8022ae6: 687b ldr r3, [r7, #4] 8022ae8: 681a ldr r2, [r3, #0] 8022aea: 697b ldr r3, [r7, #20] 8022aec: 005b lsls r3, r3, #1 8022aee: 2103 movs r1, #3 8022af0: fa01 f303 lsl.w r3, r1, r3 8022af4: 43db mvns r3, r3 8022af6: 401a ands r2, r3 8022af8: 687b ldr r3, [r7, #4] 8022afa: 601a str r2, [r3, #0] /* Configure the default Alternate Function in current IO */ GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; 8022afc: 697b ldr r3, [r7, #20] 8022afe: 08da lsrs r2, r3, #3 8022b00: 687b ldr r3, [r7, #4] 8022b02: 3208 adds r2, #8 8022b04: f853 1022 ldr.w r1, [r3, r2, lsl #2] 8022b08: 697b ldr r3, [r7, #20] 8022b0a: f003 0307 and.w r3, r3, #7 8022b0e: 009b lsls r3, r3, #2 8022b10: 220f movs r2, #15 8022b12: fa02 f303 lsl.w r3, r2, r3 8022b16: 43db mvns r3, r3 8022b18: 697a ldr r2, [r7, #20] 8022b1a: 08d2 lsrs r2, r2, #3 8022b1c: 4019 ands r1, r3 8022b1e: 687b ldr r3, [r7, #4] 8022b20: 3208 adds r2, #8 8022b22: f843 1022 str.w r1, [r3, r2, lsl #2] /* Deactivate the Pull-up and Pull-down resistor for the current IO */ GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); 8022b26: 687b ldr r3, [r7, #4] 8022b28: 68da ldr r2, [r3, #12] 8022b2a: 697b ldr r3, [r7, #20] 8022b2c: 005b lsls r3, r3, #1 8022b2e: 2103 movs r1, #3 8022b30: fa01 f303 lsl.w r3, r1, r3 8022b34: 43db mvns r3, r3 8022b36: 401a ands r2, r3 8022b38: 687b ldr r3, [r7, #4] 8022b3a: 60da str r2, [r3, #12] /* Configure the default value IO Output Type */ GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; 8022b3c: 687b ldr r3, [r7, #4] 8022b3e: 685a ldr r2, [r3, #4] 8022b40: 2101 movs r1, #1 8022b42: 697b ldr r3, [r7, #20] 8022b44: fa01 f303 lsl.w r3, r1, r3 8022b48: 43db mvns r3, r3 8022b4a: 401a ands r2, r3 8022b4c: 687b ldr r3, [r7, #4] 8022b4e: 605a str r2, [r3, #4] /* Configure the default value for IO Speed */ GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); 8022b50: 687b ldr r3, [r7, #4] 8022b52: 689a ldr r2, [r3, #8] 8022b54: 697b ldr r3, [r7, #20] 8022b56: 005b lsls r3, r3, #1 8022b58: 2103 movs r1, #3 8022b5a: fa01 f303 lsl.w r3, r1, r3 8022b5e: 43db mvns r3, r3 8022b60: 401a ands r2, r3 8022b62: 687b ldr r3, [r7, #4] 8022b64: 609a str r2, [r3, #8] for(position = 0U; position < GPIO_NUMBER; position++) 8022b66: 697b ldr r3, [r7, #20] 8022b68: 3301 adds r3, #1 8022b6a: 617b str r3, [r7, #20] 8022b6c: 697b ldr r3, [r7, #20] 8022b6e: 2b0f cmp r3, #15 8022b70: f67f af34 bls.w 80229dc } } } 8022b74: bf00 nop 8022b76: bf00 nop 8022b78: 371c adds r7, #28 8022b7a: 46bd mov sp, r7 8022b7c: f85d 7b04 ldr.w r7, [sp], #4 8022b80: 4770 bx lr 8022b82: bf00 nop 8022b84: 40013800 .word 0x40013800 8022b88: 40020000 .word 0x40020000 8022b8c: 40020400 .word 0x40020400 8022b90: 40020800 .word 0x40020800 8022b94: 40020c00 .word 0x40020c00 8022b98: 40021000 .word 0x40021000 8022b9c: 40021400 .word 0x40021400 8022ba0: 40021800 .word 0x40021800 8022ba4: 40013c00 .word 0x40013c00 08022ba8 : * @param GPIO_Pin specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { 8022ba8: b480 push {r7} 8022baa: b085 sub sp, #20 8022bac: af00 add r7, sp, #0 8022bae: 6078 str r0, [r7, #4] 8022bb0: 460b mov r3, r1 8022bb2: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8022bb4: 687b ldr r3, [r7, #4] 8022bb6: 691a ldr r2, [r3, #16] 8022bb8: 887b ldrh r3, [r7, #2] 8022bba: 4013 ands r3, r2 8022bbc: 2b00 cmp r3, #0 8022bbe: d002 beq.n 8022bc6 { bitstatus = GPIO_PIN_SET; 8022bc0: 2301 movs r3, #1 8022bc2: 73fb strb r3, [r7, #15] 8022bc4: e001 b.n 8022bca } else { bitstatus = GPIO_PIN_RESET; 8022bc6: 2300 movs r3, #0 8022bc8: 73fb strb r3, [r7, #15] } return bitstatus; 8022bca: 7bfb ldrb r3, [r7, #15] } 8022bcc: 4618 mov r0, r3 8022bce: 3714 adds r7, #20 8022bd0: 46bd mov sp, r7 8022bd2: f85d 7b04 ldr.w r7, [sp], #4 8022bd6: 4770 bx lr 08022bd8 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8022bd8: b480 push {r7} 8022bda: b083 sub sp, #12 8022bdc: af00 add r7, sp, #0 8022bde: 6078 str r0, [r7, #4] 8022be0: 460b mov r3, r1 8022be2: 807b strh r3, [r7, #2] 8022be4: 4613 mov r3, r2 8022be6: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 8022be8: 787b ldrb r3, [r7, #1] 8022bea: 2b00 cmp r3, #0 8022bec: d003 beq.n 8022bf6 { GPIOx->BSRR = GPIO_Pin; 8022bee: 887a ldrh r2, [r7, #2] 8022bf0: 687b ldr r3, [r7, #4] 8022bf2: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } 8022bf4: e003 b.n 8022bfe GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8022bf6: 887b ldrh r3, [r7, #2] 8022bf8: 041a lsls r2, r3, #16 8022bfa: 687b ldr r3, [r7, #4] 8022bfc: 619a str r2, [r3, #24] } 8022bfe: bf00 nop 8022c00: 370c adds r7, #12 8022c02: 46bd mov sp, r7 8022c04: f85d 7b04 ldr.w r7, [sp], #4 8022c08: 4770 bx lr 08022c0a : * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices. * @param GPIO_Pin Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { 8022c0a: b480 push {r7} 8022c0c: b085 sub sp, #20 8022c0e: af00 add r7, sp, #0 8022c10: 6078 str r0, [r7, #4] 8022c12: 460b mov r3, r1 8022c14: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; 8022c16: 687b ldr r3, [r7, #4] 8022c18: 695b ldr r3, [r3, #20] 8022c1a: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); 8022c1c: 887a ldrh r2, [r7, #2] 8022c1e: 68fb ldr r3, [r7, #12] 8022c20: 4013 ands r3, r2 8022c22: 041a lsls r2, r3, #16 8022c24: 68fb ldr r3, [r7, #12] 8022c26: 43d9 mvns r1, r3 8022c28: 887b ldrh r3, [r7, #2] 8022c2a: 400b ands r3, r1 8022c2c: 431a orrs r2, r3 8022c2e: 687b ldr r3, [r7, #4] 8022c30: 619a str r2, [r3, #24] } 8022c32: bf00 nop 8022c34: 3714 adds r7, #20 8022c36: 46bd mov sp, r7 8022c38: f85d 7b04 ldr.w r7, [sp], #4 8022c3c: 4770 bx lr ... 08022c40 : * @brief This function handles EXTI interrupt request. * @param GPIO_Pin Specifies the pins connected EXTI line * @retval None */ void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) { 8022c40: b580 push {r7, lr} 8022c42: b082 sub sp, #8 8022c44: af00 add r7, sp, #0 8022c46: 4603 mov r3, r0 8022c48: 80fb strh r3, [r7, #6] /* EXTI line interrupt detected */ if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) 8022c4a: 4b08 ldr r3, [pc, #32] @ (8022c6c ) 8022c4c: 695a ldr r2, [r3, #20] 8022c4e: 88fb ldrh r3, [r7, #6] 8022c50: 4013 ands r3, r2 8022c52: 2b00 cmp r3, #0 8022c54: d006 beq.n 8022c64 { __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); 8022c56: 4a05 ldr r2, [pc, #20] @ (8022c6c ) 8022c58: 88fb ldrh r3, [r7, #6] 8022c5a: 6153 str r3, [r2, #20] HAL_GPIO_EXTI_Callback(GPIO_Pin); 8022c5c: 88fb ldrh r3, [r7, #6] 8022c5e: 4618 mov r0, r3 8022c60: f7f6 f8ec bl 8018e3c } } 8022c64: bf00 nop 8022c66: 3708 adds r7, #8 8022c68: 46bd mov sp, r7 8022c6a: bd80 pop {r7, pc} 8022c6c: 40013c00 .word 0x40013c00 08022c70 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8022c70: b580 push {r7, lr} 8022c72: b084 sub sp, #16 8022c74: af00 add r7, sp, #0 8022c76: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 8022c78: 687b ldr r3, [r7, #4] 8022c7a: 2b00 cmp r3, #0 8022c7c: d101 bne.n 8022c82 { return HAL_ERROR; 8022c7e: 2301 movs r3, #1 8022c80: e12b b.n 8022eda assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 8022c82: 687b ldr r3, [r7, #4] 8022c84: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8022c88: b2db uxtb r3, r3 8022c8a: 2b00 cmp r3, #0 8022c8c: d106 bne.n 8022c9c { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8022c8e: 687b ldr r3, [r7, #4] 8022c90: 2200 movs r2, #0 8022c92: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8022c96: 6878 ldr r0, [r7, #4] 8022c98: f7f6 f92c bl 8018ef4 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8022c9c: 687b ldr r3, [r7, #4] 8022c9e: 2224 movs r2, #36 @ 0x24 8022ca0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8022ca4: 687b ldr r3, [r7, #4] 8022ca6: 681b ldr r3, [r3, #0] 8022ca8: 681a ldr r2, [r3, #0] 8022caa: 687b ldr r3, [r7, #4] 8022cac: 681b ldr r3, [r3, #0] 8022cae: f022 0201 bic.w r2, r2, #1 8022cb2: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 8022cb4: 687b ldr r3, [r7, #4] 8022cb6: 681b ldr r3, [r3, #0] 8022cb8: 681a ldr r2, [r3, #0] 8022cba: 687b ldr r3, [r7, #4] 8022cbc: 681b ldr r3, [r3, #0] 8022cbe: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8022cc2: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 8022cc4: 687b ldr r3, [r7, #4] 8022cc6: 681b ldr r3, [r3, #0] 8022cc8: 681a ldr r2, [r3, #0] 8022cca: 687b ldr r3, [r7, #4] 8022ccc: 681b ldr r3, [r3, #0] 8022cce: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8022cd2: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8022cd4: f001 ff22 bl 8024b1c 8022cd8: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8022cda: 687b ldr r3, [r7, #4] 8022cdc: 685b ldr r3, [r3, #4] 8022cde: 4a81 ldr r2, [pc, #516] @ (8022ee4 ) 8022ce0: 4293 cmp r3, r2 8022ce2: d807 bhi.n 8022cf4 8022ce4: 68fb ldr r3, [r7, #12] 8022ce6: 4a80 ldr r2, [pc, #512] @ (8022ee8 ) 8022ce8: 4293 cmp r3, r2 8022cea: bf94 ite ls 8022cec: 2301 movls r3, #1 8022cee: 2300 movhi r3, #0 8022cf0: b2db uxtb r3, r3 8022cf2: e006 b.n 8022d02 8022cf4: 68fb ldr r3, [r7, #12] 8022cf6: 4a7d ldr r2, [pc, #500] @ (8022eec ) 8022cf8: 4293 cmp r3, r2 8022cfa: bf94 ite ls 8022cfc: 2301 movls r3, #1 8022cfe: 2300 movhi r3, #0 8022d00: b2db uxtb r3, r3 8022d02: 2b00 cmp r3, #0 8022d04: d001 beq.n 8022d0a { return HAL_ERROR; 8022d06: 2301 movs r3, #1 8022d08: e0e7 b.n 8022eda } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 8022d0a: 68fb ldr r3, [r7, #12] 8022d0c: 4a78 ldr r2, [pc, #480] @ (8022ef0 ) 8022d0e: fba2 2303 umull r2, r3, r2, r3 8022d12: 0c9b lsrs r3, r3, #18 8022d14: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 8022d16: 687b ldr r3, [r7, #4] 8022d18: 681b ldr r3, [r3, #0] 8022d1a: 685b ldr r3, [r3, #4] 8022d1c: f023 013f bic.w r1, r3, #63 @ 0x3f 8022d20: 687b ldr r3, [r7, #4] 8022d22: 681b ldr r3, [r3, #0] 8022d24: 68ba ldr r2, [r7, #8] 8022d26: 430a orrs r2, r1 8022d28: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 8022d2a: 687b ldr r3, [r7, #4] 8022d2c: 681b ldr r3, [r3, #0] 8022d2e: 6a1b ldr r3, [r3, #32] 8022d30: f023 013f bic.w r1, r3, #63 @ 0x3f 8022d34: 687b ldr r3, [r7, #4] 8022d36: 685b ldr r3, [r3, #4] 8022d38: 4a6a ldr r2, [pc, #424] @ (8022ee4 ) 8022d3a: 4293 cmp r3, r2 8022d3c: d802 bhi.n 8022d44 8022d3e: 68bb ldr r3, [r7, #8] 8022d40: 3301 adds r3, #1 8022d42: e009 b.n 8022d58 8022d44: 68bb ldr r3, [r7, #8] 8022d46: f44f 7296 mov.w r2, #300 @ 0x12c 8022d4a: fb02 f303 mul.w r3, r2, r3 8022d4e: 4a69 ldr r2, [pc, #420] @ (8022ef4 ) 8022d50: fba2 2303 umull r2, r3, r2, r3 8022d54: 099b lsrs r3, r3, #6 8022d56: 3301 adds r3, #1 8022d58: 687a ldr r2, [r7, #4] 8022d5a: 6812 ldr r2, [r2, #0] 8022d5c: 430b orrs r3, r1 8022d5e: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 8022d60: 687b ldr r3, [r7, #4] 8022d62: 681b ldr r3, [r3, #0] 8022d64: 69db ldr r3, [r3, #28] 8022d66: f423 424f bic.w r2, r3, #52992 @ 0xcf00 8022d6a: f022 02ff bic.w r2, r2, #255 @ 0xff 8022d6e: 687b ldr r3, [r7, #4] 8022d70: 685b ldr r3, [r3, #4] 8022d72: 495c ldr r1, [pc, #368] @ (8022ee4 ) 8022d74: 428b cmp r3, r1 8022d76: d819 bhi.n 8022dac 8022d78: 68fb ldr r3, [r7, #12] 8022d7a: 1e59 subs r1, r3, #1 8022d7c: 687b ldr r3, [r7, #4] 8022d7e: 685b ldr r3, [r3, #4] 8022d80: 005b lsls r3, r3, #1 8022d82: fbb1 f3f3 udiv r3, r1, r3 8022d86: 1c59 adds r1, r3, #1 8022d88: f640 73fc movw r3, #4092 @ 0xffc 8022d8c: 400b ands r3, r1 8022d8e: 2b00 cmp r3, #0 8022d90: d00a beq.n 8022da8 8022d92: 68fb ldr r3, [r7, #12] 8022d94: 1e59 subs r1, r3, #1 8022d96: 687b ldr r3, [r7, #4] 8022d98: 685b ldr r3, [r3, #4] 8022d9a: 005b lsls r3, r3, #1 8022d9c: fbb1 f3f3 udiv r3, r1, r3 8022da0: 3301 adds r3, #1 8022da2: f3c3 030b ubfx r3, r3, #0, #12 8022da6: e051 b.n 8022e4c 8022da8: 2304 movs r3, #4 8022daa: e04f b.n 8022e4c 8022dac: 687b ldr r3, [r7, #4] 8022dae: 689b ldr r3, [r3, #8] 8022db0: 2b00 cmp r3, #0 8022db2: d111 bne.n 8022dd8 8022db4: 68fb ldr r3, [r7, #12] 8022db6: 1e58 subs r0, r3, #1 8022db8: 687b ldr r3, [r7, #4] 8022dba: 6859 ldr r1, [r3, #4] 8022dbc: 460b mov r3, r1 8022dbe: 005b lsls r3, r3, #1 8022dc0: 440b add r3, r1 8022dc2: fbb0 f3f3 udiv r3, r0, r3 8022dc6: 3301 adds r3, #1 8022dc8: f3c3 030b ubfx r3, r3, #0, #12 8022dcc: 2b00 cmp r3, #0 8022dce: bf0c ite eq 8022dd0: 2301 moveq r3, #1 8022dd2: 2300 movne r3, #0 8022dd4: b2db uxtb r3, r3 8022dd6: e012 b.n 8022dfe 8022dd8: 68fb ldr r3, [r7, #12] 8022dda: 1e58 subs r0, r3, #1 8022ddc: 687b ldr r3, [r7, #4] 8022dde: 6859 ldr r1, [r3, #4] 8022de0: 460b mov r3, r1 8022de2: 009b lsls r3, r3, #2 8022de4: 440b add r3, r1 8022de6: 0099 lsls r1, r3, #2 8022de8: 440b add r3, r1 8022dea: fbb0 f3f3 udiv r3, r0, r3 8022dee: 3301 adds r3, #1 8022df0: f3c3 030b ubfx r3, r3, #0, #12 8022df4: 2b00 cmp r3, #0 8022df6: bf0c ite eq 8022df8: 2301 moveq r3, #1 8022dfa: 2300 movne r3, #0 8022dfc: b2db uxtb r3, r3 8022dfe: 2b00 cmp r3, #0 8022e00: d001 beq.n 8022e06 8022e02: 2301 movs r3, #1 8022e04: e022 b.n 8022e4c 8022e06: 687b ldr r3, [r7, #4] 8022e08: 689b ldr r3, [r3, #8] 8022e0a: 2b00 cmp r3, #0 8022e0c: d10e bne.n 8022e2c 8022e0e: 68fb ldr r3, [r7, #12] 8022e10: 1e58 subs r0, r3, #1 8022e12: 687b ldr r3, [r7, #4] 8022e14: 6859 ldr r1, [r3, #4] 8022e16: 460b mov r3, r1 8022e18: 005b lsls r3, r3, #1 8022e1a: 440b add r3, r1 8022e1c: fbb0 f3f3 udiv r3, r0, r3 8022e20: 3301 adds r3, #1 8022e22: f3c3 030b ubfx r3, r3, #0, #12 8022e26: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8022e2a: e00f b.n 8022e4c 8022e2c: 68fb ldr r3, [r7, #12] 8022e2e: 1e58 subs r0, r3, #1 8022e30: 687b ldr r3, [r7, #4] 8022e32: 6859 ldr r1, [r3, #4] 8022e34: 460b mov r3, r1 8022e36: 009b lsls r3, r3, #2 8022e38: 440b add r3, r1 8022e3a: 0099 lsls r1, r3, #2 8022e3c: 440b add r3, r1 8022e3e: fbb0 f3f3 udiv r3, r0, r3 8022e42: 3301 adds r3, #1 8022e44: f3c3 030b ubfx r3, r3, #0, #12 8022e48: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8022e4c: 6879 ldr r1, [r7, #4] 8022e4e: 6809 ldr r1, [r1, #0] 8022e50: 4313 orrs r3, r2 8022e52: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 8022e54: 687b ldr r3, [r7, #4] 8022e56: 681b ldr r3, [r3, #0] 8022e58: 681b ldr r3, [r3, #0] 8022e5a: f023 01c0 bic.w r1, r3, #192 @ 0xc0 8022e5e: 687b ldr r3, [r7, #4] 8022e60: 69da ldr r2, [r3, #28] 8022e62: 687b ldr r3, [r7, #4] 8022e64: 6a1b ldr r3, [r3, #32] 8022e66: 431a orrs r2, r3 8022e68: 687b ldr r3, [r7, #4] 8022e6a: 681b ldr r3, [r3, #0] 8022e6c: 430a orrs r2, r1 8022e6e: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 8022e70: 687b ldr r3, [r7, #4] 8022e72: 681b ldr r3, [r3, #0] 8022e74: 689b ldr r3, [r3, #8] 8022e76: f423 4303 bic.w r3, r3, #33536 @ 0x8300 8022e7a: f023 03ff bic.w r3, r3, #255 @ 0xff 8022e7e: 687a ldr r2, [r7, #4] 8022e80: 6911 ldr r1, [r2, #16] 8022e82: 687a ldr r2, [r7, #4] 8022e84: 68d2 ldr r2, [r2, #12] 8022e86: 4311 orrs r1, r2 8022e88: 687a ldr r2, [r7, #4] 8022e8a: 6812 ldr r2, [r2, #0] 8022e8c: 430b orrs r3, r1 8022e8e: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 8022e90: 687b ldr r3, [r7, #4] 8022e92: 681b ldr r3, [r3, #0] 8022e94: 68db ldr r3, [r3, #12] 8022e96: f023 01ff bic.w r1, r3, #255 @ 0xff 8022e9a: 687b ldr r3, [r7, #4] 8022e9c: 695a ldr r2, [r3, #20] 8022e9e: 687b ldr r3, [r7, #4] 8022ea0: 699b ldr r3, [r3, #24] 8022ea2: 431a orrs r2, r3 8022ea4: 687b ldr r3, [r7, #4] 8022ea6: 681b ldr r3, [r3, #0] 8022ea8: 430a orrs r2, r1 8022eaa: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8022eac: 687b ldr r3, [r7, #4] 8022eae: 681b ldr r3, [r3, #0] 8022eb0: 681a ldr r2, [r3, #0] 8022eb2: 687b ldr r3, [r7, #4] 8022eb4: 681b ldr r3, [r3, #0] 8022eb6: f042 0201 orr.w r2, r2, #1 8022eba: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8022ebc: 687b ldr r3, [r7, #4] 8022ebe: 2200 movs r2, #0 8022ec0: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; 8022ec2: 687b ldr r3, [r7, #4] 8022ec4: 2220 movs r2, #32 8022ec6: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8022eca: 687b ldr r3, [r7, #4] 8022ecc: 2200 movs r2, #0 8022ece: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8022ed0: 687b ldr r3, [r7, #4] 8022ed2: 2200 movs r2, #0 8022ed4: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; 8022ed8: 2300 movs r3, #0 } 8022eda: 4618 mov r0, r3 8022edc: 3710 adds r7, #16 8022ede: 46bd mov sp, r7 8022ee0: bd80 pop {r7, pc} 8022ee2: bf00 nop 8022ee4: 000186a0 .word 0x000186a0 8022ee8: 001e847f .word 0x001e847f 8022eec: 003d08ff .word 0x003d08ff 8022ef0: 431bde83 .word 0x431bde83 8022ef4: 10624dd3 .word 0x10624dd3 08022ef8 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) { 8022ef8: b580 push {r7, lr} 8022efa: b088 sub sp, #32 8022efc: af00 add r7, sp, #0 8022efe: 6078 str r0, [r7, #4] uint32_t sr1itflags; uint32_t sr2itflags = 0U; 8022f00: 2300 movs r3, #0 8022f02: 61bb str r3, [r7, #24] uint32_t itsources = READ_REG(hi2c->Instance->CR2); 8022f04: 687b ldr r3, [r7, #4] 8022f06: 681b ldr r3, [r3, #0] 8022f08: 685b ldr r3, [r3, #4] 8022f0a: 617b str r3, [r7, #20] uint32_t CurrentXferOptions = hi2c->XferOptions; 8022f0c: 687b ldr r3, [r7, #4] 8022f0e: 6adb ldr r3, [r3, #44] @ 0x2c 8022f10: 613b str r3, [r7, #16] HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode; 8022f12: 687b ldr r3, [r7, #4] 8022f14: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8022f18: 73fb strb r3, [r7, #15] HAL_I2C_StateTypeDef CurrentState = hi2c->State; 8022f1a: 687b ldr r3, [r7, #4] 8022f1c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8022f20: 73bb strb r3, [r7, #14] /* Master or Memory mode selected */ if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) 8022f22: 7bfb ldrb r3, [r7, #15] 8022f24: 2b10 cmp r3, #16 8022f26: d003 beq.n 8022f30 8022f28: 7bfb ldrb r3, [r7, #15] 8022f2a: 2b40 cmp r3, #64 @ 0x40 8022f2c: f040 80b1 bne.w 8023092 { sr2itflags = READ_REG(hi2c->Instance->SR2); 8022f30: 687b ldr r3, [r7, #4] 8022f32: 681b ldr r3, [r3, #0] 8022f34: 699b ldr r3, [r3, #24] 8022f36: 61bb str r3, [r7, #24] sr1itflags = READ_REG(hi2c->Instance->SR1); 8022f38: 687b ldr r3, [r7, #4] 8022f3a: 681b ldr r3, [r3, #0] 8022f3c: 695b ldr r3, [r3, #20] 8022f3e: 61fb str r3, [r7, #28] /* Exit IRQ event until Start Bit detected in case of Other frame requested */ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) == RESET) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(CurrentXferOptions) == 1U)) 8022f40: 69fb ldr r3, [r7, #28] 8022f42: f003 0301 and.w r3, r3, #1 8022f46: 2b00 cmp r3, #0 8022f48: d10d bne.n 8022f66 8022f4a: 693b ldr r3, [r7, #16] 8022f4c: f5b3 0f2a cmp.w r3, #11141120 @ 0xaa0000 8022f50: d003 beq.n 8022f5a 8022f52: 693b ldr r3, [r7, #16] 8022f54: f1b3 4f2a cmp.w r3, #2852126720 @ 0xaa000000 8022f58: d101 bne.n 8022f5e 8022f5a: 2301 movs r3, #1 8022f5c: e000 b.n 8022f60 8022f5e: 2300 movs r3, #0 8022f60: 2b01 cmp r3, #1 8022f62: f000 8114 beq.w 802318e { return; } /* SB Set ----------------------------------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8022f66: 69fb ldr r3, [r7, #28] 8022f68: f003 0301 and.w r3, r3, #1 8022f6c: 2b00 cmp r3, #0 8022f6e: d00b beq.n 8022f88 8022f70: 697b ldr r3, [r7, #20] 8022f72: f403 7300 and.w r3, r3, #512 @ 0x200 8022f76: 2b00 cmp r3, #0 8022f78: d006 beq.n 8022f88 { /* Convert OTHER_xxx XferOptions if any */ I2C_ConvertOtherXferOptions(hi2c); 8022f7a: 6878 ldr r0, [r7, #4] 8022f7c: f001 fc54 bl 8024828 I2C_Master_SB(hi2c); 8022f80: 6878 ldr r0, [r7, #4] 8022f82: f000 fd5e bl 8023a42 8022f86: e083 b.n 8023090 } /* ADD10 Set -------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADD10) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8022f88: 69fb ldr r3, [r7, #28] 8022f8a: f003 0308 and.w r3, r3, #8 8022f8e: 2b00 cmp r3, #0 8022f90: d008 beq.n 8022fa4 8022f92: 697b ldr r3, [r7, #20] 8022f94: f403 7300 and.w r3, r3, #512 @ 0x200 8022f98: 2b00 cmp r3, #0 8022f9a: d003 beq.n 8022fa4 { I2C_Master_ADD10(hi2c); 8022f9c: 6878 ldr r0, [r7, #4] 8022f9e: f000 fdd6 bl 8023b4e 8022fa2: e075 b.n 8023090 } /* ADDR Set --------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8022fa4: 69fb ldr r3, [r7, #28] 8022fa6: f003 0302 and.w r3, r3, #2 8022faa: 2b00 cmp r3, #0 8022fac: d008 beq.n 8022fc0 8022fae: 697b ldr r3, [r7, #20] 8022fb0: f403 7300 and.w r3, r3, #512 @ 0x200 8022fb4: 2b00 cmp r3, #0 8022fb6: d003 beq.n 8022fc0 { I2C_Master_ADDR(hi2c); 8022fb8: 6878 ldr r0, [r7, #4] 8022fba: f000 fdf2 bl 8023ba2 8022fbe: e067 b.n 8023090 } /* I2C in mode Transmitter -----------------------------------------------*/ else if (I2C_CHECK_FLAG(sr2itflags, I2C_FLAG_TRA) != RESET) 8022fc0: 69bb ldr r3, [r7, #24] 8022fc2: f003 0304 and.w r3, r3, #4 8022fc6: 2b00 cmp r3, #0 8022fc8: d036 beq.n 8023038 { /* Do not check buffer and BTF flag if a Xfer DMA is on going */ if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) 8022fca: 687b ldr r3, [r7, #4] 8022fcc: 681b ldr r3, [r3, #0] 8022fce: 685b ldr r3, [r3, #4] 8022fd0: f403 6300 and.w r3, r3, #2048 @ 0x800 8022fd4: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8022fd8: f000 80db beq.w 8023192 { /* TXE set and BTF reset -----------------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 8022fdc: 69fb ldr r3, [r7, #28] 8022fde: f003 0380 and.w r3, r3, #128 @ 0x80 8022fe2: 2b00 cmp r3, #0 8022fe4: d00d beq.n 8023002 8022fe6: 697b ldr r3, [r7, #20] 8022fe8: f403 6380 and.w r3, r3, #1024 @ 0x400 8022fec: 2b00 cmp r3, #0 8022fee: d008 beq.n 8023002 8022ff0: 69fb ldr r3, [r7, #28] 8022ff2: f003 0304 and.w r3, r3, #4 8022ff6: 2b00 cmp r3, #0 8022ff8: d103 bne.n 8023002 { I2C_MasterTransmit_TXE(hi2c); 8022ffa: 6878 ldr r0, [r7, #4] 8022ffc: f000 f9d6 bl 80233ac 8023000: e046 b.n 8023090 } /* BTF set -------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023002: 69fb ldr r3, [r7, #28] 8023004: f003 0304 and.w r3, r3, #4 8023008: 2b00 cmp r3, #0 802300a: f000 80c2 beq.w 8023192 802300e: 697b ldr r3, [r7, #20] 8023010: f403 7300 and.w r3, r3, #512 @ 0x200 8023014: 2b00 cmp r3, #0 8023016: f000 80bc beq.w 8023192 { if (CurrentState == HAL_I2C_STATE_BUSY_TX) 802301a: 7bbb ldrb r3, [r7, #14] 802301c: 2b21 cmp r3, #33 @ 0x21 802301e: d103 bne.n 8023028 { I2C_MasterTransmit_BTF(hi2c); 8023020: 6878 ldr r0, [r7, #4] 8023022: f000 fa5f bl 80234e4 if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023026: e0b4 b.n 8023192 } else /* HAL_I2C_MODE_MEM */ { if (CurrentMode == HAL_I2C_MODE_MEM) 8023028: 7bfb ldrb r3, [r7, #15] 802302a: 2b40 cmp r3, #64 @ 0x40 802302c: f040 80b1 bne.w 8023192 { I2C_MemoryTransmit_TXE_BTF(hi2c); 8023030: 6878 ldr r0, [r7, #4] 8023032: f000 facd bl 80235d0 if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023036: e0ac b.n 8023192 } /* I2C in mode Receiver --------------------------------------------------*/ else { /* Do not check buffer and BTF flag if a Xfer DMA is on going */ if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) 8023038: 687b ldr r3, [r7, #4] 802303a: 681b ldr r3, [r3, #0] 802303c: 685b ldr r3, [r3, #4] 802303e: f403 6300 and.w r3, r3, #2048 @ 0x800 8023042: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8023046: f000 80a4 beq.w 8023192 { /* RXNE set and BTF reset -----------------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 802304a: 69fb ldr r3, [r7, #28] 802304c: f003 0340 and.w r3, r3, #64 @ 0x40 8023050: 2b00 cmp r3, #0 8023052: d00d beq.n 8023070 8023054: 697b ldr r3, [r7, #20] 8023056: f403 6380 and.w r3, r3, #1024 @ 0x400 802305a: 2b00 cmp r3, #0 802305c: d008 beq.n 8023070 802305e: 69fb ldr r3, [r7, #28] 8023060: f003 0304 and.w r3, r3, #4 8023064: 2b00 cmp r3, #0 8023066: d103 bne.n 8023070 { I2C_MasterReceive_RXNE(hi2c); 8023068: 6878 ldr r0, [r7, #4] 802306a: f000 fb45 bl 80236f8 802306e: e00f b.n 8023090 } /* BTF set -------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023070: 69fb ldr r3, [r7, #28] 8023072: f003 0304 and.w r3, r3, #4 8023076: 2b00 cmp r3, #0 8023078: f000 808b beq.w 8023192 802307c: 697b ldr r3, [r7, #20] 802307e: f403 7300 and.w r3, r3, #512 @ 0x200 8023082: 2b00 cmp r3, #0 8023084: f000 8085 beq.w 8023192 { I2C_MasterReceive_BTF(hi2c); 8023088: 6878 ldr r0, [r7, #4] 802308a: f000 fbf0 bl 802386e if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 802308e: e080 b.n 8023192 8023090: e07f b.n 8023192 /* Slave mode selected */ else { /* If an error is detected, read only SR1 register to prevent */ /* a clear of ADDR flags by reading SR2 after reading SR1 in Error treatment */ if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 8023092: 687b ldr r3, [r7, #4] 8023094: 6c1b ldr r3, [r3, #64] @ 0x40 8023096: 2b00 cmp r3, #0 8023098: d004 beq.n 80230a4 { sr1itflags = READ_REG(hi2c->Instance->SR1); 802309a: 687b ldr r3, [r7, #4] 802309c: 681b ldr r3, [r3, #0] 802309e: 695b ldr r3, [r3, #20] 80230a0: 61fb str r3, [r7, #28] 80230a2: e007 b.n 80230b4 } else { sr2itflags = READ_REG(hi2c->Instance->SR2); 80230a4: 687b ldr r3, [r7, #4] 80230a6: 681b ldr r3, [r3, #0] 80230a8: 699b ldr r3, [r3, #24] 80230aa: 61bb str r3, [r7, #24] sr1itflags = READ_REG(hi2c->Instance->SR1); 80230ac: 687b ldr r3, [r7, #4] 80230ae: 681b ldr r3, [r3, #0] 80230b0: 695b ldr r3, [r3, #20] 80230b2: 61fb str r3, [r7, #28] } /* ADDR set --------------------------------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 80230b4: 69fb ldr r3, [r7, #28] 80230b6: f003 0302 and.w r3, r3, #2 80230ba: 2b00 cmp r3, #0 80230bc: d011 beq.n 80230e2 80230be: 697b ldr r3, [r7, #20] 80230c0: f403 7300 and.w r3, r3, #512 @ 0x200 80230c4: 2b00 cmp r3, #0 80230c6: d00c beq.n 80230e2 { /* Now time to read SR2, this will clear ADDR flag automatically */ if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 80230c8: 687b ldr r3, [r7, #4] 80230ca: 6c1b ldr r3, [r3, #64] @ 0x40 80230cc: 2b00 cmp r3, #0 80230ce: d003 beq.n 80230d8 { sr2itflags = READ_REG(hi2c->Instance->SR2); 80230d0: 687b ldr r3, [r7, #4] 80230d2: 681b ldr r3, [r3, #0] 80230d4: 699b ldr r3, [r3, #24] 80230d6: 61bb str r3, [r7, #24] } I2C_Slave_ADDR(hi2c, sr2itflags); 80230d8: 69b9 ldr r1, [r7, #24] 80230da: 6878 ldr r0, [r7, #4] 80230dc: f000 ffb0 bl 8024040 80230e0: e05a b.n 8023198 } /* STOPF set --------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 80230e2: 69fb ldr r3, [r7, #28] 80230e4: f003 0310 and.w r3, r3, #16 80230e8: 2b00 cmp r3, #0 80230ea: d008 beq.n 80230fe 80230ec: 697b ldr r3, [r7, #20] 80230ee: f403 7300 and.w r3, r3, #512 @ 0x200 80230f2: 2b00 cmp r3, #0 80230f4: d003 beq.n 80230fe { I2C_Slave_STOPF(hi2c); 80230f6: 6878 ldr r0, [r7, #4] 80230f8: f000 ffea bl 80240d0 80230fc: e04c b.n 8023198 } /* I2C in mode Transmitter -----------------------------------------------*/ else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) 80230fe: 7bbb ldrb r3, [r7, #14] 8023100: 2b21 cmp r3, #33 @ 0x21 8023102: d002 beq.n 802310a 8023104: 7bbb ldrb r3, [r7, #14] 8023106: 2b29 cmp r3, #41 @ 0x29 8023108: d120 bne.n 802314c { /* TXE set and BTF reset -----------------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 802310a: 69fb ldr r3, [r7, #28] 802310c: f003 0380 and.w r3, r3, #128 @ 0x80 8023110: 2b00 cmp r3, #0 8023112: d00d beq.n 8023130 8023114: 697b ldr r3, [r7, #20] 8023116: f403 6380 and.w r3, r3, #1024 @ 0x400 802311a: 2b00 cmp r3, #0 802311c: d008 beq.n 8023130 802311e: 69fb ldr r3, [r7, #28] 8023120: f003 0304 and.w r3, r3, #4 8023124: 2b00 cmp r3, #0 8023126: d103 bne.n 8023130 { I2C_SlaveTransmit_TXE(hi2c); 8023128: 6878 ldr r0, [r7, #4] 802312a: f000 fecb bl 8023ec4 if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 802312e: e032 b.n 8023196 } /* BTF set -------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023130: 69fb ldr r3, [r7, #28] 8023132: f003 0304 and.w r3, r3, #4 8023136: 2b00 cmp r3, #0 8023138: d02d beq.n 8023196 802313a: 697b ldr r3, [r7, #20] 802313c: f403 7300 and.w r3, r3, #512 @ 0x200 8023140: 2b00 cmp r3, #0 8023142: d028 beq.n 8023196 { I2C_SlaveTransmit_BTF(hi2c); 8023144: 6878 ldr r0, [r7, #4] 8023146: f000 fefa bl 8023f3e if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 802314a: e024 b.n 8023196 } /* I2C in mode Receiver --------------------------------------------------*/ else { /* RXNE set and BTF reset ----------------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 802314c: 69fb ldr r3, [r7, #28] 802314e: f003 0340 and.w r3, r3, #64 @ 0x40 8023152: 2b00 cmp r3, #0 8023154: d00d beq.n 8023172 8023156: 697b ldr r3, [r7, #20] 8023158: f403 6380 and.w r3, r3, #1024 @ 0x400 802315c: 2b00 cmp r3, #0 802315e: d008 beq.n 8023172 8023160: 69fb ldr r3, [r7, #28] 8023162: f003 0304 and.w r3, r3, #4 8023166: 2b00 cmp r3, #0 8023168: d103 bne.n 8023172 { I2C_SlaveReceive_RXNE(hi2c); 802316a: 6878 ldr r0, [r7, #4] 802316c: f000 ff08 bl 8023f80 8023170: e012 b.n 8023198 } /* BTF set -------------------------------------------------------------*/ else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023172: 69fb ldr r3, [r7, #28] 8023174: f003 0304 and.w r3, r3, #4 8023178: 2b00 cmp r3, #0 802317a: d00d beq.n 8023198 802317c: 697b ldr r3, [r7, #20] 802317e: f403 7300 and.w r3, r3, #512 @ 0x200 8023182: 2b00 cmp r3, #0 8023184: d008 beq.n 8023198 { I2C_SlaveReceive_BTF(hi2c); 8023186: 6878 ldr r0, [r7, #4] 8023188: f000 ff38 bl 8023ffc 802318c: e004 b.n 8023198 return; 802318e: bf00 nop 8023190: e002 b.n 8023198 if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET)) 8023192: bf00 nop 8023194: e000 b.n 8023198 if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET)) 8023196: bf00 nop { /* Do nothing */ } } } } 8023198: 3720 adds r7, #32 802319a: 46bd mov sp, r7 802319c: bd80 pop {r7, pc} 0802319e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) { 802319e: b580 push {r7, lr} 80231a0: b08a sub sp, #40 @ 0x28 80231a2: af00 add r7, sp, #0 80231a4: 6078 str r0, [r7, #4] HAL_I2C_ModeTypeDef tmp1; uint32_t tmp2; HAL_I2C_StateTypeDef tmp3; uint32_t tmp4; uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1); 80231a6: 687b ldr r3, [r7, #4] 80231a8: 681b ldr r3, [r3, #0] 80231aa: 695b ldr r3, [r3, #20] 80231ac: 623b str r3, [r7, #32] uint32_t itsources = READ_REG(hi2c->Instance->CR2); 80231ae: 687b ldr r3, [r7, #4] 80231b0: 681b ldr r3, [r3, #0] 80231b2: 685b ldr r3, [r3, #4] 80231b4: 61fb str r3, [r7, #28] uint32_t error = HAL_I2C_ERROR_NONE; 80231b6: 2300 movs r3, #0 80231b8: 627b str r3, [r7, #36] @ 0x24 HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode; 80231ba: 687b ldr r3, [r7, #4] 80231bc: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80231c0: 76fb strb r3, [r7, #27] /* I2C Bus error interrupt occurred ----------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET)) 80231c2: 6a3b ldr r3, [r7, #32] 80231c4: f403 7380 and.w r3, r3, #256 @ 0x100 80231c8: 2b00 cmp r3, #0 80231ca: d00d beq.n 80231e8 80231cc: 69fb ldr r3, [r7, #28] 80231ce: f403 7380 and.w r3, r3, #256 @ 0x100 80231d2: 2b00 cmp r3, #0 80231d4: d008 beq.n 80231e8 { error |= HAL_I2C_ERROR_BERR; 80231d6: 6a7b ldr r3, [r7, #36] @ 0x24 80231d8: f043 0301 orr.w r3, r3, #1 80231dc: 627b str r3, [r7, #36] @ 0x24 /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); 80231de: 687b ldr r3, [r7, #4] 80231e0: 681b ldr r3, [r3, #0] 80231e2: f46f 7280 mvn.w r2, #256 @ 0x100 80231e6: 615a str r2, [r3, #20] } /* I2C Arbitration Lost error interrupt occurred ---------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET)) 80231e8: 6a3b ldr r3, [r7, #32] 80231ea: f403 7300 and.w r3, r3, #512 @ 0x200 80231ee: 2b00 cmp r3, #0 80231f0: d00d beq.n 802320e 80231f2: 69fb ldr r3, [r7, #28] 80231f4: f403 7380 and.w r3, r3, #256 @ 0x100 80231f8: 2b00 cmp r3, #0 80231fa: d008 beq.n 802320e { error |= HAL_I2C_ERROR_ARLO; 80231fc: 6a7b ldr r3, [r7, #36] @ 0x24 80231fe: f043 0302 orr.w r3, r3, #2 8023202: 627b str r3, [r7, #36] @ 0x24 /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); 8023204: 687b ldr r3, [r7, #4] 8023206: 681b ldr r3, [r3, #0] 8023208: f46f 7200 mvn.w r2, #512 @ 0x200 802320c: 615a str r2, [r3, #20] } /* I2C Acknowledge failure error interrupt occurred ------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET)) 802320e: 6a3b ldr r3, [r7, #32] 8023210: f403 6380 and.w r3, r3, #1024 @ 0x400 8023214: 2b00 cmp r3, #0 8023216: d03e beq.n 8023296 8023218: 69fb ldr r3, [r7, #28] 802321a: f403 7380 and.w r3, r3, #256 @ 0x100 802321e: 2b00 cmp r3, #0 8023220: d039 beq.n 8023296 { tmp1 = CurrentMode; 8023222: 7efb ldrb r3, [r7, #27] 8023224: 76bb strb r3, [r7, #26] tmp2 = hi2c->XferCount; 8023226: 687b ldr r3, [r7, #4] 8023228: 8d5b ldrh r3, [r3, #42] @ 0x2a 802322a: b29b uxth r3, r3 802322c: 617b str r3, [r7, #20] tmp3 = hi2c->State; 802322e: 687b ldr r3, [r7, #4] 8023230: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8023234: 74fb strb r3, [r7, #19] tmp4 = hi2c->PreviousState; 8023236: 687b ldr r3, [r7, #4] 8023238: 6b1b ldr r3, [r3, #48] @ 0x30 802323a: 60fb str r3, [r7, #12] if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \ 802323c: 7ebb ldrb r3, [r7, #26] 802323e: 2b20 cmp r3, #32 8023240: d112 bne.n 8023268 8023242: 697b ldr r3, [r7, #20] 8023244: 2b00 cmp r3, #0 8023246: d10f bne.n 8023268 8023248: 7cfb ldrb r3, [r7, #19] 802324a: 2b21 cmp r3, #33 @ 0x21 802324c: d008 beq.n 8023260 ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \ 802324e: 7cfb ldrb r3, [r7, #19] 8023250: 2b29 cmp r3, #41 @ 0x29 8023252: d005 beq.n 8023260 8023254: 7cfb ldrb r3, [r7, #19] 8023256: 2b28 cmp r3, #40 @ 0x28 8023258: d106 bne.n 8023268 ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX)))) 802325a: 68fb ldr r3, [r7, #12] 802325c: 2b21 cmp r3, #33 @ 0x21 802325e: d103 bne.n 8023268 { I2C_Slave_AF(hi2c); 8023260: 6878 ldr r0, [r7, #4] 8023262: f001 f865 bl 8024330 8023266: e016 b.n 8023296 } else { /* Clear AF flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8023268: 687b ldr r3, [r7, #4] 802326a: 681b ldr r3, [r3, #0] 802326c: f46f 6280 mvn.w r2, #1024 @ 0x400 8023270: 615a str r2, [r3, #20] error |= HAL_I2C_ERROR_AF; 8023272: 6a7b ldr r3, [r7, #36] @ 0x24 8023274: f043 0304 orr.w r3, r3, #4 8023278: 627b str r3, [r7, #36] @ 0x24 /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */ if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) 802327a: 7efb ldrb r3, [r7, #27] 802327c: 2b10 cmp r3, #16 802327e: d002 beq.n 8023286 8023280: 7efb ldrb r3, [r7, #27] 8023282: 2b40 cmp r3, #64 @ 0x40 8023284: d107 bne.n 8023296 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8023286: 687b ldr r3, [r7, #4] 8023288: 681b ldr r3, [r3, #0] 802328a: 681a ldr r2, [r3, #0] 802328c: 687b ldr r3, [r7, #4] 802328e: 681b ldr r3, [r3, #0] 8023290: f442 7200 orr.w r2, r2, #512 @ 0x200 8023294: 601a str r2, [r3, #0] } } } /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET)) 8023296: 6a3b ldr r3, [r7, #32] 8023298: f403 6300 and.w r3, r3, #2048 @ 0x800 802329c: 2b00 cmp r3, #0 802329e: d00d beq.n 80232bc 80232a0: 69fb ldr r3, [r7, #28] 80232a2: f403 7380 and.w r3, r3, #256 @ 0x100 80232a6: 2b00 cmp r3, #0 80232a8: d008 beq.n 80232bc { error |= HAL_I2C_ERROR_OVR; 80232aa: 6a7b ldr r3, [r7, #36] @ 0x24 80232ac: f043 0308 orr.w r3, r3, #8 80232b0: 627b str r3, [r7, #36] @ 0x24 /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); 80232b2: 687b ldr r3, [r7, #4] 80232b4: 681b ldr r3, [r3, #0] 80232b6: f46f 6200 mvn.w r2, #2048 @ 0x800 80232ba: 615a str r2, [r3, #20] } /* Call the Error Callback in case of Error detected -----------------------*/ if (error != HAL_I2C_ERROR_NONE) 80232bc: 6a7b ldr r3, [r7, #36] @ 0x24 80232be: 2b00 cmp r3, #0 80232c0: d008 beq.n 80232d4 { hi2c->ErrorCode |= error; 80232c2: 687b ldr r3, [r7, #4] 80232c4: 6c1a ldr r2, [r3, #64] @ 0x40 80232c6: 6a7b ldr r3, [r7, #36] @ 0x24 80232c8: 431a orrs r2, r3 80232ca: 687b ldr r3, [r7, #4] 80232cc: 641a str r2, [r3, #64] @ 0x40 I2C_ITError(hi2c); 80232ce: 6878 ldr r0, [r7, #4] 80232d0: f001 f89e bl 8024410 } } 80232d4: bf00 nop 80232d6: 3728 adds r7, #40 @ 0x28 80232d8: 46bd mov sp, r7 80232da: bd80 pop {r7, pc} 080232dc : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) { 80232dc: b480 push {r7} 80232de: b083 sub sp, #12 80232e0: af00 add r7, sp, #0 80232e2: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_MasterTxCpltCallback could be implemented in the user file */ } 80232e4: bf00 nop 80232e6: 370c adds r7, #12 80232e8: 46bd mov sp, r7 80232ea: f85d 7b04 ldr.w r7, [sp], #4 80232ee: 4770 bx lr 080232f0 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) { 80232f0: b480 push {r7} 80232f2: b083 sub sp, #12 80232f4: af00 add r7, sp, #0 80232f6: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_MasterRxCpltCallback could be implemented in the user file */ } 80232f8: bf00 nop 80232fa: 370c adds r7, #12 80232fc: 46bd mov sp, r7 80232fe: f85d 7b04 ldr.w r7, [sp], #4 8023302: 4770 bx lr 08023304 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) { 8023304: b480 push {r7} 8023306: b083 sub sp, #12 8023308: af00 add r7, sp, #0 802330a: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file */ } 802330c: bf00 nop 802330e: 370c adds r7, #12 8023310: 46bd mov sp, r7 8023312: f85d 7b04 ldr.w r7, [sp], #4 8023316: 4770 bx lr 08023318 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) { 8023318: b480 push {r7} 802331a: b083 sub sp, #12 802331c: af00 add r7, sp, #0 802331e: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file */ } 8023320: bf00 nop 8023322: 370c adds r7, #12 8023324: 46bd mov sp, r7 8023326: f85d 7b04 ldr.w r7, [sp], #4 802332a: 4770 bx lr 0802332c : * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferDirection_definition * @param AddrMatchCode Address Match Code * @retval None */ __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { 802332c: b480 push {r7} 802332e: b083 sub sp, #12 8023330: af00 add r7, sp, #0 8023332: 6078 str r0, [r7, #4] 8023334: 460b mov r3, r1 8023336: 70fb strb r3, [r7, #3] 8023338: 4613 mov r3, r2 802333a: 803b strh r3, [r7, #0] UNUSED(AddrMatchCode); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AddrCallback() could be implemented in the user file */ } 802333c: bf00 nop 802333e: 370c adds r7, #12 8023340: 46bd mov sp, r7 8023342: f85d 7b04 ldr.w r7, [sp], #4 8023346: 4770 bx lr 08023348 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) { 8023348: b480 push {r7} 802334a: b083 sub sp, #12 802334c: af00 add r7, sp, #0 802334e: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ListenCpltCallback() could be implemented in the user file */ } 8023350: bf00 nop 8023352: 370c adds r7, #12 8023354: 46bd mov sp, r7 8023356: f85d 7b04 ldr.w r7, [sp], #4 802335a: 4770 bx lr 0802335c : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) { 802335c: b480 push {r7} 802335e: b083 sub sp, #12 8023360: af00 add r7, sp, #0 8023362: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_MemTxCpltCallback could be implemented in the user file */ } 8023364: bf00 nop 8023366: 370c adds r7, #12 8023368: 46bd mov sp, r7 802336a: f85d 7b04 ldr.w r7, [sp], #4 802336e: 4770 bx lr 08023370 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) { 8023370: b480 push {r7} 8023372: b083 sub sp, #12 8023374: af00 add r7, sp, #0 8023376: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_MemRxCpltCallback could be implemented in the user file */ } 8023378: bf00 nop 802337a: 370c adds r7, #12 802337c: 46bd mov sp, r7 802337e: f85d 7b04 ldr.w r7, [sp], #4 8023382: 4770 bx lr 08023384 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) { 8023384: b480 push {r7} 8023386: b083 sub sp, #12 8023388: af00 add r7, sp, #0 802338a: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ErrorCallback could be implemented in the user file */ } 802338c: bf00 nop 802338e: 370c adds r7, #12 8023390: 46bd mov sp, r7 8023392: f85d 7b04 ldr.w r7, [sp], #4 8023396: 4770 bx lr 08023398 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) { 8023398: b480 push {r7} 802339a: b083 sub sp, #12 802339c: af00 add r7, sp, #0 802339e: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AbortCpltCallback could be implemented in the user file */ } 80233a0: bf00 nop 80233a2: 370c adds r7, #12 80233a4: 46bd mov sp, r7 80233a6: f85d 7b04 ldr.w r7, [sp], #4 80233aa: 4770 bx lr 080233ac : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c) { 80233ac: b580 push {r7, lr} 80233ae: b084 sub sp, #16 80233b0: af00 add r7, sp, #0 80233b2: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 80233b4: 687b ldr r3, [r7, #4] 80233b6: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80233ba: 73fb strb r3, [r7, #15] HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode; 80233bc: 687b ldr r3, [r7, #4] 80233be: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80233c2: 73bb strb r3, [r7, #14] uint32_t CurrentXferOptions = hi2c->XferOptions; 80233c4: 687b ldr r3, [r7, #4] 80233c6: 6adb ldr r3, [r3, #44] @ 0x2c 80233c8: 60bb str r3, [r7, #8] if ((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX)) 80233ca: 687b ldr r3, [r7, #4] 80233cc: 8d1b ldrh r3, [r3, #40] @ 0x28 80233ce: 2b00 cmp r3, #0 80233d0: d150 bne.n 8023474 80233d2: 7bfb ldrb r3, [r7, #15] 80233d4: 2b21 cmp r3, #33 @ 0x21 80233d6: d14d bne.n 8023474 { /* Call TxCpltCallback() directly if no stop mode is set */ if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 80233d8: 68bb ldr r3, [r7, #8] 80233da: 2b08 cmp r3, #8 80233dc: d01d beq.n 802341a 80233de: 68bb ldr r3, [r7, #8] 80233e0: 2b20 cmp r3, #32 80233e2: d01a beq.n 802341a 80233e4: 68bb ldr r3, [r7, #8] 80233e6: f513 3f80 cmn.w r3, #65536 @ 0x10000 80233ea: d016 beq.n 802341a { __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 80233ec: 687b ldr r3, [r7, #4] 80233ee: 681b ldr r3, [r3, #0] 80233f0: 685a ldr r2, [r3, #4] 80233f2: 687b ldr r3, [r7, #4] 80233f4: 681b ldr r3, [r3, #0] 80233f6: f422 62e0 bic.w r2, r2, #1792 @ 0x700 80233fa: 605a str r2, [r3, #4] hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; 80233fc: 687b ldr r3, [r7, #4] 80233fe: 2211 movs r2, #17 8023400: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8023402: 687b ldr r3, [r7, #4] 8023404: 2200 movs r2, #0 8023406: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->State = HAL_I2C_STATE_READY; 802340a: 687b ldr r3, [r7, #4] 802340c: 2220 movs r2, #32 802340e: f883 203d strb.w r2, [r3, #61] @ 0x3d #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->MasterTxCpltCallback(hi2c); #else HAL_I2C_MasterTxCpltCallback(hi2c); 8023412: 6878 ldr r0, [r7, #4] 8023414: f7ff ff62 bl 80232dc if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 8023418: e060 b.n 80234dc #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } else /* Generate Stop condition then Call TxCpltCallback() */ { /* Disable EVT, BUF and ERR interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 802341a: 687b ldr r3, [r7, #4] 802341c: 681b ldr r3, [r3, #0] 802341e: 685a ldr r2, [r3, #4] 8023420: 687b ldr r3, [r7, #4] 8023422: 681b ldr r3, [r3, #0] 8023424: f422 62e0 bic.w r2, r2, #1792 @ 0x700 8023428: 605a str r2, [r3, #4] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 802342a: 687b ldr r3, [r7, #4] 802342c: 681b ldr r3, [r3, #0] 802342e: 681a ldr r2, [r3, #0] 8023430: 687b ldr r3, [r7, #4] 8023432: 681b ldr r3, [r3, #0] 8023434: f442 7200 orr.w r2, r2, #512 @ 0x200 8023438: 601a str r2, [r3, #0] hi2c->PreviousState = I2C_STATE_NONE; 802343a: 687b ldr r3, [r7, #4] 802343c: 2200 movs r2, #0 802343e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 8023440: 687b ldr r3, [r7, #4] 8023442: 2220 movs r2, #32 8023444: f883 203d strb.w r2, [r3, #61] @ 0x3d if (hi2c->Mode == HAL_I2C_MODE_MEM) 8023448: 687b ldr r3, [r7, #4] 802344a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 802344e: b2db uxtb r3, r3 8023450: 2b40 cmp r3, #64 @ 0x40 8023452: d107 bne.n 8023464 { hi2c->Mode = HAL_I2C_MODE_NONE; 8023454: 687b ldr r3, [r7, #4] 8023456: 2200 movs r2, #0 8023458: f883 203e strb.w r2, [r3, #62] @ 0x3e #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->MemTxCpltCallback(hi2c); #else HAL_I2C_MemTxCpltCallback(hi2c); 802345c: 6878 ldr r0, [r7, #4] 802345e: f7ff ff7d bl 802335c if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 8023462: e03b b.n 80234dc #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } else { hi2c->Mode = HAL_I2C_MODE_NONE; 8023464: 687b ldr r3, [r7, #4] 8023466: 2200 movs r2, #0 8023468: f883 203e strb.w r2, [r3, #62] @ 0x3e #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->MasterTxCpltCallback(hi2c); #else HAL_I2C_MasterTxCpltCallback(hi2c); 802346c: 6878 ldr r0, [r7, #4] 802346e: f7ff ff35 bl 80232dc if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 8023472: e033 b.n 80234dc #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } } else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || \ 8023474: 7bfb ldrb r3, [r7, #15] 8023476: 2b21 cmp r3, #33 @ 0x21 8023478: d005 beq.n 8023486 802347a: 7bbb ldrb r3, [r7, #14] 802347c: 2b40 cmp r3, #64 @ 0x40 802347e: d12d bne.n 80234dc ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX))) 8023480: 7bfb ldrb r3, [r7, #15] 8023482: 2b22 cmp r3, #34 @ 0x22 8023484: d12a bne.n 80234dc { if (hi2c->XferCount == 0U) 8023486: 687b ldr r3, [r7, #4] 8023488: 8d5b ldrh r3, [r3, #42] @ 0x2a 802348a: b29b uxth r3, r3 802348c: 2b00 cmp r3, #0 802348e: d108 bne.n 80234a2 { /* Disable BUF interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8023490: 687b ldr r3, [r7, #4] 8023492: 681b ldr r3, [r3, #0] 8023494: 685a ldr r2, [r3, #4] 8023496: 687b ldr r3, [r7, #4] 8023498: 681b ldr r3, [r3, #0] 802349a: f422 6280 bic.w r2, r2, #1024 @ 0x400 802349e: 605a str r2, [r3, #4] } else { /* Do nothing */ } } 80234a0: e01c b.n 80234dc if (hi2c->Mode == HAL_I2C_MODE_MEM) 80234a2: 687b ldr r3, [r7, #4] 80234a4: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80234a8: b2db uxtb r3, r3 80234aa: 2b40 cmp r3, #64 @ 0x40 80234ac: d103 bne.n 80234b6 I2C_MemoryTransmit_TXE_BTF(hi2c); 80234ae: 6878 ldr r0, [r7, #4] 80234b0: f000 f88e bl 80235d0 } 80234b4: e012 b.n 80234dc hi2c->Instance->DR = *hi2c->pBuffPtr; 80234b6: 687b ldr r3, [r7, #4] 80234b8: 6a5b ldr r3, [r3, #36] @ 0x24 80234ba: 781a ldrb r2, [r3, #0] 80234bc: 687b ldr r3, [r7, #4] 80234be: 681b ldr r3, [r3, #0] 80234c0: 611a str r2, [r3, #16] hi2c->pBuffPtr++; 80234c2: 687b ldr r3, [r7, #4] 80234c4: 6a5b ldr r3, [r3, #36] @ 0x24 80234c6: 1c5a adds r2, r3, #1 80234c8: 687b ldr r3, [r7, #4] 80234ca: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 80234cc: 687b ldr r3, [r7, #4] 80234ce: 8d5b ldrh r3, [r3, #42] @ 0x2a 80234d0: b29b uxth r3, r3 80234d2: 3b01 subs r3, #1 80234d4: b29a uxth r2, r3 80234d6: 687b ldr r3, [r7, #4] 80234d8: 855a strh r2, [r3, #42] @ 0x2a } 80234da: e7ff b.n 80234dc 80234dc: bf00 nop 80234de: 3710 adds r7, #16 80234e0: 46bd mov sp, r7 80234e2: bd80 pop {r7, pc} 080234e4 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) { 80234e4: b580 push {r7, lr} 80234e6: b084 sub sp, #16 80234e8: af00 add r7, sp, #0 80234ea: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; 80234ec: 687b ldr r3, [r7, #4] 80234ee: 6adb ldr r3, [r3, #44] @ 0x2c 80234f0: 60fb str r3, [r7, #12] if (hi2c->State == HAL_I2C_STATE_BUSY_TX) 80234f2: 687b ldr r3, [r7, #4] 80234f4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80234f8: b2db uxtb r3, r3 80234fa: 2b21 cmp r3, #33 @ 0x21 80234fc: d164 bne.n 80235c8 { if (hi2c->XferCount != 0U) 80234fe: 687b ldr r3, [r7, #4] 8023500: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023502: b29b uxth r3, r3 8023504: 2b00 cmp r3, #0 8023506: d012 beq.n 802352e { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8023508: 687b ldr r3, [r7, #4] 802350a: 6a5b ldr r3, [r3, #36] @ 0x24 802350c: 781a ldrb r2, [r3, #0] 802350e: 687b ldr r3, [r7, #4] 8023510: 681b ldr r3, [r3, #0] 8023512: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8023514: 687b ldr r3, [r7, #4] 8023516: 6a5b ldr r3, [r3, #36] @ 0x24 8023518: 1c5a adds r2, r3, #1 802351a: 687b ldr r3, [r7, #4] 802351c: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 802351e: 687b ldr r3, [r7, #4] 8023520: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023522: b29b uxth r3, r3 8023524: 3b01 subs r3, #1 8023526: b29a uxth r2, r3 8023528: 687b ldr r3, [r7, #4] 802352a: 855a strh r2, [r3, #42] @ 0x2a } else { /* Do nothing */ } } 802352c: e04c b.n 80235c8 if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME)) 802352e: 68fb ldr r3, [r7, #12] 8023530: 2b08 cmp r3, #8 8023532: d01d beq.n 8023570 8023534: 68fb ldr r3, [r7, #12] 8023536: 2b20 cmp r3, #32 8023538: d01a beq.n 8023570 802353a: 68fb ldr r3, [r7, #12] 802353c: f513 3f80 cmn.w r3, #65536 @ 0x10000 8023540: d016 beq.n 8023570 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8023542: 687b ldr r3, [r7, #4] 8023544: 681b ldr r3, [r3, #0] 8023546: 685a ldr r2, [r3, #4] 8023548: 687b ldr r3, [r7, #4] 802354a: 681b ldr r3, [r3, #0] 802354c: f422 62e0 bic.w r2, r2, #1792 @ 0x700 8023550: 605a str r2, [r3, #4] hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; 8023552: 687b ldr r3, [r7, #4] 8023554: 2211 movs r2, #17 8023556: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8023558: 687b ldr r3, [r7, #4] 802355a: 2200 movs r2, #0 802355c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->State = HAL_I2C_STATE_READY; 8023560: 687b ldr r3, [r7, #4] 8023562: 2220 movs r2, #32 8023564: f883 203d strb.w r2, [r3, #61] @ 0x3d HAL_I2C_MasterTxCpltCallback(hi2c); 8023568: 6878 ldr r0, [r7, #4] 802356a: f7ff feb7 bl 80232dc } 802356e: e02b b.n 80235c8 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8023570: 687b ldr r3, [r7, #4] 8023572: 681b ldr r3, [r3, #0] 8023574: 685a ldr r2, [r3, #4] 8023576: 687b ldr r3, [r7, #4] 8023578: 681b ldr r3, [r3, #0] 802357a: f422 62e0 bic.w r2, r2, #1792 @ 0x700 802357e: 605a str r2, [r3, #4] SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8023580: 687b ldr r3, [r7, #4] 8023582: 681b ldr r3, [r3, #0] 8023584: 681a ldr r2, [r3, #0] 8023586: 687b ldr r3, [r7, #4] 8023588: 681b ldr r3, [r3, #0] 802358a: f442 7200 orr.w r2, r2, #512 @ 0x200 802358e: 601a str r2, [r3, #0] hi2c->PreviousState = I2C_STATE_NONE; 8023590: 687b ldr r3, [r7, #4] 8023592: 2200 movs r2, #0 8023594: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 8023596: 687b ldr r3, [r7, #4] 8023598: 2220 movs r2, #32 802359a: f883 203d strb.w r2, [r3, #61] @ 0x3d if (hi2c->Mode == HAL_I2C_MODE_MEM) 802359e: 687b ldr r3, [r7, #4] 80235a0: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80235a4: b2db uxtb r3, r3 80235a6: 2b40 cmp r3, #64 @ 0x40 80235a8: d107 bne.n 80235ba hi2c->Mode = HAL_I2C_MODE_NONE; 80235aa: 687b ldr r3, [r7, #4] 80235ac: 2200 movs r2, #0 80235ae: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_MemTxCpltCallback(hi2c); 80235b2: 6878 ldr r0, [r7, #4] 80235b4: f7ff fed2 bl 802335c } 80235b8: e006 b.n 80235c8 hi2c->Mode = HAL_I2C_MODE_NONE; 80235ba: 687b ldr r3, [r7, #4] 80235bc: 2200 movs r2, #0 80235be: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_MasterTxCpltCallback(hi2c); 80235c2: 6878 ldr r0, [r7, #4] 80235c4: f7ff fe8a bl 80232dc } 80235c8: bf00 nop 80235ca: 3710 adds r7, #16 80235cc: 46bd mov sp, r7 80235ce: bd80 pop {r7, pc} 080235d0 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c) { 80235d0: b580 push {r7, lr} 80235d2: b084 sub sp, #16 80235d4: af00 add r7, sp, #0 80235d6: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 80235d8: 687b ldr r3, [r7, #4] 80235da: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80235de: 73fb strb r3, [r7, #15] if (hi2c->EventCount == 0U) 80235e0: 687b ldr r3, [r7, #4] 80235e2: 6d1b ldr r3, [r3, #80] @ 0x50 80235e4: 2b00 cmp r3, #0 80235e6: d11d bne.n 8023624 { /* If Memory address size is 8Bit */ if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT) 80235e8: 687b ldr r3, [r7, #4] 80235ea: 6cdb ldr r3, [r3, #76] @ 0x4c 80235ec: 2b01 cmp r3, #1 80235ee: d10b bne.n 8023608 { /* Send Memory Address */ hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 80235f0: 687b ldr r3, [r7, #4] 80235f2: 6c9b ldr r3, [r3, #72] @ 0x48 80235f4: b2da uxtb r2, r3 80235f6: 687b ldr r3, [r7, #4] 80235f8: 681b ldr r3, [r3, #0] 80235fa: 611a str r2, [r3, #16] hi2c->EventCount += 2U; 80235fc: 687b ldr r3, [r7, #4] 80235fe: 6d1b ldr r3, [r3, #80] @ 0x50 8023600: 1c9a adds r2, r3, #2 8023602: 687b ldr r3, [r7, #4] 8023604: 651a str r2, [r3, #80] @ 0x50 } else { /* Do nothing */ } } 8023606: e073 b.n 80236f0 hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress); 8023608: 687b ldr r3, [r7, #4] 802360a: 6c9b ldr r3, [r3, #72] @ 0x48 802360c: b29b uxth r3, r3 802360e: 121b asrs r3, r3, #8 8023610: b2da uxtb r2, r3 8023612: 687b ldr r3, [r7, #4] 8023614: 681b ldr r3, [r3, #0] 8023616: 611a str r2, [r3, #16] hi2c->EventCount++; 8023618: 687b ldr r3, [r7, #4] 802361a: 6d1b ldr r3, [r3, #80] @ 0x50 802361c: 1c5a adds r2, r3, #1 802361e: 687b ldr r3, [r7, #4] 8023620: 651a str r2, [r3, #80] @ 0x50 } 8023622: e065 b.n 80236f0 else if (hi2c->EventCount == 1U) 8023624: 687b ldr r3, [r7, #4] 8023626: 6d1b ldr r3, [r3, #80] @ 0x50 8023628: 2b01 cmp r3, #1 802362a: d10b bne.n 8023644 hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); 802362c: 687b ldr r3, [r7, #4] 802362e: 6c9b ldr r3, [r3, #72] @ 0x48 8023630: b2da uxtb r2, r3 8023632: 687b ldr r3, [r7, #4] 8023634: 681b ldr r3, [r3, #0] 8023636: 611a str r2, [r3, #16] hi2c->EventCount++; 8023638: 687b ldr r3, [r7, #4] 802363a: 6d1b ldr r3, [r3, #80] @ 0x50 802363c: 1c5a adds r2, r3, #1 802363e: 687b ldr r3, [r7, #4] 8023640: 651a str r2, [r3, #80] @ 0x50 } 8023642: e055 b.n 80236f0 else if (hi2c->EventCount == 2U) 8023644: 687b ldr r3, [r7, #4] 8023646: 6d1b ldr r3, [r3, #80] @ 0x50 8023648: 2b02 cmp r3, #2 802364a: d151 bne.n 80236f0 if (CurrentState == HAL_I2C_STATE_BUSY_RX) 802364c: 7bfb ldrb r3, [r7, #15] 802364e: 2b22 cmp r3, #34 @ 0x22 8023650: d10d bne.n 802366e hi2c->Instance->CR1 |= I2C_CR1_START; 8023652: 687b ldr r3, [r7, #4] 8023654: 681b ldr r3, [r3, #0] 8023656: 681a ldr r2, [r3, #0] 8023658: 687b ldr r3, [r7, #4] 802365a: 681b ldr r3, [r3, #0] 802365c: f442 7280 orr.w r2, r2, #256 @ 0x100 8023660: 601a str r2, [r3, #0] hi2c->EventCount++; 8023662: 687b ldr r3, [r7, #4] 8023664: 6d1b ldr r3, [r3, #80] @ 0x50 8023666: 1c5a adds r2, r3, #1 8023668: 687b ldr r3, [r7, #4] 802366a: 651a str r2, [r3, #80] @ 0x50 } 802366c: e040 b.n 80236f0 else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX)) 802366e: 687b ldr r3, [r7, #4] 8023670: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023672: b29b uxth r3, r3 8023674: 2b00 cmp r3, #0 8023676: d015 beq.n 80236a4 8023678: 7bfb ldrb r3, [r7, #15] 802367a: 2b21 cmp r3, #33 @ 0x21 802367c: d112 bne.n 80236a4 hi2c->Instance->DR = *hi2c->pBuffPtr; 802367e: 687b ldr r3, [r7, #4] 8023680: 6a5b ldr r3, [r3, #36] @ 0x24 8023682: 781a ldrb r2, [r3, #0] 8023684: 687b ldr r3, [r7, #4] 8023686: 681b ldr r3, [r3, #0] 8023688: 611a str r2, [r3, #16] hi2c->pBuffPtr++; 802368a: 687b ldr r3, [r7, #4] 802368c: 6a5b ldr r3, [r3, #36] @ 0x24 802368e: 1c5a adds r2, r3, #1 8023690: 687b ldr r3, [r7, #4] 8023692: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 8023694: 687b ldr r3, [r7, #4] 8023696: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023698: b29b uxth r3, r3 802369a: 3b01 subs r3, #1 802369c: b29a uxth r2, r3 802369e: 687b ldr r3, [r7, #4] 80236a0: 855a strh r2, [r3, #42] @ 0x2a } 80236a2: e025 b.n 80236f0 else if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX)) 80236a4: 687b ldr r3, [r7, #4] 80236a6: 8d5b ldrh r3, [r3, #42] @ 0x2a 80236a8: b29b uxth r3, r3 80236aa: 2b00 cmp r3, #0 80236ac: d120 bne.n 80236f0 80236ae: 7bfb ldrb r3, [r7, #15] 80236b0: 2b21 cmp r3, #33 @ 0x21 80236b2: d11d bne.n 80236f0 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 80236b4: 687b ldr r3, [r7, #4] 80236b6: 681b ldr r3, [r3, #0] 80236b8: 685a ldr r2, [r3, #4] 80236ba: 687b ldr r3, [r7, #4] 80236bc: 681b ldr r3, [r3, #0] 80236be: f422 62e0 bic.w r2, r2, #1792 @ 0x700 80236c2: 605a str r2, [r3, #4] SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 80236c4: 687b ldr r3, [r7, #4] 80236c6: 681b ldr r3, [r3, #0] 80236c8: 681a ldr r2, [r3, #0] 80236ca: 687b ldr r3, [r7, #4] 80236cc: 681b ldr r3, [r3, #0] 80236ce: f442 7200 orr.w r2, r2, #512 @ 0x200 80236d2: 601a str r2, [r3, #0] hi2c->PreviousState = I2C_STATE_NONE; 80236d4: 687b ldr r3, [r7, #4] 80236d6: 2200 movs r2, #0 80236d8: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 80236da: 687b ldr r3, [r7, #4] 80236dc: 2220 movs r2, #32 80236de: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80236e2: 687b ldr r3, [r7, #4] 80236e4: 2200 movs r2, #0 80236e6: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_MemTxCpltCallback(hi2c); 80236ea: 6878 ldr r0, [r7, #4] 80236ec: f7ff fe36 bl 802335c } 80236f0: bf00 nop 80236f2: 3710 adds r7, #16 80236f4: 46bd mov sp, r7 80236f6: bd80 pop {r7, pc} 080236f8 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) { 80236f8: b580 push {r7, lr} 80236fa: b084 sub sp, #16 80236fc: af00 add r7, sp, #0 80236fe: 6078 str r0, [r7, #4] if (hi2c->State == HAL_I2C_STATE_BUSY_RX) 8023700: 687b ldr r3, [r7, #4] 8023702: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8023706: b2db uxtb r3, r3 8023708: 2b22 cmp r3, #34 @ 0x22 802370a: f040 80ac bne.w 8023866 { uint32_t tmp; tmp = hi2c->XferCount; 802370e: 687b ldr r3, [r7, #4] 8023710: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023712: b29b uxth r3, r3 8023714: 60fb str r3, [r7, #12] if (tmp > 3U) 8023716: 68fb ldr r3, [r7, #12] 8023718: 2b03 cmp r3, #3 802371a: d921 bls.n 8023760 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 802371c: 687b ldr r3, [r7, #4] 802371e: 681b ldr r3, [r3, #0] 8023720: 691a ldr r2, [r3, #16] 8023722: 687b ldr r3, [r7, #4] 8023724: 6a5b ldr r3, [r3, #36] @ 0x24 8023726: b2d2 uxtb r2, r2 8023728: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 802372a: 687b ldr r3, [r7, #4] 802372c: 6a5b ldr r3, [r3, #36] @ 0x24 802372e: 1c5a adds r2, r3, #1 8023730: 687b ldr r3, [r7, #4] 8023732: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8023734: 687b ldr r3, [r7, #4] 8023736: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023738: b29b uxth r3, r3 802373a: 3b01 subs r3, #1 802373c: b29a uxth r2, r3 802373e: 687b ldr r3, [r7, #4] 8023740: 855a strh r2, [r3, #42] @ 0x2a if (hi2c->XferCount == (uint16_t)3) 8023742: 687b ldr r3, [r7, #4] 8023744: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023746: b29b uxth r3, r3 8023748: 2b03 cmp r3, #3 802374a: f040 808c bne.w 8023866 { /* Disable BUF interrupt, this help to treat correctly the last 4 bytes on BTF subroutine */ /* Disable BUF interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 802374e: 687b ldr r3, [r7, #4] 8023750: 681b ldr r3, [r3, #0] 8023752: 685a ldr r2, [r3, #4] 8023754: 687b ldr r3, [r7, #4] 8023756: 681b ldr r3, [r3, #0] 8023758: f422 6280 bic.w r2, r2, #1024 @ 0x400 802375c: 605a str r2, [r3, #4] /* Disable BUF interrupt, this help to treat correctly the last 2 bytes on BTF subroutine if there is a reception delay between N-1 and N byte */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); } } } 802375e: e082 b.n 8023866 else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U))) 8023760: 687b ldr r3, [r7, #4] 8023762: 6adb ldr r3, [r3, #44] @ 0x2c 8023764: 2b02 cmp r3, #2 8023766: d075 beq.n 8023854 8023768: 68fb ldr r3, [r7, #12] 802376a: 2b01 cmp r3, #1 802376c: d002 beq.n 8023774 802376e: 68fb ldr r3, [r7, #12] 8023770: 2b00 cmp r3, #0 8023772: d16f bne.n 8023854 if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK) 8023774: 6878 ldr r0, [r7, #4] 8023776: f001 f825 bl 80247c4 802377a: 4603 mov r3, r0 802377c: 2b00 cmp r3, #0 802377e: d142 bne.n 8023806 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023780: 687b ldr r3, [r7, #4] 8023782: 681b ldr r3, [r3, #0] 8023784: 681a ldr r2, [r3, #0] 8023786: 687b ldr r3, [r7, #4] 8023788: 681b ldr r3, [r3, #0] 802378a: f422 6280 bic.w r2, r2, #1024 @ 0x400 802378e: 601a str r2, [r3, #0] __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8023790: 687b ldr r3, [r7, #4] 8023792: 681b ldr r3, [r3, #0] 8023794: 685a ldr r2, [r3, #4] 8023796: 687b ldr r3, [r7, #4] 8023798: 681b ldr r3, [r3, #0] 802379a: f422 62e0 bic.w r2, r2, #1792 @ 0x700 802379e: 605a str r2, [r3, #4] *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80237a0: 687b ldr r3, [r7, #4] 80237a2: 681b ldr r3, [r3, #0] 80237a4: 691a ldr r2, [r3, #16] 80237a6: 687b ldr r3, [r7, #4] 80237a8: 6a5b ldr r3, [r3, #36] @ 0x24 80237aa: b2d2 uxtb r2, r2 80237ac: 701a strb r2, [r3, #0] hi2c->pBuffPtr++; 80237ae: 687b ldr r3, [r7, #4] 80237b0: 6a5b ldr r3, [r3, #36] @ 0x24 80237b2: 1c5a adds r2, r3, #1 80237b4: 687b ldr r3, [r7, #4] 80237b6: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 80237b8: 687b ldr r3, [r7, #4] 80237ba: 8d5b ldrh r3, [r3, #42] @ 0x2a 80237bc: b29b uxth r3, r3 80237be: 3b01 subs r3, #1 80237c0: b29a uxth r2, r3 80237c2: 687b ldr r3, [r7, #4] 80237c4: 855a strh r2, [r3, #42] @ 0x2a hi2c->State = HAL_I2C_STATE_READY; 80237c6: 687b ldr r3, [r7, #4] 80237c8: 2220 movs r2, #32 80237ca: f883 203d strb.w r2, [r3, #61] @ 0x3d if (hi2c->Mode == HAL_I2C_MODE_MEM) 80237ce: 687b ldr r3, [r7, #4] 80237d0: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80237d4: b2db uxtb r3, r3 80237d6: 2b40 cmp r3, #64 @ 0x40 80237d8: d10a bne.n 80237f0 hi2c->Mode = HAL_I2C_MODE_NONE; 80237da: 687b ldr r3, [r7, #4] 80237dc: 2200 movs r2, #0 80237de: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->PreviousState = I2C_STATE_NONE; 80237e2: 687b ldr r3, [r7, #4] 80237e4: 2200 movs r2, #0 80237e6: 631a str r2, [r3, #48] @ 0x30 HAL_I2C_MemRxCpltCallback(hi2c); 80237e8: 6878 ldr r0, [r7, #4] 80237ea: f7ff fdc1 bl 8023370 if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK) 80237ee: e03a b.n 8023866 hi2c->Mode = HAL_I2C_MODE_NONE; 80237f0: 687b ldr r3, [r7, #4] 80237f2: 2200 movs r2, #0 80237f4: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; 80237f8: 687b ldr r3, [r7, #4] 80237fa: 2212 movs r2, #18 80237fc: 631a str r2, [r3, #48] @ 0x30 HAL_I2C_MasterRxCpltCallback(hi2c); 80237fe: 6878 ldr r0, [r7, #4] 8023800: f7ff fd76 bl 80232f0 if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK) 8023804: e02f b.n 8023866 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8023806: 687b ldr r3, [r7, #4] 8023808: 681b ldr r3, [r3, #0] 802380a: 685a ldr r2, [r3, #4] 802380c: 687b ldr r3, [r7, #4] 802380e: 681b ldr r3, [r3, #0] 8023810: f422 62e0 bic.w r2, r2, #1792 @ 0x700 8023814: 605a str r2, [r3, #4] *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8023816: 687b ldr r3, [r7, #4] 8023818: 681b ldr r3, [r3, #0] 802381a: 691a ldr r2, [r3, #16] 802381c: 687b ldr r3, [r7, #4] 802381e: 6a5b ldr r3, [r3, #36] @ 0x24 8023820: b2d2 uxtb r2, r2 8023822: 701a strb r2, [r3, #0] hi2c->pBuffPtr++; 8023824: 687b ldr r3, [r7, #4] 8023826: 6a5b ldr r3, [r3, #36] @ 0x24 8023828: 1c5a adds r2, r3, #1 802382a: 687b ldr r3, [r7, #4] 802382c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 802382e: 687b ldr r3, [r7, #4] 8023830: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023832: b29b uxth r3, r3 8023834: 3b01 subs r3, #1 8023836: b29a uxth r2, r3 8023838: 687b ldr r3, [r7, #4] 802383a: 855a strh r2, [r3, #42] @ 0x2a hi2c->State = HAL_I2C_STATE_READY; 802383c: 687b ldr r3, [r7, #4] 802383e: 2220 movs r2, #32 8023840: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8023844: 687b ldr r3, [r7, #4] 8023846: 2200 movs r2, #0 8023848: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_ErrorCallback(hi2c); 802384c: 6878 ldr r0, [r7, #4] 802384e: f7ff fd99 bl 8023384 if (I2C_WaitOnSTOPRequestThroughIT(hi2c) == HAL_OK) 8023852: e008 b.n 8023866 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8023854: 687b ldr r3, [r7, #4] 8023856: 681b ldr r3, [r3, #0] 8023858: 685a ldr r2, [r3, #4] 802385a: 687b ldr r3, [r7, #4] 802385c: 681b ldr r3, [r3, #0] 802385e: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023862: 605a str r2, [r3, #4] } 8023864: e7ff b.n 8023866 8023866: bf00 nop 8023868: 3710 adds r7, #16 802386a: 46bd mov sp, r7 802386c: bd80 pop {r7, pc} 0802386e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) { 802386e: b580 push {r7, lr} 8023870: b084 sub sp, #16 8023872: af00 add r7, sp, #0 8023874: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; 8023876: 687b ldr r3, [r7, #4] 8023878: 6adb ldr r3, [r3, #44] @ 0x2c 802387a: 60fb str r3, [r7, #12] if (hi2c->XferCount == 4U) 802387c: 687b ldr r3, [r7, #4] 802387e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023880: b29b uxth r3, r3 8023882: 2b04 cmp r3, #4 8023884: d11b bne.n 80238be { /* Disable BUF interrupt, this help to treat correctly the last 2 bytes on BTF subroutine if there is a reception delay between N-1 and N byte */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8023886: 687b ldr r3, [r7, #4] 8023888: 681b ldr r3, [r3, #0] 802388a: 685a ldr r2, [r3, #4] 802388c: 687b ldr r3, [r7, #4] 802388e: 681b ldr r3, [r3, #0] 8023890: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023894: 605a str r2, [r3, #4] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8023896: 687b ldr r3, [r7, #4] 8023898: 681b ldr r3, [r3, #0] 802389a: 691a ldr r2, [r3, #16] 802389c: 687b ldr r3, [r7, #4] 802389e: 6a5b ldr r3, [r3, #36] @ 0x24 80238a0: b2d2 uxtb r2, r2 80238a2: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80238a4: 687b ldr r3, [r7, #4] 80238a6: 6a5b ldr r3, [r3, #36] @ 0x24 80238a8: 1c5a adds r2, r3, #1 80238aa: 687b ldr r3, [r7, #4] 80238ac: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 80238ae: 687b ldr r3, [r7, #4] 80238b0: 8d5b ldrh r3, [r3, #42] @ 0x2a 80238b2: b29b uxth r3, r3 80238b4: 3b01 subs r3, #1 80238b6: b29a uxth r2, r3 80238b8: 687b ldr r3, [r7, #4] 80238ba: 855a strh r2, [r3, #42] @ 0x2a hi2c->pBuffPtr++; /* Update counter */ hi2c->XferCount--; } } 80238bc: e0bd b.n 8023a3a else if (hi2c->XferCount == 3U) 80238be: 687b ldr r3, [r7, #4] 80238c0: 8d5b ldrh r3, [r3, #42] @ 0x2a 80238c2: b29b uxth r3, r3 80238c4: 2b03 cmp r3, #3 80238c6: d129 bne.n 802391c __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 80238c8: 687b ldr r3, [r7, #4] 80238ca: 681b ldr r3, [r3, #0] 80238cc: 685a ldr r2, [r3, #4] 80238ce: 687b ldr r3, [r7, #4] 80238d0: 681b ldr r3, [r3, #0] 80238d2: f422 6280 bic.w r2, r2, #1024 @ 0x400 80238d6: 605a str r2, [r3, #4] if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME)) 80238d8: 68fb ldr r3, [r7, #12] 80238da: 2b04 cmp r3, #4 80238dc: d00a beq.n 80238f4 80238de: 68fb ldr r3, [r7, #12] 80238e0: 2b02 cmp r3, #2 80238e2: d007 beq.n 80238f4 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 80238e4: 687b ldr r3, [r7, #4] 80238e6: 681b ldr r3, [r3, #0] 80238e8: 681a ldr r2, [r3, #0] 80238ea: 687b ldr r3, [r7, #4] 80238ec: 681b ldr r3, [r3, #0] 80238ee: f422 6280 bic.w r2, r2, #1024 @ 0x400 80238f2: 601a str r2, [r3, #0] *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80238f4: 687b ldr r3, [r7, #4] 80238f6: 681b ldr r3, [r3, #0] 80238f8: 691a ldr r2, [r3, #16] 80238fa: 687b ldr r3, [r7, #4] 80238fc: 6a5b ldr r3, [r3, #36] @ 0x24 80238fe: b2d2 uxtb r2, r2 8023900: 701a strb r2, [r3, #0] hi2c->pBuffPtr++; 8023902: 687b ldr r3, [r7, #4] 8023904: 6a5b ldr r3, [r3, #36] @ 0x24 8023906: 1c5a adds r2, r3, #1 8023908: 687b ldr r3, [r7, #4] 802390a: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 802390c: 687b ldr r3, [r7, #4] 802390e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023910: b29b uxth r3, r3 8023912: 3b01 subs r3, #1 8023914: b29a uxth r2, r3 8023916: 687b ldr r3, [r7, #4] 8023918: 855a strh r2, [r3, #42] @ 0x2a } 802391a: e08e b.n 8023a3a else if (hi2c->XferCount == 2U) 802391c: 687b ldr r3, [r7, #4] 802391e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023920: b29b uxth r3, r3 8023922: 2b02 cmp r3, #2 8023924: d176 bne.n 8023a14 if ((CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP)) 8023926: 68fb ldr r3, [r7, #12] 8023928: 2b01 cmp r3, #1 802392a: d002 beq.n 8023932 802392c: 68fb ldr r3, [r7, #12] 802392e: 2b10 cmp r3, #16 8023930: d108 bne.n 8023944 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023932: 687b ldr r3, [r7, #4] 8023934: 681b ldr r3, [r3, #0] 8023936: 681a ldr r2, [r3, #0] 8023938: 687b ldr r3, [r7, #4] 802393a: 681b ldr r3, [r3, #0] 802393c: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023940: 601a str r2, [r3, #0] 8023942: e019 b.n 8023978 else if ((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_NEXT_FRAME)) 8023944: 68fb ldr r3, [r7, #12] 8023946: 2b04 cmp r3, #4 8023948: d002 beq.n 8023950 802394a: 68fb ldr r3, [r7, #12] 802394c: 2b02 cmp r3, #2 802394e: d108 bne.n 8023962 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023950: 687b ldr r3, [r7, #4] 8023952: 681b ldr r3, [r3, #0] 8023954: 681a ldr r2, [r3, #0] 8023956: 687b ldr r3, [r7, #4] 8023958: 681b ldr r3, [r3, #0] 802395a: f442 6280 orr.w r2, r2, #1024 @ 0x400 802395e: 601a str r2, [r3, #0] 8023960: e00a b.n 8023978 else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP) 8023962: 68fb ldr r3, [r7, #12] 8023964: 2b10 cmp r3, #16 8023966: d007 beq.n 8023978 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8023968: 687b ldr r3, [r7, #4] 802396a: 681b ldr r3, [r3, #0] 802396c: 681a ldr r2, [r3, #0] 802396e: 687b ldr r3, [r7, #4] 8023970: 681b ldr r3, [r3, #0] 8023972: f442 7200 orr.w r2, r2, #512 @ 0x200 8023976: 601a str r2, [r3, #0] *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8023978: 687b ldr r3, [r7, #4] 802397a: 681b ldr r3, [r3, #0] 802397c: 691a ldr r2, [r3, #16] 802397e: 687b ldr r3, [r7, #4] 8023980: 6a5b ldr r3, [r3, #36] @ 0x24 8023982: b2d2 uxtb r2, r2 8023984: 701a strb r2, [r3, #0] hi2c->pBuffPtr++; 8023986: 687b ldr r3, [r7, #4] 8023988: 6a5b ldr r3, [r3, #36] @ 0x24 802398a: 1c5a adds r2, r3, #1 802398c: 687b ldr r3, [r7, #4] 802398e: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 8023990: 687b ldr r3, [r7, #4] 8023992: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023994: b29b uxth r3, r3 8023996: 3b01 subs r3, #1 8023998: b29a uxth r2, r3 802399a: 687b ldr r3, [r7, #4] 802399c: 855a strh r2, [r3, #42] @ 0x2a *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 802399e: 687b ldr r3, [r7, #4] 80239a0: 681b ldr r3, [r3, #0] 80239a2: 691a ldr r2, [r3, #16] 80239a4: 687b ldr r3, [r7, #4] 80239a6: 6a5b ldr r3, [r3, #36] @ 0x24 80239a8: b2d2 uxtb r2, r2 80239aa: 701a strb r2, [r3, #0] hi2c->pBuffPtr++; 80239ac: 687b ldr r3, [r7, #4] 80239ae: 6a5b ldr r3, [r3, #36] @ 0x24 80239b0: 1c5a adds r2, r3, #1 80239b2: 687b ldr r3, [r7, #4] 80239b4: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 80239b6: 687b ldr r3, [r7, #4] 80239b8: 8d5b ldrh r3, [r3, #42] @ 0x2a 80239ba: b29b uxth r3, r3 80239bc: 3b01 subs r3, #1 80239be: b29a uxth r2, r3 80239c0: 687b ldr r3, [r7, #4] 80239c2: 855a strh r2, [r3, #42] @ 0x2a __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); 80239c4: 687b ldr r3, [r7, #4] 80239c6: 681b ldr r3, [r3, #0] 80239c8: 685a ldr r2, [r3, #4] 80239ca: 687b ldr r3, [r7, #4] 80239cc: 681b ldr r3, [r3, #0] 80239ce: f422 7240 bic.w r2, r2, #768 @ 0x300 80239d2: 605a str r2, [r3, #4] hi2c->State = HAL_I2C_STATE_READY; 80239d4: 687b ldr r3, [r7, #4] 80239d6: 2220 movs r2, #32 80239d8: f883 203d strb.w r2, [r3, #61] @ 0x3d if (hi2c->Mode == HAL_I2C_MODE_MEM) 80239dc: 687b ldr r3, [r7, #4] 80239de: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80239e2: b2db uxtb r3, r3 80239e4: 2b40 cmp r3, #64 @ 0x40 80239e6: d10a bne.n 80239fe hi2c->Mode = HAL_I2C_MODE_NONE; 80239e8: 687b ldr r3, [r7, #4] 80239ea: 2200 movs r2, #0 80239ec: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->PreviousState = I2C_STATE_NONE; 80239f0: 687b ldr r3, [r7, #4] 80239f2: 2200 movs r2, #0 80239f4: 631a str r2, [r3, #48] @ 0x30 HAL_I2C_MemRxCpltCallback(hi2c); 80239f6: 6878 ldr r0, [r7, #4] 80239f8: f7ff fcba bl 8023370 } 80239fc: e01d b.n 8023a3a hi2c->Mode = HAL_I2C_MODE_NONE; 80239fe: 687b ldr r3, [r7, #4] 8023a00: 2200 movs r2, #0 8023a02: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; 8023a06: 687b ldr r3, [r7, #4] 8023a08: 2212 movs r2, #18 8023a0a: 631a str r2, [r3, #48] @ 0x30 HAL_I2C_MasterRxCpltCallback(hi2c); 8023a0c: 6878 ldr r0, [r7, #4] 8023a0e: f7ff fc6f bl 80232f0 } 8023a12: e012 b.n 8023a3a *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8023a14: 687b ldr r3, [r7, #4] 8023a16: 681b ldr r3, [r3, #0] 8023a18: 691a ldr r2, [r3, #16] 8023a1a: 687b ldr r3, [r7, #4] 8023a1c: 6a5b ldr r3, [r3, #36] @ 0x24 8023a1e: b2d2 uxtb r2, r2 8023a20: 701a strb r2, [r3, #0] hi2c->pBuffPtr++; 8023a22: 687b ldr r3, [r7, #4] 8023a24: 6a5b ldr r3, [r3, #36] @ 0x24 8023a26: 1c5a adds r2, r3, #1 8023a28: 687b ldr r3, [r7, #4] 8023a2a: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 8023a2c: 687b ldr r3, [r7, #4] 8023a2e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023a30: b29b uxth r3, r3 8023a32: 3b01 subs r3, #1 8023a34: b29a uxth r2, r3 8023a36: 687b ldr r3, [r7, #4] 8023a38: 855a strh r2, [r3, #42] @ 0x2a } 8023a3a: bf00 nop 8023a3c: 3710 adds r7, #16 8023a3e: 46bd mov sp, r7 8023a40: bd80 pop {r7, pc} 08023a42 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_Master_SB(I2C_HandleTypeDef *hi2c) { 8023a42: b480 push {r7} 8023a44: b083 sub sp, #12 8023a46: af00 add r7, sp, #0 8023a48: 6078 str r0, [r7, #4] if (hi2c->Mode == HAL_I2C_MODE_MEM) 8023a4a: 687b ldr r3, [r7, #4] 8023a4c: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8023a50: b2db uxtb r3, r3 8023a52: 2b40 cmp r3, #64 @ 0x40 8023a54: d117 bne.n 8023a86 { if (hi2c->EventCount == 0U) 8023a56: 687b ldr r3, [r7, #4] 8023a58: 6d1b ldr r3, [r3, #80] @ 0x50 8023a5a: 2b00 cmp r3, #0 8023a5c: d109 bne.n 8023a72 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 8023a5e: 687b ldr r3, [r7, #4] 8023a60: 6c5b ldr r3, [r3, #68] @ 0x44 8023a62: b2db uxtb r3, r3 8023a64: 461a mov r2, r3 8023a66: 687b ldr r3, [r7, #4] 8023a68: 681b ldr r3, [r3, #0] 8023a6a: f002 02fe and.w r2, r2, #254 @ 0xfe 8023a6e: 611a str r2, [r3, #16] { /* Do nothing */ } } } } 8023a70: e067 b.n 8023b42 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); 8023a72: 687b ldr r3, [r7, #4] 8023a74: 6c5b ldr r3, [r3, #68] @ 0x44 8023a76: b2db uxtb r3, r3 8023a78: f043 0301 orr.w r3, r3, #1 8023a7c: b2da uxtb r2, r3 8023a7e: 687b ldr r3, [r7, #4] 8023a80: 681b ldr r3, [r3, #0] 8023a82: 611a str r2, [r3, #16] } 8023a84: e05d b.n 8023b42 if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 8023a86: 687b ldr r3, [r7, #4] 8023a88: 691b ldr r3, [r3, #16] 8023a8a: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 8023a8e: d133 bne.n 8023af8 if (hi2c->State == HAL_I2C_STATE_BUSY_TX) 8023a90: 687b ldr r3, [r7, #4] 8023a92: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8023a96: b2db uxtb r3, r3 8023a98: 2b21 cmp r3, #33 @ 0x21 8023a9a: d109 bne.n 8023ab0 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress); 8023a9c: 687b ldr r3, [r7, #4] 8023a9e: 6c5b ldr r3, [r3, #68] @ 0x44 8023aa0: b2db uxtb r3, r3 8023aa2: 461a mov r2, r3 8023aa4: 687b ldr r3, [r7, #4] 8023aa6: 681b ldr r3, [r3, #0] 8023aa8: f002 02fe and.w r2, r2, #254 @ 0xfe 8023aac: 611a str r2, [r3, #16] 8023aae: e008 b.n 8023ac2 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); 8023ab0: 687b ldr r3, [r7, #4] 8023ab2: 6c5b ldr r3, [r3, #68] @ 0x44 8023ab4: b2db uxtb r3, r3 8023ab6: f043 0301 orr.w r3, r3, #1 8023aba: b2da uxtb r2, r3 8023abc: 687b ldr r3, [r7, #4] 8023abe: 681b ldr r3, [r3, #0] 8023ac0: 611a str r2, [r3, #16] if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL)) 8023ac2: 687b ldr r3, [r7, #4] 8023ac4: 6b5b ldr r3, [r3, #52] @ 0x34 8023ac6: 2b00 cmp r3, #0 8023ac8: d004 beq.n 8023ad4 8023aca: 687b ldr r3, [r7, #4] 8023acc: 6b5b ldr r3, [r3, #52] @ 0x34 8023ace: 6bdb ldr r3, [r3, #60] @ 0x3c 8023ad0: 2b00 cmp r3, #0 8023ad2: d108 bne.n 8023ae6 || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL))) 8023ad4: 687b ldr r3, [r7, #4] 8023ad6: 6b9b ldr r3, [r3, #56] @ 0x38 8023ad8: 2b00 cmp r3, #0 8023ada: d032 beq.n 8023b42 8023adc: 687b ldr r3, [r7, #4] 8023ade: 6b9b ldr r3, [r3, #56] @ 0x38 8023ae0: 6bdb ldr r3, [r3, #60] @ 0x3c 8023ae2: 2b00 cmp r3, #0 8023ae4: d02d beq.n 8023b42 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); 8023ae6: 687b ldr r3, [r7, #4] 8023ae8: 681b ldr r3, [r3, #0] 8023aea: 685a ldr r2, [r3, #4] 8023aec: 687b ldr r3, [r7, #4] 8023aee: 681b ldr r3, [r3, #0] 8023af0: f442 6200 orr.w r2, r2, #2048 @ 0x800 8023af4: 605a str r2, [r3, #4] } 8023af6: e024 b.n 8023b42 if (hi2c->EventCount == 0U) 8023af8: 687b ldr r3, [r7, #4] 8023afa: 6d1b ldr r3, [r3, #80] @ 0x50 8023afc: 2b00 cmp r3, #0 8023afe: d10e bne.n 8023b1e hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress); 8023b00: 687b ldr r3, [r7, #4] 8023b02: 6c5b ldr r3, [r3, #68] @ 0x44 8023b04: b29b uxth r3, r3 8023b06: 11db asrs r3, r3, #7 8023b08: b2db uxtb r3, r3 8023b0a: f003 0306 and.w r3, r3, #6 8023b0e: b2db uxtb r3, r3 8023b10: f063 030f orn r3, r3, #15 8023b14: b2da uxtb r2, r3 8023b16: 687b ldr r3, [r7, #4] 8023b18: 681b ldr r3, [r3, #0] 8023b1a: 611a str r2, [r3, #16] } 8023b1c: e011 b.n 8023b42 else if (hi2c->EventCount == 1U) 8023b1e: 687b ldr r3, [r7, #4] 8023b20: 6d1b ldr r3, [r3, #80] @ 0x50 8023b22: 2b01 cmp r3, #1 8023b24: d10d bne.n 8023b42 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress); 8023b26: 687b ldr r3, [r7, #4] 8023b28: 6c5b ldr r3, [r3, #68] @ 0x44 8023b2a: b29b uxth r3, r3 8023b2c: 11db asrs r3, r3, #7 8023b2e: b2db uxtb r3, r3 8023b30: f003 0306 and.w r3, r3, #6 8023b34: b2db uxtb r3, r3 8023b36: f063 030e orn r3, r3, #14 8023b3a: b2da uxtb r2, r3 8023b3c: 687b ldr r3, [r7, #4] 8023b3e: 681b ldr r3, [r3, #0] 8023b40: 611a str r2, [r3, #16] } 8023b42: bf00 nop 8023b44: 370c adds r7, #12 8023b46: 46bd mov sp, r7 8023b48: f85d 7b04 ldr.w r7, [sp], #4 8023b4c: 4770 bx lr 08023b4e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c) { 8023b4e: b480 push {r7} 8023b50: b083 sub sp, #12 8023b52: af00 add r7, sp, #0 8023b54: 6078 str r0, [r7, #4] /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress); 8023b56: 687b ldr r3, [r7, #4] 8023b58: 6c5b ldr r3, [r3, #68] @ 0x44 8023b5a: b2da uxtb r2, r3 8023b5c: 687b ldr r3, [r7, #4] 8023b5e: 681b ldr r3, [r3, #0] 8023b60: 611a str r2, [r3, #16] if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL)) 8023b62: 687b ldr r3, [r7, #4] 8023b64: 6b5b ldr r3, [r3, #52] @ 0x34 8023b66: 2b00 cmp r3, #0 8023b68: d004 beq.n 8023b74 8023b6a: 687b ldr r3, [r7, #4] 8023b6c: 6b5b ldr r3, [r3, #52] @ 0x34 8023b6e: 6bdb ldr r3, [r3, #60] @ 0x3c 8023b70: 2b00 cmp r3, #0 8023b72: d108 bne.n 8023b86 || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL))) 8023b74: 687b ldr r3, [r7, #4] 8023b76: 6b9b ldr r3, [r3, #56] @ 0x38 8023b78: 2b00 cmp r3, #0 8023b7a: d00c beq.n 8023b96 8023b7c: 687b ldr r3, [r7, #4] 8023b7e: 6b9b ldr r3, [r3, #56] @ 0x38 8023b80: 6bdb ldr r3, [r3, #60] @ 0x3c 8023b82: 2b00 cmp r3, #0 8023b84: d007 beq.n 8023b96 { /* Enable DMA Request */ SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); 8023b86: 687b ldr r3, [r7, #4] 8023b88: 681b ldr r3, [r3, #0] 8023b8a: 685a ldr r2, [r3, #4] 8023b8c: 687b ldr r3, [r7, #4] 8023b8e: 681b ldr r3, [r3, #0] 8023b90: f442 6200 orr.w r2, r2, #2048 @ 0x800 8023b94: 605a str r2, [r3, #4] } } 8023b96: bf00 nop 8023b98: 370c adds r7, #12 8023b9a: 46bd mov sp, r7 8023b9c: f85d 7b04 ldr.w r7, [sp], #4 8023ba0: 4770 bx lr 08023ba2 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c) { 8023ba2: b480 push {r7} 8023ba4: b091 sub sp, #68 @ 0x44 8023ba6: af00 add r7, sp, #0 8023ba8: 6078 str r0, [r7, #4] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode; 8023baa: 687b ldr r3, [r7, #4] 8023bac: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8023bb0: f887 303f strb.w r3, [r7, #63] @ 0x3f uint32_t CurrentXferOptions = hi2c->XferOptions; 8023bb4: 687b ldr r3, [r7, #4] 8023bb6: 6adb ldr r3, [r3, #44] @ 0x2c 8023bb8: 63bb str r3, [r7, #56] @ 0x38 uint32_t Prev_State = hi2c->PreviousState; 8023bba: 687b ldr r3, [r7, #4] 8023bbc: 6b1b ldr r3, [r3, #48] @ 0x30 8023bbe: 637b str r3, [r7, #52] @ 0x34 if (hi2c->State == HAL_I2C_STATE_BUSY_RX) 8023bc0: 687b ldr r3, [r7, #4] 8023bc2: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8023bc6: b2db uxtb r3, r3 8023bc8: 2b22 cmp r3, #34 @ 0x22 8023bca: f040 8169 bne.w 8023ea0 { if ((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM)) 8023bce: 687b ldr r3, [r7, #4] 8023bd0: 6d1b ldr r3, [r3, #80] @ 0x50 8023bd2: 2b00 cmp r3, #0 8023bd4: d10f bne.n 8023bf6 8023bd6: f897 303f ldrb.w r3, [r7, #63] @ 0x3f 8023bda: 2b40 cmp r3, #64 @ 0x40 8023bdc: d10b bne.n 8023bf6 { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023bde: 2300 movs r3, #0 8023be0: 633b str r3, [r7, #48] @ 0x30 8023be2: 687b ldr r3, [r7, #4] 8023be4: 681b ldr r3, [r3, #0] 8023be6: 695b ldr r3, [r3, #20] 8023be8: 633b str r3, [r7, #48] @ 0x30 8023bea: 687b ldr r3, [r7, #4] 8023bec: 681b ldr r3, [r3, #0] 8023bee: 699b ldr r3, [r3, #24] 8023bf0: 633b str r3, [r7, #48] @ 0x30 8023bf2: 6b3b ldr r3, [r7, #48] @ 0x30 8023bf4: e160 b.n 8023eb8 } else if ((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)) 8023bf6: 687b ldr r3, [r7, #4] 8023bf8: 6d1b ldr r3, [r3, #80] @ 0x50 8023bfa: 2b00 cmp r3, #0 8023bfc: d11d bne.n 8023c3a 8023bfe: 687b ldr r3, [r7, #4] 8023c00: 691b ldr r3, [r3, #16] 8023c02: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 8023c06: d118 bne.n 8023c3a { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023c08: 2300 movs r3, #0 8023c0a: 62fb str r3, [r7, #44] @ 0x2c 8023c0c: 687b ldr r3, [r7, #4] 8023c0e: 681b ldr r3, [r3, #0] 8023c10: 695b ldr r3, [r3, #20] 8023c12: 62fb str r3, [r7, #44] @ 0x2c 8023c14: 687b ldr r3, [r7, #4] 8023c16: 681b ldr r3, [r3, #0] 8023c18: 699b ldr r3, [r3, #24] 8023c1a: 62fb str r3, [r7, #44] @ 0x2c 8023c1c: 6afb ldr r3, [r7, #44] @ 0x2c /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); 8023c1e: 687b ldr r3, [r7, #4] 8023c20: 681b ldr r3, [r3, #0] 8023c22: 681a ldr r2, [r3, #0] 8023c24: 687b ldr r3, [r7, #4] 8023c26: 681b ldr r3, [r3, #0] 8023c28: f442 7280 orr.w r2, r2, #256 @ 0x100 8023c2c: 601a str r2, [r3, #0] hi2c->EventCount++; 8023c2e: 687b ldr r3, [r7, #4] 8023c30: 6d1b ldr r3, [r3, #80] @ 0x50 8023c32: 1c5a adds r2, r3, #1 8023c34: 687b ldr r3, [r7, #4] 8023c36: 651a str r2, [r3, #80] @ 0x50 8023c38: e13e b.n 8023eb8 } else { if (hi2c->XferCount == 0U) 8023c3a: 687b ldr r3, [r7, #4] 8023c3c: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023c3e: b29b uxth r3, r3 8023c40: 2b00 cmp r3, #0 8023c42: d113 bne.n 8023c6c { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023c44: 2300 movs r3, #0 8023c46: 62bb str r3, [r7, #40] @ 0x28 8023c48: 687b ldr r3, [r7, #4] 8023c4a: 681b ldr r3, [r3, #0] 8023c4c: 695b ldr r3, [r3, #20] 8023c4e: 62bb str r3, [r7, #40] @ 0x28 8023c50: 687b ldr r3, [r7, #4] 8023c52: 681b ldr r3, [r3, #0] 8023c54: 699b ldr r3, [r3, #24] 8023c56: 62bb str r3, [r7, #40] @ 0x28 8023c58: 6abb ldr r3, [r7, #40] @ 0x28 /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8023c5a: 687b ldr r3, [r7, #4] 8023c5c: 681b ldr r3, [r3, #0] 8023c5e: 681a ldr r2, [r3, #0] 8023c60: 687b ldr r3, [r7, #4] 8023c62: 681b ldr r3, [r3, #0] 8023c64: f442 7200 orr.w r2, r2, #512 @ 0x200 8023c68: 601a str r2, [r3, #0] 8023c6a: e115 b.n 8023e98 } else if (hi2c->XferCount == 1U) 8023c6c: 687b ldr r3, [r7, #4] 8023c6e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023c70: b29b uxth r3, r3 8023c72: 2b01 cmp r3, #1 8023c74: f040 808a bne.w 8023d8c { if (CurrentXferOptions == I2C_NO_OPTION_FRAME) 8023c78: 6bbb ldr r3, [r7, #56] @ 0x38 8023c7a: f513 3f80 cmn.w r3, #65536 @ 0x10000 8023c7e: d137 bne.n 8023cf0 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023c80: 687b ldr r3, [r7, #4] 8023c82: 681b ldr r3, [r3, #0] 8023c84: 681a ldr r2, [r3, #0] 8023c86: 687b ldr r3, [r7, #4] 8023c88: 681b ldr r3, [r3, #0] 8023c8a: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023c8e: 601a str r2, [r3, #0] if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 8023c90: 687b ldr r3, [r7, #4] 8023c92: 681b ldr r3, [r3, #0] 8023c94: 685b ldr r3, [r3, #4] 8023c96: f403 6300 and.w r3, r3, #2048 @ 0x800 8023c9a: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8023c9e: d113 bne.n 8023cc8 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023ca0: 687b ldr r3, [r7, #4] 8023ca2: 681b ldr r3, [r3, #0] 8023ca4: 681a ldr r2, [r3, #0] 8023ca6: 687b ldr r3, [r7, #4] 8023ca8: 681b ldr r3, [r3, #0] 8023caa: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023cae: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023cb0: 2300 movs r3, #0 8023cb2: 627b str r3, [r7, #36] @ 0x24 8023cb4: 687b ldr r3, [r7, #4] 8023cb6: 681b ldr r3, [r3, #0] 8023cb8: 695b ldr r3, [r3, #20] 8023cba: 627b str r3, [r7, #36] @ 0x24 8023cbc: 687b ldr r3, [r7, #4] 8023cbe: 681b ldr r3, [r3, #0] 8023cc0: 699b ldr r3, [r3, #24] 8023cc2: 627b str r3, [r7, #36] @ 0x24 8023cc4: 6a7b ldr r3, [r7, #36] @ 0x24 8023cc6: e0e7 b.n 8023e98 } else { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023cc8: 2300 movs r3, #0 8023cca: 623b str r3, [r7, #32] 8023ccc: 687b ldr r3, [r7, #4] 8023cce: 681b ldr r3, [r3, #0] 8023cd0: 695b ldr r3, [r3, #20] 8023cd2: 623b str r3, [r7, #32] 8023cd4: 687b ldr r3, [r7, #4] 8023cd6: 681b ldr r3, [r3, #0] 8023cd8: 699b ldr r3, [r3, #24] 8023cda: 623b str r3, [r7, #32] 8023cdc: 6a3b ldr r3, [r7, #32] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8023cde: 687b ldr r3, [r7, #4] 8023ce0: 681b ldr r3, [r3, #0] 8023ce2: 681a ldr r2, [r3, #0] 8023ce4: 687b ldr r3, [r7, #4] 8023ce6: 681b ldr r3, [r3, #0] 8023ce8: f442 7200 orr.w r2, r2, #512 @ 0x200 8023cec: 601a str r2, [r3, #0] 8023cee: e0d3 b.n 8023e98 } } /* Prepare next transfer or stop current transfer */ else if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \ 8023cf0: 6bbb ldr r3, [r7, #56] @ 0x38 8023cf2: 2b08 cmp r3, #8 8023cf4: d02e beq.n 8023d54 8023cf6: 6bbb ldr r3, [r7, #56] @ 0x38 8023cf8: 2b20 cmp r3, #32 8023cfa: d02b beq.n 8023d54 && ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (CurrentXferOptions == I2C_FIRST_FRAME))) 8023cfc: 6b7b ldr r3, [r7, #52] @ 0x34 8023cfe: 2b12 cmp r3, #18 8023d00: d102 bne.n 8023d08 8023d02: 6bbb ldr r3, [r7, #56] @ 0x38 8023d04: 2b01 cmp r3, #1 8023d06: d125 bne.n 8023d54 { if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)) 8023d08: 6bbb ldr r3, [r7, #56] @ 0x38 8023d0a: 2b04 cmp r3, #4 8023d0c: d00e beq.n 8023d2c 8023d0e: 6bbb ldr r3, [r7, #56] @ 0x38 8023d10: 2b02 cmp r3, #2 8023d12: d00b beq.n 8023d2c 8023d14: 6bbb ldr r3, [r7, #56] @ 0x38 8023d16: 2b10 cmp r3, #16 8023d18: d008 beq.n 8023d2c { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023d1a: 687b ldr r3, [r7, #4] 8023d1c: 681b ldr r3, [r3, #0] 8023d1e: 681a ldr r2, [r3, #0] 8023d20: 687b ldr r3, [r7, #4] 8023d22: 681b ldr r3, [r3, #0] 8023d24: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023d28: 601a str r2, [r3, #0] 8023d2a: e007 b.n 8023d3c } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023d2c: 687b ldr r3, [r7, #4] 8023d2e: 681b ldr r3, [r3, #0] 8023d30: 681a ldr r2, [r3, #0] 8023d32: 687b ldr r3, [r7, #4] 8023d34: 681b ldr r3, [r3, #0] 8023d36: f442 6280 orr.w r2, r2, #1024 @ 0x400 8023d3a: 601a str r2, [r3, #0] } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023d3c: 2300 movs r3, #0 8023d3e: 61fb str r3, [r7, #28] 8023d40: 687b ldr r3, [r7, #4] 8023d42: 681b ldr r3, [r3, #0] 8023d44: 695b ldr r3, [r3, #20] 8023d46: 61fb str r3, [r7, #28] 8023d48: 687b ldr r3, [r7, #4] 8023d4a: 681b ldr r3, [r3, #0] 8023d4c: 699b ldr r3, [r3, #24] 8023d4e: 61fb str r3, [r7, #28] 8023d50: 69fb ldr r3, [r7, #28] 8023d52: e0a1 b.n 8023e98 } else { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023d54: 687b ldr r3, [r7, #4] 8023d56: 681b ldr r3, [r3, #0] 8023d58: 681a ldr r2, [r3, #0] 8023d5a: 687b ldr r3, [r7, #4] 8023d5c: 681b ldr r3, [r3, #0] 8023d5e: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023d62: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023d64: 2300 movs r3, #0 8023d66: 61bb str r3, [r7, #24] 8023d68: 687b ldr r3, [r7, #4] 8023d6a: 681b ldr r3, [r3, #0] 8023d6c: 695b ldr r3, [r3, #20] 8023d6e: 61bb str r3, [r7, #24] 8023d70: 687b ldr r3, [r7, #4] 8023d72: 681b ldr r3, [r3, #0] 8023d74: 699b ldr r3, [r3, #24] 8023d76: 61bb str r3, [r7, #24] 8023d78: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8023d7a: 687b ldr r3, [r7, #4] 8023d7c: 681b ldr r3, [r3, #0] 8023d7e: 681a ldr r2, [r3, #0] 8023d80: 687b ldr r3, [r7, #4] 8023d82: 681b ldr r3, [r3, #0] 8023d84: f442 7200 orr.w r2, r2, #512 @ 0x200 8023d88: 601a str r2, [r3, #0] 8023d8a: e085 b.n 8023e98 } } else if (hi2c->XferCount == 2U) 8023d8c: 687b ldr r3, [r7, #4] 8023d8e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023d90: b29b uxth r3, r3 8023d92: 2b02 cmp r3, #2 8023d94: d14d bne.n 8023e32 { if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)) 8023d96: 6bbb ldr r3, [r7, #56] @ 0x38 8023d98: 2b04 cmp r3, #4 8023d9a: d016 beq.n 8023dca 8023d9c: 6bbb ldr r3, [r7, #56] @ 0x38 8023d9e: 2b02 cmp r3, #2 8023da0: d013 beq.n 8023dca 8023da2: 6bbb ldr r3, [r7, #56] @ 0x38 8023da4: 2b10 cmp r3, #16 8023da6: d010 beq.n 8023dca { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023da8: 687b ldr r3, [r7, #4] 8023daa: 681b ldr r3, [r3, #0] 8023dac: 681a ldr r2, [r3, #0] 8023dae: 687b ldr r3, [r7, #4] 8023db0: 681b ldr r3, [r3, #0] 8023db2: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023db6: 601a str r2, [r3, #0] /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); 8023db8: 687b ldr r3, [r7, #4] 8023dba: 681b ldr r3, [r3, #0] 8023dbc: 681a ldr r2, [r3, #0] 8023dbe: 687b ldr r3, [r7, #4] 8023dc0: 681b ldr r3, [r3, #0] 8023dc2: f442 6200 orr.w r2, r2, #2048 @ 0x800 8023dc6: 601a str r2, [r3, #0] 8023dc8: e007 b.n 8023dda } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023dca: 687b ldr r3, [r7, #4] 8023dcc: 681b ldr r3, [r3, #0] 8023dce: 681a ldr r2, [r3, #0] 8023dd0: 687b ldr r3, [r7, #4] 8023dd2: 681b ldr r3, [r3, #0] 8023dd4: f442 6280 orr.w r2, r2, #1024 @ 0x400 8023dd8: 601a str r2, [r3, #0] } if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME))) 8023dda: 687b ldr r3, [r7, #4] 8023ddc: 681b ldr r3, [r3, #0] 8023dde: 685b ldr r3, [r3, #4] 8023de0: f403 6300 and.w r3, r3, #2048 @ 0x800 8023de4: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8023de8: d117 bne.n 8023e1a 8023dea: 6bbb ldr r3, [r7, #56] @ 0x38 8023dec: f513 3f80 cmn.w r3, #65536 @ 0x10000 8023df0: d00b beq.n 8023e0a 8023df2: 6bbb ldr r3, [r7, #56] @ 0x38 8023df4: 2b01 cmp r3, #1 8023df6: d008 beq.n 8023e0a 8023df8: 6bbb ldr r3, [r7, #56] @ 0x38 8023dfa: 2b08 cmp r3, #8 8023dfc: d005 beq.n 8023e0a 8023dfe: 6bbb ldr r3, [r7, #56] @ 0x38 8023e00: 2b10 cmp r3, #16 8023e02: d002 beq.n 8023e0a 8023e04: 6bbb ldr r3, [r7, #56] @ 0x38 8023e06: 2b20 cmp r3, #32 8023e08: d107 bne.n 8023e1a { /* Enable Last DMA bit */ SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST); 8023e0a: 687b ldr r3, [r7, #4] 8023e0c: 681b ldr r3, [r3, #0] 8023e0e: 685a ldr r2, [r3, #4] 8023e10: 687b ldr r3, [r7, #4] 8023e12: 681b ldr r3, [r3, #0] 8023e14: f442 5280 orr.w r2, r2, #4096 @ 0x1000 8023e18: 605a str r2, [r3, #4] } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023e1a: 2300 movs r3, #0 8023e1c: 617b str r3, [r7, #20] 8023e1e: 687b ldr r3, [r7, #4] 8023e20: 681b ldr r3, [r3, #0] 8023e22: 695b ldr r3, [r3, #20] 8023e24: 617b str r3, [r7, #20] 8023e26: 687b ldr r3, [r7, #4] 8023e28: 681b ldr r3, [r3, #0] 8023e2a: 699b ldr r3, [r3, #24] 8023e2c: 617b str r3, [r7, #20] 8023e2e: 697b ldr r3, [r7, #20] 8023e30: e032 b.n 8023e98 } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8023e32: 687b ldr r3, [r7, #4] 8023e34: 681b ldr r3, [r3, #0] 8023e36: 681a ldr r2, [r3, #0] 8023e38: 687b ldr r3, [r7, #4] 8023e3a: 681b ldr r3, [r3, #0] 8023e3c: f442 6280 orr.w r2, r2, #1024 @ 0x400 8023e40: 601a str r2, [r3, #0] if (((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) && ((CurrentXferOptions == I2C_NO_OPTION_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP) || (CurrentXferOptions == I2C_LAST_FRAME))) 8023e42: 687b ldr r3, [r7, #4] 8023e44: 681b ldr r3, [r3, #0] 8023e46: 685b ldr r3, [r3, #4] 8023e48: f403 6300 and.w r3, r3, #2048 @ 0x800 8023e4c: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8023e50: d117 bne.n 8023e82 8023e52: 6bbb ldr r3, [r7, #56] @ 0x38 8023e54: f513 3f80 cmn.w r3, #65536 @ 0x10000 8023e58: d00b beq.n 8023e72 8023e5a: 6bbb ldr r3, [r7, #56] @ 0x38 8023e5c: 2b01 cmp r3, #1 8023e5e: d008 beq.n 8023e72 8023e60: 6bbb ldr r3, [r7, #56] @ 0x38 8023e62: 2b08 cmp r3, #8 8023e64: d005 beq.n 8023e72 8023e66: 6bbb ldr r3, [r7, #56] @ 0x38 8023e68: 2b10 cmp r3, #16 8023e6a: d002 beq.n 8023e72 8023e6c: 6bbb ldr r3, [r7, #56] @ 0x38 8023e6e: 2b20 cmp r3, #32 8023e70: d107 bne.n 8023e82 { /* Enable Last DMA bit */ SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST); 8023e72: 687b ldr r3, [r7, #4] 8023e74: 681b ldr r3, [r3, #0] 8023e76: 685a ldr r2, [r3, #4] 8023e78: 687b ldr r3, [r7, #4] 8023e7a: 681b ldr r3, [r3, #0] 8023e7c: f442 5280 orr.w r2, r2, #4096 @ 0x1000 8023e80: 605a str r2, [r3, #4] } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023e82: 2300 movs r3, #0 8023e84: 613b str r3, [r7, #16] 8023e86: 687b ldr r3, [r7, #4] 8023e88: 681b ldr r3, [r3, #0] 8023e8a: 695b ldr r3, [r3, #20] 8023e8c: 613b str r3, [r7, #16] 8023e8e: 687b ldr r3, [r7, #4] 8023e90: 681b ldr r3, [r3, #0] 8023e92: 699b ldr r3, [r3, #24] 8023e94: 613b str r3, [r7, #16] 8023e96: 693b ldr r3, [r7, #16] } /* Reset Event counter */ hi2c->EventCount = 0U; 8023e98: 687b ldr r3, [r7, #4] 8023e9a: 2200 movs r2, #0 8023e9c: 651a str r2, [r3, #80] @ 0x50 else { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); } } 8023e9e: e00b b.n 8023eb8 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 8023ea0: 2300 movs r3, #0 8023ea2: 60fb str r3, [r7, #12] 8023ea4: 687b ldr r3, [r7, #4] 8023ea6: 681b ldr r3, [r3, #0] 8023ea8: 695b ldr r3, [r3, #20] 8023eaa: 60fb str r3, [r7, #12] 8023eac: 687b ldr r3, [r7, #4] 8023eae: 681b ldr r3, [r3, #0] 8023eb0: 699b ldr r3, [r3, #24] 8023eb2: 60fb str r3, [r7, #12] 8023eb4: 68fb ldr r3, [r7, #12] } 8023eb6: e7ff b.n 8023eb8 8023eb8: bf00 nop 8023eba: 3744 adds r7, #68 @ 0x44 8023ebc: 46bd mov sp, r7 8023ebe: f85d 7b04 ldr.w r7, [sp], #4 8023ec2: 4770 bx lr 08023ec4 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) { 8023ec4: b580 push {r7, lr} 8023ec6: b084 sub sp, #16 8023ec8: af00 add r7, sp, #0 8023eca: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 8023ecc: 687b ldr r3, [r7, #4] 8023ece: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8023ed2: 73fb strb r3, [r7, #15] if (hi2c->XferCount != 0U) 8023ed4: 687b ldr r3, [r7, #4] 8023ed6: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023ed8: b29b uxth r3, r3 8023eda: 2b00 cmp r3, #0 8023edc: d02b beq.n 8023f36 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8023ede: 687b ldr r3, [r7, #4] 8023ee0: 6a5b ldr r3, [r3, #36] @ 0x24 8023ee2: 781a ldrb r2, [r3, #0] 8023ee4: 687b ldr r3, [r7, #4] 8023ee6: 681b ldr r3, [r3, #0] 8023ee8: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8023eea: 687b ldr r3, [r7, #4] 8023eec: 6a5b ldr r3, [r3, #36] @ 0x24 8023eee: 1c5a adds r2, r3, #1 8023ef0: 687b ldr r3, [r7, #4] 8023ef2: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8023ef4: 687b ldr r3, [r7, #4] 8023ef6: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023ef8: b29b uxth r3, r3 8023efa: 3b01 subs r3, #1 8023efc: b29a uxth r2, r3 8023efe: 687b ldr r3, [r7, #4] 8023f00: 855a strh r2, [r3, #42] @ 0x2a if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) 8023f02: 687b ldr r3, [r7, #4] 8023f04: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023f06: b29b uxth r3, r3 8023f08: 2b00 cmp r3, #0 8023f0a: d114 bne.n 8023f36 8023f0c: 7bfb ldrb r3, [r7, #15] 8023f0e: 2b29 cmp r3, #41 @ 0x29 8023f10: d111 bne.n 8023f36 { /* Last Byte is received, disable Interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8023f12: 687b ldr r3, [r7, #4] 8023f14: 681b ldr r3, [r3, #0] 8023f16: 685a ldr r2, [r3, #4] 8023f18: 687b ldr r3, [r7, #4] 8023f1a: 681b ldr r3, [r3, #0] 8023f1c: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023f20: 605a str r2, [r3, #4] /* Set state at HAL_I2C_STATE_LISTEN */ hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; 8023f22: 687b ldr r3, [r7, #4] 8023f24: 2221 movs r2, #33 @ 0x21 8023f26: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 8023f28: 687b ldr r3, [r7, #4] 8023f2a: 2228 movs r2, #40 @ 0x28 8023f2c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); 8023f30: 6878 ldr r0, [r7, #4] 8023f32: f7ff f9e7 bl 8023304 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } } 8023f36: bf00 nop 8023f38: 3710 adds r7, #16 8023f3a: 46bd mov sp, r7 8023f3c: bd80 pop {r7, pc} 08023f3e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) { 8023f3e: b480 push {r7} 8023f40: b083 sub sp, #12 8023f42: af00 add r7, sp, #0 8023f44: 6078 str r0, [r7, #4] if (hi2c->XferCount != 0U) 8023f46: 687b ldr r3, [r7, #4] 8023f48: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023f4a: b29b uxth r3, r3 8023f4c: 2b00 cmp r3, #0 8023f4e: d011 beq.n 8023f74 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; 8023f50: 687b ldr r3, [r7, #4] 8023f52: 6a5b ldr r3, [r3, #36] @ 0x24 8023f54: 781a ldrb r2, [r3, #0] 8023f56: 687b ldr r3, [r7, #4] 8023f58: 681b ldr r3, [r3, #0] 8023f5a: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8023f5c: 687b ldr r3, [r7, #4] 8023f5e: 6a5b ldr r3, [r3, #36] @ 0x24 8023f60: 1c5a adds r2, r3, #1 8023f62: 687b ldr r3, [r7, #4] 8023f64: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8023f66: 687b ldr r3, [r7, #4] 8023f68: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023f6a: b29b uxth r3, r3 8023f6c: 3b01 subs r3, #1 8023f6e: b29a uxth r2, r3 8023f70: 687b ldr r3, [r7, #4] 8023f72: 855a strh r2, [r3, #42] @ 0x2a } } 8023f74: bf00 nop 8023f76: 370c adds r7, #12 8023f78: 46bd mov sp, r7 8023f7a: f85d 7b04 ldr.w r7, [sp], #4 8023f7e: 4770 bx lr 08023f80 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) { 8023f80: b580 push {r7, lr} 8023f82: b084 sub sp, #16 8023f84: af00 add r7, sp, #0 8023f86: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 8023f88: 687b ldr r3, [r7, #4] 8023f8a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8023f8e: 73fb strb r3, [r7, #15] if (hi2c->XferCount != 0U) 8023f90: 687b ldr r3, [r7, #4] 8023f92: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023f94: b29b uxth r3, r3 8023f96: 2b00 cmp r3, #0 8023f98: d02c beq.n 8023ff4 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8023f9a: 687b ldr r3, [r7, #4] 8023f9c: 681b ldr r3, [r3, #0] 8023f9e: 691a ldr r2, [r3, #16] 8023fa0: 687b ldr r3, [r7, #4] 8023fa2: 6a5b ldr r3, [r3, #36] @ 0x24 8023fa4: b2d2 uxtb r2, r2 8023fa6: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8023fa8: 687b ldr r3, [r7, #4] 8023faa: 6a5b ldr r3, [r3, #36] @ 0x24 8023fac: 1c5a adds r2, r3, #1 8023fae: 687b ldr r3, [r7, #4] 8023fb0: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8023fb2: 687b ldr r3, [r7, #4] 8023fb4: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023fb6: b29b uxth r3, r3 8023fb8: 3b01 subs r3, #1 8023fba: b29a uxth r2, r3 8023fbc: 687b ldr r3, [r7, #4] 8023fbe: 855a strh r2, [r3, #42] @ 0x2a if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 8023fc0: 687b ldr r3, [r7, #4] 8023fc2: 8d5b ldrh r3, [r3, #42] @ 0x2a 8023fc4: b29b uxth r3, r3 8023fc6: 2b00 cmp r3, #0 8023fc8: d114 bne.n 8023ff4 8023fca: 7bfb ldrb r3, [r7, #15] 8023fcc: 2b2a cmp r3, #42 @ 0x2a 8023fce: d111 bne.n 8023ff4 { /* Last Byte is received, disable Interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); 8023fd0: 687b ldr r3, [r7, #4] 8023fd2: 681b ldr r3, [r3, #0] 8023fd4: 685a ldr r2, [r3, #4] 8023fd6: 687b ldr r3, [r7, #4] 8023fd8: 681b ldr r3, [r3, #0] 8023fda: f422 6280 bic.w r2, r2, #1024 @ 0x400 8023fde: 605a str r2, [r3, #4] /* Set state at HAL_I2C_STATE_LISTEN */ hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; 8023fe0: 687b ldr r3, [r7, #4] 8023fe2: 2222 movs r2, #34 @ 0x22 8023fe4: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 8023fe6: 687b ldr r3, [r7, #4] 8023fe8: 2228 movs r2, #40 @ 0x28 8023fea: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->SlaveRxCpltCallback(hi2c); #else HAL_I2C_SlaveRxCpltCallback(hi2c); 8023fee: 6878 ldr r0, [r7, #4] 8023ff0: f7ff f992 bl 8023318 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } } 8023ff4: bf00 nop 8023ff6: 3710 adds r7, #16 8023ff8: 46bd mov sp, r7 8023ffa: bd80 pop {r7, pc} 08023ffc : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) { 8023ffc: b480 push {r7} 8023ffe: b083 sub sp, #12 8024000: af00 add r7, sp, #0 8024002: 6078 str r0, [r7, #4] if (hi2c->XferCount != 0U) 8024004: 687b ldr r3, [r7, #4] 8024006: 8d5b ldrh r3, [r3, #42] @ 0x2a 8024008: b29b uxth r3, r3 802400a: 2b00 cmp r3, #0 802400c: d012 beq.n 8024034 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 802400e: 687b ldr r3, [r7, #4] 8024010: 681b ldr r3, [r3, #0] 8024012: 691a ldr r2, [r3, #16] 8024014: 687b ldr r3, [r7, #4] 8024016: 6a5b ldr r3, [r3, #36] @ 0x24 8024018: b2d2 uxtb r2, r2 802401a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 802401c: 687b ldr r3, [r7, #4] 802401e: 6a5b ldr r3, [r3, #36] @ 0x24 8024020: 1c5a adds r2, r3, #1 8024022: 687b ldr r3, [r7, #4] 8024024: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8024026: 687b ldr r3, [r7, #4] 8024028: 8d5b ldrh r3, [r3, #42] @ 0x2a 802402a: b29b uxth r3, r3 802402c: 3b01 subs r3, #1 802402e: b29a uxth r2, r3 8024030: 687b ldr r3, [r7, #4] 8024032: 855a strh r2, [r3, #42] @ 0x2a } } 8024034: bf00 nop 8024036: 370c adds r7, #12 8024038: 46bd mov sp, r7 802403a: f85d 7b04 ldr.w r7, [sp], #4 802403e: 4770 bx lr 08024040 : * the configuration information for I2C module * @param IT2Flags Interrupt2 flags to handle. * @retval None */ static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags) { 8024040: b580 push {r7, lr} 8024042: b084 sub sp, #16 8024044: af00 add r7, sp, #0 8024046: 6078 str r0, [r7, #4] 8024048: 6039 str r1, [r7, #0] uint8_t TransferDirection = I2C_DIRECTION_RECEIVE; 802404a: 2300 movs r3, #0 802404c: 73fb strb r3, [r7, #15] uint16_t SlaveAddrCode; if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) 802404e: 687b ldr r3, [r7, #4] 8024050: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8024054: b2db uxtb r3, r3 8024056: f003 0328 and.w r3, r3, #40 @ 0x28 802405a: 2b28 cmp r3, #40 @ 0x28 802405c: d125 bne.n 80240aa { /* Disable BUF interrupt, BUF enabling is manage through slave specific interface */ __HAL_I2C_DISABLE_IT(hi2c, (I2C_IT_BUF)); 802405e: 687b ldr r3, [r7, #4] 8024060: 681b ldr r3, [r3, #0] 8024062: 685a ldr r2, [r3, #4] 8024064: 687b ldr r3, [r7, #4] 8024066: 681b ldr r3, [r3, #0] 8024068: f422 6280 bic.w r2, r2, #1024 @ 0x400 802406c: 605a str r2, [r3, #4] /* Transfer Direction requested by Master */ if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_TRA) == RESET) 802406e: 683b ldr r3, [r7, #0] 8024070: f003 0304 and.w r3, r3, #4 8024074: 2b00 cmp r3, #0 8024076: d101 bne.n 802407c { TransferDirection = I2C_DIRECTION_TRANSMIT; 8024078: 2301 movs r3, #1 802407a: 73fb strb r3, [r7, #15] } if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_DUALF) == RESET) 802407c: 683b ldr r3, [r7, #0] 802407e: f003 0380 and.w r3, r3, #128 @ 0x80 8024082: 2b00 cmp r3, #0 8024084: d103 bne.n 802408e { SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress1; 8024086: 687b ldr r3, [r7, #4] 8024088: 68db ldr r3, [r3, #12] 802408a: 81bb strh r3, [r7, #12] 802408c: e002 b.n 8024094 } else { SlaveAddrCode = (uint16_t)hi2c->Init.OwnAddress2; 802408e: 687b ldr r3, [r7, #4] 8024090: 699b ldr r3, [r3, #24] 8024092: 81bb strh r3, [r7, #12] } /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8024094: 687b ldr r3, [r7, #4] 8024096: 2200 movs r2, #0 8024098: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Call Slave Addr callback */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AddrCallback(hi2c, TransferDirection, SlaveAddrCode); #else HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode); 802409c: 89ba ldrh r2, [r7, #12] 802409e: 7bfb ldrb r3, [r7, #15] 80240a0: 4619 mov r1, r3 80240a2: 6878 ldr r0, [r7, #4] 80240a4: f7ff f942 bl 802332c __HAL_I2C_CLEAR_ADDRFLAG(hi2c); /* Process Unlocked */ __HAL_UNLOCK(hi2c); } } 80240a8: e00e b.n 80240c8 __HAL_I2C_CLEAR_ADDRFLAG(hi2c); 80240aa: 2300 movs r3, #0 80240ac: 60bb str r3, [r7, #8] 80240ae: 687b ldr r3, [r7, #4] 80240b0: 681b ldr r3, [r3, #0] 80240b2: 695b ldr r3, [r3, #20] 80240b4: 60bb str r3, [r7, #8] 80240b6: 687b ldr r3, [r7, #4] 80240b8: 681b ldr r3, [r3, #0] 80240ba: 699b ldr r3, [r3, #24] 80240bc: 60bb str r3, [r7, #8] 80240be: 68bb ldr r3, [r7, #8] __HAL_UNLOCK(hi2c); 80240c0: 687b ldr r3, [r7, #4] 80240c2: 2200 movs r2, #0 80240c4: f883 203c strb.w r2, [r3, #60] @ 0x3c } 80240c8: bf00 nop 80240ca: 3710 adds r7, #16 80240cc: 46bd mov sp, r7 80240ce: bd80 pop {r7, pc} 080240d0 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) { 80240d0: b580 push {r7, lr} 80240d2: b084 sub sp, #16 80240d4: af00 add r7, sp, #0 80240d6: 6078 str r0, [r7, #4] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 80240d8: 687b ldr r3, [r7, #4] 80240da: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80240de: 73fb strb r3, [r7, #15] /* Disable EVT, BUF and ERR interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 80240e0: 687b ldr r3, [r7, #4] 80240e2: 681b ldr r3, [r3, #0] 80240e4: 685a ldr r2, [r3, #4] 80240e6: 687b ldr r3, [r7, #4] 80240e8: 681b ldr r3, [r3, #0] 80240ea: f422 62e0 bic.w r2, r2, #1792 @ 0x700 80240ee: 605a str r2, [r3, #4] /* Clear STOPF flag */ __HAL_I2C_CLEAR_STOPFLAG(hi2c); 80240f0: 2300 movs r3, #0 80240f2: 60bb str r3, [r7, #8] 80240f4: 687b ldr r3, [r7, #4] 80240f6: 681b ldr r3, [r3, #0] 80240f8: 695b ldr r3, [r3, #20] 80240fa: 60bb str r3, [r7, #8] 80240fc: 687b ldr r3, [r7, #4] 80240fe: 681b ldr r3, [r3, #0] 8024100: 681a ldr r2, [r3, #0] 8024102: 687b ldr r3, [r7, #4] 8024104: 681b ldr r3, [r3, #0] 8024106: f042 0201 orr.w r2, r2, #1 802410a: 601a str r2, [r3, #0] 802410c: 68bb ldr r3, [r7, #8] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 802410e: 687b ldr r3, [r7, #4] 8024110: 681b ldr r3, [r3, #0] 8024112: 681a ldr r2, [r3, #0] 8024114: 687b ldr r3, [r7, #4] 8024116: 681b ldr r3, [r3, #0] 8024118: f422 6280 bic.w r2, r2, #1024 @ 0x400 802411c: 601a str r2, [r3, #0] /* If a DMA is ongoing, Update handle size context */ if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 802411e: 687b ldr r3, [r7, #4] 8024120: 681b ldr r3, [r3, #0] 8024122: 685b ldr r3, [r3, #4] 8024124: f403 6300 and.w r3, r3, #2048 @ 0x800 8024128: f5b3 6f00 cmp.w r3, #2048 @ 0x800 802412c: d172 bne.n 8024214 { if ((CurrentState == HAL_I2C_STATE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) 802412e: 7bfb ldrb r3, [r7, #15] 8024130: 2b22 cmp r3, #34 @ 0x22 8024132: d002 beq.n 802413a 8024134: 7bfb ldrb r3, [r7, #15] 8024136: 2b2a cmp r3, #42 @ 0x2a 8024138: d135 bne.n 80241a6 { hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmarx)); 802413a: 687b ldr r3, [r7, #4] 802413c: 6b9b ldr r3, [r3, #56] @ 0x38 802413e: 681b ldr r3, [r3, #0] 8024140: 685b ldr r3, [r3, #4] 8024142: b29a uxth r2, r3 8024144: 687b ldr r3, [r7, #4] 8024146: 855a strh r2, [r3, #42] @ 0x2a if (hi2c->XferCount != 0U) 8024148: 687b ldr r3, [r7, #4] 802414a: 8d5b ldrh r3, [r3, #42] @ 0x2a 802414c: b29b uxth r3, r3 802414e: 2b00 cmp r3, #0 8024150: d005 beq.n 802415e { /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8024152: 687b ldr r3, [r7, #4] 8024154: 6c1b ldr r3, [r3, #64] @ 0x40 8024156: f043 0204 orr.w r2, r3, #4 802415a: 687b ldr r3, [r7, #4] 802415c: 641a str r2, [r3, #64] @ 0x40 } /* Disable, stop the current DMA */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); 802415e: 687b ldr r3, [r7, #4] 8024160: 681b ldr r3, [r3, #0] 8024162: 685a ldr r2, [r3, #4] 8024164: 687b ldr r3, [r7, #4] 8024166: 681b ldr r3, [r3, #0] 8024168: f422 6200 bic.w r2, r2, #2048 @ 0x800 802416c: 605a str r2, [r3, #4] /* Abort DMA Xfer if any */ if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) 802416e: 687b ldr r3, [r7, #4] 8024170: 6b9b ldr r3, [r3, #56] @ 0x38 8024172: 4618 mov r0, r3 8024174: f7fd feba bl 8021eec 8024178: 4603 mov r3, r0 802417a: 2b01 cmp r3, #1 802417c: d049 beq.n 8024212 { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; 802417e: 687b ldr r3, [r7, #4] 8024180: 6b9b ldr r3, [r3, #56] @ 0x38 8024182: 4a69 ldr r2, [pc, #420] @ (8024328 ) 8024184: 651a str r2, [r3, #80] @ 0x50 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) 8024186: 687b ldr r3, [r7, #4] 8024188: 6b9b ldr r3, [r3, #56] @ 0x38 802418a: 4618 mov r0, r3 802418c: f7fd fd02 bl 8021b94 8024190: 4603 mov r3, r0 8024192: 2b00 cmp r3, #0 8024194: d03d beq.n 8024212 { /* Call Directly XferAbortCallback function in case of error */ hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); 8024196: 687b ldr r3, [r7, #4] 8024198: 6b9b ldr r3, [r3, #56] @ 0x38 802419a: 6d1b ldr r3, [r3, #80] @ 0x50 802419c: 687a ldr r2, [r7, #4] 802419e: 6b92 ldr r2, [r2, #56] @ 0x38 80241a0: 4610 mov r0, r2 80241a2: 4798 blx r3 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) 80241a4: e035 b.n 8024212 } } } else { hi2c->XferCount = (uint16_t)(__HAL_DMA_GET_COUNTER(hi2c->hdmatx)); 80241a6: 687b ldr r3, [r7, #4] 80241a8: 6b5b ldr r3, [r3, #52] @ 0x34 80241aa: 681b ldr r3, [r3, #0] 80241ac: 685b ldr r3, [r3, #4] 80241ae: b29a uxth r2, r3 80241b0: 687b ldr r3, [r7, #4] 80241b2: 855a strh r2, [r3, #42] @ 0x2a if (hi2c->XferCount != 0U) 80241b4: 687b ldr r3, [r7, #4] 80241b6: 8d5b ldrh r3, [r3, #42] @ 0x2a 80241b8: b29b uxth r3, r3 80241ba: 2b00 cmp r3, #0 80241bc: d005 beq.n 80241ca { /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 80241be: 687b ldr r3, [r7, #4] 80241c0: 6c1b ldr r3, [r3, #64] @ 0x40 80241c2: f043 0204 orr.w r2, r3, #4 80241c6: 687b ldr r3, [r7, #4] 80241c8: 641a str r2, [r3, #64] @ 0x40 } /* Disable, stop the current DMA */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); 80241ca: 687b ldr r3, [r7, #4] 80241cc: 681b ldr r3, [r3, #0] 80241ce: 685a ldr r2, [r3, #4] 80241d0: 687b ldr r3, [r7, #4] 80241d2: 681b ldr r3, [r3, #0] 80241d4: f422 6200 bic.w r2, r2, #2048 @ 0x800 80241d8: 605a str r2, [r3, #4] /* Abort DMA Xfer if any */ if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) 80241da: 687b ldr r3, [r7, #4] 80241dc: 6b5b ldr r3, [r3, #52] @ 0x34 80241de: 4618 mov r0, r3 80241e0: f7fd fe84 bl 8021eec 80241e4: 4603 mov r3, r0 80241e6: 2b01 cmp r3, #1 80241e8: d014 beq.n 8024214 { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; 80241ea: 687b ldr r3, [r7, #4] 80241ec: 6b5b ldr r3, [r3, #52] @ 0x34 80241ee: 4a4e ldr r2, [pc, #312] @ (8024328 ) 80241f0: 651a str r2, [r3, #80] @ 0x50 /* Abort DMA TX */ if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) 80241f2: 687b ldr r3, [r7, #4] 80241f4: 6b5b ldr r3, [r3, #52] @ 0x34 80241f6: 4618 mov r0, r3 80241f8: f7fd fccc bl 8021b94 80241fc: 4603 mov r3, r0 80241fe: 2b00 cmp r3, #0 8024200: d008 beq.n 8024214 { /* Call Directly XferAbortCallback function in case of error */ hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); 8024202: 687b ldr r3, [r7, #4] 8024204: 6b5b ldr r3, [r3, #52] @ 0x34 8024206: 6d1b ldr r3, [r3, #80] @ 0x50 8024208: 687a ldr r2, [r7, #4] 802420a: 6b52 ldr r2, [r2, #52] @ 0x34 802420c: 4610 mov r0, r2 802420e: 4798 blx r3 8024210: e000 b.n 8024214 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) 8024212: bf00 nop } } } /* All data are not transferred, so set error code accordingly */ if (hi2c->XferCount != 0U) 8024214: 687b ldr r3, [r7, #4] 8024216: 8d5b ldrh r3, [r3, #42] @ 0x2a 8024218: b29b uxth r3, r3 802421a: 2b00 cmp r3, #0 802421c: d03e beq.n 802429c { /* Store Last receive data if any */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) 802421e: 687b ldr r3, [r7, #4] 8024220: 681b ldr r3, [r3, #0] 8024222: 695b ldr r3, [r3, #20] 8024224: f003 0304 and.w r3, r3, #4 8024228: 2b04 cmp r3, #4 802422a: d112 bne.n 8024252 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 802422c: 687b ldr r3, [r7, #4] 802422e: 681b ldr r3, [r3, #0] 8024230: 691a ldr r2, [r3, #16] 8024232: 687b ldr r3, [r7, #4] 8024234: 6a5b ldr r3, [r3, #36] @ 0x24 8024236: b2d2 uxtb r2, r2 8024238: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 802423a: 687b ldr r3, [r7, #4] 802423c: 6a5b ldr r3, [r3, #36] @ 0x24 802423e: 1c5a adds r2, r3, #1 8024240: 687b ldr r3, [r7, #4] 8024242: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8024244: 687b ldr r3, [r7, #4] 8024246: 8d5b ldrh r3, [r3, #42] @ 0x2a 8024248: b29b uxth r3, r3 802424a: 3b01 subs r3, #1 802424c: b29a uxth r2, r3 802424e: 687b ldr r3, [r7, #4] 8024250: 855a strh r2, [r3, #42] @ 0x2a } /* Store Last receive data if any */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 8024252: 687b ldr r3, [r7, #4] 8024254: 681b ldr r3, [r3, #0] 8024256: 695b ldr r3, [r3, #20] 8024258: f003 0340 and.w r3, r3, #64 @ 0x40 802425c: 2b40 cmp r3, #64 @ 0x40 802425e: d112 bne.n 8024286 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8024260: 687b ldr r3, [r7, #4] 8024262: 681b ldr r3, [r3, #0] 8024264: 691a ldr r2, [r3, #16] 8024266: 687b ldr r3, [r7, #4] 8024268: 6a5b ldr r3, [r3, #36] @ 0x24 802426a: b2d2 uxtb r2, r2 802426c: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 802426e: 687b ldr r3, [r7, #4] 8024270: 6a5b ldr r3, [r3, #36] @ 0x24 8024272: 1c5a adds r2, r3, #1 8024274: 687b ldr r3, [r7, #4] 8024276: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; 8024278: 687b ldr r3, [r7, #4] 802427a: 8d5b ldrh r3, [r3, #42] @ 0x2a 802427c: b29b uxth r3, r3 802427e: 3b01 subs r3, #1 8024280: b29a uxth r2, r3 8024282: 687b ldr r3, [r7, #4] 8024284: 855a strh r2, [r3, #42] @ 0x2a } if (hi2c->XferCount != 0U) 8024286: 687b ldr r3, [r7, #4] 8024288: 8d5b ldrh r3, [r3, #42] @ 0x2a 802428a: b29b uxth r3, r3 802428c: 2b00 cmp r3, #0 802428e: d005 beq.n 802429c { /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; 8024290: 687b ldr r3, [r7, #4] 8024292: 6c1b ldr r3, [r3, #64] @ 0x40 8024294: f043 0204 orr.w r2, r3, #4 8024298: 687b ldr r3, [r7, #4] 802429a: 641a str r2, [r3, #64] @ 0x40 } } if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) 802429c: 687b ldr r3, [r7, #4] 802429e: 6c1b ldr r3, [r3, #64] @ 0x40 80242a0: 2b00 cmp r3, #0 80242a2: d003 beq.n 80242ac { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c); 80242a4: 6878 ldr r0, [r7, #4] 80242a6: f000 f8b3 bl 8024410 HAL_I2C_SlaveRxCpltCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } } } 80242aa: e039 b.n 8024320 if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) 80242ac: 7bfb ldrb r3, [r7, #15] 80242ae: 2b2a cmp r3, #42 @ 0x2a 80242b0: d109 bne.n 80242c6 hi2c->PreviousState = I2C_STATE_NONE; 80242b2: 687b ldr r3, [r7, #4] 80242b4: 2200 movs r2, #0 80242b6: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 80242b8: 687b ldr r3, [r7, #4] 80242ba: 2228 movs r2, #40 @ 0x28 80242bc: f883 203d strb.w r2, [r3, #61] @ 0x3d HAL_I2C_SlaveRxCpltCallback(hi2c); 80242c0: 6878 ldr r0, [r7, #4] 80242c2: f7ff f829 bl 8023318 if (hi2c->State == HAL_I2C_STATE_LISTEN) 80242c6: 687b ldr r3, [r7, #4] 80242c8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80242cc: b2db uxtb r3, r3 80242ce: 2b28 cmp r3, #40 @ 0x28 80242d0: d111 bne.n 80242f6 hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80242d2: 687b ldr r3, [r7, #4] 80242d4: 4a15 ldr r2, [pc, #84] @ (802432c ) 80242d6: 62da str r2, [r3, #44] @ 0x2c hi2c->PreviousState = I2C_STATE_NONE; 80242d8: 687b ldr r3, [r7, #4] 80242da: 2200 movs r2, #0 80242dc: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 80242de: 687b ldr r3, [r7, #4] 80242e0: 2220 movs r2, #32 80242e2: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80242e6: 687b ldr r3, [r7, #4] 80242e8: 2200 movs r2, #0 80242ea: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_ListenCpltCallback(hi2c); 80242ee: 6878 ldr r0, [r7, #4] 80242f0: f7ff f82a bl 8023348 } 80242f4: e014 b.n 8024320 if ((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX)) 80242f6: 687b ldr r3, [r7, #4] 80242f8: 6b1b ldr r3, [r3, #48] @ 0x30 80242fa: 2b22 cmp r3, #34 @ 0x22 80242fc: d002 beq.n 8024304 80242fe: 7bfb ldrb r3, [r7, #15] 8024300: 2b22 cmp r3, #34 @ 0x22 8024302: d10d bne.n 8024320 hi2c->PreviousState = I2C_STATE_NONE; 8024304: 687b ldr r3, [r7, #4] 8024306: 2200 movs r2, #0 8024308: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 802430a: 687b ldr r3, [r7, #4] 802430c: 2220 movs r2, #32 802430e: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8024312: 687b ldr r3, [r7, #4] 8024314: 2200 movs r2, #0 8024316: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_SlaveRxCpltCallback(hi2c); 802431a: 6878 ldr r0, [r7, #4] 802431c: f7fe fffc bl 8023318 } 8024320: bf00 nop 8024322: 3710 adds r7, #16 8024324: 46bd mov sp, r7 8024326: bd80 pop {r7, pc} 8024328: 08024675 .word 0x08024675 802432c: ffff0000 .word 0xffff0000 08024330 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for I2C module * @retval None */ static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c) { 8024330: b580 push {r7, lr} 8024332: b084 sub sp, #16 8024334: af00 add r7, sp, #0 8024336: 6078 str r0, [r7, #4] /* Declaration of temporary variables to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 8024338: 687b ldr r3, [r7, #4] 802433a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802433e: 73fb strb r3, [r7, #15] uint32_t CurrentXferOptions = hi2c->XferOptions; 8024340: 687b ldr r3, [r7, #4] 8024342: 6adb ldr r3, [r3, #44] @ 0x2c 8024344: 60bb str r3, [r7, #8] if (((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \ 8024346: 68bb ldr r3, [r7, #8] 8024348: 2b08 cmp r3, #8 802434a: d002 beq.n 8024352 802434c: 68bb ldr r3, [r7, #8] 802434e: 2b20 cmp r3, #32 8024350: d129 bne.n 80243a6 8024352: 7bfb ldrb r3, [r7, #15] 8024354: 2b28 cmp r3, #40 @ 0x28 8024356: d126 bne.n 80243a6 (CurrentState == HAL_I2C_STATE_LISTEN)) { hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8024358: 687b ldr r3, [r7, #4] 802435a: 4a2c ldr r2, [pc, #176] @ (802440c ) 802435c: 62da str r2, [r3, #44] @ 0x2c /* Disable EVT, BUF and ERR interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 802435e: 687b ldr r3, [r7, #4] 8024360: 681b ldr r3, [r3, #0] 8024362: 685a ldr r2, [r3, #4] 8024364: 687b ldr r3, [r7, #4] 8024366: 681b ldr r3, [r3, #0] 8024368: f422 62e0 bic.w r2, r2, #1792 @ 0x700 802436c: 605a str r2, [r3, #4] /* Clear AF flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 802436e: 687b ldr r3, [r7, #4] 8024370: 681b ldr r3, [r3, #0] 8024372: f46f 6280 mvn.w r2, #1024 @ 0x400 8024376: 615a str r2, [r3, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 8024378: 687b ldr r3, [r7, #4] 802437a: 681b ldr r3, [r3, #0] 802437c: 681a ldr r2, [r3, #0] 802437e: 687b ldr r3, [r7, #4] 8024380: 681b ldr r3, [r3, #0] 8024382: f422 6280 bic.w r2, r2, #1024 @ 0x400 8024386: 601a str r2, [r3, #0] hi2c->PreviousState = I2C_STATE_NONE; 8024388: 687b ldr r3, [r7, #4] 802438a: 2200 movs r2, #0 802438c: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 802438e: 687b ldr r3, [r7, #4] 8024390: 2220 movs r2, #32 8024392: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8024396: 687b ldr r3, [r7, #4] 8024398: 2200 movs r2, #0 802439a: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->ListenCpltCallback(hi2c); #else HAL_I2C_ListenCpltCallback(hi2c); 802439e: 6878 ldr r0, [r7, #4] 80243a0: f7fe ffd2 bl 8023348 { /* Clear AF flag only */ /* State Listen, but XferOptions == FIRST or NEXT */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); } } 80243a4: e02e b.n 8024404 else if (CurrentState == HAL_I2C_STATE_BUSY_TX) 80243a6: 7bfb ldrb r3, [r7, #15] 80243a8: 2b21 cmp r3, #33 @ 0x21 80243aa: d126 bne.n 80243fa hi2c->XferOptions = I2C_NO_OPTION_FRAME; 80243ac: 687b ldr r3, [r7, #4] 80243ae: 4a17 ldr r2, [pc, #92] @ (802440c ) 80243b0: 62da str r2, [r3, #44] @ 0x2c hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; 80243b2: 687b ldr r3, [r7, #4] 80243b4: 2221 movs r2, #33 @ 0x21 80243b6: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 80243b8: 687b ldr r3, [r7, #4] 80243ba: 2220 movs r2, #32 80243bc: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80243c0: 687b ldr r3, [r7, #4] 80243c2: 2200 movs r2, #0 80243c4: f883 203e strb.w r2, [r3, #62] @ 0x3e __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 80243c8: 687b ldr r3, [r7, #4] 80243ca: 681b ldr r3, [r3, #0] 80243cc: 685a ldr r2, [r3, #4] 80243ce: 687b ldr r3, [r7, #4] 80243d0: 681b ldr r3, [r3, #0] 80243d2: f422 62e0 bic.w r2, r2, #1792 @ 0x700 80243d6: 605a str r2, [r3, #4] __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 80243d8: 687b ldr r3, [r7, #4] 80243da: 681b ldr r3, [r3, #0] 80243dc: f46f 6280 mvn.w r2, #1024 @ 0x400 80243e0: 615a str r2, [r3, #20] CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 80243e2: 687b ldr r3, [r7, #4] 80243e4: 681b ldr r3, [r3, #0] 80243e6: 681a ldr r2, [r3, #0] 80243e8: 687b ldr r3, [r7, #4] 80243ea: 681b ldr r3, [r3, #0] 80243ec: f422 6280 bic.w r2, r2, #1024 @ 0x400 80243f0: 601a str r2, [r3, #0] HAL_I2C_SlaveTxCpltCallback(hi2c); 80243f2: 6878 ldr r0, [r7, #4] 80243f4: f7fe ff86 bl 8023304 } 80243f8: e004 b.n 8024404 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 80243fa: 687b ldr r3, [r7, #4] 80243fc: 681b ldr r3, [r3, #0] 80243fe: f46f 6280 mvn.w r2, #1024 @ 0x400 8024402: 615a str r2, [r3, #20] } 8024404: bf00 nop 8024406: 3710 adds r7, #16 8024408: 46bd mov sp, r7 802440a: bd80 pop {r7, pc} 802440c: ffff0000 .word 0xffff0000 08024410 : * @brief I2C interrupts error process * @param hi2c I2C handle. * @retval None */ static void I2C_ITError(I2C_HandleTypeDef *hi2c) { 8024410: b580 push {r7, lr} 8024412: b084 sub sp, #16 8024414: af00 add r7, sp, #0 8024416: 6078 str r0, [r7, #4] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 8024418: 687b ldr r3, [r7, #4] 802441a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802441e: 73fb strb r3, [r7, #15] HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode; 8024420: 687b ldr r3, [r7, #4] 8024422: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8024426: 73bb strb r3, [r7, #14] uint32_t CurrentError; if (((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) && (CurrentState == HAL_I2C_STATE_BUSY_RX)) 8024428: 7bbb ldrb r3, [r7, #14] 802442a: 2b10 cmp r3, #16 802442c: d002 beq.n 8024434 802442e: 7bbb ldrb r3, [r7, #14] 8024430: 2b40 cmp r3, #64 @ 0x40 8024432: d10a bne.n 802444a 8024434: 7bfb ldrb r3, [r7, #15] 8024436: 2b22 cmp r3, #34 @ 0x22 8024438: d107 bne.n 802444a { /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */ hi2c->Instance->CR1 &= ~I2C_CR1_POS; 802443a: 687b ldr r3, [r7, #4] 802443c: 681b ldr r3, [r3, #0] 802443e: 681a ldr r2, [r3, #0] 8024440: 687b ldr r3, [r7, #4] 8024442: 681b ldr r3, [r3, #0] 8024444: f422 6200 bic.w r2, r2, #2048 @ 0x800 8024448: 601a str r2, [r3, #0] } if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) 802444a: 7bfb ldrb r3, [r7, #15] 802444c: f003 0328 and.w r3, r3, #40 @ 0x28 8024450: 2b28 cmp r3, #40 @ 0x28 8024452: d107 bne.n 8024464 { /* keep HAL_I2C_STATE_LISTEN */ hi2c->PreviousState = I2C_STATE_NONE; 8024454: 687b ldr r3, [r7, #4] 8024456: 2200 movs r2, #0 8024458: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 802445a: 687b ldr r3, [r7, #4] 802445c: 2228 movs r2, #40 @ 0x28 802445e: f883 203d strb.w r2, [r3, #61] @ 0x3d 8024462: e015 b.n 8024490 } else { /* If state is an abort treatment on going, don't change state */ /* This change will be do later */ if ((READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) != I2C_CR2_DMAEN) && (CurrentState != HAL_I2C_STATE_ABORT)) 8024464: 687b ldr r3, [r7, #4] 8024466: 681b ldr r3, [r3, #0] 8024468: 685b ldr r3, [r3, #4] 802446a: f403 6300 and.w r3, r3, #2048 @ 0x800 802446e: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8024472: d00a beq.n 802448a 8024474: 7bfb ldrb r3, [r7, #15] 8024476: 2b60 cmp r3, #96 @ 0x60 8024478: d007 beq.n 802448a { hi2c->State = HAL_I2C_STATE_READY; 802447a: 687b ldr r3, [r7, #4] 802447c: 2220 movs r2, #32 802447e: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8024482: 687b ldr r3, [r7, #4] 8024484: 2200 movs r2, #0 8024486: f883 203e strb.w r2, [r3, #62] @ 0x3e } hi2c->PreviousState = I2C_STATE_NONE; 802448a: 687b ldr r3, [r7, #4] 802448c: 2200 movs r2, #0 802448e: 631a str r2, [r3, #48] @ 0x30 } /* Abort DMA transfer */ if (READ_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN) == I2C_CR2_DMAEN) 8024490: 687b ldr r3, [r7, #4] 8024492: 681b ldr r3, [r3, #0] 8024494: 685b ldr r3, [r3, #4] 8024496: f403 6300 and.w r3, r3, #2048 @ 0x800 802449a: f5b3 6f00 cmp.w r3, #2048 @ 0x800 802449e: d162 bne.n 8024566 { hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN; 80244a0: 687b ldr r3, [r7, #4] 80244a2: 681b ldr r3, [r3, #0] 80244a4: 685a ldr r2, [r3, #4] 80244a6: 687b ldr r3, [r7, #4] 80244a8: 681b ldr r3, [r3, #0] 80244aa: f422 6200 bic.w r2, r2, #2048 @ 0x800 80244ae: 605a str r2, [r3, #4] if (hi2c->hdmatx->State != HAL_DMA_STATE_READY) 80244b0: 687b ldr r3, [r7, #4] 80244b2: 6b5b ldr r3, [r3, #52] @ 0x34 80244b4: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 80244b8: b2db uxtb r3, r3 80244ba: 2b01 cmp r3, #1 80244bc: d020 beq.n 8024500 { /* Set the DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; 80244be: 687b ldr r3, [r7, #4] 80244c0: 6b5b ldr r3, [r3, #52] @ 0x34 80244c2: 4a6a ldr r2, [pc, #424] @ (802466c ) 80244c4: 651a str r2, [r3, #80] @ 0x50 if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) 80244c6: 687b ldr r3, [r7, #4] 80244c8: 6b5b ldr r3, [r3, #52] @ 0x34 80244ca: 4618 mov r0, r3 80244cc: f7fd fb62 bl 8021b94 80244d0: 4603 mov r3, r0 80244d2: 2b00 cmp r3, #0 80244d4: f000 8089 beq.w 80245ea { /* Disable I2C peripheral to prevent dummy data in buffer */ __HAL_I2C_DISABLE(hi2c); 80244d8: 687b ldr r3, [r7, #4] 80244da: 681b ldr r3, [r3, #0] 80244dc: 681a ldr r2, [r3, #0] 80244de: 687b ldr r3, [r7, #4] 80244e0: 681b ldr r3, [r3, #0] 80244e2: f022 0201 bic.w r2, r2, #1 80244e6: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 80244e8: 687b ldr r3, [r7, #4] 80244ea: 2220 movs r2, #32 80244ec: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Call Directly XferAbortCallback function in case of error */ hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); 80244f0: 687b ldr r3, [r7, #4] 80244f2: 6b5b ldr r3, [r3, #52] @ 0x34 80244f4: 6d1b ldr r3, [r3, #80] @ 0x50 80244f6: 687a ldr r2, [r7, #4] 80244f8: 6b52 ldr r2, [r2, #52] @ 0x34 80244fa: 4610 mov r0, r2 80244fc: 4798 blx r3 80244fe: e074 b.n 80245ea } else { /* Set the DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; 8024500: 687b ldr r3, [r7, #4] 8024502: 6b9b ldr r3, [r3, #56] @ 0x38 8024504: 4a59 ldr r2, [pc, #356] @ (802466c ) 8024506: 651a str r2, [r3, #80] @ 0x50 if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) 8024508: 687b ldr r3, [r7, #4] 802450a: 6b9b ldr r3, [r3, #56] @ 0x38 802450c: 4618 mov r0, r3 802450e: f7fd fb41 bl 8021b94 8024512: 4603 mov r3, r0 8024514: 2b00 cmp r3, #0 8024516: d068 beq.n 80245ea { /* Store Last receive data if any */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 8024518: 687b ldr r3, [r7, #4] 802451a: 681b ldr r3, [r3, #0] 802451c: 695b ldr r3, [r3, #20] 802451e: f003 0340 and.w r3, r3, #64 @ 0x40 8024522: 2b40 cmp r3, #64 @ 0x40 8024524: d10b bne.n 802453e { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 8024526: 687b ldr r3, [r7, #4] 8024528: 681b ldr r3, [r3, #0] 802452a: 691a ldr r2, [r3, #16] 802452c: 687b ldr r3, [r7, #4] 802452e: 6a5b ldr r3, [r3, #36] @ 0x24 8024530: b2d2 uxtb r2, r2 8024532: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8024534: 687b ldr r3, [r7, #4] 8024536: 6a5b ldr r3, [r3, #36] @ 0x24 8024538: 1c5a adds r2, r3, #1 802453a: 687b ldr r3, [r7, #4] 802453c: 625a str r2, [r3, #36] @ 0x24 } /* Disable I2C peripheral to prevent dummy data in buffer */ __HAL_I2C_DISABLE(hi2c); 802453e: 687b ldr r3, [r7, #4] 8024540: 681b ldr r3, [r3, #0] 8024542: 681a ldr r2, [r3, #0] 8024544: 687b ldr r3, [r7, #4] 8024546: 681b ldr r3, [r3, #0] 8024548: f022 0201 bic.w r2, r2, #1 802454c: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 802454e: 687b ldr r3, [r7, #4] 8024550: 2220 movs r2, #32 8024552: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); 8024556: 687b ldr r3, [r7, #4] 8024558: 6b9b ldr r3, [r3, #56] @ 0x38 802455a: 6d1b ldr r3, [r3, #80] @ 0x50 802455c: 687a ldr r2, [r7, #4] 802455e: 6b92 ldr r2, [r2, #56] @ 0x38 8024560: 4610 mov r0, r2 8024562: 4798 blx r3 8024564: e041 b.n 80245ea } } } else if (hi2c->State == HAL_I2C_STATE_ABORT) 8024566: 687b ldr r3, [r7, #4] 8024568: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802456c: b2db uxtb r3, r3 802456e: 2b60 cmp r3, #96 @ 0x60 8024570: d125 bne.n 80245be { hi2c->State = HAL_I2C_STATE_READY; 8024572: 687b ldr r3, [r7, #4] 8024574: 2220 movs r2, #32 8024576: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 802457a: 687b ldr r3, [r7, #4] 802457c: 2200 movs r2, #0 802457e: 641a str r2, [r3, #64] @ 0x40 /* Store Last receive data if any */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 8024580: 687b ldr r3, [r7, #4] 8024582: 681b ldr r3, [r3, #0] 8024584: 695b ldr r3, [r3, #20] 8024586: f003 0340 and.w r3, r3, #64 @ 0x40 802458a: 2b40 cmp r3, #64 @ 0x40 802458c: d10b bne.n 80245a6 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 802458e: 687b ldr r3, [r7, #4] 8024590: 681b ldr r3, [r3, #0] 8024592: 691a ldr r2, [r3, #16] 8024594: 687b ldr r3, [r7, #4] 8024596: 6a5b ldr r3, [r3, #36] @ 0x24 8024598: b2d2 uxtb r2, r2 802459a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 802459c: 687b ldr r3, [r7, #4] 802459e: 6a5b ldr r3, [r3, #36] @ 0x24 80245a0: 1c5a adds r2, r3, #1 80245a2: 687b ldr r3, [r7, #4] 80245a4: 625a str r2, [r3, #36] @ 0x24 } /* Disable I2C peripheral to prevent dummy data in buffer */ __HAL_I2C_DISABLE(hi2c); 80245a6: 687b ldr r3, [r7, #4] 80245a8: 681b ldr r3, [r3, #0] 80245aa: 681a ldr r2, [r3, #0] 80245ac: 687b ldr r3, [r7, #4] 80245ae: 681b ldr r3, [r3, #0] 80245b0: f022 0201 bic.w r2, r2, #1 80245b4: 601a str r2, [r3, #0] /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AbortCpltCallback(hi2c); #else HAL_I2C_AbortCpltCallback(hi2c); 80245b6: 6878 ldr r0, [r7, #4] 80245b8: f7fe feee bl 8023398 80245bc: e015 b.n 80245ea #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } else { /* Store Last receive data if any */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) 80245be: 687b ldr r3, [r7, #4] 80245c0: 681b ldr r3, [r3, #0] 80245c2: 695b ldr r3, [r3, #20] 80245c4: f003 0340 and.w r3, r3, #64 @ 0x40 80245c8: 2b40 cmp r3, #64 @ 0x40 80245ca: d10b bne.n 80245e4 { /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; 80245cc: 687b ldr r3, [r7, #4] 80245ce: 681b ldr r3, [r3, #0] 80245d0: 691a ldr r2, [r3, #16] 80245d2: 687b ldr r3, [r7, #4] 80245d4: 6a5b ldr r3, [r3, #36] @ 0x24 80245d6: b2d2 uxtb r2, r2 80245d8: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80245da: 687b ldr r3, [r7, #4] 80245dc: 6a5b ldr r3, [r3, #36] @ 0x24 80245de: 1c5a adds r2, r3, #1 80245e0: 687b ldr r3, [r7, #4] 80245e2: 625a str r2, [r3, #36] @ 0x24 /* Call user error callback */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->ErrorCallback(hi2c); #else HAL_I2C_ErrorCallback(hi2c); 80245e4: 6878 ldr r0, [r7, #4] 80245e6: f7fe fecd bl 8023384 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } /* STOP Flag is not set after a NACK reception, BusError, ArbitrationLost, OverRun */ CurrentError = hi2c->ErrorCode; 80245ea: 687b ldr r3, [r7, #4] 80245ec: 6c1b ldr r3, [r3, #64] @ 0x40 80245ee: 60bb str r3, [r7, #8] if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \ 80245f0: 68bb ldr r3, [r7, #8] 80245f2: f003 0301 and.w r3, r3, #1 80245f6: 2b00 cmp r3, #0 80245f8: d10e bne.n 8024618 ((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \ 80245fa: 68bb ldr r3, [r7, #8] 80245fc: f003 0302 and.w r3, r3, #2 if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \ 8024600: 2b00 cmp r3, #0 8024602: d109 bne.n 8024618 ((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) || \ 8024604: 68bb ldr r3, [r7, #8] 8024606: f003 0304 and.w r3, r3, #4 ((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \ 802460a: 2b00 cmp r3, #0 802460c: d104 bne.n 8024618 ((CurrentError & HAL_I2C_ERROR_OVR) == HAL_I2C_ERROR_OVR)) 802460e: 68bb ldr r3, [r7, #8] 8024610: f003 0308 and.w r3, r3, #8 ((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) || \ 8024614: 2b00 cmp r3, #0 8024616: d007 beq.n 8024628 { /* Disable EVT, BUF and ERR interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); 8024618: 687b ldr r3, [r7, #4] 802461a: 681b ldr r3, [r3, #0] 802461c: 685a ldr r2, [r3, #4] 802461e: 687b ldr r3, [r7, #4] 8024620: 681b ldr r3, [r3, #0] 8024622: f422 62e0 bic.w r2, r2, #1792 @ 0x700 8024626: 605a str r2, [r3, #4] } /* So may inform upper layer that listen phase is stopped */ /* during NACK error treatment */ CurrentState = hi2c->State; 8024628: 687b ldr r3, [r7, #4] 802462a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802462e: 73fb strb r3, [r7, #15] if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN)) 8024630: 687b ldr r3, [r7, #4] 8024632: 6c1b ldr r3, [r3, #64] @ 0x40 8024634: f003 0304 and.w r3, r3, #4 8024638: 2b04 cmp r3, #4 802463a: d113 bne.n 8024664 802463c: 7bfb ldrb r3, [r7, #15] 802463e: 2b28 cmp r3, #40 @ 0x28 8024640: d110 bne.n 8024664 { hi2c->XferOptions = I2C_NO_OPTION_FRAME; 8024642: 687b ldr r3, [r7, #4] 8024644: 4a0a ldr r2, [pc, #40] @ (8024670 ) 8024646: 62da str r2, [r3, #44] @ 0x2c hi2c->PreviousState = I2C_STATE_NONE; 8024648: 687b ldr r3, [r7, #4] 802464a: 2200 movs r2, #0 802464c: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; 802464e: 687b ldr r3, [r7, #4] 8024650: 2220 movs r2, #32 8024652: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 8024656: 687b ldr r3, [r7, #4] 8024658: 2200 movs r2, #0 802465a: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->ListenCpltCallback(hi2c); #else HAL_I2C_ListenCpltCallback(hi2c); 802465e: 6878 ldr r0, [r7, #4] 8024660: f7fe fe72 bl 8023348 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } 8024664: bf00 nop 8024666: 3710 adds r7, #16 8024668: 46bd mov sp, r7 802466a: bd80 pop {r7, pc} 802466c: 08024675 .word 0x08024675 8024670: ffff0000 .word 0xffff0000 08024674 : * (To be called at end of DMA Abort procedure). * @param hdma DMA handle. * @retval None */ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) { 8024674: b580 push {r7, lr} 8024676: b086 sub sp, #24 8024678: af00 add r7, sp, #0 802467a: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 802467c: 2300 movs r3, #0 802467e: 60fb str r3, [r7, #12] I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */ 8024680: 687b ldr r3, [r7, #4] 8024682: 6b9b ldr r3, [r3, #56] @ 0x38 8024684: 617b str r3, [r7, #20] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; 8024686: 697b ldr r3, [r7, #20] 8024688: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802468c: 74fb strb r3, [r7, #19] /* During abort treatment, check that there is no pending STOP request */ /* Wait until STOP flag is reset */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); 802468e: 4b4b ldr r3, [pc, #300] @ (80247bc ) 8024690: 681b ldr r3, [r3, #0] 8024692: 08db lsrs r3, r3, #3 8024694: 4a4a ldr r2, [pc, #296] @ (80247c0 ) 8024696: fba2 2303 umull r2, r3, r2, r3 802469a: 0a1a lsrs r2, r3, #8 802469c: 4613 mov r3, r2 802469e: 009b lsls r3, r3, #2 80246a0: 4413 add r3, r2 80246a2: 00da lsls r2, r3, #3 80246a4: 1ad3 subs r3, r2, r3 80246a6: 60fb str r3, [r7, #12] do { if (count == 0U) 80246a8: 68fb ldr r3, [r7, #12] 80246aa: 2b00 cmp r3, #0 80246ac: d106 bne.n 80246bc { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 80246ae: 697b ldr r3, [r7, #20] 80246b0: 6c1b ldr r3, [r3, #64] @ 0x40 80246b2: f043 0220 orr.w r2, r3, #32 80246b6: 697b ldr r3, [r7, #20] 80246b8: 641a str r2, [r3, #64] @ 0x40 break; 80246ba: e00a b.n 80246d2 } count--; 80246bc: 68fb ldr r3, [r7, #12] 80246be: 3b01 subs r3, #1 80246c0: 60fb str r3, [r7, #12] } while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP); 80246c2: 697b ldr r3, [r7, #20] 80246c4: 681b ldr r3, [r3, #0] 80246c6: 681b ldr r3, [r3, #0] 80246c8: f403 7300 and.w r3, r3, #512 @ 0x200 80246cc: f5b3 7f00 cmp.w r3, #512 @ 0x200 80246d0: d0ea beq.n 80246a8 /* Clear Complete callback */ if (hi2c->hdmatx != NULL) 80246d2: 697b ldr r3, [r7, #20] 80246d4: 6b5b ldr r3, [r3, #52] @ 0x34 80246d6: 2b00 cmp r3, #0 80246d8: d003 beq.n 80246e2 { hi2c->hdmatx->XferCpltCallback = NULL; 80246da: 697b ldr r3, [r7, #20] 80246dc: 6b5b ldr r3, [r3, #52] @ 0x34 80246de: 2200 movs r2, #0 80246e0: 63da str r2, [r3, #60] @ 0x3c } if (hi2c->hdmarx != NULL) 80246e2: 697b ldr r3, [r7, #20] 80246e4: 6b9b ldr r3, [r3, #56] @ 0x38 80246e6: 2b00 cmp r3, #0 80246e8: d003 beq.n 80246f2 { hi2c->hdmarx->XferCpltCallback = NULL; 80246ea: 697b ldr r3, [r7, #20] 80246ec: 6b9b ldr r3, [r3, #56] @ 0x38 80246ee: 2200 movs r2, #0 80246f0: 63da str r2, [r3, #60] @ 0x3c } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 80246f2: 697b ldr r3, [r7, #20] 80246f4: 681b ldr r3, [r3, #0] 80246f6: 681a ldr r2, [r3, #0] 80246f8: 697b ldr r3, [r7, #20] 80246fa: 681b ldr r3, [r3, #0] 80246fc: f422 6280 bic.w r2, r2, #1024 @ 0x400 8024700: 601a str r2, [r3, #0] hi2c->XferCount = 0U; 8024702: 697b ldr r3, [r7, #20] 8024704: 2200 movs r2, #0 8024706: 855a strh r2, [r3, #42] @ 0x2a /* Reset XferAbortCallback */ if (hi2c->hdmatx != NULL) 8024708: 697b ldr r3, [r7, #20] 802470a: 6b5b ldr r3, [r3, #52] @ 0x34 802470c: 2b00 cmp r3, #0 802470e: d003 beq.n 8024718 { hi2c->hdmatx->XferAbortCallback = NULL; 8024710: 697b ldr r3, [r7, #20] 8024712: 6b5b ldr r3, [r3, #52] @ 0x34 8024714: 2200 movs r2, #0 8024716: 651a str r2, [r3, #80] @ 0x50 } if (hi2c->hdmarx != NULL) 8024718: 697b ldr r3, [r7, #20] 802471a: 6b9b ldr r3, [r3, #56] @ 0x38 802471c: 2b00 cmp r3, #0 802471e: d003 beq.n 8024728 { hi2c->hdmarx->XferAbortCallback = NULL; 8024720: 697b ldr r3, [r7, #20] 8024722: 6b9b ldr r3, [r3, #56] @ 0x38 8024724: 2200 movs r2, #0 8024726: 651a str r2, [r3, #80] @ 0x50 } /* Disable I2C peripheral to prevent dummy data in buffer */ __HAL_I2C_DISABLE(hi2c); 8024728: 697b ldr r3, [r7, #20] 802472a: 681b ldr r3, [r3, #0] 802472c: 681a ldr r2, [r3, #0] 802472e: 697b ldr r3, [r7, #20] 8024730: 681b ldr r3, [r3, #0] 8024732: f022 0201 bic.w r2, r2, #1 8024736: 601a str r2, [r3, #0] /* Check if come from abort from user */ if (hi2c->State == HAL_I2C_STATE_ABORT) 8024738: 697b ldr r3, [r7, #20] 802473a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802473e: b2db uxtb r3, r3 8024740: 2b60 cmp r3, #96 @ 0x60 8024742: d10e bne.n 8024762 { hi2c->State = HAL_I2C_STATE_READY; 8024744: 697b ldr r3, [r7, #20] 8024746: 2220 movs r2, #32 8024748: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 802474c: 697b ldr r3, [r7, #20] 802474e: 2200 movs r2, #0 8024750: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8024754: 697b ldr r3, [r7, #20] 8024756: 2200 movs r2, #0 8024758: 641a str r2, [r3, #64] @ 0x40 /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AbortCpltCallback(hi2c); #else HAL_I2C_AbortCpltCallback(hi2c); 802475a: 6978 ldr r0, [r7, #20] 802475c: f7fe fe1c bl 8023398 hi2c->ErrorCallback(hi2c); #else HAL_I2C_ErrorCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } 8024760: e027 b.n 80247b2 if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) 8024762: 7cfb ldrb r3, [r7, #19] 8024764: f003 0328 and.w r3, r3, #40 @ 0x28 8024768: 2b28 cmp r3, #40 @ 0x28 802476a: d117 bne.n 802479c __HAL_I2C_ENABLE(hi2c); 802476c: 697b ldr r3, [r7, #20] 802476e: 681b ldr r3, [r3, #0] 8024770: 681a ldr r2, [r3, #0] 8024772: 697b ldr r3, [r7, #20] 8024774: 681b ldr r3, [r3, #0] 8024776: f042 0201 orr.w r2, r2, #1 802477a: 601a str r2, [r3, #0] SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); 802477c: 697b ldr r3, [r7, #20] 802477e: 681b ldr r3, [r3, #0] 8024780: 681a ldr r2, [r3, #0] 8024782: 697b ldr r3, [r7, #20] 8024784: 681b ldr r3, [r3, #0] 8024786: f442 6280 orr.w r2, r2, #1024 @ 0x400 802478a: 601a str r2, [r3, #0] hi2c->PreviousState = I2C_STATE_NONE; 802478c: 697b ldr r3, [r7, #20] 802478e: 2200 movs r2, #0 8024790: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_LISTEN; 8024792: 697b ldr r3, [r7, #20] 8024794: 2228 movs r2, #40 @ 0x28 8024796: f883 203d strb.w r2, [r3, #61] @ 0x3d 802479a: e007 b.n 80247ac hi2c->State = HAL_I2C_STATE_READY; 802479c: 697b ldr r3, [r7, #20] 802479e: 2220 movs r2, #32 80247a0: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; 80247a4: 697b ldr r3, [r7, #20] 80247a6: 2200 movs r2, #0 80247a8: f883 203e strb.w r2, [r3, #62] @ 0x3e HAL_I2C_ErrorCallback(hi2c); 80247ac: 6978 ldr r0, [r7, #20] 80247ae: f7fe fde9 bl 8023384 } 80247b2: bf00 nop 80247b4: 3718 adds r7, #24 80247b6: 46bd mov sp, r7 80247b8: bd80 pop {r7, pc} 80247ba: bf00 nop 80247bc: 20000024 .word 0x20000024 80247c0: 14f8b589 .word 0x14f8b589 080247c4 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnSTOPRequestThroughIT(I2C_HandleTypeDef *hi2c) { 80247c4: b480 push {r7} 80247c6: b085 sub sp, #20 80247c8: af00 add r7, sp, #0 80247ca: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 80247cc: 2300 movs r3, #0 80247ce: 60fb str r3, [r7, #12] /* Wait until STOP flag is reset */ count = I2C_TIMEOUT_STOP_FLAG * (SystemCoreClock / 25U / 1000U); 80247d0: 4b13 ldr r3, [pc, #76] @ (8024820 ) 80247d2: 681b ldr r3, [r3, #0] 80247d4: 08db lsrs r3, r3, #3 80247d6: 4a13 ldr r2, [pc, #76] @ (8024824 ) 80247d8: fba2 2303 umull r2, r3, r2, r3 80247dc: 0a1a lsrs r2, r3, #8 80247de: 4613 mov r3, r2 80247e0: 009b lsls r3, r3, #2 80247e2: 4413 add r3, r2 80247e4: 60fb str r3, [r7, #12] do { count--; 80247e6: 68fb ldr r3, [r7, #12] 80247e8: 3b01 subs r3, #1 80247ea: 60fb str r3, [r7, #12] if (count == 0U) 80247ec: 68fb ldr r3, [r7, #12] 80247ee: 2b00 cmp r3, #0 80247f0: d107 bne.n 8024802 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 80247f2: 687b ldr r3, [r7, #4] 80247f4: 6c1b ldr r3, [r3, #64] @ 0x40 80247f6: f043 0220 orr.w r2, r3, #32 80247fa: 687b ldr r3, [r7, #4] 80247fc: 641a str r2, [r3, #64] @ 0x40 return HAL_ERROR; 80247fe: 2301 movs r3, #1 8024800: e008 b.n 8024814 } } while (READ_BIT(hi2c->Instance->CR1, I2C_CR1_STOP) == I2C_CR1_STOP); 8024802: 687b ldr r3, [r7, #4] 8024804: 681b ldr r3, [r3, #0] 8024806: 681b ldr r3, [r3, #0] 8024808: f403 7300 and.w r3, r3, #512 @ 0x200 802480c: f5b3 7f00 cmp.w r3, #512 @ 0x200 8024810: d0e9 beq.n 80247e6 return HAL_OK; 8024812: 2300 movs r3, #0 } 8024814: 4618 mov r0, r3 8024816: 3714 adds r7, #20 8024818: 46bd mov sp, r7 802481a: f85d 7b04 ldr.w r7, [sp], #4 802481e: 4770 bx lr 8024820: 20000024 .word 0x20000024 8024824: 14f8b589 .word 0x14f8b589 08024828 : * @brief Convert I2Cx OTHER_xxx XferOptions to functional XferOptions. * @param hi2c I2C handle. * @retval None */ static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) { 8024828: b480 push {r7} 802482a: b083 sub sp, #12 802482c: af00 add r7, sp, #0 802482e: 6078 str r0, [r7, #4] /* if user set XferOptions to I2C_OTHER_FRAME */ /* it request implicitly to generate a restart condition */ /* set XferOptions to I2C_FIRST_FRAME */ if (hi2c->XferOptions == I2C_OTHER_FRAME) 8024830: 687b ldr r3, [r7, #4] 8024832: 6adb ldr r3, [r3, #44] @ 0x2c 8024834: f5b3 0f2a cmp.w r3, #11141120 @ 0xaa0000 8024838: d103 bne.n 8024842 { hi2c->XferOptions = I2C_FIRST_FRAME; 802483a: 687b ldr r3, [r7, #4] 802483c: 2201 movs r2, #1 802483e: 62da str r2, [r3, #44] @ 0x2c } else { /* Nothing to do */ } } 8024840: e007 b.n 8024852 else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME) 8024842: 687b ldr r3, [r7, #4] 8024844: 6adb ldr r3, [r3, #44] @ 0x2c 8024846: f1b3 4f2a cmp.w r3, #2852126720 @ 0xaa000000 802484a: d102 bne.n 8024852 hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME; 802484c: 687b ldr r3, [r7, #4] 802484e: 2208 movs r2, #8 8024850: 62da str r2, [r3, #44] @ 0x2c } 8024852: bf00 nop 8024854: 370c adds r7, #12 8024856: 46bd mov sp, r7 8024858: f85d 7b04 ldr.w r7, [sp], #4 802485c: 4770 bx lr ... 08024860 : * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction * @retval None */ void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) { 8024860: b480 push {r7} 8024862: b083 sub sp, #12 8024864: af00 add r7, sp, #0 8024866: 6078 str r0, [r7, #4] 8024868: 460b mov r3, r1 802486a: 70fb strb r3, [r7, #3] /* Check the parameters */ assert_param(IS_PWR_REGULATOR(Regulator)); assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); /* Clear SLEEPDEEP bit of Cortex System Control Register */ CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 802486c: 4b09 ldr r3, [pc, #36] @ (8024894 ) 802486e: 691b ldr r3, [r3, #16] 8024870: 4a08 ldr r2, [pc, #32] @ (8024894 ) 8024872: f023 0304 bic.w r3, r3, #4 8024876: 6113 str r3, [r2, #16] /* Select SLEEP mode entry -------------------------------------------------*/ if(SLEEPEntry == PWR_SLEEPENTRY_WFI) 8024878: 78fb ldrb r3, [r7, #3] 802487a: 2b01 cmp r3, #1 802487c: d101 bne.n 8024882 { /* Request Wait For Interrupt */ __WFI(); 802487e: bf30 wfi /* Request Wait For Event */ __SEV(); __WFE(); __WFE(); } } 8024880: e002 b.n 8024888 __SEV(); 8024882: bf40 sev __WFE(); 8024884: bf20 wfe __WFE(); 8024886: bf20 wfe } 8024888: bf00 nop 802488a: 370c adds r7, #12 802488c: 46bd mov sp, r7 802488e: f85d 7b04 ldr.w r7, [sp], #4 8024892: 4770 bx lr 8024894: e000ed00 .word 0xe000ed00 08024898 : * During the Over-drive switch activation, no peripheral clocks should be enabled. * The peripheral clocks must be enabled once the Over-drive mode is activated. * @retval HAL status */ HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) { 8024898: b580 push {r7, lr} 802489a: b082 sub sp, #8 802489c: af00 add r7, sp, #0 uint32_t tickstart = 0U; 802489e: 2300 movs r3, #0 80248a0: 607b str r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 80248a2: 2300 movs r3, #0 80248a4: 603b str r3, [r7, #0] 80248a6: 4b20 ldr r3, [pc, #128] @ (8024928 ) 80248a8: 6c1b ldr r3, [r3, #64] @ 0x40 80248aa: 4a1f ldr r2, [pc, #124] @ (8024928 ) 80248ac: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80248b0: 6413 str r3, [r2, #64] @ 0x40 80248b2: 4b1d ldr r3, [pc, #116] @ (8024928 ) 80248b4: 6c1b ldr r3, [r3, #64] @ 0x40 80248b6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80248ba: 603b str r3, [r7, #0] 80248bc: 683b ldr r3, [r7, #0] /* Enable the Over-drive to extend the clock frequency to 180 Mhz */ __HAL_PWR_OVERDRIVE_ENABLE(); 80248be: 4b1b ldr r3, [pc, #108] @ (802492c ) 80248c0: 2201 movs r2, #1 80248c2: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 80248c4: f7fb fcb0 bl 8020228 80248c8: 6078 str r0, [r7, #4] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 80248ca: e009 b.n 80248e0 { if((HAL_GetTick() - tickstart) > PWR_OVERDRIVE_TIMEOUT_VALUE) 80248cc: f7fb fcac bl 8020228 80248d0: 4602 mov r2, r0 80248d2: 687b ldr r3, [r7, #4] 80248d4: 1ad3 subs r3, r2, r3 80248d6: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 80248da: d901 bls.n 80248e0 { return HAL_TIMEOUT; 80248dc: 2303 movs r3, #3 80248de: e01f b.n 8024920 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 80248e0: 4b13 ldr r3, [pc, #76] @ (8024930 ) 80248e2: 685b ldr r3, [r3, #4] 80248e4: f403 3380 and.w r3, r3, #65536 @ 0x10000 80248e8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 80248ec: d1ee bne.n 80248cc } } /* Enable the Over-drive switch */ __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); 80248ee: 4b11 ldr r3, [pc, #68] @ (8024934 ) 80248f0: 2201 movs r2, #1 80248f2: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 80248f4: f7fb fc98 bl 8020228 80248f8: 6078 str r0, [r7, #4] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 80248fa: e009 b.n 8024910 { if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 80248fc: f7fb fc94 bl 8020228 8024900: 4602 mov r2, r0 8024902: 687b ldr r3, [r7, #4] 8024904: 1ad3 subs r3, r2, r3 8024906: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 802490a: d901 bls.n 8024910 { return HAL_TIMEOUT; 802490c: 2303 movs r3, #3 802490e: e007 b.n 8024920 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 8024910: 4b07 ldr r3, [pc, #28] @ (8024930 ) 8024912: 685b ldr r3, [r3, #4] 8024914: f403 3300 and.w r3, r3, #131072 @ 0x20000 8024918: f5b3 3f00 cmp.w r3, #131072 @ 0x20000 802491c: d1ee bne.n 80248fc } } return HAL_OK; 802491e: 2300 movs r3, #0 } 8024920: 4618 mov r0, r3 8024922: 3708 adds r7, #8 8024924: 46bd mov sp, r7 8024926: bd80 pop {r7, pc} 8024928: 40023800 .word 0x40023800 802492c: 420e0040 .word 0x420e0040 8024930: 40007000 .word 0x40007000 8024934: 420e0044 .word 0x420e0044 08024938 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8024938: b580 push {r7, lr} 802493a: b084 sub sp, #16 802493c: af00 add r7, sp, #0 802493e: 6078 str r0, [r7, #4] 8024940: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) 8024942: 687b ldr r3, [r7, #4] 8024944: 2b00 cmp r3, #0 8024946: d101 bne.n 802494c { return HAL_ERROR; 8024948: 2301 movs r3, #1 802494a: e0cc b.n 8024ae6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) 802494c: 4b68 ldr r3, [pc, #416] @ (8024af0 ) 802494e: 681b ldr r3, [r3, #0] 8024950: f003 030f and.w r3, r3, #15 8024954: 683a ldr r2, [r7, #0] 8024956: 429a cmp r2, r3 8024958: d90c bls.n 8024974 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 802495a: 4b65 ldr r3, [pc, #404] @ (8024af0 ) 802495c: 683a ldr r2, [r7, #0] 802495e: b2d2 uxtb r2, r2 8024960: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) 8024962: 4b63 ldr r3, [pc, #396] @ (8024af0 ) 8024964: 681b ldr r3, [r3, #0] 8024966: f003 030f and.w r3, r3, #15 802496a: 683a ldr r2, [r7, #0] 802496c: 429a cmp r2, r3 802496e: d001 beq.n 8024974 { return HAL_ERROR; 8024970: 2301 movs r3, #1 8024972: e0b8 b.n 8024ae6 } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8024974: 687b ldr r3, [r7, #4] 8024976: 681b ldr r3, [r3, #0] 8024978: f003 0302 and.w r3, r3, #2 802497c: 2b00 cmp r3, #0 802497e: d020 beq.n 80249c2 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8024980: 687b ldr r3, [r7, #4] 8024982: 681b ldr r3, [r3, #0] 8024984: f003 0304 and.w r3, r3, #4 8024988: 2b00 cmp r3, #0 802498a: d005 beq.n 8024998 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 802498c: 4b59 ldr r3, [pc, #356] @ (8024af4 ) 802498e: 689b ldr r3, [r3, #8] 8024990: 4a58 ldr r2, [pc, #352] @ (8024af4 ) 8024992: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00 8024996: 6093 str r3, [r2, #8] } if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8024998: 687b ldr r3, [r7, #4] 802499a: 681b ldr r3, [r3, #0] 802499c: f003 0308 and.w r3, r3, #8 80249a0: 2b00 cmp r3, #0 80249a2: d005 beq.n 80249b0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80249a4: 4b53 ldr r3, [pc, #332] @ (8024af4 ) 80249a6: 689b ldr r3, [r3, #8] 80249a8: 4a52 ldr r2, [pc, #328] @ (8024af4 ) 80249aa: f443 4360 orr.w r3, r3, #57344 @ 0xe000 80249ae: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80249b0: 4b50 ldr r3, [pc, #320] @ (8024af4 ) 80249b2: 689b ldr r3, [r3, #8] 80249b4: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80249b8: 687b ldr r3, [r7, #4] 80249ba: 689b ldr r3, [r3, #8] 80249bc: 494d ldr r1, [pc, #308] @ (8024af4 ) 80249be: 4313 orrs r3, r2 80249c0: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80249c2: 687b ldr r3, [r7, #4] 80249c4: 681b ldr r3, [r3, #0] 80249c6: f003 0301 and.w r3, r3, #1 80249ca: 2b00 cmp r3, #0 80249cc: d044 beq.n 8024a58 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80249ce: 687b ldr r3, [r7, #4] 80249d0: 685b ldr r3, [r3, #4] 80249d2: 2b01 cmp r3, #1 80249d4: d107 bne.n 80249e6 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80249d6: 4b47 ldr r3, [pc, #284] @ (8024af4 ) 80249d8: 681b ldr r3, [r3, #0] 80249da: f403 3300 and.w r3, r3, #131072 @ 0x20000 80249de: 2b00 cmp r3, #0 80249e0: d119 bne.n 8024a16 { return HAL_ERROR; 80249e2: 2301 movs r3, #1 80249e4: e07f b.n 8024ae6 } } /* PLL is selected as System Clock Source */ else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 80249e6: 687b ldr r3, [r7, #4] 80249e8: 685b ldr r3, [r3, #4] 80249ea: 2b02 cmp r3, #2 80249ec: d003 beq.n 80249f6 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 80249ee: 687b ldr r3, [r7, #4] 80249f0: 685b ldr r3, [r3, #4] else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 80249f2: 2b03 cmp r3, #3 80249f4: d107 bne.n 8024a06 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80249f6: 4b3f ldr r3, [pc, #252] @ (8024af4 ) 80249f8: 681b ldr r3, [r3, #0] 80249fa: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80249fe: 2b00 cmp r3, #0 8024a00: d109 bne.n 8024a16 { return HAL_ERROR; 8024a02: 2301 movs r3, #1 8024a04: e06f b.n 8024ae6 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8024a06: 4b3b ldr r3, [pc, #236] @ (8024af4 ) 8024a08: 681b ldr r3, [r3, #0] 8024a0a: f003 0302 and.w r3, r3, #2 8024a0e: 2b00 cmp r3, #0 8024a10: d101 bne.n 8024a16 { return HAL_ERROR; 8024a12: 2301 movs r3, #1 8024a14: e067 b.n 8024ae6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8024a16: 4b37 ldr r3, [pc, #220] @ (8024af4 ) 8024a18: 689b ldr r3, [r3, #8] 8024a1a: f023 0203 bic.w r2, r3, #3 8024a1e: 687b ldr r3, [r7, #4] 8024a20: 685b ldr r3, [r3, #4] 8024a22: 4934 ldr r1, [pc, #208] @ (8024af4 ) 8024a24: 4313 orrs r3, r2 8024a26: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); 8024a28: f7fb fbfe bl 8020228 8024a2c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8024a2e: e00a b.n 8024a46 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8024a30: f7fb fbfa bl 8020228 8024a34: 4602 mov r2, r0 8024a36: 68fb ldr r3, [r7, #12] 8024a38: 1ad3 subs r3, r2, r3 8024a3a: f241 3288 movw r2, #5000 @ 0x1388 8024a3e: 4293 cmp r3, r2 8024a40: d901 bls.n 8024a46 { return HAL_TIMEOUT; 8024a42: 2303 movs r3, #3 8024a44: e04f b.n 8024ae6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8024a46: 4b2b ldr r3, [pc, #172] @ (8024af4 ) 8024a48: 689b ldr r3, [r3, #8] 8024a4a: f003 020c and.w r2, r3, #12 8024a4e: 687b ldr r3, [r7, #4] 8024a50: 685b ldr r3, [r3, #4] 8024a52: 009b lsls r3, r3, #2 8024a54: 429a cmp r2, r3 8024a56: d1eb bne.n 8024a30 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) 8024a58: 4b25 ldr r3, [pc, #148] @ (8024af0 ) 8024a5a: 681b ldr r3, [r3, #0] 8024a5c: f003 030f and.w r3, r3, #15 8024a60: 683a ldr r2, [r7, #0] 8024a62: 429a cmp r2, r3 8024a64: d20c bcs.n 8024a80 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8024a66: 4b22 ldr r3, [pc, #136] @ (8024af0 ) 8024a68: 683a ldr r2, [r7, #0] 8024a6a: b2d2 uxtb r2, r2 8024a6c: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) 8024a6e: 4b20 ldr r3, [pc, #128] @ (8024af0 ) 8024a70: 681b ldr r3, [r3, #0] 8024a72: f003 030f and.w r3, r3, #15 8024a76: 683a ldr r2, [r7, #0] 8024a78: 429a cmp r2, r3 8024a7a: d001 beq.n 8024a80 { return HAL_ERROR; 8024a7c: 2301 movs r3, #1 8024a7e: e032 b.n 8024ae6 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8024a80: 687b ldr r3, [r7, #4] 8024a82: 681b ldr r3, [r3, #0] 8024a84: f003 0304 and.w r3, r3, #4 8024a88: 2b00 cmp r3, #0 8024a8a: d008 beq.n 8024a9e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8024a8c: 4b19 ldr r3, [pc, #100] @ (8024af4 ) 8024a8e: 689b ldr r3, [r3, #8] 8024a90: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00 8024a94: 687b ldr r3, [r7, #4] 8024a96: 68db ldr r3, [r3, #12] 8024a98: 4916 ldr r1, [pc, #88] @ (8024af4 ) 8024a9a: 4313 orrs r3, r2 8024a9c: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8024a9e: 687b ldr r3, [r7, #4] 8024aa0: 681b ldr r3, [r3, #0] 8024aa2: f003 0308 and.w r3, r3, #8 8024aa6: 2b00 cmp r3, #0 8024aa8: d009 beq.n 8024abe { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 8024aaa: 4b12 ldr r3, [pc, #72] @ (8024af4 ) 8024aac: 689b ldr r3, [r3, #8] 8024aae: f423 4260 bic.w r2, r3, #57344 @ 0xe000 8024ab2: 687b ldr r3, [r7, #4] 8024ab4: 691b ldr r3, [r3, #16] 8024ab6: 00db lsls r3, r3, #3 8024ab8: 490e ldr r1, [pc, #56] @ (8024af4 ) 8024aba: 4313 orrs r3, r2 8024abc: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 8024abe: f000 fb7f bl 80251c0 8024ac2: 4602 mov r2, r0 8024ac4: 4b0b ldr r3, [pc, #44] @ (8024af4 ) 8024ac6: 689b ldr r3, [r3, #8] 8024ac8: 091b lsrs r3, r3, #4 8024aca: f003 030f and.w r3, r3, #15 8024ace: 490a ldr r1, [pc, #40] @ (8024af8 ) 8024ad0: 5ccb ldrb r3, [r1, r3] 8024ad2: fa22 f303 lsr.w r3, r2, r3 8024ad6: 4a09 ldr r2, [pc, #36] @ (8024afc ) 8024ad8: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick (uwTickPrio); 8024ada: 4b09 ldr r3, [pc, #36] @ (8024b00 ) 8024adc: 681b ldr r3, [r3, #0] 8024ade: 4618 mov r0, r3 8024ae0: f7f4 fe30 bl 8019744 return HAL_OK; 8024ae4: 2300 movs r3, #0 } 8024ae6: 4618 mov r0, r3 8024ae8: 3710 adds r7, #16 8024aea: 46bd mov sp, r7 8024aec: bd80 pop {r7, pc} 8024aee: bf00 nop 8024af0: 40023c00 .word 0x40023c00 8024af4: 40023800 .word 0x40023800 8024af8: 0802d6d8 .word 0x0802d6d8 8024afc: 20000024 .word 0x20000024 8024b00: 2000003c .word 0x2000003c 08024b04 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8024b04: b480 push {r7} 8024b06: af00 add r7, sp, #0 return SystemCoreClock; 8024b08: 4b03 ldr r3, [pc, #12] @ (8024b18 ) 8024b0a: 681b ldr r3, [r3, #0] } 8024b0c: 4618 mov r0, r3 8024b0e: 46bd mov sp, r7 8024b10: f85d 7b04 ldr.w r7, [sp], #4 8024b14: 4770 bx lr 8024b16: bf00 nop 8024b18: 20000024 .word 0x20000024 08024b1c : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8024b1c: b580 push {r7, lr} 8024b1e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]); 8024b20: f7ff fff0 bl 8024b04 8024b24: 4602 mov r2, r0 8024b26: 4b05 ldr r3, [pc, #20] @ (8024b3c ) 8024b28: 689b ldr r3, [r3, #8] 8024b2a: 0a9b lsrs r3, r3, #10 8024b2c: f003 0307 and.w r3, r3, #7 8024b30: 4903 ldr r1, [pc, #12] @ (8024b40 ) 8024b32: 5ccb ldrb r3, [r1, r3] 8024b34: fa22 f303 lsr.w r3, r2, r3 } 8024b38: 4618 mov r0, r3 8024b3a: bd80 pop {r7, pc} 8024b3c: 40023800 .word 0x40023800 8024b40: 0802d6e8 .word 0x0802d6e8 08024b44 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8024b44: b580 push {r7, lr} 8024b46: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]); 8024b48: f7ff ffdc bl 8024b04 8024b4c: 4602 mov r2, r0 8024b4e: 4b05 ldr r3, [pc, #20] @ (8024b64 ) 8024b50: 689b ldr r3, [r3, #8] 8024b52: 0b5b lsrs r3, r3, #13 8024b54: f003 0307 and.w r3, r3, #7 8024b58: 4903 ldr r1, [pc, #12] @ (8024b68 ) 8024b5a: 5ccb ldrb r3, [r1, r3] 8024b5c: fa22 f303 lsr.w r3, r2, r3 } 8024b60: 4618 mov r0, r3 8024b62: bd80 pop {r7, pc} 8024b64: 40023800 .word 0x40023800 8024b68: 0802d6e8 .word 0x0802d6e8 08024b6c : * the backup registers) and RCC_BDCR register are set to their reset values. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8024b6c: b580 push {r7, lr} 8024b6e: b08c sub sp, #48 @ 0x30 8024b70: af00 add r7, sp, #0 8024b72: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8024b74: 2300 movs r3, #0 8024b76: 627b str r3, [r7, #36] @ 0x24 uint32_t tmpreg1 = 0U; 8024b78: 2300 movs r3, #0 8024b7a: 623b str r3, [r7, #32] uint32_t plli2sp = 0U; 8024b7c: 2300 movs r3, #0 8024b7e: 61fb str r3, [r7, #28] uint32_t plli2sq = 0U; 8024b80: 2300 movs r3, #0 8024b82: 61bb str r3, [r7, #24] uint32_t plli2sr = 0U; 8024b84: 2300 movs r3, #0 8024b86: 617b str r3, [r7, #20] uint32_t pllsaip = 0U; 8024b88: 2300 movs r3, #0 8024b8a: 613b str r3, [r7, #16] uint32_t pllsaiq = 0U; 8024b8c: 2300 movs r3, #0 8024b8e: 60fb str r3, [r7, #12] uint32_t plli2sused = 0U; 8024b90: 2300 movs r3, #0 8024b92: 62fb str r3, [r7, #44] @ 0x2c uint32_t pllsaiused = 0U; 8024b94: 2300 movs r3, #0 8024b96: 62bb str r3, [r7, #40] @ 0x28 /* Check the peripheral clock selection parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------ I2S APB1 configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1)) 8024b98: 687b ldr r3, [r7, #4] 8024b9a: 681b ldr r3, [r3, #0] 8024b9c: f003 0301 and.w r3, r3, #1 8024ba0: 2b00 cmp r3, #0 8024ba2: d010 beq.n 8024bc6 { /* Check the parameters */ assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection); 8024ba4: 4b6f ldr r3, [pc, #444] @ (8024d64 ) 8024ba6: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8024baa: f023 62c0 bic.w r2, r3, #100663296 @ 0x6000000 8024bae: 687b ldr r3, [r7, #4] 8024bb0: 6b9b ldr r3, [r3, #56] @ 0x38 8024bb2: 496c ldr r1, [pc, #432] @ (8024d64 ) 8024bb4: 4313 orrs r3, r2 8024bb6: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for I2S */ if(PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S) 8024bba: 687b ldr r3, [r7, #4] 8024bbc: 6b9b ldr r3, [r3, #56] @ 0x38 8024bbe: 2b00 cmp r3, #0 8024bc0: d101 bne.n 8024bc6 { plli2sused = 1U; 8024bc2: 2301 movs r3, #1 8024bc4: 62fb str r3, [r7, #44] @ 0x2c } } /*--------------------------------------------------------------------------*/ /*---------------------------- I2S APB2 configuration ----------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2)) 8024bc6: 687b ldr r3, [r7, #4] 8024bc8: 681b ldr r3, [r3, #0] 8024bca: f003 0302 and.w r3, r3, #2 8024bce: 2b00 cmp r3, #0 8024bd0: d010 beq.n 8024bf4 { /* Check the parameters */ assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection); 8024bd2: 4b64 ldr r3, [pc, #400] @ (8024d64 ) 8024bd4: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8024bd8: f023 52c0 bic.w r2, r3, #402653184 @ 0x18000000 8024bdc: 687b ldr r3, [r7, #4] 8024bde: 6bdb ldr r3, [r3, #60] @ 0x3c 8024be0: 4960 ldr r1, [pc, #384] @ (8024d64 ) 8024be2: 4313 orrs r3, r2 8024be4: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for I2S */ if(PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S) 8024be8: 687b ldr r3, [r7, #4] 8024bea: 6bdb ldr r3, [r3, #60] @ 0x3c 8024bec: 2b00 cmp r3, #0 8024bee: d101 bne.n 8024bf4 { plli2sused = 1U; 8024bf0: 2301 movs r3, #1 8024bf2: 62fb str r3, [r7, #44] @ 0x2c } } /*--------------------------------------------------------------------------*/ /*--------------------------- SAI1 configuration ---------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1)) 8024bf4: 687b ldr r3, [r7, #4] 8024bf6: 681b ldr r3, [r3, #0] 8024bf8: f003 0304 and.w r3, r3, #4 8024bfc: 2b00 cmp r3, #0 8024bfe: d017 beq.n 8024c30 { /* Check the parameters */ assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); /* Configure SAI1 Clock source */ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); 8024c00: 4b58 ldr r3, [pc, #352] @ (8024d64 ) 8024c02: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8024c06: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 8024c0a: 687b ldr r3, [r7, #4] 8024c0c: 6b1b ldr r3, [r3, #48] @ 0x30 8024c0e: 4955 ldr r1, [pc, #340] @ (8024d64 ) 8024c10: 4313 orrs r3, r2 8024c12: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S) 8024c16: 687b ldr r3, [r7, #4] 8024c18: 6b1b ldr r3, [r3, #48] @ 0x30 8024c1a: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8024c1e: d101 bne.n 8024c24 { plli2sused = 1U; 8024c20: 2301 movs r3, #1 8024c22: 62fb str r3, [r7, #44] @ 0x2c } /* Enable the PLLSAI when it's used as clock source for SAI */ if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI) 8024c24: 687b ldr r3, [r7, #4] 8024c26: 6b1b ldr r3, [r3, #48] @ 0x30 8024c28: 2b00 cmp r3, #0 8024c2a: d101 bne.n 8024c30 { pllsaiused = 1U; 8024c2c: 2301 movs r3, #1 8024c2e: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*-------------------------- SAI2 configuration ----------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2)) 8024c30: 687b ldr r3, [r7, #4] 8024c32: 681b ldr r3, [r3, #0] 8024c34: f003 0308 and.w r3, r3, #8 8024c38: 2b00 cmp r3, #0 8024c3a: d017 beq.n 8024c6c { /* Check the parameters */ assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection)); /* Configure SAI2 Clock source */ __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); 8024c3c: 4b49 ldr r3, [pc, #292] @ (8024d64 ) 8024c3e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8024c42: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 8024c46: 687b ldr r3, [r7, #4] 8024c48: 6b5b ldr r3, [r3, #52] @ 0x34 8024c4a: 4946 ldr r1, [pc, #280] @ (8024d64 ) 8024c4c: 4313 orrs r3, r2 8024c4e: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S) 8024c52: 687b ldr r3, [r7, #4] 8024c54: 6b5b ldr r3, [r3, #52] @ 0x34 8024c56: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8024c5a: d101 bne.n 8024c60 { plli2sused = 1U; 8024c5c: 2301 movs r3, #1 8024c5e: 62fb str r3, [r7, #44] @ 0x2c } /* Enable the PLLSAI when it's used as clock source for SAI */ if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI) 8024c60: 687b ldr r3, [r7, #4] 8024c62: 6b5b ldr r3, [r3, #52] @ 0x34 8024c64: 2b00 cmp r3, #0 8024c66: d101 bne.n 8024c6c { pllsaiused = 1U; 8024c68: 2301 movs r3, #1 8024c6a: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*----------------------------- RTC configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 8024c6c: 687b ldr r3, [r7, #4] 8024c6e: 681b ldr r3, [r3, #0] 8024c70: f003 0320 and.w r3, r3, #32 8024c74: 2b00 cmp r3, #0 8024c76: f000 808a beq.w 8024d8e { /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); 8024c7a: 2300 movs r3, #0 8024c7c: 60bb str r3, [r7, #8] 8024c7e: 4b39 ldr r3, [pc, #228] @ (8024d64 ) 8024c80: 6c1b ldr r3, [r3, #64] @ 0x40 8024c82: 4a38 ldr r2, [pc, #224] @ (8024d64 ) 8024c84: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8024c88: 6413 str r3, [r2, #64] @ 0x40 8024c8a: 4b36 ldr r3, [pc, #216] @ (8024d64 ) 8024c8c: 6c1b ldr r3, [r3, #64] @ 0x40 8024c8e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8024c92: 60bb str r3, [r7, #8] 8024c94: 68bb ldr r3, [r7, #8] /* Enable write access to Backup domain */ PWR->CR |= PWR_CR_DBP; 8024c96: 4b34 ldr r3, [pc, #208] @ (8024d68 ) 8024c98: 681b ldr r3, [r3, #0] 8024c9a: 4a33 ldr r2, [pc, #204] @ (8024d68 ) 8024c9c: f443 7380 orr.w r3, r3, #256 @ 0x100 8024ca0: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); 8024ca2: f7fb fac1 bl 8020228 8024ca6: 6278 str r0, [r7, #36] @ 0x24 while((PWR->CR & PWR_CR_DBP) == RESET) 8024ca8: e008 b.n 8024cbc { if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE) 8024caa: f7fb fabd bl 8020228 8024cae: 4602 mov r2, r0 8024cb0: 6a7b ldr r3, [r7, #36] @ 0x24 8024cb2: 1ad3 subs r3, r2, r3 8024cb4: 2b02 cmp r3, #2 8024cb6: d901 bls.n 8024cbc { return HAL_TIMEOUT; 8024cb8: 2303 movs r3, #3 8024cba: e278 b.n 80251ae while((PWR->CR & PWR_CR_DBP) == RESET) 8024cbc: 4b2a ldr r3, [pc, #168] @ (8024d68 ) 8024cbe: 681b ldr r3, [r3, #0] 8024cc0: f403 7380 and.w r3, r3, #256 @ 0x100 8024cc4: 2b00 cmp r3, #0 8024cc6: d0f0 beq.n 8024caa } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL); 8024cc8: 4b26 ldr r3, [pc, #152] @ (8024d64 ) 8024cca: 6f1b ldr r3, [r3, #112] @ 0x70 8024ccc: f403 7340 and.w r3, r3, #768 @ 0x300 8024cd0: 623b str r3, [r7, #32] if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8024cd2: 6a3b ldr r3, [r7, #32] 8024cd4: 2b00 cmp r3, #0 8024cd6: d02f beq.n 8024d38 8024cd8: 687b ldr r3, [r7, #4] 8024cda: 6c1b ldr r3, [r3, #64] @ 0x40 8024cdc: f403 7340 and.w r3, r3, #768 @ 0x300 8024ce0: 6a3a ldr r2, [r7, #32] 8024ce2: 429a cmp r2, r3 8024ce4: d028 beq.n 8024d38 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8024ce6: 4b1f ldr r3, [pc, #124] @ (8024d64 ) 8024ce8: 6f1b ldr r3, [r3, #112] @ 0x70 8024cea: f423 7340 bic.w r3, r3, #768 @ 0x300 8024cee: 623b str r3, [r7, #32] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8024cf0: 4b1e ldr r3, [pc, #120] @ (8024d6c ) 8024cf2: 2201 movs r2, #1 8024cf4: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8024cf6: 4b1d ldr r3, [pc, #116] @ (8024d6c ) 8024cf8: 2200 movs r2, #0 8024cfa: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg1; 8024cfc: 4a19 ldr r2, [pc, #100] @ (8024d64 ) 8024cfe: 6a3b ldr r3, [r7, #32] 8024d00: 6713 str r3, [r2, #112] @ 0x70 /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON)) 8024d02: 4b18 ldr r3, [pc, #96] @ (8024d64 ) 8024d04: 6f1b ldr r3, [r3, #112] @ 0x70 8024d06: f003 0301 and.w r3, r3, #1 8024d0a: 2b01 cmp r3, #1 8024d0c: d114 bne.n 8024d38 { /* Get tick */ tickstart = HAL_GetTick(); 8024d0e: f7fb fa8b bl 8020228 8024d12: 6278 str r0, [r7, #36] @ 0x24 /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8024d14: e00a b.n 8024d2c { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8024d16: f7fb fa87 bl 8020228 8024d1a: 4602 mov r2, r0 8024d1c: 6a7b ldr r3, [r7, #36] @ 0x24 8024d1e: 1ad3 subs r3, r2, r3 8024d20: f241 3288 movw r2, #5000 @ 0x1388 8024d24: 4293 cmp r3, r2 8024d26: d901 bls.n 8024d2c { return HAL_TIMEOUT; 8024d28: 2303 movs r3, #3 8024d2a: e240 b.n 80251ae while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8024d2c: 4b0d ldr r3, [pc, #52] @ (8024d64 ) 8024d2e: 6f1b ldr r3, [r3, #112] @ 0x70 8024d30: f003 0302 and.w r3, r3, #2 8024d34: 2b00 cmp r3, #0 8024d36: d0ee beq.n 8024d16 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8024d38: 687b ldr r3, [r7, #4] 8024d3a: 6c1b ldr r3, [r3, #64] @ 0x40 8024d3c: f403 7340 and.w r3, r3, #768 @ 0x300 8024d40: f5b3 7f40 cmp.w r3, #768 @ 0x300 8024d44: d114 bne.n 8024d70 8024d46: 4b07 ldr r3, [pc, #28] @ (8024d64 ) 8024d48: 689b ldr r3, [r3, #8] 8024d4a: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000 8024d4e: 687b ldr r3, [r7, #4] 8024d50: 6c1b ldr r3, [r3, #64] @ 0x40 8024d52: f023 4370 bic.w r3, r3, #4026531840 @ 0xf0000000 8024d56: f423 7340 bic.w r3, r3, #768 @ 0x300 8024d5a: 4902 ldr r1, [pc, #8] @ (8024d64 ) 8024d5c: 4313 orrs r3, r2 8024d5e: 608b str r3, [r1, #8] 8024d60: e00c b.n 8024d7c 8024d62: bf00 nop 8024d64: 40023800 .word 0x40023800 8024d68: 40007000 .word 0x40007000 8024d6c: 42470e40 .word 0x42470e40 8024d70: 4b4a ldr r3, [pc, #296] @ (8024e9c ) 8024d72: 689b ldr r3, [r3, #8] 8024d74: 4a49 ldr r2, [pc, #292] @ (8024e9c ) 8024d76: f423 13f8 bic.w r3, r3, #2031616 @ 0x1f0000 8024d7a: 6093 str r3, [r2, #8] 8024d7c: 4b47 ldr r3, [pc, #284] @ (8024e9c ) 8024d7e: 6f1a ldr r2, [r3, #112] @ 0x70 8024d80: 687b ldr r3, [r7, #4] 8024d82: 6c1b ldr r3, [r3, #64] @ 0x40 8024d84: f3c3 030b ubfx r3, r3, #0, #12 8024d88: 4944 ldr r1, [pc, #272] @ (8024e9c ) 8024d8a: 4313 orrs r3, r2 8024d8c: 670b str r3, [r1, #112] @ 0x70 } /*--------------------------------------------------------------------------*/ /*---------------------------- TIM configuration ---------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM)) 8024d8e: 687b ldr r3, [r7, #4] 8024d90: 681b ldr r3, [r3, #0] 8024d92: f003 0310 and.w r3, r3, #16 8024d96: 2b00 cmp r3, #0 8024d98: d004 beq.n 8024da4 { /* Configure Timer Prescaler */ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); 8024d9a: 687b ldr r3, [r7, #4] 8024d9c: f893 2058 ldrb.w r2, [r3, #88] @ 0x58 8024da0: 4b3f ldr r3, [pc, #252] @ (8024ea0 ) 8024da2: 601a str r2, [r3, #0] } /*--------------------------------------------------------------------------*/ /*---------------------------- FMPI2C1 Configuration -----------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1) 8024da4: 687b ldr r3, [r7, #4] 8024da6: 681b ldr r3, [r3, #0] 8024da8: f003 0380 and.w r3, r3, #128 @ 0x80 8024dac: 2b00 cmp r3, #0 8024dae: d00a beq.n 8024dc6 { /* Check the parameters */ assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection)); /* Configure the FMPI2C1 clock source */ __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection); 8024db0: 4b3a ldr r3, [pc, #232] @ (8024e9c ) 8024db2: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8024db6: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 8024dba: 687b ldr r3, [r7, #4] 8024dbc: 6cdb ldr r3, [r3, #76] @ 0x4c 8024dbe: 4937 ldr r1, [pc, #220] @ (8024e9c ) 8024dc0: 4313 orrs r3, r2 8024dc2: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*------------------------------ CEC Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) 8024dc6: 687b ldr r3, [r7, #4] 8024dc8: 681b ldr r3, [r3, #0] 8024dca: f003 0340 and.w r3, r3, #64 @ 0x40 8024dce: 2b00 cmp r3, #0 8024dd0: d00a beq.n 8024de8 { /* Check the parameters */ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); /* Configure the CEC clock source */ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); 8024dd2: 4b32 ldr r3, [pc, #200] @ (8024e9c ) 8024dd4: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8024dd8: f023 6280 bic.w r2, r3, #67108864 @ 0x4000000 8024ddc: 687b ldr r3, [r7, #4] 8024dde: 6c9b ldr r3, [r3, #72] @ 0x48 8024de0: 492e ldr r1, [pc, #184] @ (8024e9c ) 8024de2: 4313 orrs r3, r2 8024de4: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*----------------------------- CLK48 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) 8024de8: 687b ldr r3, [r7, #4] 8024dea: 681b ldr r3, [r3, #0] 8024dec: f403 7380 and.w r3, r3, #256 @ 0x100 8024df0: 2b00 cmp r3, #0 8024df2: d011 beq.n 8024e18 { /* Check the parameters */ assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection)); /* Configure the CLK48 clock source */ __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection); 8024df4: 4b29 ldr r3, [pc, #164] @ (8024e9c ) 8024df6: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8024dfa: f023 6200 bic.w r2, r3, #134217728 @ 0x8000000 8024dfe: 687b ldr r3, [r7, #4] 8024e00: 6d5b ldr r3, [r3, #84] @ 0x54 8024e02: 4926 ldr r1, [pc, #152] @ (8024e9c ) 8024e04: 4313 orrs r3, r2 8024e06: f8c1 3094 str.w r3, [r1, #148] @ 0x94 /* Enable the PLLSAI when it's used as clock source for CLK48 */ if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP) 8024e0a: 687b ldr r3, [r7, #4] 8024e0c: 6d5b ldr r3, [r3, #84] @ 0x54 8024e0e: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 8024e12: d101 bne.n 8024e18 { pllsaiused = 1U; 8024e14: 2301 movs r3, #1 8024e16: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*----------------------------- SDIO Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) 8024e18: 687b ldr r3, [r7, #4] 8024e1a: 681b ldr r3, [r3, #0] 8024e1c: f403 7300 and.w r3, r3, #512 @ 0x200 8024e20: 2b00 cmp r3, #0 8024e22: d00a beq.n 8024e3a { /* Check the parameters */ assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection)); /* Configure the SDIO clock source */ __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection); 8024e24: 4b1d ldr r3, [pc, #116] @ (8024e9c ) 8024e26: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8024e2a: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000 8024e2e: 687b ldr r3, [r7, #4] 8024e30: 6c5b ldr r3, [r3, #68] @ 0x44 8024e32: 491a ldr r1, [pc, #104] @ (8024e9c ) 8024e34: 4313 orrs r3, r2 8024e36: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*------------------------------ SPDIFRX Configuration ---------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) 8024e3a: 687b ldr r3, [r7, #4] 8024e3c: 681b ldr r3, [r3, #0] 8024e3e: f403 6380 and.w r3, r3, #1024 @ 0x400 8024e42: 2b00 cmp r3, #0 8024e44: d011 beq.n 8024e6a { /* Check the parameters */ assert_param(IS_RCC_SPDIFRXCLKSOURCE(PeriphClkInit->SpdifClockSelection)); /* Configure the SPDIFRX clock source */ __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifClockSelection); 8024e46: 4b15 ldr r3, [pc, #84] @ (8024e9c ) 8024e48: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8024e4c: f023 5200 bic.w r2, r3, #536870912 @ 0x20000000 8024e50: 687b ldr r3, [r7, #4] 8024e52: 6d1b ldr r3, [r3, #80] @ 0x50 8024e54: 4911 ldr r1, [pc, #68] @ (8024e9c ) 8024e56: 4313 orrs r3, r2 8024e58: f8c1 3094 str.w r3, [r1, #148] @ 0x94 /* Enable the PLLI2S when it's used as clock source for SPDIFRX */ if(PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP) 8024e5c: 687b ldr r3, [r7, #4] 8024e5e: 6d1b ldr r3, [r3, #80] @ 0x50 8024e60: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8024e64: d101 bne.n 8024e6a { plli2sused = 1U; 8024e66: 2301 movs r3, #1 8024e68: 62fb str r3, [r7, #44] @ 0x2c /*--------------------------------------------------------------------------*/ /*---------------------------- PLLI2S Configuration ------------------------*/ /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S on APB1, I2S on APB2 or SPDIFRX */ if((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S)) 8024e6a: 6afb ldr r3, [r7, #44] @ 0x2c 8024e6c: 2b01 cmp r3, #1 8024e6e: d005 beq.n 8024e7c 8024e70: 687b ldr r3, [r7, #4] 8024e72: 681b ldr r3, [r3, #0] 8024e74: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8024e78: f040 80ff bne.w 802507a { /* Disable the PLLI2S */ __HAL_RCC_PLLI2S_DISABLE(); 8024e7c: 4b09 ldr r3, [pc, #36] @ (8024ea4 ) 8024e7e: 2200 movs r2, #0 8024e80: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8024e82: f7fb f9d1 bl 8020228 8024e86: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLI2S is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8024e88: e00e b.n 8024ea8 { if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE) 8024e8a: f7fb f9cd bl 8020228 8024e8e: 4602 mov r2, r0 8024e90: 6a7b ldr r3, [r7, #36] @ 0x24 8024e92: 1ad3 subs r3, r2, r3 8024e94: 2b02 cmp r3, #2 8024e96: d907 bls.n 8024ea8 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8024e98: 2303 movs r3, #3 8024e9a: e188 b.n 80251ae 8024e9c: 40023800 .word 0x40023800 8024ea0: 424711e0 .word 0x424711e0 8024ea4: 42470068 .word 0x42470068 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8024ea8: 4b7e ldr r3, [pc, #504] @ (80250a4 ) 8024eaa: 681b ldr r3, [r3, #0] 8024eac: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8024eb0: 2b00 cmp r3, #0 8024eb2: d1ea bne.n 8024e8a /* check for common PLLI2S Parameters */ assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM)); assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN)); /*------ In Case of PLLI2S is selected as source clock for I2S -----------*/ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) || 8024eb4: 687b ldr r3, [r7, #4] 8024eb6: 681b ldr r3, [r3, #0] 8024eb8: f003 0301 and.w r3, r3, #1 8024ebc: 2b00 cmp r3, #0 8024ebe: d003 beq.n 8024ec8 8024ec0: 687b ldr r3, [r7, #4] 8024ec2: 6b9b ldr r3, [r3, #56] @ 0x38 8024ec4: 2b00 cmp r3, #0 8024ec6: d009 beq.n 8024edc ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S))) 8024ec8: 687b ldr r3, [r7, #4] 8024eca: 681b ldr r3, [r3, #0] 8024ecc: f003 0302 and.w r3, r3, #2 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) || 8024ed0: 2b00 cmp r3, #0 8024ed2: d028 beq.n 8024f26 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S))) 8024ed4: 687b ldr r3, [r7, #4] 8024ed6: 6bdb ldr r3, [r3, #60] @ 0x3c 8024ed8: 2b00 cmp r3, #0 8024eda: d124 bne.n 8024f26 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); /* Read PLLI2SP/PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */ plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 8024edc: 4b71 ldr r3, [pc, #452] @ (80250a4 ) 8024ede: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8024ee2: 0c1b lsrs r3, r3, #16 8024ee4: f003 0303 and.w r3, r3, #3 8024ee8: 3301 adds r3, #1 8024eea: 005b lsls r3, r3, #1 8024eec: 61fb str r3, [r7, #28] plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); 8024eee: 4b6d ldr r3, [pc, #436] @ (80250a4 ) 8024ef0: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8024ef4: 0e1b lsrs r3, r3, #24 8024ef6: f003 030f and.w r3, r3, #15 8024efa: 61bb str r3, [r7, #24] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, plli2sq, PeriphClkInit->PLLI2S.PLLI2SR); 8024efc: 687b ldr r3, [r7, #4] 8024efe: 685a ldr r2, [r3, #4] 8024f00: 687b ldr r3, [r7, #4] 8024f02: 689b ldr r3, [r3, #8] 8024f04: 019b lsls r3, r3, #6 8024f06: 431a orrs r2, r3 8024f08: 69fb ldr r3, [r7, #28] 8024f0a: 085b lsrs r3, r3, #1 8024f0c: 3b01 subs r3, #1 8024f0e: 041b lsls r3, r3, #16 8024f10: 431a orrs r2, r3 8024f12: 69bb ldr r3, [r7, #24] 8024f14: 061b lsls r3, r3, #24 8024f16: 431a orrs r2, r3 8024f18: 687b ldr r3, [r7, #4] 8024f1a: 695b ldr r3, [r3, #20] 8024f1c: 071b lsls r3, r3, #28 8024f1e: 4961 ldr r1, [pc, #388] @ (80250a4 ) 8024f20: 4313 orrs r3, r2 8024f22: f8c1 3084 str.w r3, [r1, #132] @ 0x84 } /*------- In Case of PLLI2S is selected as source clock for SAI ----------*/ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 8024f26: 687b ldr r3, [r7, #4] 8024f28: 681b ldr r3, [r3, #0] 8024f2a: f003 0304 and.w r3, r3, #4 8024f2e: 2b00 cmp r3, #0 8024f30: d004 beq.n 8024f3c 8024f32: 687b ldr r3, [r7, #4] 8024f34: 6b1b ldr r3, [r3, #48] @ 0x30 8024f36: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8024f3a: d00a beq.n 8024f52 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 8024f3c: 687b ldr r3, [r7, #4] 8024f3e: 681b ldr r3, [r3, #0] 8024f40: f003 0308 and.w r3, r3, #8 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 8024f44: 2b00 cmp r3, #0 8024f46: d035 beq.n 8024fb4 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 8024f48: 687b ldr r3, [r7, #4] 8024f4a: 6b5b ldr r3, [r3, #52] @ 0x34 8024f4c: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8024f50: d130 bne.n 8024fb4 assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Check for PLLI2S/DIVQ parameters */ assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ)); /* Read PLLI2SP/PLLI2SR value from PLLI2SCFGR register (this value is not needed for SAI configuration) */ plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 8024f52: 4b54 ldr r3, [pc, #336] @ (80250a4 ) 8024f54: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8024f58: 0c1b lsrs r3, r3, #16 8024f5a: f003 0303 and.w r3, r3, #3 8024f5e: 3301 adds r3, #1 8024f60: 005b lsls r3, r3, #1 8024f62: 61fb str r3, [r7, #28] plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 8024f64: 4b4f ldr r3, [pc, #316] @ (80250a4 ) 8024f66: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8024f6a: 0f1b lsrs r3, r3, #28 8024f6c: f003 0307 and.w r3, r3, #7 8024f70: 617b str r3, [r7, #20] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */ /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , plli2sp, PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr); 8024f72: 687b ldr r3, [r7, #4] 8024f74: 685a ldr r2, [r3, #4] 8024f76: 687b ldr r3, [r7, #4] 8024f78: 689b ldr r3, [r3, #8] 8024f7a: 019b lsls r3, r3, #6 8024f7c: 431a orrs r2, r3 8024f7e: 69fb ldr r3, [r7, #28] 8024f80: 085b lsrs r3, r3, #1 8024f82: 3b01 subs r3, #1 8024f84: 041b lsls r3, r3, #16 8024f86: 431a orrs r2, r3 8024f88: 687b ldr r3, [r7, #4] 8024f8a: 691b ldr r3, [r3, #16] 8024f8c: 061b lsls r3, r3, #24 8024f8e: 431a orrs r2, r3 8024f90: 697b ldr r3, [r7, #20] 8024f92: 071b lsls r3, r3, #28 8024f94: 4943 ldr r1, [pc, #268] @ (80250a4 ) 8024f96: 4313 orrs r3, r2 8024f98: f8c1 3084 str.w r3, [r1, #132] @ 0x84 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */ __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ); 8024f9c: 4b41 ldr r3, [pc, #260] @ (80250a4 ) 8024f9e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8024fa2: f023 021f bic.w r2, r3, #31 8024fa6: 687b ldr r3, [r7, #4] 8024fa8: 6a9b ldr r3, [r3, #40] @ 0x28 8024faa: 3b01 subs r3, #1 8024fac: 493d ldr r1, [pc, #244] @ (80250a4 ) 8024fae: 4313 orrs r3, r2 8024fb0: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*------ In Case of PLLI2S is selected as source clock for SPDIFRX -------*/ if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) && (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP)) 8024fb4: 687b ldr r3, [r7, #4] 8024fb6: 681b ldr r3, [r3, #0] 8024fb8: f403 6380 and.w r3, r3, #1024 @ 0x400 8024fbc: 2b00 cmp r3, #0 8024fbe: d029 beq.n 8025014 8024fc0: 687b ldr r3, [r7, #4] 8024fc2: 6d1b ldr r3, [r3, #80] @ 0x50 8024fc4: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8024fc8: d124 bne.n 8025014 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP)); /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */ plli2sq = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 8024fca: 4b36 ldr r3, [pc, #216] @ (80250a4 ) 8024fcc: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8024fd0: 0c1b lsrs r3, r3, #16 8024fd2: f003 0303 and.w r3, r3, #3 8024fd6: 3301 adds r3, #1 8024fd8: 005b lsls r3, r3, #1 8024fda: 61bb str r3, [r7, #24] plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 8024fdc: 4b31 ldr r3, [pc, #196] @ (80250a4 ) 8024fde: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8024fe2: 0f1b lsrs r3, r3, #28 8024fe4: f003 0307 and.w r3, r3, #7 8024fe8: 617b str r3, [r7, #20] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, plli2sq, plli2sr); 8024fea: 687b ldr r3, [r7, #4] 8024fec: 685a ldr r2, [r3, #4] 8024fee: 687b ldr r3, [r7, #4] 8024ff0: 689b ldr r3, [r3, #8] 8024ff2: 019b lsls r3, r3, #6 8024ff4: 431a orrs r2, r3 8024ff6: 687b ldr r3, [r7, #4] 8024ff8: 68db ldr r3, [r3, #12] 8024ffa: 085b lsrs r3, r3, #1 8024ffc: 3b01 subs r3, #1 8024ffe: 041b lsls r3, r3, #16 8025000: 431a orrs r2, r3 8025002: 69bb ldr r3, [r7, #24] 8025004: 061b lsls r3, r3, #24 8025006: 431a orrs r2, r3 8025008: 697b ldr r3, [r7, #20] 802500a: 071b lsls r3, r3, #28 802500c: 4925 ldr r1, [pc, #148] @ (80250a4 ) 802500e: 4313 orrs r3, r2 8025010: f8c1 3084 str.w r3, [r1, #132] @ 0x84 } /*----------------- In Case of PLLI2S is just selected -----------------*/ if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S) 8025014: 687b ldr r3, [r7, #4] 8025016: 681b ldr r3, [r3, #0] 8025018: f403 6300 and.w r3, r3, #2048 @ 0x800 802501c: 2b00 cmp r3, #0 802501e: d016 beq.n 802504e assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); 8025020: 687b ldr r3, [r7, #4] 8025022: 685a ldr r2, [r3, #4] 8025024: 687b ldr r3, [r7, #4] 8025026: 689b ldr r3, [r3, #8] 8025028: 019b lsls r3, r3, #6 802502a: 431a orrs r2, r3 802502c: 687b ldr r3, [r7, #4] 802502e: 68db ldr r3, [r3, #12] 8025030: 085b lsrs r3, r3, #1 8025032: 3b01 subs r3, #1 8025034: 041b lsls r3, r3, #16 8025036: 431a orrs r2, r3 8025038: 687b ldr r3, [r7, #4] 802503a: 691b ldr r3, [r3, #16] 802503c: 061b lsls r3, r3, #24 802503e: 431a orrs r2, r3 8025040: 687b ldr r3, [r7, #4] 8025042: 695b ldr r3, [r3, #20] 8025044: 071b lsls r3, r3, #28 8025046: 4917 ldr r1, [pc, #92] @ (80250a4 ) 8025048: 4313 orrs r3, r2 802504a: f8c1 3084 str.w r3, [r1, #132] @ 0x84 } /* Enable the PLLI2S */ __HAL_RCC_PLLI2S_ENABLE(); 802504e: 4b16 ldr r3, [pc, #88] @ (80250a8 ) 8025050: 2201 movs r2, #1 8025052: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8025054: f7fb f8e8 bl 8020228 8025058: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLI2S is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 802505a: e008 b.n 802506e { if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE) 802505c: f7fb f8e4 bl 8020228 8025060: 4602 mov r2, r0 8025062: 6a7b ldr r3, [r7, #36] @ 0x24 8025064: 1ad3 subs r3, r2, r3 8025066: 2b02 cmp r3, #2 8025068: d901 bls.n 802506e { /* return in case of Timeout detected */ return HAL_TIMEOUT; 802506a: 2303 movs r3, #3 802506c: e09f b.n 80251ae while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 802506e: 4b0d ldr r3, [pc, #52] @ (80250a4 ) 8025070: 681b ldr r3, [r3, #0] 8025072: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8025076: 2b00 cmp r3, #0 8025078: d0f0 beq.n 802505c } /*--------------------------------------------------------------------------*/ /*----------------------------- PLLSAI Configuration -----------------------*/ /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, CLK48 or SDIO */ if(pllsaiused == 1U) 802507a: 6abb ldr r3, [r7, #40] @ 0x28 802507c: 2b01 cmp r3, #1 802507e: f040 8095 bne.w 80251ac { /* Disable PLLSAI Clock */ __HAL_RCC_PLLSAI_DISABLE(); 8025082: 4b0a ldr r3, [pc, #40] @ (80250ac ) 8025084: 2200 movs r2, #0 8025086: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8025088: f7fb f8ce bl 8020228 802508c: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLSAI is disabled */ while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 802508e: e00f b.n 80250b0 { if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE) 8025090: f7fb f8ca bl 8020228 8025094: 4602 mov r2, r0 8025096: 6a7b ldr r3, [r7, #36] @ 0x24 8025098: 1ad3 subs r3, r2, r3 802509a: 2b02 cmp r3, #2 802509c: d908 bls.n 80250b0 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 802509e: 2303 movs r3, #3 80250a0: e085 b.n 80251ae 80250a2: bf00 nop 80250a4: 40023800 .word 0x40023800 80250a8: 42470068 .word 0x42470068 80250ac: 42470070 .word 0x42470070 while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 80250b0: 4b41 ldr r3, [pc, #260] @ (80251b8 ) 80250b2: 681b ldr r3, [r3, #0] 80250b4: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 80250b8: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 80250bc: d0e8 beq.n 8025090 /* Check the PLLSAI division factors */ assert_param(IS_RCC_PLLSAIM_VALUE(PeriphClkInit->PLLSAI.PLLSAIM)); assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN)); /*------ In Case of PLLSAI is selected as source clock for SAI -----------*/ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) || 80250be: 687b ldr r3, [r7, #4] 80250c0: 681b ldr r3, [r3, #0] 80250c2: f003 0304 and.w r3, r3, #4 80250c6: 2b00 cmp r3, #0 80250c8: d003 beq.n 80250d2 80250ca: 687b ldr r3, [r7, #4] 80250cc: 6b1b ldr r3, [r3, #48] @ 0x30 80250ce: 2b00 cmp r3, #0 80250d0: d009 beq.n 80250e6 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 80250d2: 687b ldr r3, [r7, #4] 80250d4: 681b ldr r3, [r3, #0] 80250d6: f003 0308 and.w r3, r3, #8 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) || 80250da: 2b00 cmp r3, #0 80250dc: d02b beq.n 8025136 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 80250de: 687b ldr r3, [r7, #4] 80250e0: 6b5b ldr r3, [r3, #52] @ 0x34 80250e2: 2b00 cmp r3, #0 80250e4: d127 bne.n 8025136 assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ)); /* check for PLLSAI/DIVQ Parameter */ assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ)); /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */ pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U); 80250e6: 4b34 ldr r3, [pc, #208] @ (80251b8 ) 80250e8: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80250ec: 0c1b lsrs r3, r3, #16 80250ee: f003 0303 and.w r3, r3, #3 80250f2: 3301 adds r3, #1 80250f4: 005b lsls r3, r3, #1 80250f6: 613b str r3, [r7, #16] /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN , pllsaip, PeriphClkInit->PLLSAI.PLLSAIQ, 0U); 80250f8: 687b ldr r3, [r7, #4] 80250fa: 699a ldr r2, [r3, #24] 80250fc: 687b ldr r3, [r7, #4] 80250fe: 69db ldr r3, [r3, #28] 8025100: 019b lsls r3, r3, #6 8025102: 431a orrs r2, r3 8025104: 693b ldr r3, [r7, #16] 8025106: 085b lsrs r3, r3, #1 8025108: 3b01 subs r3, #1 802510a: 041b lsls r3, r3, #16 802510c: 431a orrs r2, r3 802510e: 687b ldr r3, [r7, #4] 8025110: 6a5b ldr r3, [r3, #36] @ 0x24 8025112: 061b lsls r3, r3, #24 8025114: 4928 ldr r1, [pc, #160] @ (80251b8 ) 8025116: 4313 orrs r3, r2 8025118: f8c1 3088 str.w r3, [r1, #136] @ 0x88 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ); 802511c: 4b26 ldr r3, [pc, #152] @ (80251b8 ) 802511e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8025122: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 8025126: 687b ldr r3, [r7, #4] 8025128: 6adb ldr r3, [r3, #44] @ 0x2c 802512a: 3b01 subs r3, #1 802512c: 021b lsls r3, r3, #8 802512e: 4922 ldr r1, [pc, #136] @ (80251b8 ) 8025130: 4313 orrs r3, r2 8025132: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*------ In Case of PLLSAI is selected as source clock for CLK48 ---------*/ /* In Case of PLLI2S is selected as source clock for CLK48 */ if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP)) 8025136: 687b ldr r3, [r7, #4] 8025138: 681b ldr r3, [r3, #0] 802513a: f403 7380 and.w r3, r3, #256 @ 0x100 802513e: 2b00 cmp r3, #0 8025140: d01d beq.n 802517e 8025142: 687b ldr r3, [r7, #4] 8025144: 6d5b ldr r3, [r3, #84] @ 0x54 8025146: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 802514a: d118 bne.n 802517e { /* check for Parameters */ assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); /* Read PLLSAIQ value from PLLI2SCFGR register (this value is not need for SAI configuration) */ pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); 802514c: 4b1a ldr r3, [pc, #104] @ (80251b8 ) 802514e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8025152: 0e1b lsrs r3, r3, #24 8025154: f003 030f and.w r3, r3, #15 8025158: 60fb str r3, [r7, #12] /* Configure the PLLSAI division factors */ /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * (PLLI2SN/PLLSAIM) */ /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, pllsaiq, 0U); 802515a: 687b ldr r3, [r7, #4] 802515c: 699a ldr r2, [r3, #24] 802515e: 687b ldr r3, [r7, #4] 8025160: 69db ldr r3, [r3, #28] 8025162: 019b lsls r3, r3, #6 8025164: 431a orrs r2, r3 8025166: 687b ldr r3, [r7, #4] 8025168: 6a1b ldr r3, [r3, #32] 802516a: 085b lsrs r3, r3, #1 802516c: 3b01 subs r3, #1 802516e: 041b lsls r3, r3, #16 8025170: 431a orrs r2, r3 8025172: 68fb ldr r3, [r7, #12] 8025174: 061b lsls r3, r3, #24 8025176: 4910 ldr r1, [pc, #64] @ (80251b8 ) 8025178: 4313 orrs r3, r2 802517a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } /* Enable PLLSAI Clock */ __HAL_RCC_PLLSAI_ENABLE(); 802517e: 4b0f ldr r3, [pc, #60] @ (80251bc ) 8025180: 2201 movs r2, #1 8025182: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8025184: f7fb f850 bl 8020228 8025188: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLSAI is ready */ while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 802518a: e008 b.n 802519e { if((HAL_GetTick() - tickstart ) > PLLSAI_TIMEOUT_VALUE) 802518c: f7fb f84c bl 8020228 8025190: 4602 mov r2, r0 8025192: 6a7b ldr r3, [r7, #36] @ 0x24 8025194: 1ad3 subs r3, r2, r3 8025196: 2b02 cmp r3, #2 8025198: d901 bls.n 802519e { /* return in case of Timeout detected */ return HAL_TIMEOUT; 802519a: 2303 movs r3, #3 802519c: e007 b.n 80251ae while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 802519e: 4b06 ldr r3, [pc, #24] @ (80251b8 ) 80251a0: 681b ldr r3, [r3, #0] 80251a2: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 80251a6: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 80251aa: d1ef bne.n 802518c } } } return HAL_OK; 80251ac: 2300 movs r3, #0 } 80251ae: 4618 mov r0, r3 80251b0: 3730 adds r7, #48 @ 0x30 80251b2: 46bd mov sp, r7 80251b4: bd80 pop {r7, pc} 80251b6: bf00 nop 80251b8: 40023800 .word 0x40023800 80251bc: 42470070 .word 0x42470070 080251c0 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80251c0: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 80251c4: b0a6 sub sp, #152 @ 0x98 80251c6: af00 add r7, sp, #0 uint32_t pllm = 0U; 80251c8: 2300 movs r3, #0 80251ca: f8c7 308c str.w r3, [r7, #140] @ 0x8c uint32_t pllvco = 0U; 80251ce: 2300 movs r3, #0 80251d0: f8c7 3094 str.w r3, [r7, #148] @ 0x94 uint32_t pllp = 0U; 80251d4: 2300 movs r3, #0 80251d6: f8c7 3088 str.w r3, [r7, #136] @ 0x88 uint32_t pllr = 0U; 80251da: 2300 movs r3, #0 80251dc: f8c7 3084 str.w r3, [r7, #132] @ 0x84 uint32_t sysclockfreq = 0U; 80251e0: 2300 movs r3, #0 80251e2: f8c7 3090 str.w r3, [r7, #144] @ 0x90 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) 80251e6: 4bc8 ldr r3, [pc, #800] @ (8025508 ) 80251e8: 689b ldr r3, [r3, #8] 80251ea: f003 030c and.w r3, r3, #12 80251ee: 2b0c cmp r3, #12 80251f0: f200 817e bhi.w 80254f0 80251f4: a201 add r2, pc, #4 @ (adr r2, 80251fc ) 80251f6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80251fa: bf00 nop 80251fc: 08025231 .word 0x08025231 8025200: 080254f1 .word 0x080254f1 8025204: 080254f1 .word 0x080254f1 8025208: 080254f1 .word 0x080254f1 802520c: 08025239 .word 0x08025239 8025210: 080254f1 .word 0x080254f1 8025214: 080254f1 .word 0x080254f1 8025218: 080254f1 .word 0x080254f1 802521c: 08025241 .word 0x08025241 8025220: 080254f1 .word 0x080254f1 8025224: 080254f1 .word 0x080254f1 8025228: 080254f1 .word 0x080254f1 802522c: 080253ab .word 0x080253ab { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; 8025230: 4bb6 ldr r3, [pc, #728] @ (802550c ) 8025232: f8c7 3090 str.w r3, [r7, #144] @ 0x90 break; 8025236: e15f b.n 80254f8 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; 8025238: 4bb5 ldr r3, [pc, #724] @ (8025510 ) 802523a: f8c7 3090 str.w r3, [r7, #144] @ 0x90 break; 802523e: e15b b.n 80254f8 } case RCC_CFGR_SWS_PLL: /* PLL/PLLP used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 8025240: 4bb1 ldr r3, [pc, #708] @ (8025508 ) 8025242: 685b ldr r3, [r3, #4] 8025244: f003 033f and.w r3, r3, #63 @ 0x3f 8025248: f8c7 308c str.w r3, [r7, #140] @ 0x8c if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 802524c: 4bae ldr r3, [pc, #696] @ (8025508 ) 802524e: 685b ldr r3, [r3, #4] 8025250: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8025254: 2b00 cmp r3, #0 8025256: d031 beq.n 80252bc { /* HSE used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8025258: 4bab ldr r3, [pc, #684] @ (8025508 ) 802525a: 685b ldr r3, [r3, #4] 802525c: 099b lsrs r3, r3, #6 802525e: 2200 movs r2, #0 8025260: 66bb str r3, [r7, #104] @ 0x68 8025262: 66fa str r2, [r7, #108] @ 0x6c 8025264: 6ebb ldr r3, [r7, #104] @ 0x68 8025266: f3c3 0308 ubfx r3, r3, #0, #9 802526a: 663b str r3, [r7, #96] @ 0x60 802526c: 2300 movs r3, #0 802526e: 667b str r3, [r7, #100] @ 0x64 8025270: 4ba7 ldr r3, [pc, #668] @ (8025510 ) 8025272: e9d7 4518 ldrd r4, r5, [r7, #96] @ 0x60 8025276: 462a mov r2, r5 8025278: fb03 f202 mul.w r2, r3, r2 802527c: 2300 movs r3, #0 802527e: 4621 mov r1, r4 8025280: fb01 f303 mul.w r3, r1, r3 8025284: 4413 add r3, r2 8025286: 4aa2 ldr r2, [pc, #648] @ (8025510 ) 8025288: 4621 mov r1, r4 802528a: fba1 1202 umull r1, r2, r1, r2 802528e: 67fa str r2, [r7, #124] @ 0x7c 8025290: 460a mov r2, r1 8025292: 67ba str r2, [r7, #120] @ 0x78 8025294: 6ffa ldr r2, [r7, #124] @ 0x7c 8025296: 4413 add r3, r2 8025298: 67fb str r3, [r7, #124] @ 0x7c 802529a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 802529e: 2200 movs r2, #0 80252a0: 65bb str r3, [r7, #88] @ 0x58 80252a2: 65fa str r2, [r7, #92] @ 0x5c 80252a4: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58 80252a8: e9d7 011e ldrd r0, r1, [r7, #120] @ 0x78 80252ac: f7eb fbbe bl 8010a2c <__aeabi_uldivmod> 80252b0: 4602 mov r2, r0 80252b2: 460b mov r3, r1 80252b4: 4613 mov r3, r2 80252b6: f8c7 3094 str.w r3, [r7, #148] @ 0x94 80252ba: e064 b.n 8025386 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 80252bc: 4b92 ldr r3, [pc, #584] @ (8025508 ) 80252be: 685b ldr r3, [r3, #4] 80252c0: 099b lsrs r3, r3, #6 80252c2: 2200 movs r2, #0 80252c4: 653b str r3, [r7, #80] @ 0x50 80252c6: 657a str r2, [r7, #84] @ 0x54 80252c8: 6d3b ldr r3, [r7, #80] @ 0x50 80252ca: f3c3 0308 ubfx r3, r3, #0, #9 80252ce: 64bb str r3, [r7, #72] @ 0x48 80252d0: 2300 movs r3, #0 80252d2: 64fb str r3, [r7, #76] @ 0x4c 80252d4: e9d7 4512 ldrd r4, r5, [r7, #72] @ 0x48 80252d8: 4622 mov r2, r4 80252da: 462b mov r3, r5 80252dc: f04f 0000 mov.w r0, #0 80252e0: f04f 0100 mov.w r1, #0 80252e4: 0159 lsls r1, r3, #5 80252e6: ea41 61d2 orr.w r1, r1, r2, lsr #27 80252ea: 0150 lsls r0, r2, #5 80252ec: 4602 mov r2, r0 80252ee: 460b mov r3, r1 80252f0: 4621 mov r1, r4 80252f2: 1a51 subs r1, r2, r1 80252f4: 6139 str r1, [r7, #16] 80252f6: 4629 mov r1, r5 80252f8: eb63 0301 sbc.w r3, r3, r1 80252fc: 617b str r3, [r7, #20] 80252fe: f04f 0200 mov.w r2, #0 8025302: f04f 0300 mov.w r3, #0 8025306: e9d7 ab04 ldrd sl, fp, [r7, #16] 802530a: 4659 mov r1, fp 802530c: 018b lsls r3, r1, #6 802530e: 4651 mov r1, sl 8025310: ea43 6391 orr.w r3, r3, r1, lsr #26 8025314: 4651 mov r1, sl 8025316: 018a lsls r2, r1, #6 8025318: 4651 mov r1, sl 802531a: ebb2 0801 subs.w r8, r2, r1 802531e: 4659 mov r1, fp 8025320: eb63 0901 sbc.w r9, r3, r1 8025324: f04f 0200 mov.w r2, #0 8025328: f04f 0300 mov.w r3, #0 802532c: ea4f 03c9 mov.w r3, r9, lsl #3 8025330: ea43 7358 orr.w r3, r3, r8, lsr #29 8025334: ea4f 02c8 mov.w r2, r8, lsl #3 8025338: 4690 mov r8, r2 802533a: 4699 mov r9, r3 802533c: 4623 mov r3, r4 802533e: eb18 0303 adds.w r3, r8, r3 8025342: 60bb str r3, [r7, #8] 8025344: 462b mov r3, r5 8025346: eb49 0303 adc.w r3, r9, r3 802534a: 60fb str r3, [r7, #12] 802534c: f04f 0200 mov.w r2, #0 8025350: f04f 0300 mov.w r3, #0 8025354: e9d7 4502 ldrd r4, r5, [r7, #8] 8025358: 4629 mov r1, r5 802535a: 028b lsls r3, r1, #10 802535c: 4621 mov r1, r4 802535e: ea43 5391 orr.w r3, r3, r1, lsr #22 8025362: 4621 mov r1, r4 8025364: 028a lsls r2, r1, #10 8025366: 4610 mov r0, r2 8025368: 4619 mov r1, r3 802536a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 802536e: 2200 movs r2, #0 8025370: 643b str r3, [r7, #64] @ 0x40 8025372: 647a str r2, [r7, #68] @ 0x44 8025374: e9d7 2310 ldrd r2, r3, [r7, #64] @ 0x40 8025378: f7eb fb58 bl 8010a2c <__aeabi_uldivmod> 802537c: 4602 mov r2, r0 802537e: 460b mov r3, r1 8025380: 4613 mov r3, r2 8025382: f8c7 3094 str.w r3, [r7, #148] @ 0x94 } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); 8025386: 4b60 ldr r3, [pc, #384] @ (8025508 ) 8025388: 685b ldr r3, [r3, #4] 802538a: 0c1b lsrs r3, r3, #16 802538c: f003 0303 and.w r3, r3, #3 8025390: 3301 adds r3, #1 8025392: 005b lsls r3, r3, #1 8025394: f8c7 3088 str.w r3, [r7, #136] @ 0x88 sysclockfreq = pllvco/pllp; 8025398: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 802539c: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 80253a0: fbb2 f3f3 udiv r3, r2, r3 80253a4: f8c7 3090 str.w r3, [r7, #144] @ 0x90 break; 80253a8: e0a6 b.n 80254f8 } case RCC_CFGR_SWS_PLLR: /* PLL/PLLR used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 80253aa: 4b57 ldr r3, [pc, #348] @ (8025508 ) 80253ac: 685b ldr r3, [r3, #4] 80253ae: f003 033f and.w r3, r3, #63 @ 0x3f 80253b2: f8c7 308c str.w r3, [r7, #140] @ 0x8c if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 80253b6: 4b54 ldr r3, [pc, #336] @ (8025508 ) 80253b8: 685b ldr r3, [r3, #4] 80253ba: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80253be: 2b00 cmp r3, #0 80253c0: d02a beq.n 8025418 { /* HSE used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 80253c2: 4b51 ldr r3, [pc, #324] @ (8025508 ) 80253c4: 685b ldr r3, [r3, #4] 80253c6: 099b lsrs r3, r3, #6 80253c8: 2200 movs r2, #0 80253ca: 63bb str r3, [r7, #56] @ 0x38 80253cc: 63fa str r2, [r7, #60] @ 0x3c 80253ce: 6bbb ldr r3, [r7, #56] @ 0x38 80253d0: f3c3 0008 ubfx r0, r3, #0, #9 80253d4: 2100 movs r1, #0 80253d6: 4b4e ldr r3, [pc, #312] @ (8025510 ) 80253d8: fb03 f201 mul.w r2, r3, r1 80253dc: 2300 movs r3, #0 80253de: fb00 f303 mul.w r3, r0, r3 80253e2: 4413 add r3, r2 80253e4: 4a4a ldr r2, [pc, #296] @ (8025510 ) 80253e6: fba0 1202 umull r1, r2, r0, r2 80253ea: 677a str r2, [r7, #116] @ 0x74 80253ec: 460a mov r2, r1 80253ee: 673a str r2, [r7, #112] @ 0x70 80253f0: 6f7a ldr r2, [r7, #116] @ 0x74 80253f2: 4413 add r3, r2 80253f4: 677b str r3, [r7, #116] @ 0x74 80253f6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80253fa: 2200 movs r2, #0 80253fc: 633b str r3, [r7, #48] @ 0x30 80253fe: 637a str r2, [r7, #52] @ 0x34 8025400: e9d7 230c ldrd r2, r3, [r7, #48] @ 0x30 8025404: e9d7 011c ldrd r0, r1, [r7, #112] @ 0x70 8025408: f7eb fb10 bl 8010a2c <__aeabi_uldivmod> 802540c: 4602 mov r2, r0 802540e: 460b mov r3, r1 8025410: 4613 mov r3, r2 8025412: f8c7 3094 str.w r3, [r7, #148] @ 0x94 8025416: e05b b.n 80254d0 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8025418: 4b3b ldr r3, [pc, #236] @ (8025508 ) 802541a: 685b ldr r3, [r3, #4] 802541c: 099b lsrs r3, r3, #6 802541e: 2200 movs r2, #0 8025420: 62bb str r3, [r7, #40] @ 0x28 8025422: 62fa str r2, [r7, #44] @ 0x2c 8025424: 6abb ldr r3, [r7, #40] @ 0x28 8025426: f3c3 0308 ubfx r3, r3, #0, #9 802542a: 623b str r3, [r7, #32] 802542c: 2300 movs r3, #0 802542e: 627b str r3, [r7, #36] @ 0x24 8025430: e9d7 8908 ldrd r8, r9, [r7, #32] 8025434: 4642 mov r2, r8 8025436: 464b mov r3, r9 8025438: f04f 0000 mov.w r0, #0 802543c: f04f 0100 mov.w r1, #0 8025440: 0159 lsls r1, r3, #5 8025442: ea41 61d2 orr.w r1, r1, r2, lsr #27 8025446: 0150 lsls r0, r2, #5 8025448: 4602 mov r2, r0 802544a: 460b mov r3, r1 802544c: 4641 mov r1, r8 802544e: ebb2 0a01 subs.w sl, r2, r1 8025452: 4649 mov r1, r9 8025454: eb63 0b01 sbc.w fp, r3, r1 8025458: f04f 0200 mov.w r2, #0 802545c: f04f 0300 mov.w r3, #0 8025460: ea4f 138b mov.w r3, fp, lsl #6 8025464: ea43 639a orr.w r3, r3, sl, lsr #26 8025468: ea4f 128a mov.w r2, sl, lsl #6 802546c: ebb2 040a subs.w r4, r2, sl 8025470: eb63 050b sbc.w r5, r3, fp 8025474: f04f 0200 mov.w r2, #0 8025478: f04f 0300 mov.w r3, #0 802547c: 00eb lsls r3, r5, #3 802547e: ea43 7354 orr.w r3, r3, r4, lsr #29 8025482: 00e2 lsls r2, r4, #3 8025484: 4614 mov r4, r2 8025486: 461d mov r5, r3 8025488: 4643 mov r3, r8 802548a: 18e3 adds r3, r4, r3 802548c: 603b str r3, [r7, #0] 802548e: 464b mov r3, r9 8025490: eb45 0303 adc.w r3, r5, r3 8025494: 607b str r3, [r7, #4] 8025496: f04f 0200 mov.w r2, #0 802549a: f04f 0300 mov.w r3, #0 802549e: e9d7 4500 ldrd r4, r5, [r7] 80254a2: 4629 mov r1, r5 80254a4: 028b lsls r3, r1, #10 80254a6: 4621 mov r1, r4 80254a8: ea43 5391 orr.w r3, r3, r1, lsr #22 80254ac: 4621 mov r1, r4 80254ae: 028a lsls r2, r1, #10 80254b0: 4610 mov r0, r2 80254b2: 4619 mov r1, r3 80254b4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80254b8: 2200 movs r2, #0 80254ba: 61bb str r3, [r7, #24] 80254bc: 61fa str r2, [r7, #28] 80254be: e9d7 2306 ldrd r2, r3, [r7, #24] 80254c2: f7eb fab3 bl 8010a2c <__aeabi_uldivmod> 80254c6: 4602 mov r2, r0 80254c8: 460b mov r3, r1 80254ca: 4613 mov r3, r2 80254cc: f8c7 3094 str.w r3, [r7, #148] @ 0x94 } pllr = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos); 80254d0: 4b0d ldr r3, [pc, #52] @ (8025508 ) 80254d2: 685b ldr r3, [r3, #4] 80254d4: 0f1b lsrs r3, r3, #28 80254d6: f003 0307 and.w r3, r3, #7 80254da: f8c7 3084 str.w r3, [r7, #132] @ 0x84 sysclockfreq = pllvco/pllr; 80254de: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 80254e2: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 80254e6: fbb2 f3f3 udiv r3, r2, r3 80254ea: f8c7 3090 str.w r3, [r7, #144] @ 0x90 break; 80254ee: e003 b.n 80254f8 } default: { sysclockfreq = HSI_VALUE; 80254f0: 4b06 ldr r3, [pc, #24] @ (802550c ) 80254f2: f8c7 3090 str.w r3, [r7, #144] @ 0x90 break; 80254f6: bf00 nop } } return sysclockfreq; 80254f8: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 } 80254fc: 4618 mov r0, r3 80254fe: 3798 adds r7, #152 @ 0x98 8025500: 46bd mov sp, r7 8025502: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8025506: bf00 nop 8025508: 40023800 .word 0x40023800 802550c: 00f42400 .word 0x00f42400 8025510: 00b71b00 .word 0x00b71b00 08025514 : * @note This function add the PLL/PLLR factor management during PLL configuration this feature * is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8025514: b580 push {r7, lr} 8025516: b086 sub sp, #24 8025518: af00 add r7, sp, #0 802551a: 6078 str r0, [r7, #4] uint32_t tickstart, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) 802551c: 687b ldr r3, [r7, #4] 802551e: 2b00 cmp r3, #0 8025520: d101 bne.n 8025526 { return HAL_ERROR; 8025522: 2301 movs r3, #1 8025524: e28d b.n 8025a42 } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8025526: 687b ldr r3, [r7, #4] 8025528: 681b ldr r3, [r3, #0] 802552a: f003 0301 and.w r3, r3, #1 802552e: 2b00 cmp r3, #0 8025530: f000 8083 beq.w 802563a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ #if defined(STM32F446xx) if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ 8025534: 4b94 ldr r3, [pc, #592] @ (8025788 ) 8025536: 689b ldr r3, [r3, #8] 8025538: f003 030c and.w r3, r3, #12 802553c: 2b04 cmp r3, #4 802553e: d019 beq.n 8025574 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) ||\ 8025540: 4b91 ldr r3, [pc, #580] @ (8025788 ) 8025542: 689b ldr r3, [r3, #8] 8025544: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ 8025548: 2b08 cmp r3, #8 802554a: d106 bne.n 802555a ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) ||\ 802554c: 4b8e ldr r3, [pc, #568] @ (8025788 ) 802554e: 685b ldr r3, [r3, #4] 8025550: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8025554: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8025558: d00c beq.n 8025574 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 802555a: 4b8b ldr r3, [pc, #556] @ (8025788 ) 802555c: 689b ldr r3, [r3, #8] 802555e: f003 030c and.w r3, r3, #12 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) ||\ 8025562: 2b0c cmp r3, #12 8025564: d112 bne.n 802558c ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 8025566: 4b88 ldr r3, [pc, #544] @ (8025788 ) 8025568: 685b ldr r3, [r3, #4] 802556a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 802556e: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8025572: d10b bne.n 802558c #else if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) #endif /* STM32F446xx */ { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8025574: 4b84 ldr r3, [pc, #528] @ (8025788 ) 8025576: 681b ldr r3, [r3, #0] 8025578: f403 3300 and.w r3, r3, #131072 @ 0x20000 802557c: 2b00 cmp r3, #0 802557e: d05b beq.n 8025638 8025580: 687b ldr r3, [r7, #4] 8025582: 685b ldr r3, [r3, #4] 8025584: 2b00 cmp r3, #0 8025586: d157 bne.n 8025638 { return HAL_ERROR; 8025588: 2301 movs r3, #1 802558a: e25a b.n 8025a42 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 802558c: 687b ldr r3, [r7, #4] 802558e: 685b ldr r3, [r3, #4] 8025590: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8025594: d106 bne.n 80255a4 8025596: 4b7c ldr r3, [pc, #496] @ (8025788 ) 8025598: 681b ldr r3, [r3, #0] 802559a: 4a7b ldr r2, [pc, #492] @ (8025788 ) 802559c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80255a0: 6013 str r3, [r2, #0] 80255a2: e01d b.n 80255e0 80255a4: 687b ldr r3, [r7, #4] 80255a6: 685b ldr r3, [r3, #4] 80255a8: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 80255ac: d10c bne.n 80255c8 80255ae: 4b76 ldr r3, [pc, #472] @ (8025788 ) 80255b0: 681b ldr r3, [r3, #0] 80255b2: 4a75 ldr r2, [pc, #468] @ (8025788 ) 80255b4: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80255b8: 6013 str r3, [r2, #0] 80255ba: 4b73 ldr r3, [pc, #460] @ (8025788 ) 80255bc: 681b ldr r3, [r3, #0] 80255be: 4a72 ldr r2, [pc, #456] @ (8025788 ) 80255c0: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80255c4: 6013 str r3, [r2, #0] 80255c6: e00b b.n 80255e0 80255c8: 4b6f ldr r3, [pc, #444] @ (8025788 ) 80255ca: 681b ldr r3, [r3, #0] 80255cc: 4a6e ldr r2, [pc, #440] @ (8025788 ) 80255ce: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80255d2: 6013 str r3, [r2, #0] 80255d4: 4b6c ldr r3, [pc, #432] @ (8025788 ) 80255d6: 681b ldr r3, [r3, #0] 80255d8: 4a6b ldr r2, [pc, #428] @ (8025788 ) 80255da: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80255de: 6013 str r3, [r2, #0] /* Check the HSE State */ if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 80255e0: 687b ldr r3, [r7, #4] 80255e2: 685b ldr r3, [r3, #4] 80255e4: 2b00 cmp r3, #0 80255e6: d013 beq.n 8025610 { /* Get Start Tick*/ tickstart = HAL_GetTick(); 80255e8: f7fa fe1e bl 8020228 80255ec: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80255ee: e008 b.n 8025602 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80255f0: f7fa fe1a bl 8020228 80255f4: 4602 mov r2, r0 80255f6: 693b ldr r3, [r7, #16] 80255f8: 1ad3 subs r3, r2, r3 80255fa: 2b64 cmp r3, #100 @ 0x64 80255fc: d901 bls.n 8025602 { return HAL_TIMEOUT; 80255fe: 2303 movs r3, #3 8025600: e21f b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8025602: 4b61 ldr r3, [pc, #388] @ (8025788 ) 8025604: 681b ldr r3, [r3, #0] 8025606: f403 3300 and.w r3, r3, #131072 @ 0x20000 802560a: 2b00 cmp r3, #0 802560c: d0f0 beq.n 80255f0 802560e: e014 b.n 802563a } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8025610: f7fa fe0a bl 8020228 8025614: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8025616: e008 b.n 802562a { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 8025618: f7fa fe06 bl 8020228 802561c: 4602 mov r2, r0 802561e: 693b ldr r3, [r7, #16] 8025620: 1ad3 subs r3, r2, r3 8025622: 2b64 cmp r3, #100 @ 0x64 8025624: d901 bls.n 802562a { return HAL_TIMEOUT; 8025626: 2303 movs r3, #3 8025628: e20b b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 802562a: 4b57 ldr r3, [pc, #348] @ (8025788 ) 802562c: 681b ldr r3, [r3, #0] 802562e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8025632: 2b00 cmp r3, #0 8025634: d1f0 bne.n 8025618 8025636: e000 b.n 802563a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8025638: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 802563a: 687b ldr r3, [r7, #4] 802563c: 681b ldr r3, [r3, #0] 802563e: f003 0302 and.w r3, r3, #2 8025642: 2b00 cmp r3, #0 8025644: d06f beq.n 8025726 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ #if defined(STM32F446xx) if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ 8025646: 4b50 ldr r3, [pc, #320] @ (8025788 ) 8025648: 689b ldr r3, [r3, #8] 802564a: f003 030c and.w r3, r3, #12 802564e: 2b00 cmp r3, #0 8025650: d017 beq.n 8025682 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) ||\ 8025652: 4b4d ldr r3, [pc, #308] @ (8025788 ) 8025654: 689b ldr r3, [r3, #8] 8025656: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ 802565a: 2b08 cmp r3, #8 802565c: d105 bne.n 802566a ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) ||\ 802565e: 4b4a ldr r3, [pc, #296] @ (8025788 ) 8025660: 685b ldr r3, [r3, #4] 8025662: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8025666: 2b00 cmp r3, #0 8025668: d00b beq.n 8025682 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 802566a: 4b47 ldr r3, [pc, #284] @ (8025788 ) 802566c: 689b ldr r3, [r3, #8] 802566e: f003 030c and.w r3, r3, #12 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) ||\ 8025672: 2b0c cmp r3, #12 8025674: d11c bne.n 80256b0 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 8025676: 4b44 ldr r3, [pc, #272] @ (8025788 ) 8025678: 685b ldr r3, [r3, #4] 802567a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 802567e: 2b00 cmp r3, #0 8025680: d116 bne.n 80256b0 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) #endif /* STM32F446xx */ { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8025682: 4b41 ldr r3, [pc, #260] @ (8025788 ) 8025684: 681b ldr r3, [r3, #0] 8025686: f003 0302 and.w r3, r3, #2 802568a: 2b00 cmp r3, #0 802568c: d005 beq.n 802569a 802568e: 687b ldr r3, [r7, #4] 8025690: 68db ldr r3, [r3, #12] 8025692: 2b01 cmp r3, #1 8025694: d001 beq.n 802569a { return HAL_ERROR; 8025696: 2301 movs r3, #1 8025698: e1d3 b.n 8025a42 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 802569a: 4b3b ldr r3, [pc, #236] @ (8025788 ) 802569c: 681b ldr r3, [r3, #0] 802569e: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80256a2: 687b ldr r3, [r7, #4] 80256a4: 691b ldr r3, [r3, #16] 80256a6: 00db lsls r3, r3, #3 80256a8: 4937 ldr r1, [pc, #220] @ (8025788 ) 80256aa: 4313 orrs r3, r2 80256ac: 600b str r3, [r1, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80256ae: e03a b.n 8025726 } } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) 80256b0: 687b ldr r3, [r7, #4] 80256b2: 68db ldr r3, [r3, #12] 80256b4: 2b00 cmp r3, #0 80256b6: d020 beq.n 80256fa { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80256b8: 4b34 ldr r3, [pc, #208] @ (802578c ) 80256ba: 2201 movs r2, #1 80256bc: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80256be: f7fa fdb3 bl 8020228 80256c2: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80256c4: e008 b.n 80256d8 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80256c6: f7fa fdaf bl 8020228 80256ca: 4602 mov r2, r0 80256cc: 693b ldr r3, [r7, #16] 80256ce: 1ad3 subs r3, r2, r3 80256d0: 2b02 cmp r3, #2 80256d2: d901 bls.n 80256d8 { return HAL_TIMEOUT; 80256d4: 2303 movs r3, #3 80256d6: e1b4 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80256d8: 4b2b ldr r3, [pc, #172] @ (8025788 ) 80256da: 681b ldr r3, [r3, #0] 80256dc: f003 0302 and.w r3, r3, #2 80256e0: 2b00 cmp r3, #0 80256e2: d0f0 beq.n 80256c6 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80256e4: 4b28 ldr r3, [pc, #160] @ (8025788 ) 80256e6: 681b ldr r3, [r3, #0] 80256e8: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80256ec: 687b ldr r3, [r7, #4] 80256ee: 691b ldr r3, [r3, #16] 80256f0: 00db lsls r3, r3, #3 80256f2: 4925 ldr r1, [pc, #148] @ (8025788 ) 80256f4: 4313 orrs r3, r2 80256f6: 600b str r3, [r1, #0] 80256f8: e015 b.n 8025726 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80256fa: 4b24 ldr r3, [pc, #144] @ (802578c ) 80256fc: 2200 movs r2, #0 80256fe: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8025700: f7fa fd92 bl 8020228 8025704: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8025706: e008 b.n 802571a { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 8025708: f7fa fd8e bl 8020228 802570c: 4602 mov r2, r0 802570e: 693b ldr r3, [r7, #16] 8025710: 1ad3 subs r3, r2, r3 8025712: 2b02 cmp r3, #2 8025714: d901 bls.n 802571a { return HAL_TIMEOUT; 8025716: 2303 movs r3, #3 8025718: e193 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 802571a: 4b1b ldr r3, [pc, #108] @ (8025788 ) 802571c: 681b ldr r3, [r3, #0] 802571e: f003 0302 and.w r3, r3, #2 8025722: 2b00 cmp r3, #0 8025724: d1f0 bne.n 8025708 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8025726: 687b ldr r3, [r7, #4] 8025728: 681b ldr r3, [r3, #0] 802572a: f003 0308 and.w r3, r3, #8 802572e: 2b00 cmp r3, #0 8025730: d036 beq.n 80257a0 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) 8025732: 687b ldr r3, [r7, #4] 8025734: 695b ldr r3, [r3, #20] 8025736: 2b00 cmp r3, #0 8025738: d016 beq.n 8025768 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 802573a: 4b15 ldr r3, [pc, #84] @ (8025790 ) 802573c: 2201 movs r2, #1 802573e: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8025740: f7fa fd72 bl 8020228 8025744: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8025746: e008 b.n 802575a { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8025748: f7fa fd6e bl 8020228 802574c: 4602 mov r2, r0 802574e: 693b ldr r3, [r7, #16] 8025750: 1ad3 subs r3, r2, r3 8025752: 2b02 cmp r3, #2 8025754: d901 bls.n 802575a { return HAL_TIMEOUT; 8025756: 2303 movs r3, #3 8025758: e173 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 802575a: 4b0b ldr r3, [pc, #44] @ (8025788 ) 802575c: 6f5b ldr r3, [r3, #116] @ 0x74 802575e: f003 0302 and.w r3, r3, #2 8025762: 2b00 cmp r3, #0 8025764: d0f0 beq.n 8025748 8025766: e01b b.n 80257a0 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8025768: 4b09 ldr r3, [pc, #36] @ (8025790 ) 802576a: 2200 movs r2, #0 802576c: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 802576e: f7fa fd5b bl 8020228 8025772: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8025774: e00e b.n 8025794 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8025776: f7fa fd57 bl 8020228 802577a: 4602 mov r2, r0 802577c: 693b ldr r3, [r7, #16] 802577e: 1ad3 subs r3, r2, r3 8025780: 2b02 cmp r3, #2 8025782: d907 bls.n 8025794 { return HAL_TIMEOUT; 8025784: 2303 movs r3, #3 8025786: e15c b.n 8025a42 8025788: 40023800 .word 0x40023800 802578c: 42470000 .word 0x42470000 8025790: 42470e80 .word 0x42470e80 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8025794: 4b8a ldr r3, [pc, #552] @ (80259c0 ) 8025796: 6f5b ldr r3, [r3, #116] @ 0x74 8025798: f003 0302 and.w r3, r3, #2 802579c: 2b00 cmp r3, #0 802579e: d1ea bne.n 8025776 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80257a0: 687b ldr r3, [r7, #4] 80257a2: 681b ldr r3, [r3, #0] 80257a4: f003 0304 and.w r3, r3, #4 80257a8: 2b00 cmp r3, #0 80257aa: f000 8097 beq.w 80258dc { FlagStatus pwrclkchanged = RESET; 80257ae: 2300 movs r3, #0 80257b0: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 80257b2: 4b83 ldr r3, [pc, #524] @ (80259c0 ) 80257b4: 6c1b ldr r3, [r3, #64] @ 0x40 80257b6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80257ba: 2b00 cmp r3, #0 80257bc: d10f bne.n 80257de { __HAL_RCC_PWR_CLK_ENABLE(); 80257be: 2300 movs r3, #0 80257c0: 60bb str r3, [r7, #8] 80257c2: 4b7f ldr r3, [pc, #508] @ (80259c0 ) 80257c4: 6c1b ldr r3, [r3, #64] @ 0x40 80257c6: 4a7e ldr r2, [pc, #504] @ (80259c0 ) 80257c8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80257cc: 6413 str r3, [r2, #64] @ 0x40 80257ce: 4b7c ldr r3, [pc, #496] @ (80259c0 ) 80257d0: 6c1b ldr r3, [r3, #64] @ 0x40 80257d2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80257d6: 60bb str r3, [r7, #8] 80257d8: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80257da: 2301 movs r3, #1 80257dc: 75fb strb r3, [r7, #23] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80257de: 4b79 ldr r3, [pc, #484] @ (80259c4 ) 80257e0: 681b ldr r3, [r3, #0] 80257e2: f403 7380 and.w r3, r3, #256 @ 0x100 80257e6: 2b00 cmp r3, #0 80257e8: d118 bne.n 802581c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80257ea: 4b76 ldr r3, [pc, #472] @ (80259c4 ) 80257ec: 681b ldr r3, [r3, #0] 80257ee: 4a75 ldr r2, [pc, #468] @ (80259c4 ) 80257f0: f443 7380 orr.w r3, r3, #256 @ 0x100 80257f4: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80257f6: f7fa fd17 bl 8020228 80257fa: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80257fc: e008 b.n 8025810 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80257fe: f7fa fd13 bl 8020228 8025802: 4602 mov r2, r0 8025804: 693b ldr r3, [r7, #16] 8025806: 1ad3 subs r3, r2, r3 8025808: 2b02 cmp r3, #2 802580a: d901 bls.n 8025810 { return HAL_TIMEOUT; 802580c: 2303 movs r3, #3 802580e: e118 b.n 8025a42 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8025810: 4b6c ldr r3, [pc, #432] @ (80259c4 ) 8025812: 681b ldr r3, [r3, #0] 8025814: f403 7380 and.w r3, r3, #256 @ 0x100 8025818: 2b00 cmp r3, #0 802581a: d0f0 beq.n 80257fe } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 802581c: 687b ldr r3, [r7, #4] 802581e: 689b ldr r3, [r3, #8] 8025820: 2b01 cmp r3, #1 8025822: d106 bne.n 8025832 8025824: 4b66 ldr r3, [pc, #408] @ (80259c0 ) 8025826: 6f1b ldr r3, [r3, #112] @ 0x70 8025828: 4a65 ldr r2, [pc, #404] @ (80259c0 ) 802582a: f043 0301 orr.w r3, r3, #1 802582e: 6713 str r3, [r2, #112] @ 0x70 8025830: e01c b.n 802586c 8025832: 687b ldr r3, [r7, #4] 8025834: 689b ldr r3, [r3, #8] 8025836: 2b05 cmp r3, #5 8025838: d10c bne.n 8025854 802583a: 4b61 ldr r3, [pc, #388] @ (80259c0 ) 802583c: 6f1b ldr r3, [r3, #112] @ 0x70 802583e: 4a60 ldr r2, [pc, #384] @ (80259c0 ) 8025840: f043 0304 orr.w r3, r3, #4 8025844: 6713 str r3, [r2, #112] @ 0x70 8025846: 4b5e ldr r3, [pc, #376] @ (80259c0 ) 8025848: 6f1b ldr r3, [r3, #112] @ 0x70 802584a: 4a5d ldr r2, [pc, #372] @ (80259c0 ) 802584c: f043 0301 orr.w r3, r3, #1 8025850: 6713 str r3, [r2, #112] @ 0x70 8025852: e00b b.n 802586c 8025854: 4b5a ldr r3, [pc, #360] @ (80259c0 ) 8025856: 6f1b ldr r3, [r3, #112] @ 0x70 8025858: 4a59 ldr r2, [pc, #356] @ (80259c0 ) 802585a: f023 0301 bic.w r3, r3, #1 802585e: 6713 str r3, [r2, #112] @ 0x70 8025860: 4b57 ldr r3, [pc, #348] @ (80259c0 ) 8025862: 6f1b ldr r3, [r3, #112] @ 0x70 8025864: 4a56 ldr r2, [pc, #344] @ (80259c0 ) 8025866: f023 0304 bic.w r3, r3, #4 802586a: 6713 str r3, [r2, #112] @ 0x70 /* Check the LSE State */ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 802586c: 687b ldr r3, [r7, #4] 802586e: 689b ldr r3, [r3, #8] 8025870: 2b00 cmp r3, #0 8025872: d015 beq.n 80258a0 { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8025874: f7fa fcd8 bl 8020228 8025878: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 802587a: e00a b.n 8025892 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 802587c: f7fa fcd4 bl 8020228 8025880: 4602 mov r2, r0 8025882: 693b ldr r3, [r7, #16] 8025884: 1ad3 subs r3, r2, r3 8025886: f241 3288 movw r2, #5000 @ 0x1388 802588a: 4293 cmp r3, r2 802588c: d901 bls.n 8025892 { return HAL_TIMEOUT; 802588e: 2303 movs r3, #3 8025890: e0d7 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8025892: 4b4b ldr r3, [pc, #300] @ (80259c0 ) 8025894: 6f1b ldr r3, [r3, #112] @ 0x70 8025896: f003 0302 and.w r3, r3, #2 802589a: 2b00 cmp r3, #0 802589c: d0ee beq.n 802587c 802589e: e014 b.n 80258ca } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 80258a0: f7fa fcc2 bl 8020228 80258a4: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80258a6: e00a b.n 80258be { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 80258a8: f7fa fcbe bl 8020228 80258ac: 4602 mov r2, r0 80258ae: 693b ldr r3, [r7, #16] 80258b0: 1ad3 subs r3, r2, r3 80258b2: f241 3288 movw r2, #5000 @ 0x1388 80258b6: 4293 cmp r3, r2 80258b8: d901 bls.n 80258be { return HAL_TIMEOUT; 80258ba: 2303 movs r3, #3 80258bc: e0c1 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80258be: 4b40 ldr r3, [pc, #256] @ (80259c0 ) 80258c0: 6f1b ldr r3, [r3, #112] @ 0x70 80258c2: f003 0302 and.w r3, r3, #2 80258c6: 2b00 cmp r3, #0 80258c8: d1ee bne.n 80258a8 } } } /* Restore clock configuration if changed */ if(pwrclkchanged == SET) 80258ca: 7dfb ldrb r3, [r7, #23] 80258cc: 2b01 cmp r3, #1 80258ce: d105 bne.n 80258dc { __HAL_RCC_PWR_CLK_DISABLE(); 80258d0: 4b3b ldr r3, [pc, #236] @ (80259c0 ) 80258d2: 6c1b ldr r3, [r3, #64] @ 0x40 80258d4: 4a3a ldr r2, [pc, #232] @ (80259c0 ) 80258d6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80258da: 6413 str r3, [r2, #64] @ 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80258dc: 687b ldr r3, [r7, #4] 80258de: 699b ldr r3, [r3, #24] 80258e0: 2b00 cmp r3, #0 80258e2: f000 80ad beq.w 8025a40 { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 80258e6: 4b36 ldr r3, [pc, #216] @ (80259c0 ) 80258e8: 689b ldr r3, [r3, #8] 80258ea: f003 030c and.w r3, r3, #12 80258ee: 2b08 cmp r3, #8 80258f0: d060 beq.n 80259b4 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80258f2: 687b ldr r3, [r7, #4] 80258f4: 699b ldr r3, [r3, #24] 80258f6: 2b02 cmp r3, #2 80258f8: d145 bne.n 8025986 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80258fa: 4b33 ldr r3, [pc, #204] @ (80259c8 ) 80258fc: 2200 movs r2, #0 80258fe: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8025900: f7fa fc92 bl 8020228 8025904: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8025906: e008 b.n 802591a { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8025908: f7fa fc8e bl 8020228 802590c: 4602 mov r2, r0 802590e: 693b ldr r3, [r7, #16] 8025910: 1ad3 subs r3, r2, r3 8025912: 2b02 cmp r3, #2 8025914: d901 bls.n 802591a { return HAL_TIMEOUT; 8025916: 2303 movs r3, #3 8025918: e093 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 802591a: 4b29 ldr r3, [pc, #164] @ (80259c0 ) 802591c: 681b ldr r3, [r3, #0] 802591e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8025922: 2b00 cmp r3, #0 8025924: d1f0 bne.n 8025908 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ 8025926: 687b ldr r3, [r7, #4] 8025928: 69da ldr r2, [r3, #28] 802592a: 687b ldr r3, [r7, #4] 802592c: 6a1b ldr r3, [r3, #32] 802592e: 431a orrs r2, r3 8025930: 687b ldr r3, [r7, #4] 8025932: 6a5b ldr r3, [r3, #36] @ 0x24 8025934: 019b lsls r3, r3, #6 8025936: 431a orrs r2, r3 8025938: 687b ldr r3, [r7, #4] 802593a: 6a9b ldr r3, [r3, #40] @ 0x28 802593c: 085b lsrs r3, r3, #1 802593e: 3b01 subs r3, #1 8025940: 041b lsls r3, r3, #16 8025942: 431a orrs r2, r3 8025944: 687b ldr r3, [r7, #4] 8025946: 6adb ldr r3, [r3, #44] @ 0x2c 8025948: 061b lsls r3, r3, #24 802594a: 431a orrs r2, r3 802594c: 687b ldr r3, [r7, #4] 802594e: 6b1b ldr r3, [r3, #48] @ 0x30 8025950: 071b lsls r3, r3, #28 8025952: 491b ldr r1, [pc, #108] @ (80259c0 ) 8025954: 4313 orrs r3, r2 8025956: 604b str r3, [r1, #4] (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos) | \ (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8025958: 4b1b ldr r3, [pc, #108] @ (80259c8 ) 802595a: 2201 movs r2, #1 802595c: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 802595e: f7fa fc63 bl 8020228 8025962: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8025964: e008 b.n 8025978 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8025966: f7fa fc5f bl 8020228 802596a: 4602 mov r2, r0 802596c: 693b ldr r3, [r7, #16] 802596e: 1ad3 subs r3, r2, r3 8025970: 2b02 cmp r3, #2 8025972: d901 bls.n 8025978 { return HAL_TIMEOUT; 8025974: 2303 movs r3, #3 8025976: e064 b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8025978: 4b11 ldr r3, [pc, #68] @ (80259c0 ) 802597a: 681b ldr r3, [r3, #0] 802597c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8025980: 2b00 cmp r3, #0 8025982: d0f0 beq.n 8025966 8025984: e05c b.n 8025a40 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8025986: 4b10 ldr r3, [pc, #64] @ (80259c8 ) 8025988: 2200 movs r2, #0 802598a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 802598c: f7fa fc4c bl 8020228 8025990: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8025992: e008 b.n 80259a6 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) 8025994: f7fa fc48 bl 8020228 8025998: 4602 mov r2, r0 802599a: 693b ldr r3, [r7, #16] 802599c: 1ad3 subs r3, r2, r3 802599e: 2b02 cmp r3, #2 80259a0: d901 bls.n 80259a6 { return HAL_TIMEOUT; 80259a2: 2303 movs r3, #3 80259a4: e04d b.n 8025a42 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80259a6: 4b06 ldr r3, [pc, #24] @ (80259c0 ) 80259a8: 681b ldr r3, [r3, #0] 80259aa: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80259ae: 2b00 cmp r3, #0 80259b0: d1f0 bne.n 8025994 80259b2: e045 b.n 8025a40 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80259b4: 687b ldr r3, [r7, #4] 80259b6: 699b ldr r3, [r3, #24] 80259b8: 2b01 cmp r3, #1 80259ba: d107 bne.n 80259cc { return HAL_ERROR; 80259bc: 2301 movs r3, #1 80259be: e040 b.n 8025a42 80259c0: 40023800 .word 0x40023800 80259c4: 40007000 .word 0x40007000 80259c8: 42470060 .word 0x42470060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; 80259cc: 4b1f ldr r3, [pc, #124] @ (8025a4c ) 80259ce: 685b ldr r3, [r3, #4] 80259d0: 60fb str r3, [r7, #12] #if defined (RCC_PLLCFGR_PLLR) if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 80259d2: 687b ldr r3, [r7, #4] 80259d4: 699b ldr r3, [r3, #24] 80259d6: 2b01 cmp r3, #1 80259d8: d030 beq.n 8025a3c (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80259da: 68fb ldr r3, [r7, #12] 80259dc: f403 0280 and.w r2, r3, #4194304 @ 0x400000 80259e0: 687b ldr r3, [r7, #4] 80259e2: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 80259e4: 429a cmp r2, r3 80259e6: d129 bne.n 8025a3c (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || 80259e8: 68fb ldr r3, [r7, #12] 80259ea: f003 023f and.w r2, r3, #63 @ 0x3f 80259ee: 687b ldr r3, [r7, #4] 80259f0: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80259f2: 429a cmp r2, r3 80259f4: d122 bne.n 8025a3c (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || 80259f6: 68fa ldr r2, [r7, #12] 80259f8: f647 73c0 movw r3, #32704 @ 0x7fc0 80259fc: 4013 ands r3, r2 80259fe: 687a ldr r2, [r7, #4] 8025a00: 6a52 ldr r2, [r2, #36] @ 0x24 8025a02: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || 8025a04: 4293 cmp r3, r2 8025a06: d119 bne.n 8025a3c (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || 8025a08: 68fb ldr r3, [r7, #12] 8025a0a: f403 3240 and.w r2, r3, #196608 @ 0x30000 8025a0e: 687b ldr r3, [r7, #4] 8025a10: 6a9b ldr r3, [r3, #40] @ 0x28 8025a12: 085b lsrs r3, r3, #1 8025a14: 3b01 subs r3, #1 8025a16: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || 8025a18: 429a cmp r2, r3 8025a1a: d10f bne.n 8025a3c (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || 8025a1c: 68fb ldr r3, [r7, #12] 8025a1e: f003 6270 and.w r2, r3, #251658240 @ 0xf000000 8025a22: 687b ldr r3, [r7, #4] 8025a24: 6adb ldr r3, [r3, #44] @ 0x2c 8025a26: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || 8025a28: 429a cmp r2, r3 8025a2a: d107 bne.n 8025a3c (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) 8025a2c: 68fb ldr r3, [r7, #12] 8025a2e: f003 42e0 and.w r2, r3, #1879048192 @ 0x70000000 8025a32: 687b ldr r3, [r7, #4] 8025a34: 6b1b ldr r3, [r3, #48] @ 0x30 8025a36: 071b lsls r3, r3, #28 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || 8025a38: 429a cmp r2, r3 8025a3a: d001 beq.n 8025a40 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) #endif { return HAL_ERROR; 8025a3c: 2301 movs r3, #1 8025a3e: e000 b.n 8025a42 } } } } return HAL_OK; 8025a40: 2300 movs r3, #0 } 8025a42: 4618 mov r0, r3 8025a44: 3718 adds r7, #24 8025a46: 46bd mov sp, r7 8025a48: bd80 pop {r7, pc} 8025a4a: bf00 nop 8025a4c: 40023800 .word 0x40023800 08025a50 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { 8025a50: b580 push {r7, lr} 8025a52: b082 sub sp, #8 8025a54: af00 add r7, sp, #0 8025a56: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) 8025a58: 687b ldr r3, [r7, #4] 8025a5a: 2b00 cmp r3, #0 8025a5c: d101 bne.n 8025a62 { return HAL_ERROR; 8025a5e: 2301 movs r3, #1 8025a60: e07b b.n 8025b5a assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); assert_param(IS_SPI_NSS(hspi->Init.NSS)); assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) 8025a62: 687b ldr r3, [r7, #4] 8025a64: 6a5b ldr r3, [r3, #36] @ 0x24 8025a66: 2b00 cmp r3, #0 8025a68: d108 bne.n 8025a7c { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) 8025a6a: 687b ldr r3, [r7, #4] 8025a6c: 685b ldr r3, [r3, #4] 8025a6e: f5b3 7f82 cmp.w r3, #260 @ 0x104 8025a72: d009 beq.n 8025a88 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 8025a74: 687b ldr r3, [r7, #4] 8025a76: 2200 movs r2, #0 8025a78: 61da str r2, [r3, #28] 8025a7a: e005 b.n 8025a88 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; 8025a7c: 687b ldr r3, [r7, #4] 8025a7e: 2200 movs r2, #0 8025a80: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; 8025a82: 687b ldr r3, [r7, #4] 8025a84: 2200 movs r2, #0 8025a86: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8025a88: 687b ldr r3, [r7, #4] 8025a8a: 2200 movs r2, #0 8025a8c: 629a str r2, [r3, #40] @ 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) 8025a8e: 687b ldr r3, [r7, #4] 8025a90: f893 3051 ldrb.w r3, [r3, #81] @ 0x51 8025a94: b2db uxtb r3, r3 8025a96: 2b00 cmp r3, #0 8025a98: d106 bne.n 8025aa8 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; 8025a9a: 687b ldr r3, [r7, #4] 8025a9c: 2200 movs r2, #0 8025a9e: f883 2050 strb.w r2, [r3, #80] @ 0x50 /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); 8025aa2: 6878 ldr r0, [r7, #4] 8025aa4: f7f8 face bl 801e044 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; 8025aa8: 687b ldr r3, [r7, #4] 8025aaa: 2202 movs r2, #2 8025aac: f883 2051 strb.w r2, [r3, #81] @ 0x51 /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); 8025ab0: 687b ldr r3, [r7, #4] 8025ab2: 681b ldr r3, [r3, #0] 8025ab4: 681a ldr r2, [r3, #0] 8025ab6: 687b ldr r3, [r7, #4] 8025ab8: 681b ldr r3, [r3, #0] 8025aba: f022 0240 bic.w r2, r2, #64 @ 0x40 8025abe: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | 8025ac0: 687b ldr r3, [r7, #4] 8025ac2: 685b ldr r3, [r3, #4] 8025ac4: f403 7282 and.w r2, r3, #260 @ 0x104 8025ac8: 687b ldr r3, [r7, #4] 8025aca: 689b ldr r3, [r3, #8] 8025acc: f403 4304 and.w r3, r3, #33792 @ 0x8400 8025ad0: 431a orrs r2, r3 8025ad2: 687b ldr r3, [r7, #4] 8025ad4: 68db ldr r3, [r3, #12] 8025ad6: f403 6300 and.w r3, r3, #2048 @ 0x800 8025ada: 431a orrs r2, r3 8025adc: 687b ldr r3, [r7, #4] 8025ade: 691b ldr r3, [r3, #16] 8025ae0: f003 0302 and.w r3, r3, #2 8025ae4: 431a orrs r2, r3 8025ae6: 687b ldr r3, [r7, #4] 8025ae8: 695b ldr r3, [r3, #20] 8025aea: f003 0301 and.w r3, r3, #1 8025aee: 431a orrs r2, r3 8025af0: 687b ldr r3, [r7, #4] 8025af2: 699b ldr r3, [r3, #24] 8025af4: f403 7300 and.w r3, r3, #512 @ 0x200 8025af8: 431a orrs r2, r3 8025afa: 687b ldr r3, [r7, #4] 8025afc: 69db ldr r3, [r3, #28] 8025afe: f003 0338 and.w r3, r3, #56 @ 0x38 8025b02: 431a orrs r2, r3 8025b04: 687b ldr r3, [r7, #4] 8025b06: 6a1b ldr r3, [r3, #32] 8025b08: f003 0380 and.w r3, r3, #128 @ 0x80 8025b0c: ea42 0103 orr.w r1, r2, r3 8025b10: 687b ldr r3, [r7, #4] 8025b12: 6a9b ldr r3, [r3, #40] @ 0x28 8025b14: f403 5200 and.w r2, r3, #8192 @ 0x2000 8025b18: 687b ldr r3, [r7, #4] 8025b1a: 681b ldr r3, [r3, #0] 8025b1c: 430a orrs r2, r1 8025b1e: 601a str r2, [r3, #0] (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); /* Configure : NSS management, TI Mode */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF))); 8025b20: 687b ldr r3, [r7, #4] 8025b22: 699b ldr r3, [r3, #24] 8025b24: 0c1b lsrs r3, r3, #16 8025b26: f003 0104 and.w r1, r3, #4 8025b2a: 687b ldr r3, [r7, #4] 8025b2c: 6a5b ldr r3, [r3, #36] @ 0x24 8025b2e: f003 0210 and.w r2, r3, #16 8025b32: 687b ldr r3, [r7, #4] 8025b34: 681b ldr r3, [r3, #0] 8025b36: 430a orrs r2, r1 8025b38: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); 8025b3a: 687b ldr r3, [r7, #4] 8025b3c: 681b ldr r3, [r3, #0] 8025b3e: 69da ldr r2, [r3, #28] 8025b40: 687b ldr r3, [r7, #4] 8025b42: 681b ldr r3, [r3, #0] 8025b44: f422 6200 bic.w r2, r2, #2048 @ 0x800 8025b48: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8025b4a: 687b ldr r3, [r7, #4] 8025b4c: 2200 movs r2, #0 8025b4e: 655a str r2, [r3, #84] @ 0x54 hspi->State = HAL_SPI_STATE_READY; 8025b50: 687b ldr r3, [r7, #4] 8025b52: 2201 movs r2, #1 8025b54: f883 2051 strb.w r2, [r3, #81] @ 0x51 return HAL_OK; 8025b58: 2300 movs r3, #0 } 8025b5a: 4618 mov r0, r3 8025b5c: 3708 adds r7, #8 8025b5e: 46bd mov sp, r7 8025b60: bd80 pop {r7, pc} ... 08025b64 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for the specified SPI module. * @retval None */ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi) { 8025b64: b580 push {r7, lr} 8025b66: b088 sub sp, #32 8025b68: af00 add r7, sp, #0 8025b6a: 6078 str r0, [r7, #4] uint32_t itsource = hspi->Instance->CR2; 8025b6c: 687b ldr r3, [r7, #4] 8025b6e: 681b ldr r3, [r3, #0] 8025b70: 685b ldr r3, [r3, #4] 8025b72: 61fb str r3, [r7, #28] uint32_t itflag = hspi->Instance->SR; 8025b74: 687b ldr r3, [r7, #4] 8025b76: 681b ldr r3, [r3, #0] 8025b78: 689b ldr r3, [r3, #8] 8025b7a: 61bb str r3, [r7, #24] /* SPI in mode Receiver ----------------------------------------------------*/ if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && 8025b7c: 69bb ldr r3, [r7, #24] 8025b7e: f003 0340 and.w r3, r3, #64 @ 0x40 8025b82: 2b00 cmp r3, #0 8025b84: d10e bne.n 8025ba4 (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET)) 8025b86: 69bb ldr r3, [r7, #24] 8025b88: f003 0301 and.w r3, r3, #1 if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && 8025b8c: 2b00 cmp r3, #0 8025b8e: d009 beq.n 8025ba4 (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET)) 8025b90: 69fb ldr r3, [r7, #28] 8025b92: f003 0340 and.w r3, r3, #64 @ 0x40 8025b96: 2b00 cmp r3, #0 8025b98: d004 beq.n 8025ba4 { hspi->RxISR(hspi); 8025b9a: 687b ldr r3, [r7, #4] 8025b9c: 6c1b ldr r3, [r3, #64] @ 0x40 8025b9e: 6878 ldr r0, [r7, #4] 8025ba0: 4798 blx r3 return; 8025ba2: e0ce b.n 8025d42 } /* SPI in mode Transmitter -------------------------------------------------*/ if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET)) 8025ba4: 69bb ldr r3, [r7, #24] 8025ba6: f003 0302 and.w r3, r3, #2 8025baa: 2b00 cmp r3, #0 8025bac: d009 beq.n 8025bc2 8025bae: 69fb ldr r3, [r7, #28] 8025bb0: f003 0380 and.w r3, r3, #128 @ 0x80 8025bb4: 2b00 cmp r3, #0 8025bb6: d004 beq.n 8025bc2 { hspi->TxISR(hspi); 8025bb8: 687b ldr r3, [r7, #4] 8025bba: 6c5b ldr r3, [r3, #68] @ 0x44 8025bbc: 6878 ldr r0, [r7, #4] 8025bbe: 4798 blx r3 return; 8025bc0: e0bf b.n 8025d42 } /* SPI in Error Treatment --------------------------------------------------*/ if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) 8025bc2: 69bb ldr r3, [r7, #24] 8025bc4: f003 0320 and.w r3, r3, #32 8025bc8: 2b00 cmp r3, #0 8025bca: d10a bne.n 8025be2 8025bcc: 69bb ldr r3, [r7, #24] 8025bce: f003 0340 and.w r3, r3, #64 @ 0x40 8025bd2: 2b00 cmp r3, #0 8025bd4: d105 bne.n 8025be2 || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET)) 8025bd6: 69bb ldr r3, [r7, #24] 8025bd8: f403 7380 and.w r3, r3, #256 @ 0x100 8025bdc: 2b00 cmp r3, #0 8025bde: f000 80b0 beq.w 8025d42 8025be2: 69fb ldr r3, [r7, #28] 8025be4: f003 0320 and.w r3, r3, #32 8025be8: 2b00 cmp r3, #0 8025bea: f000 80aa beq.w 8025d42 { /* SPI Overrun error interrupt occurred ----------------------------------*/ if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) 8025bee: 69bb ldr r3, [r7, #24] 8025bf0: f003 0340 and.w r3, r3, #64 @ 0x40 8025bf4: 2b00 cmp r3, #0 8025bf6: d023 beq.n 8025c40 { if (hspi->State != HAL_SPI_STATE_BUSY_TX) 8025bf8: 687b ldr r3, [r7, #4] 8025bfa: f893 3051 ldrb.w r3, [r3, #81] @ 0x51 8025bfe: b2db uxtb r3, r3 8025c00: 2b03 cmp r3, #3 8025c02: d011 beq.n 8025c28 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR); 8025c04: 687b ldr r3, [r7, #4] 8025c06: 6d5b ldr r3, [r3, #84] @ 0x54 8025c08: f043 0204 orr.w r2, r3, #4 8025c0c: 687b ldr r3, [r7, #4] 8025c0e: 655a str r2, [r3, #84] @ 0x54 __HAL_SPI_CLEAR_OVRFLAG(hspi); 8025c10: 2300 movs r3, #0 8025c12: 617b str r3, [r7, #20] 8025c14: 687b ldr r3, [r7, #4] 8025c16: 681b ldr r3, [r3, #0] 8025c18: 68db ldr r3, [r3, #12] 8025c1a: 617b str r3, [r7, #20] 8025c1c: 687b ldr r3, [r7, #4] 8025c1e: 681b ldr r3, [r3, #0] 8025c20: 689b ldr r3, [r3, #8] 8025c22: 617b str r3, [r7, #20] 8025c24: 697b ldr r3, [r7, #20] 8025c26: e00b b.n 8025c40 } else { __HAL_SPI_CLEAR_OVRFLAG(hspi); 8025c28: 2300 movs r3, #0 8025c2a: 613b str r3, [r7, #16] 8025c2c: 687b ldr r3, [r7, #4] 8025c2e: 681b ldr r3, [r3, #0] 8025c30: 68db ldr r3, [r3, #12] 8025c32: 613b str r3, [r7, #16] 8025c34: 687b ldr r3, [r7, #4] 8025c36: 681b ldr r3, [r3, #0] 8025c38: 689b ldr r3, [r3, #8] 8025c3a: 613b str r3, [r7, #16] 8025c3c: 693b ldr r3, [r7, #16] return; 8025c3e: e080 b.n 8025d42 } } /* SPI Mode Fault error interrupt occurred -------------------------------*/ if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) 8025c40: 69bb ldr r3, [r7, #24] 8025c42: f003 0320 and.w r3, r3, #32 8025c46: 2b00 cmp r3, #0 8025c48: d014 beq.n 8025c74 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF); 8025c4a: 687b ldr r3, [r7, #4] 8025c4c: 6d5b ldr r3, [r3, #84] @ 0x54 8025c4e: f043 0201 orr.w r2, r3, #1 8025c52: 687b ldr r3, [r7, #4] 8025c54: 655a str r2, [r3, #84] @ 0x54 __HAL_SPI_CLEAR_MODFFLAG(hspi); 8025c56: 2300 movs r3, #0 8025c58: 60fb str r3, [r7, #12] 8025c5a: 687b ldr r3, [r7, #4] 8025c5c: 681b ldr r3, [r3, #0] 8025c5e: 689b ldr r3, [r3, #8] 8025c60: 60fb str r3, [r7, #12] 8025c62: 687b ldr r3, [r7, #4] 8025c64: 681b ldr r3, [r3, #0] 8025c66: 681a ldr r2, [r3, #0] 8025c68: 687b ldr r3, [r7, #4] 8025c6a: 681b ldr r3, [r3, #0] 8025c6c: f022 0240 bic.w r2, r2, #64 @ 0x40 8025c70: 601a str r2, [r3, #0] 8025c72: 68fb ldr r3, [r7, #12] } /* SPI Frame error interrupt occurred ------------------------------------*/ if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET) 8025c74: 69bb ldr r3, [r7, #24] 8025c76: f403 7380 and.w r3, r3, #256 @ 0x100 8025c7a: 2b00 cmp r3, #0 8025c7c: d00c beq.n 8025c98 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE); 8025c7e: 687b ldr r3, [r7, #4] 8025c80: 6d5b ldr r3, [r3, #84] @ 0x54 8025c82: f043 0208 orr.w r2, r3, #8 8025c86: 687b ldr r3, [r7, #4] 8025c88: 655a str r2, [r3, #84] @ 0x54 __HAL_SPI_CLEAR_FREFLAG(hspi); 8025c8a: 2300 movs r3, #0 8025c8c: 60bb str r3, [r7, #8] 8025c8e: 687b ldr r3, [r7, #4] 8025c90: 681b ldr r3, [r3, #0] 8025c92: 689b ldr r3, [r3, #8] 8025c94: 60bb str r3, [r7, #8] 8025c96: 68bb ldr r3, [r7, #8] } if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8025c98: 687b ldr r3, [r7, #4] 8025c9a: 6d5b ldr r3, [r3, #84] @ 0x54 8025c9c: 2b00 cmp r3, #0 8025c9e: d04f beq.n 8025d40 { /* Disable all interrupts */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR); 8025ca0: 687b ldr r3, [r7, #4] 8025ca2: 681b ldr r3, [r3, #0] 8025ca4: 685a ldr r2, [r3, #4] 8025ca6: 687b ldr r3, [r7, #4] 8025ca8: 681b ldr r3, [r3, #0] 8025caa: f022 02e0 bic.w r2, r2, #224 @ 0xe0 8025cae: 605a str r2, [r3, #4] hspi->State = HAL_SPI_STATE_READY; 8025cb0: 687b ldr r3, [r7, #4] 8025cb2: 2201 movs r2, #1 8025cb4: f883 2051 strb.w r2, [r3, #81] @ 0x51 /* Disable the SPI DMA requests if enabled */ if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN))) 8025cb8: 69fb ldr r3, [r7, #28] 8025cba: f003 0302 and.w r3, r3, #2 8025cbe: 2b00 cmp r3, #0 8025cc0: d104 bne.n 8025ccc 8025cc2: 69fb ldr r3, [r7, #28] 8025cc4: f003 0301 and.w r3, r3, #1 8025cc8: 2b00 cmp r3, #0 8025cca: d034 beq.n 8025d36 { CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN)); 8025ccc: 687b ldr r3, [r7, #4] 8025cce: 681b ldr r3, [r3, #0] 8025cd0: 685a ldr r2, [r3, #4] 8025cd2: 687b ldr r3, [r7, #4] 8025cd4: 681b ldr r3, [r3, #0] 8025cd6: f022 0203 bic.w r2, r2, #3 8025cda: 605a str r2, [r3, #4] /* Abort the SPI DMA Rx channel */ if (hspi->hdmarx != NULL) 8025cdc: 687b ldr r3, [r7, #4] 8025cde: 6cdb ldr r3, [r3, #76] @ 0x4c 8025ce0: 2b00 cmp r3, #0 8025ce2: d011 beq.n 8025d08 { /* Set the SPI DMA Abort callback : will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError; 8025ce4: 687b ldr r3, [r7, #4] 8025ce6: 6cdb ldr r3, [r3, #76] @ 0x4c 8025ce8: 4a17 ldr r2, [pc, #92] @ (8025d48 ) 8025cea: 651a str r2, [r3, #80] @ 0x50 if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) 8025cec: 687b ldr r3, [r7, #4] 8025cee: 6cdb ldr r3, [r3, #76] @ 0x4c 8025cf0: 4618 mov r0, r3 8025cf2: f7fb ff4f bl 8021b94 8025cf6: 4603 mov r3, r0 8025cf8: 2b00 cmp r3, #0 8025cfa: d005 beq.n 8025d08 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); 8025cfc: 687b ldr r3, [r7, #4] 8025cfe: 6d5b ldr r3, [r3, #84] @ 0x54 8025d00: f043 0240 orr.w r2, r3, #64 @ 0x40 8025d04: 687b ldr r3, [r7, #4] 8025d06: 655a str r2, [r3, #84] @ 0x54 } } /* Abort the SPI DMA Tx channel */ if (hspi->hdmatx != NULL) 8025d08: 687b ldr r3, [r7, #4] 8025d0a: 6c9b ldr r3, [r3, #72] @ 0x48 8025d0c: 2b00 cmp r3, #0 8025d0e: d016 beq.n 8025d3e { /* Set the SPI DMA Abort callback : will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError; 8025d10: 687b ldr r3, [r7, #4] 8025d12: 6c9b ldr r3, [r3, #72] @ 0x48 8025d14: 4a0c ldr r2, [pc, #48] @ (8025d48 ) 8025d16: 651a str r2, [r3, #80] @ 0x50 if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) 8025d18: 687b ldr r3, [r7, #4] 8025d1a: 6c9b ldr r3, [r3, #72] @ 0x48 8025d1c: 4618 mov r0, r3 8025d1e: f7fb ff39 bl 8021b94 8025d22: 4603 mov r3, r0 8025d24: 2b00 cmp r3, #0 8025d26: d00a beq.n 8025d3e { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); 8025d28: 687b ldr r3, [r7, #4] 8025d2a: 6d5b ldr r3, [r3, #84] @ 0x54 8025d2c: f043 0240 orr.w r2, r3, #64 @ 0x40 8025d30: 687b ldr r3, [r7, #4] 8025d32: 655a str r2, [r3, #84] @ 0x54 if (hspi->hdmatx != NULL) 8025d34: e003 b.n 8025d3e { /* Call user error callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->ErrorCallback(hspi); #else HAL_SPI_ErrorCallback(hspi); 8025d36: 6878 ldr r0, [r7, #4] 8025d38: f000 f808 bl 8025d4c #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } } return; 8025d3c: e000 b.n 8025d40 if (hspi->hdmatx != NULL) 8025d3e: bf00 nop return; 8025d40: bf00 nop } } 8025d42: 3720 adds r7, #32 8025d44: 46bd mov sp, r7 8025d46: bd80 pop {r7, pc} 8025d48: 08025d61 .word 0x08025d61 08025d4c : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) { 8025d4c: b480 push {r7} 8025d4e: b083 sub sp, #12 8025d50: af00 add r7, sp, #0 8025d52: 6078 str r0, [r7, #4] the HAL_SPI_ErrorCallback should be implemented in the user file */ /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes and user can use HAL_SPI_GetError() API to check the latest error occurred */ } 8025d54: bf00 nop 8025d56: 370c adds r7, #12 8025d58: 46bd mov sp, r7 8025d5a: f85d 7b04 ldr.w r7, [sp], #4 8025d5e: 4770 bx lr 08025d60 : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8025d60: b580 push {r7, lr} 8025d62: b084 sub sp, #16 8025d64: af00 add r7, sp, #0 8025d66: 6078 str r0, [r7, #4] SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ 8025d68: 687b ldr r3, [r7, #4] 8025d6a: 6b9b ldr r3, [r3, #56] @ 0x38 8025d6c: 60fb str r3, [r7, #12] hspi->RxXferCount = 0U; 8025d6e: 68fb ldr r3, [r7, #12] 8025d70: 2200 movs r2, #0 8025d72: 87da strh r2, [r3, #62] @ 0x3e hspi->TxXferCount = 0U; 8025d74: 68fb ldr r3, [r7, #12] 8025d76: 2200 movs r2, #0 8025d78: 86da strh r2, [r3, #54] @ 0x36 /* Call user error callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->ErrorCallback(hspi); #else HAL_SPI_ErrorCallback(hspi); 8025d7a: 68f8 ldr r0, [r7, #12] 8025d7c: f7ff ffe6 bl 8025d4c #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } 8025d80: bf00 nop 8025d82: 3710 adds r7, #16 8025d84: 46bd mov sp, r7 8025d86: bd80 pop {r7, pc} 08025d88 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8025d88: b580 push {r7, lr} 8025d8a: b082 sub sp, #8 8025d8c: af00 add r7, sp, #0 8025d8e: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8025d90: 687b ldr r3, [r7, #4] 8025d92: 2b00 cmp r3, #0 8025d94: d101 bne.n 8025d9a { return HAL_ERROR; 8025d96: 2301 movs r3, #1 8025d98: e041 b.n 8025e1e assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8025d9a: 687b ldr r3, [r7, #4] 8025d9c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8025da0: b2db uxtb r3, r3 8025da2: 2b00 cmp r3, #0 8025da4: d106 bne.n 8025db4 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8025da6: 687b ldr r3, [r7, #4] 8025da8: 2200 movs r2, #0 8025daa: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8025dae: 6878 ldr r0, [r7, #4] 8025db0: f7f8 fea2 bl 801eaf8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8025db4: 687b ldr r3, [r7, #4] 8025db6: 2202 movs r2, #2 8025db8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8025dbc: 687b ldr r3, [r7, #4] 8025dbe: 681a ldr r2, [r3, #0] 8025dc0: 687b ldr r3, [r7, #4] 8025dc2: 3304 adds r3, #4 8025dc4: 4619 mov r1, r3 8025dc6: 4610 mov r0, r2 8025dc8: f000 fec2 bl 8026b50 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8025dcc: 687b ldr r3, [r7, #4] 8025dce: 2201 movs r2, #1 8025dd0: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8025dd4: 687b ldr r3, [r7, #4] 8025dd6: 2201 movs r2, #1 8025dd8: f883 203e strb.w r2, [r3, #62] @ 0x3e 8025ddc: 687b ldr r3, [r7, #4] 8025dde: 2201 movs r2, #1 8025de0: f883 203f strb.w r2, [r3, #63] @ 0x3f 8025de4: 687b ldr r3, [r7, #4] 8025de6: 2201 movs r2, #1 8025de8: f883 2040 strb.w r2, [r3, #64] @ 0x40 8025dec: 687b ldr r3, [r7, #4] 8025dee: 2201 movs r2, #1 8025df0: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8025df4: 687b ldr r3, [r7, #4] 8025df6: 2201 movs r2, #1 8025df8: f883 2042 strb.w r2, [r3, #66] @ 0x42 8025dfc: 687b ldr r3, [r7, #4] 8025dfe: 2201 movs r2, #1 8025e00: f883 2043 strb.w r2, [r3, #67] @ 0x43 8025e04: 687b ldr r3, [r7, #4] 8025e06: 2201 movs r2, #1 8025e08: f883 2044 strb.w r2, [r3, #68] @ 0x44 8025e0c: 687b ldr r3, [r7, #4] 8025e0e: 2201 movs r2, #1 8025e10: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8025e14: 687b ldr r3, [r7, #4] 8025e16: 2201 movs r2, #1 8025e18: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8025e1c: 2300 movs r3, #0 } 8025e1e: 4618 mov r0, r3 8025e20: 3708 adds r7, #8 8025e22: 46bd mov sp, r7 8025e24: bd80 pop {r7, pc} 08025e26 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8025e26: b580 push {r7, lr} 8025e28: b082 sub sp, #8 8025e2a: af00 add r7, sp, #0 8025e2c: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8025e2e: 687b ldr r3, [r7, #4] 8025e30: 2b00 cmp r3, #0 8025e32: d101 bne.n 8025e38 { return HAL_ERROR; 8025e34: 2301 movs r3, #1 8025e36: e041 b.n 8025ebc assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8025e38: 687b ldr r3, [r7, #4] 8025e3a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8025e3e: b2db uxtb r3, r3 8025e40: 2b00 cmp r3, #0 8025e42: d106 bne.n 8025e52 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8025e44: 687b ldr r3, [r7, #4] 8025e46: 2200 movs r2, #0 8025e48: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8025e4c: 6878 ldr r0, [r7, #4] 8025e4e: f7f8 ff8f bl 801ed70 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8025e52: 687b ldr r3, [r7, #4] 8025e54: 2202 movs r2, #2 8025e56: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8025e5a: 687b ldr r3, [r7, #4] 8025e5c: 681a ldr r2, [r3, #0] 8025e5e: 687b ldr r3, [r7, #4] 8025e60: 3304 adds r3, #4 8025e62: 4619 mov r1, r3 8025e64: 4610 mov r0, r2 8025e66: f000 fe73 bl 8026b50 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8025e6a: 687b ldr r3, [r7, #4] 8025e6c: 2201 movs r2, #1 8025e6e: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8025e72: 687b ldr r3, [r7, #4] 8025e74: 2201 movs r2, #1 8025e76: f883 203e strb.w r2, [r3, #62] @ 0x3e 8025e7a: 687b ldr r3, [r7, #4] 8025e7c: 2201 movs r2, #1 8025e7e: f883 203f strb.w r2, [r3, #63] @ 0x3f 8025e82: 687b ldr r3, [r7, #4] 8025e84: 2201 movs r2, #1 8025e86: f883 2040 strb.w r2, [r3, #64] @ 0x40 8025e8a: 687b ldr r3, [r7, #4] 8025e8c: 2201 movs r2, #1 8025e8e: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8025e92: 687b ldr r3, [r7, #4] 8025e94: 2201 movs r2, #1 8025e96: f883 2042 strb.w r2, [r3, #66] @ 0x42 8025e9a: 687b ldr r3, [r7, #4] 8025e9c: 2201 movs r2, #1 8025e9e: f883 2043 strb.w r2, [r3, #67] @ 0x43 8025ea2: 687b ldr r3, [r7, #4] 8025ea4: 2201 movs r2, #1 8025ea6: f883 2044 strb.w r2, [r3, #68] @ 0x44 8025eaa: 687b ldr r3, [r7, #4] 8025eac: 2201 movs r2, #1 8025eae: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8025eb2: 687b ldr r3, [r7, #4] 8025eb4: 2201 movs r2, #1 8025eb6: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8025eba: 2300 movs r3, #0 } 8025ebc: 4618 mov r0, r3 8025ebe: 3708 adds r7, #8 8025ec0: 46bd mov sp, r7 8025ec2: bd80 pop {r7, pc} 08025ec4 : * @brief DeInitializes the TIM peripheral * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) { 8025ec4: b580 push {r7, lr} 8025ec6: b082 sub sp, #8 8025ec8: af00 add r7, sp, #0 8025eca: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); htim->State = HAL_TIM_STATE_BUSY; 8025ecc: 687b ldr r3, [r7, #4] 8025ece: 2202 movs r2, #2 8025ed0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the TIM Peripheral Clock */ __HAL_TIM_DISABLE(htim); 8025ed4: 687b ldr r3, [r7, #4] 8025ed6: 681b ldr r3, [r3, #0] 8025ed8: 6a1a ldr r2, [r3, #32] 8025eda: f241 1311 movw r3, #4369 @ 0x1111 8025ede: 4013 ands r3, r2 8025ee0: 2b00 cmp r3, #0 8025ee2: d10f bne.n 8025f04 8025ee4: 687b ldr r3, [r7, #4] 8025ee6: 681b ldr r3, [r3, #0] 8025ee8: 6a1a ldr r2, [r3, #32] 8025eea: f240 4344 movw r3, #1092 @ 0x444 8025eee: 4013 ands r3, r2 8025ef0: 2b00 cmp r3, #0 8025ef2: d107 bne.n 8025f04 8025ef4: 687b ldr r3, [r7, #4] 8025ef6: 681b ldr r3, [r3, #0] 8025ef8: 681a ldr r2, [r3, #0] 8025efa: 687b ldr r3, [r7, #4] 8025efc: 681b ldr r3, [r3, #0] 8025efe: f022 0201 bic.w r2, r2, #1 8025f02: 601a str r2, [r3, #0] } /* DeInit the low level hardware */ htim->PWM_MspDeInitCallback(htim); #else /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspDeInit(htim); 8025f04: 6878 ldr r0, [r7, #4] 8025f06: f7f9 f8eb bl 801f0e0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ /* Change the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; 8025f0a: 687b ldr r3, [r7, #4] 8025f0c: 2200 movs r2, #0 8025f0e: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Change the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); 8025f12: 687b ldr r3, [r7, #4] 8025f14: 2200 movs r2, #0 8025f16: f883 203e strb.w r2, [r3, #62] @ 0x3e 8025f1a: 687b ldr r3, [r7, #4] 8025f1c: 2200 movs r2, #0 8025f1e: f883 203f strb.w r2, [r3, #63] @ 0x3f 8025f22: 687b ldr r3, [r7, #4] 8025f24: 2200 movs r2, #0 8025f26: f883 2040 strb.w r2, [r3, #64] @ 0x40 8025f2a: 687b ldr r3, [r7, #4] 8025f2c: 2200 movs r2, #0 8025f2e: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_RESET); 8025f32: 687b ldr r3, [r7, #4] 8025f34: 2200 movs r2, #0 8025f36: f883 2042 strb.w r2, [r3, #66] @ 0x42 8025f3a: 687b ldr r3, [r7, #4] 8025f3c: 2200 movs r2, #0 8025f3e: f883 2043 strb.w r2, [r3, #67] @ 0x43 8025f42: 687b ldr r3, [r7, #4] 8025f44: 2200 movs r2, #0 8025f46: f883 2044 strb.w r2, [r3, #68] @ 0x44 8025f4a: 687b ldr r3, [r7, #4] 8025f4c: 2200 movs r2, #0 8025f4e: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Change TIM state */ htim->State = HAL_TIM_STATE_RESET; 8025f52: 687b ldr r3, [r7, #4] 8025f54: 2200 movs r2, #0 8025f56: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Release Lock */ __HAL_UNLOCK(htim); 8025f5a: 687b ldr r3, [r7, #4] 8025f5c: 2200 movs r2, #0 8025f5e: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8025f62: 2300 movs r3, #0 } 8025f64: 4618 mov r0, r3 8025f66: 3708 adds r7, #8 8025f68: 46bd mov sp, r7 8025f6a: bd80 pop {r7, pc} 08025f6c : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8025f6c: b580 push {r7, lr} 8025f6e: b084 sub sp, #16 8025f70: af00 add r7, sp, #0 8025f72: 6078 str r0, [r7, #4] 8025f74: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8025f76: 683b ldr r3, [r7, #0] 8025f78: 2b00 cmp r3, #0 8025f7a: d109 bne.n 8025f90 8025f7c: 687b ldr r3, [r7, #4] 8025f7e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8025f82: b2db uxtb r3, r3 8025f84: 2b01 cmp r3, #1 8025f86: bf14 ite ne 8025f88: 2301 movne r3, #1 8025f8a: 2300 moveq r3, #0 8025f8c: b2db uxtb r3, r3 8025f8e: e022 b.n 8025fd6 8025f90: 683b ldr r3, [r7, #0] 8025f92: 2b04 cmp r3, #4 8025f94: d109 bne.n 8025faa 8025f96: 687b ldr r3, [r7, #4] 8025f98: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8025f9c: b2db uxtb r3, r3 8025f9e: 2b01 cmp r3, #1 8025fa0: bf14 ite ne 8025fa2: 2301 movne r3, #1 8025fa4: 2300 moveq r3, #0 8025fa6: b2db uxtb r3, r3 8025fa8: e015 b.n 8025fd6 8025faa: 683b ldr r3, [r7, #0] 8025fac: 2b08 cmp r3, #8 8025fae: d109 bne.n 8025fc4 8025fb0: 687b ldr r3, [r7, #4] 8025fb2: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8025fb6: b2db uxtb r3, r3 8025fb8: 2b01 cmp r3, #1 8025fba: bf14 ite ne 8025fbc: 2301 movne r3, #1 8025fbe: 2300 moveq r3, #0 8025fc0: b2db uxtb r3, r3 8025fc2: e008 b.n 8025fd6 8025fc4: 687b ldr r3, [r7, #4] 8025fc6: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8025fca: b2db uxtb r3, r3 8025fcc: 2b01 cmp r3, #1 8025fce: bf14 ite ne 8025fd0: 2301 movne r3, #1 8025fd2: 2300 moveq r3, #0 8025fd4: b2db uxtb r3, r3 8025fd6: 2b00 cmp r3, #0 8025fd8: d001 beq.n 8025fde { return HAL_ERROR; 8025fda: 2301 movs r3, #1 8025fdc: e07c b.n 80260d8 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8025fde: 683b ldr r3, [r7, #0] 8025fe0: 2b00 cmp r3, #0 8025fe2: d104 bne.n 8025fee 8025fe4: 687b ldr r3, [r7, #4] 8025fe6: 2202 movs r2, #2 8025fe8: f883 203e strb.w r2, [r3, #62] @ 0x3e 8025fec: e013 b.n 8026016 8025fee: 683b ldr r3, [r7, #0] 8025ff0: 2b04 cmp r3, #4 8025ff2: d104 bne.n 8025ffe 8025ff4: 687b ldr r3, [r7, #4] 8025ff6: 2202 movs r2, #2 8025ff8: f883 203f strb.w r2, [r3, #63] @ 0x3f 8025ffc: e00b b.n 8026016 8025ffe: 683b ldr r3, [r7, #0] 8026000: 2b08 cmp r3, #8 8026002: d104 bne.n 802600e 8026004: 687b ldr r3, [r7, #4] 8026006: 2202 movs r2, #2 8026008: f883 2040 strb.w r2, [r3, #64] @ 0x40 802600c: e003 b.n 8026016 802600e: 687b ldr r3, [r7, #4] 8026010: 2202 movs r2, #2 8026012: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8026016: 687b ldr r3, [r7, #4] 8026018: 681b ldr r3, [r3, #0] 802601a: 2201 movs r2, #1 802601c: 6839 ldr r1, [r7, #0] 802601e: 4618 mov r0, r3 8026020: f001 f880 bl 8027124 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8026024: 687b ldr r3, [r7, #4] 8026026: 681b ldr r3, [r3, #0] 8026028: 4a2d ldr r2, [pc, #180] @ (80260e0 ) 802602a: 4293 cmp r3, r2 802602c: d004 beq.n 8026038 802602e: 687b ldr r3, [r7, #4] 8026030: 681b ldr r3, [r3, #0] 8026032: 4a2c ldr r2, [pc, #176] @ (80260e4 ) 8026034: 4293 cmp r3, r2 8026036: d101 bne.n 802603c 8026038: 2301 movs r3, #1 802603a: e000 b.n 802603e 802603c: 2300 movs r3, #0 802603e: 2b00 cmp r3, #0 8026040: d007 beq.n 8026052 { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8026042: 687b ldr r3, [r7, #4] 8026044: 681b ldr r3, [r3, #0] 8026046: 6c5a ldr r2, [r3, #68] @ 0x44 8026048: 687b ldr r3, [r7, #4] 802604a: 681b ldr r3, [r3, #0] 802604c: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8026050: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8026052: 687b ldr r3, [r7, #4] 8026054: 681b ldr r3, [r3, #0] 8026056: 4a22 ldr r2, [pc, #136] @ (80260e0 ) 8026058: 4293 cmp r3, r2 802605a: d022 beq.n 80260a2 802605c: 687b ldr r3, [r7, #4] 802605e: 681b ldr r3, [r3, #0] 8026060: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8026064: d01d beq.n 80260a2 8026066: 687b ldr r3, [r7, #4] 8026068: 681b ldr r3, [r3, #0] 802606a: 4a1f ldr r2, [pc, #124] @ (80260e8 ) 802606c: 4293 cmp r3, r2 802606e: d018 beq.n 80260a2 8026070: 687b ldr r3, [r7, #4] 8026072: 681b ldr r3, [r3, #0] 8026074: 4a1d ldr r2, [pc, #116] @ (80260ec ) 8026076: 4293 cmp r3, r2 8026078: d013 beq.n 80260a2 802607a: 687b ldr r3, [r7, #4] 802607c: 681b ldr r3, [r3, #0] 802607e: 4a1c ldr r2, [pc, #112] @ (80260f0 ) 8026080: 4293 cmp r3, r2 8026082: d00e beq.n 80260a2 8026084: 687b ldr r3, [r7, #4] 8026086: 681b ldr r3, [r3, #0] 8026088: 4a16 ldr r2, [pc, #88] @ (80260e4 ) 802608a: 4293 cmp r3, r2 802608c: d009 beq.n 80260a2 802608e: 687b ldr r3, [r7, #4] 8026090: 681b ldr r3, [r3, #0] 8026092: 4a18 ldr r2, [pc, #96] @ (80260f4 ) 8026094: 4293 cmp r3, r2 8026096: d004 beq.n 80260a2 8026098: 687b ldr r3, [r7, #4] 802609a: 681b ldr r3, [r3, #0] 802609c: 4a16 ldr r2, [pc, #88] @ (80260f8 ) 802609e: 4293 cmp r3, r2 80260a0: d111 bne.n 80260c6 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80260a2: 687b ldr r3, [r7, #4] 80260a4: 681b ldr r3, [r3, #0] 80260a6: 689b ldr r3, [r3, #8] 80260a8: f003 0307 and.w r3, r3, #7 80260ac: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80260ae: 68fb ldr r3, [r7, #12] 80260b0: 2b06 cmp r3, #6 80260b2: d010 beq.n 80260d6 { __HAL_TIM_ENABLE(htim); 80260b4: 687b ldr r3, [r7, #4] 80260b6: 681b ldr r3, [r3, #0] 80260b8: 681a ldr r2, [r3, #0] 80260ba: 687b ldr r3, [r7, #4] 80260bc: 681b ldr r3, [r3, #0] 80260be: f042 0201 orr.w r2, r2, #1 80260c2: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80260c4: e007 b.n 80260d6 } } else { __HAL_TIM_ENABLE(htim); 80260c6: 687b ldr r3, [r7, #4] 80260c8: 681b ldr r3, [r3, #0] 80260ca: 681a ldr r2, [r3, #0] 80260cc: 687b ldr r3, [r7, #4] 80260ce: 681b ldr r3, [r3, #0] 80260d0: f042 0201 orr.w r2, r2, #1 80260d4: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 80260d6: 2300 movs r3, #0 } 80260d8: 4618 mov r0, r3 80260da: 3710 adds r7, #16 80260dc: 46bd mov sp, r7 80260de: bd80 pop {r7, pc} 80260e0: 40010000 .word 0x40010000 80260e4: 40010400 .word 0x40010400 80260e8: 40000400 .word 0x40000400 80260ec: 40000800 .word 0x40000800 80260f0: 40000c00 .word 0x40000c00 80260f4: 40014000 .word 0x40014000 80260f8: 40001800 .word 0x40001800 080260fc : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { 80260fc: b580 push {r7, lr} 80260fe: b084 sub sp, #16 8026100: af00 add r7, sp, #0 8026102: 6078 str r0, [r7, #4] 8026104: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8026106: 2300 movs r3, #0 8026108: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 802610a: 683b ldr r3, [r7, #0] 802610c: 2b00 cmp r3, #0 802610e: d109 bne.n 8026124 8026110: 687b ldr r3, [r7, #4] 8026112: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8026116: b2db uxtb r3, r3 8026118: 2b01 cmp r3, #1 802611a: bf14 ite ne 802611c: 2301 movne r3, #1 802611e: 2300 moveq r3, #0 8026120: b2db uxtb r3, r3 8026122: e022 b.n 802616a 8026124: 683b ldr r3, [r7, #0] 8026126: 2b04 cmp r3, #4 8026128: d109 bne.n 802613e 802612a: 687b ldr r3, [r7, #4] 802612c: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8026130: b2db uxtb r3, r3 8026132: 2b01 cmp r3, #1 8026134: bf14 ite ne 8026136: 2301 movne r3, #1 8026138: 2300 moveq r3, #0 802613a: b2db uxtb r3, r3 802613c: e015 b.n 802616a 802613e: 683b ldr r3, [r7, #0] 8026140: 2b08 cmp r3, #8 8026142: d109 bne.n 8026158 8026144: 687b ldr r3, [r7, #4] 8026146: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 802614a: b2db uxtb r3, r3 802614c: 2b01 cmp r3, #1 802614e: bf14 ite ne 8026150: 2301 movne r3, #1 8026152: 2300 moveq r3, #0 8026154: b2db uxtb r3, r3 8026156: e008 b.n 802616a 8026158: 687b ldr r3, [r7, #4] 802615a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 802615e: b2db uxtb r3, r3 8026160: 2b01 cmp r3, #1 8026162: bf14 ite ne 8026164: 2301 movne r3, #1 8026166: 2300 moveq r3, #0 8026168: b2db uxtb r3, r3 802616a: 2b00 cmp r3, #0 802616c: d001 beq.n 8026172 { return HAL_ERROR; 802616e: 2301 movs r3, #1 8026170: e0c7 b.n 8026302 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8026172: 683b ldr r3, [r7, #0] 8026174: 2b00 cmp r3, #0 8026176: d104 bne.n 8026182 8026178: 687b ldr r3, [r7, #4] 802617a: 2202 movs r2, #2 802617c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8026180: e013 b.n 80261aa 8026182: 683b ldr r3, [r7, #0] 8026184: 2b04 cmp r3, #4 8026186: d104 bne.n 8026192 8026188: 687b ldr r3, [r7, #4] 802618a: 2202 movs r2, #2 802618c: f883 203f strb.w r2, [r3, #63] @ 0x3f 8026190: e00b b.n 80261aa 8026192: 683b ldr r3, [r7, #0] 8026194: 2b08 cmp r3, #8 8026196: d104 bne.n 80261a2 8026198: 687b ldr r3, [r7, #4] 802619a: 2202 movs r2, #2 802619c: f883 2040 strb.w r2, [r3, #64] @ 0x40 80261a0: e003 b.n 80261aa 80261a2: 687b ldr r3, [r7, #4] 80261a4: 2202 movs r2, #2 80261a6: f883 2041 strb.w r2, [r3, #65] @ 0x41 switch (Channel) 80261aa: 683b ldr r3, [r7, #0] 80261ac: 2b0c cmp r3, #12 80261ae: d841 bhi.n 8026234 80261b0: a201 add r2, pc, #4 @ (adr r2, 80261b8 ) 80261b2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80261b6: bf00 nop 80261b8: 080261ed .word 0x080261ed 80261bc: 08026235 .word 0x08026235 80261c0: 08026235 .word 0x08026235 80261c4: 08026235 .word 0x08026235 80261c8: 080261ff .word 0x080261ff 80261cc: 08026235 .word 0x08026235 80261d0: 08026235 .word 0x08026235 80261d4: 08026235 .word 0x08026235 80261d8: 08026211 .word 0x08026211 80261dc: 08026235 .word 0x08026235 80261e0: 08026235 .word 0x08026235 80261e4: 08026235 .word 0x08026235 80261e8: 08026223 .word 0x08026223 { case TIM_CHANNEL_1: { /* Enable the TIM Capture/Compare 1 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 80261ec: 687b ldr r3, [r7, #4] 80261ee: 681b ldr r3, [r3, #0] 80261f0: 68da ldr r2, [r3, #12] 80261f2: 687b ldr r3, [r7, #4] 80261f4: 681b ldr r3, [r3, #0] 80261f6: f042 0202 orr.w r2, r2, #2 80261fa: 60da str r2, [r3, #12] break; 80261fc: e01d b.n 802623a } case TIM_CHANNEL_2: { /* Enable the TIM Capture/Compare 2 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 80261fe: 687b ldr r3, [r7, #4] 8026200: 681b ldr r3, [r3, #0] 8026202: 68da ldr r2, [r3, #12] 8026204: 687b ldr r3, [r7, #4] 8026206: 681b ldr r3, [r3, #0] 8026208: f042 0204 orr.w r2, r2, #4 802620c: 60da str r2, [r3, #12] break; 802620e: e014 b.n 802623a } case TIM_CHANNEL_3: { /* Enable the TIM Capture/Compare 3 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 8026210: 687b ldr r3, [r7, #4] 8026212: 681b ldr r3, [r3, #0] 8026214: 68da ldr r2, [r3, #12] 8026216: 687b ldr r3, [r7, #4] 8026218: 681b ldr r3, [r3, #0] 802621a: f042 0208 orr.w r2, r2, #8 802621e: 60da str r2, [r3, #12] break; 8026220: e00b b.n 802623a } case TIM_CHANNEL_4: { /* Enable the TIM Capture/Compare 4 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); 8026222: 687b ldr r3, [r7, #4] 8026224: 681b ldr r3, [r3, #0] 8026226: 68da ldr r2, [r3, #12] 8026228: 687b ldr r3, [r7, #4] 802622a: 681b ldr r3, [r3, #0] 802622c: f042 0210 orr.w r2, r2, #16 8026230: 60da str r2, [r3, #12] break; 8026232: e002 b.n 802623a } default: status = HAL_ERROR; 8026234: 2301 movs r3, #1 8026236: 73fb strb r3, [r7, #15] break; 8026238: bf00 nop } if (status == HAL_OK) 802623a: 7bfb ldrb r3, [r7, #15] 802623c: 2b00 cmp r3, #0 802623e: d15f bne.n 8026300 { /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8026240: 687b ldr r3, [r7, #4] 8026242: 681b ldr r3, [r3, #0] 8026244: 2201 movs r2, #1 8026246: 6839 ldr r1, [r7, #0] 8026248: 4618 mov r0, r3 802624a: f000 ff6b bl 8027124 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 802624e: 687b ldr r3, [r7, #4] 8026250: 681b ldr r3, [r3, #0] 8026252: 4a2e ldr r2, [pc, #184] @ (802630c ) 8026254: 4293 cmp r3, r2 8026256: d004 beq.n 8026262 8026258: 687b ldr r3, [r7, #4] 802625a: 681b ldr r3, [r3, #0] 802625c: 4a2c ldr r2, [pc, #176] @ (8026310 ) 802625e: 4293 cmp r3, r2 8026260: d101 bne.n 8026266 8026262: 2301 movs r3, #1 8026264: e000 b.n 8026268 8026266: 2300 movs r3, #0 8026268: 2b00 cmp r3, #0 802626a: d007 beq.n 802627c { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 802626c: 687b ldr r3, [r7, #4] 802626e: 681b ldr r3, [r3, #0] 8026270: 6c5a ldr r2, [r3, #68] @ 0x44 8026272: 687b ldr r3, [r7, #4] 8026274: 681b ldr r3, [r3, #0] 8026276: f442 4200 orr.w r2, r2, #32768 @ 0x8000 802627a: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 802627c: 687b ldr r3, [r7, #4] 802627e: 681b ldr r3, [r3, #0] 8026280: 4a22 ldr r2, [pc, #136] @ (802630c ) 8026282: 4293 cmp r3, r2 8026284: d022 beq.n 80262cc 8026286: 687b ldr r3, [r7, #4] 8026288: 681b ldr r3, [r3, #0] 802628a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 802628e: d01d beq.n 80262cc 8026290: 687b ldr r3, [r7, #4] 8026292: 681b ldr r3, [r3, #0] 8026294: 4a1f ldr r2, [pc, #124] @ (8026314 ) 8026296: 4293 cmp r3, r2 8026298: d018 beq.n 80262cc 802629a: 687b ldr r3, [r7, #4] 802629c: 681b ldr r3, [r3, #0] 802629e: 4a1e ldr r2, [pc, #120] @ (8026318 ) 80262a0: 4293 cmp r3, r2 80262a2: d013 beq.n 80262cc 80262a4: 687b ldr r3, [r7, #4] 80262a6: 681b ldr r3, [r3, #0] 80262a8: 4a1c ldr r2, [pc, #112] @ (802631c ) 80262aa: 4293 cmp r3, r2 80262ac: d00e beq.n 80262cc 80262ae: 687b ldr r3, [r7, #4] 80262b0: 681b ldr r3, [r3, #0] 80262b2: 4a17 ldr r2, [pc, #92] @ (8026310 ) 80262b4: 4293 cmp r3, r2 80262b6: d009 beq.n 80262cc 80262b8: 687b ldr r3, [r7, #4] 80262ba: 681b ldr r3, [r3, #0] 80262bc: 4a18 ldr r2, [pc, #96] @ (8026320 ) 80262be: 4293 cmp r3, r2 80262c0: d004 beq.n 80262cc 80262c2: 687b ldr r3, [r7, #4] 80262c4: 681b ldr r3, [r3, #0] 80262c6: 4a17 ldr r2, [pc, #92] @ (8026324 ) 80262c8: 4293 cmp r3, r2 80262ca: d111 bne.n 80262f0 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80262cc: 687b ldr r3, [r7, #4] 80262ce: 681b ldr r3, [r3, #0] 80262d0: 689b ldr r3, [r3, #8] 80262d2: f003 0307 and.w r3, r3, #7 80262d6: 60bb str r3, [r7, #8] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80262d8: 68bb ldr r3, [r7, #8] 80262da: 2b06 cmp r3, #6 80262dc: d010 beq.n 8026300 { __HAL_TIM_ENABLE(htim); 80262de: 687b ldr r3, [r7, #4] 80262e0: 681b ldr r3, [r3, #0] 80262e2: 681a ldr r2, [r3, #0] 80262e4: 687b ldr r3, [r7, #4] 80262e6: 681b ldr r3, [r3, #0] 80262e8: f042 0201 orr.w r2, r2, #1 80262ec: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80262ee: e007 b.n 8026300 } } else { __HAL_TIM_ENABLE(htim); 80262f0: 687b ldr r3, [r7, #4] 80262f2: 681b ldr r3, [r3, #0] 80262f4: 681a ldr r2, [r3, #0] 80262f6: 687b ldr r3, [r7, #4] 80262f8: 681b ldr r3, [r3, #0] 80262fa: f042 0201 orr.w r2, r2, #1 80262fe: 601a str r2, [r3, #0] } } /* Return function status */ return status; 8026300: 7bfb ldrb r3, [r7, #15] } 8026302: 4618 mov r0, r3 8026304: 3710 adds r7, #16 8026306: 46bd mov sp, r7 8026308: bd80 pop {r7, pc} 802630a: bf00 nop 802630c: 40010000 .word 0x40010000 8026310: 40010400 .word 0x40010400 8026314: 40000400 .word 0x40000400 8026318: 40000800 .word 0x40000800 802631c: 40000c00 .word 0x40000c00 8026320: 40014000 .word 0x40014000 8026324: 40001800 .word 0x40001800 08026328 : * @param htim TIM Encoder Interface handle * @param sConfig TIM Encoder Interface configuration structure * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig) { 8026328: b580 push {r7, lr} 802632a: b086 sub sp, #24 802632c: af00 add r7, sp, #0 802632e: 6078 str r0, [r7, #4] 8026330: 6039 str r1, [r7, #0] uint32_t tmpsmcr; uint32_t tmpccmr1; uint32_t tmpccer; /* Check the TIM handle allocation */ if (htim == NULL) 8026332: 687b ldr r3, [r7, #4] 8026334: 2b00 cmp r3, #0 8026336: d101 bne.n 802633c { return HAL_ERROR; 8026338: 2301 movs r3, #1 802633a: e097 b.n 802646c assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); if (htim->State == HAL_TIM_STATE_RESET) 802633c: 687b ldr r3, [r7, #4] 802633e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8026342: b2db uxtb r3, r3 8026344: 2b00 cmp r3, #0 8026346: d106 bne.n 8026356 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8026348: 687b ldr r3, [r7, #4] 802634a: 2200 movs r2, #0 802634c: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Encoder_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_Encoder_MspInit(htim); 8026350: 6878 ldr r0, [r7, #4] 8026352: f7f8 fc7f bl 801ec54 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8026356: 687b ldr r3, [r7, #4] 8026358: 2202 movs r2, #2 802635a: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Reset the SMS and ECE bits */ htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); 802635e: 687b ldr r3, [r7, #4] 8026360: 681b ldr r3, [r3, #0] 8026362: 689b ldr r3, [r3, #8] 8026364: 687a ldr r2, [r7, #4] 8026366: 6812 ldr r2, [r2, #0] 8026368: f423 4380 bic.w r3, r3, #16384 @ 0x4000 802636c: f023 0307 bic.w r3, r3, #7 8026370: 6093 str r3, [r2, #8] /* Configure the Time base in the Encoder Mode */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8026372: 687b ldr r3, [r7, #4] 8026374: 681a ldr r2, [r3, #0] 8026376: 687b ldr r3, [r7, #4] 8026378: 3304 adds r3, #4 802637a: 4619 mov r1, r3 802637c: 4610 mov r0, r2 802637e: f000 fbe7 bl 8026b50 /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8026382: 687b ldr r3, [r7, #4] 8026384: 681b ldr r3, [r3, #0] 8026386: 689b ldr r3, [r3, #8] 8026388: 617b str r3, [r7, #20] /* Get the TIMx CCMR1 register value */ tmpccmr1 = htim->Instance->CCMR1; 802638a: 687b ldr r3, [r7, #4] 802638c: 681b ldr r3, [r3, #0] 802638e: 699b ldr r3, [r3, #24] 8026390: 613b str r3, [r7, #16] /* Get the TIMx CCER register value */ tmpccer = htim->Instance->CCER; 8026392: 687b ldr r3, [r7, #4] 8026394: 681b ldr r3, [r3, #0] 8026396: 6a1b ldr r3, [r3, #32] 8026398: 60fb str r3, [r7, #12] /* Set the encoder Mode */ tmpsmcr |= sConfig->EncoderMode; 802639a: 683b ldr r3, [r7, #0] 802639c: 681b ldr r3, [r3, #0] 802639e: 697a ldr r2, [r7, #20] 80263a0: 4313 orrs r3, r2 80263a2: 617b str r3, [r7, #20] /* Select the Capture Compare 1 and the Capture Compare 2 as input */ tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); 80263a4: 693b ldr r3, [r7, #16] 80263a6: f423 7340 bic.w r3, r3, #768 @ 0x300 80263aa: f023 0303 bic.w r3, r3, #3 80263ae: 613b str r3, [r7, #16] tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); 80263b0: 683b ldr r3, [r7, #0] 80263b2: 689a ldr r2, [r3, #8] 80263b4: 683b ldr r3, [r7, #0] 80263b6: 699b ldr r3, [r3, #24] 80263b8: 021b lsls r3, r3, #8 80263ba: 4313 orrs r3, r2 80263bc: 693a ldr r2, [r7, #16] 80263be: 4313 orrs r3, r2 80263c0: 613b str r3, [r7, #16] /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); 80263c2: 693b ldr r3, [r7, #16] 80263c4: f423 6340 bic.w r3, r3, #3072 @ 0xc00 80263c8: f023 030c bic.w r3, r3, #12 80263cc: 613b str r3, [r7, #16] tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); 80263ce: 693b ldr r3, [r7, #16] 80263d0: f423 4370 bic.w r3, r3, #61440 @ 0xf000 80263d4: f023 03f0 bic.w r3, r3, #240 @ 0xf0 80263d8: 613b str r3, [r7, #16] tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); 80263da: 683b ldr r3, [r7, #0] 80263dc: 68da ldr r2, [r3, #12] 80263de: 683b ldr r3, [r7, #0] 80263e0: 69db ldr r3, [r3, #28] 80263e2: 021b lsls r3, r3, #8 80263e4: 4313 orrs r3, r2 80263e6: 693a ldr r2, [r7, #16] 80263e8: 4313 orrs r3, r2 80263ea: 613b str r3, [r7, #16] tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); 80263ec: 683b ldr r3, [r7, #0] 80263ee: 691b ldr r3, [r3, #16] 80263f0: 011a lsls r2, r3, #4 80263f2: 683b ldr r3, [r7, #0] 80263f4: 6a1b ldr r3, [r3, #32] 80263f6: 031b lsls r3, r3, #12 80263f8: 4313 orrs r3, r2 80263fa: 693a ldr r2, [r7, #16] 80263fc: 4313 orrs r3, r2 80263fe: 613b str r3, [r7, #16] /* Set the TI1 and the TI2 Polarities */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); 8026400: 68fb ldr r3, [r7, #12] 8026402: f023 0322 bic.w r3, r3, #34 @ 0x22 8026406: 60fb str r3, [r7, #12] tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); 8026408: 68fb ldr r3, [r7, #12] 802640a: f023 0388 bic.w r3, r3, #136 @ 0x88 802640e: 60fb str r3, [r7, #12] tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); 8026410: 683b ldr r3, [r7, #0] 8026412: 685a ldr r2, [r3, #4] 8026414: 683b ldr r3, [r7, #0] 8026416: 695b ldr r3, [r3, #20] 8026418: 011b lsls r3, r3, #4 802641a: 4313 orrs r3, r2 802641c: 68fa ldr r2, [r7, #12] 802641e: 4313 orrs r3, r2 8026420: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8026422: 687b ldr r3, [r7, #4] 8026424: 681b ldr r3, [r3, #0] 8026426: 697a ldr r2, [r7, #20] 8026428: 609a str r2, [r3, #8] /* Write to TIMx CCMR1 */ htim->Instance->CCMR1 = tmpccmr1; 802642a: 687b ldr r3, [r7, #4] 802642c: 681b ldr r3, [r3, #0] 802642e: 693a ldr r2, [r7, #16] 8026430: 619a str r2, [r3, #24] /* Write to TIMx CCER */ htim->Instance->CCER = tmpccer; 8026432: 687b ldr r3, [r7, #4] 8026434: 681b ldr r3, [r3, #0] 8026436: 68fa ldr r2, [r7, #12] 8026438: 621a str r2, [r3, #32] /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 802643a: 687b ldr r3, [r7, #4] 802643c: 2201 movs r2, #1 802643e: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Set the TIM channels state */ TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 8026442: 687b ldr r3, [r7, #4] 8026444: 2201 movs r2, #1 8026446: f883 203e strb.w r2, [r3, #62] @ 0x3e TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 802644a: 687b ldr r3, [r7, #4] 802644c: 2201 movs r2, #1 802644e: f883 203f strb.w r2, [r3, #63] @ 0x3f TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 8026452: 687b ldr r3, [r7, #4] 8026454: 2201 movs r2, #1 8026456: f883 2042 strb.w r2, [r3, #66] @ 0x42 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 802645a: 687b ldr r3, [r7, #4] 802645c: 2201 movs r2, #1 802645e: f883 2043 strb.w r2, [r3, #67] @ 0x43 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8026462: 687b ldr r3, [r7, #4] 8026464: 2201 movs r2, #1 8026466: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 802646a: 2300 movs r3, #0 } 802646c: 4618 mov r0, r3 802646e: 3718 adds r7, #24 8026470: 46bd mov sp, r7 8026472: bd80 pop {r7, pc} 08026474 : * @brief DeInitializes the TIM Encoder interface * @param htim TIM Encoder Interface handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) { 8026474: b580 push {r7, lr} 8026476: b082 sub sp, #8 8026478: af00 add r7, sp, #0 802647a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); htim->State = HAL_TIM_STATE_BUSY; 802647c: 687b ldr r3, [r7, #4] 802647e: 2202 movs r2, #2 8026480: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the TIM Peripheral Clock */ __HAL_TIM_DISABLE(htim); 8026484: 687b ldr r3, [r7, #4] 8026486: 681b ldr r3, [r3, #0] 8026488: 6a1a ldr r2, [r3, #32] 802648a: f241 1311 movw r3, #4369 @ 0x1111 802648e: 4013 ands r3, r2 8026490: 2b00 cmp r3, #0 8026492: d10f bne.n 80264b4 8026494: 687b ldr r3, [r7, #4] 8026496: 681b ldr r3, [r3, #0] 8026498: 6a1a ldr r2, [r3, #32] 802649a: f240 4344 movw r3, #1092 @ 0x444 802649e: 4013 ands r3, r2 80264a0: 2b00 cmp r3, #0 80264a2: d107 bne.n 80264b4 80264a4: 687b ldr r3, [r7, #4] 80264a6: 681b ldr r3, [r3, #0] 80264a8: 681a ldr r2, [r3, #0] 80264aa: 687b ldr r3, [r7, #4] 80264ac: 681b ldr r3, [r3, #0] 80264ae: f022 0201 bic.w r2, r2, #1 80264b2: 601a str r2, [r3, #0] } /* DeInit the low level hardware */ htim->Encoder_MspDeInitCallback(htim); #else /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ HAL_TIM_Encoder_MspDeInit(htim); 80264b4: 6878 ldr r0, [r7, #4] 80264b6: f7f8 fddb bl 801f070 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ /* Change the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; 80264ba: 687b ldr r3, [r7, #4] 80264bc: 2200 movs r2, #0 80264be: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Set the TIM channels state */ TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); 80264c2: 687b ldr r3, [r7, #4] 80264c4: 2200 movs r2, #0 80264c6: f883 203e strb.w r2, [r3, #62] @ 0x3e TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); 80264ca: 687b ldr r3, [r7, #4] 80264cc: 2200 movs r2, #0 80264ce: f883 203f strb.w r2, [r3, #63] @ 0x3f TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); 80264d2: 687b ldr r3, [r7, #4] 80264d4: 2200 movs r2, #0 80264d6: f883 2042 strb.w r2, [r3, #66] @ 0x42 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); 80264da: 687b ldr r3, [r7, #4] 80264dc: 2200 movs r2, #0 80264de: f883 2043 strb.w r2, [r3, #67] @ 0x43 /* Change TIM state */ htim->State = HAL_TIM_STATE_RESET; 80264e2: 687b ldr r3, [r7, #4] 80264e4: 2200 movs r2, #0 80264e6: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Release Lock */ __HAL_UNLOCK(htim); 80264ea: 687b ldr r3, [r7, #4] 80264ec: 2200 movs r2, #0 80264ee: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 80264f2: 2300 movs r3, #0 } 80264f4: 4618 mov r0, r3 80264f6: 3708 adds r7, #8 80264f8: 46bd mov sp, r7 80264fa: bd80 pop {r7, pc} 080264fc : * @arg TIM_CHANNEL_2: TIM Channel 2 selected * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 80264fc: b580 push {r7, lr} 80264fe: b084 sub sp, #16 8026500: af00 add r7, sp, #0 8026502: 6078 str r0, [r7, #4] 8026504: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); 8026506: 687b ldr r3, [r7, #4] 8026508: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 802650c: 73fb strb r3, [r7, #15] HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); 802650e: 687b ldr r3, [r7, #4] 8026510: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8026514: 73bb strb r3, [r7, #14] HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); 8026516: 687b ldr r3, [r7, #4] 8026518: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 802651c: 737b strb r3, [r7, #13] HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); 802651e: 687b ldr r3, [r7, #4] 8026520: f893 3043 ldrb.w r3, [r3, #67] @ 0x43 8026524: 733b strb r3, [r7, #12] /* Check the parameters */ assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(htim->Instance)); /* Set the TIM channel(s) state */ if (Channel == TIM_CHANNEL_1) 8026526: 683b ldr r3, [r7, #0] 8026528: 2b00 cmp r3, #0 802652a: d110 bne.n 802654e { if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 802652c: 7bfb ldrb r3, [r7, #15] 802652e: 2b01 cmp r3, #1 8026530: d102 bne.n 8026538 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) 8026532: 7b7b ldrb r3, [r7, #13] 8026534: 2b01 cmp r3, #1 8026536: d001 beq.n 802653c { return HAL_ERROR; 8026538: 2301 movs r3, #1 802653a: e069 b.n 8026610 } else { TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 802653c: 687b ldr r3, [r7, #4] 802653e: 2202 movs r2, #2 8026540: f883 203e strb.w r2, [r3, #62] @ 0x3e TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 8026544: 687b ldr r3, [r7, #4] 8026546: 2202 movs r2, #2 8026548: f883 2042 strb.w r2, [r3, #66] @ 0x42 802654c: e031 b.n 80265b2 } } else if (Channel == TIM_CHANNEL_2) 802654e: 683b ldr r3, [r7, #0] 8026550: 2b04 cmp r3, #4 8026552: d110 bne.n 8026576 { if ((channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 8026554: 7bbb ldrb r3, [r7, #14] 8026556: 2b01 cmp r3, #1 8026558: d102 bne.n 8026560 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) 802655a: 7b3b ldrb r3, [r7, #12] 802655c: 2b01 cmp r3, #1 802655e: d001 beq.n 8026564 { return HAL_ERROR; 8026560: 2301 movs r3, #1 8026562: e055 b.n 8026610 } else { TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 8026564: 687b ldr r3, [r7, #4] 8026566: 2202 movs r2, #2 8026568: f883 203f strb.w r2, [r3, #63] @ 0x3f TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 802656c: 687b ldr r3, [r7, #4] 802656e: 2202 movs r2, #2 8026570: f883 2043 strb.w r2, [r3, #67] @ 0x43 8026574: e01d b.n 80265b2 } } else { if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 8026576: 7bfb ldrb r3, [r7, #15] 8026578: 2b01 cmp r3, #1 802657a: d108 bne.n 802658e || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 802657c: 7bbb ldrb r3, [r7, #14] 802657e: 2b01 cmp r3, #1 8026580: d105 bne.n 802658e || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 8026582: 7b7b ldrb r3, [r7, #13] 8026584: 2b01 cmp r3, #1 8026586: d102 bne.n 802658e || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) 8026588: 7b3b ldrb r3, [r7, #12] 802658a: 2b01 cmp r3, #1 802658c: d001 beq.n 8026592 { return HAL_ERROR; 802658e: 2301 movs r3, #1 8026590: e03e b.n 8026610 } else { TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 8026592: 687b ldr r3, [r7, #4] 8026594: 2202 movs r2, #2 8026596: f883 203e strb.w r2, [r3, #62] @ 0x3e TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 802659a: 687b ldr r3, [r7, #4] 802659c: 2202 movs r2, #2 802659e: f883 203f strb.w r2, [r3, #63] @ 0x3f TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 80265a2: 687b ldr r3, [r7, #4] 80265a4: 2202 movs r2, #2 80265a6: f883 2042 strb.w r2, [r3, #66] @ 0x42 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 80265aa: 687b ldr r3, [r7, #4] 80265ac: 2202 movs r2, #2 80265ae: f883 2043 strb.w r2, [r3, #67] @ 0x43 } } /* Enable the encoder interface channels */ switch (Channel) 80265b2: 683b ldr r3, [r7, #0] 80265b4: 2b00 cmp r3, #0 80265b6: d003 beq.n 80265c0 80265b8: 683b ldr r3, [r7, #0] 80265ba: 2b04 cmp r3, #4 80265bc: d008 beq.n 80265d0 80265be: e00f b.n 80265e0 { case TIM_CHANNEL_1: { TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 80265c0: 687b ldr r3, [r7, #4] 80265c2: 681b ldr r3, [r3, #0] 80265c4: 2201 movs r2, #1 80265c6: 2100 movs r1, #0 80265c8: 4618 mov r0, r3 80265ca: f000 fdab bl 8027124 break; 80265ce: e016 b.n 80265fe } case TIM_CHANNEL_2: { TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); 80265d0: 687b ldr r3, [r7, #4] 80265d2: 681b ldr r3, [r3, #0] 80265d4: 2201 movs r2, #1 80265d6: 2104 movs r1, #4 80265d8: 4618 mov r0, r3 80265da: f000 fda3 bl 8027124 break; 80265de: e00e b.n 80265fe } default : { TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 80265e0: 687b ldr r3, [r7, #4] 80265e2: 681b ldr r3, [r3, #0] 80265e4: 2201 movs r2, #1 80265e6: 2100 movs r1, #0 80265e8: 4618 mov r0, r3 80265ea: f000 fd9b bl 8027124 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); 80265ee: 687b ldr r3, [r7, #4] 80265f0: 681b ldr r3, [r3, #0] 80265f2: 2201 movs r2, #1 80265f4: 2104 movs r1, #4 80265f6: 4618 mov r0, r3 80265f8: f000 fd94 bl 8027124 break; 80265fc: bf00 nop } } /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); 80265fe: 687b ldr r3, [r7, #4] 8026600: 681b ldr r3, [r3, #0] 8026602: 681a ldr r2, [r3, #0] 8026604: 687b ldr r3, [r7, #4] 8026606: 681b ldr r3, [r3, #0] 8026608: f042 0201 orr.w r2, r2, #1 802660c: 601a str r2, [r3, #0] /* Return function status */ return HAL_OK; 802660e: 2300 movs r3, #0 } 8026610: 4618 mov r0, r3 8026612: 3710 adds r7, #16 8026614: 46bd mov sp, r7 8026616: bd80 pop {r7, pc} 08026618 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 8026618: b580 push {r7, lr} 802661a: b082 sub sp, #8 802661c: af00 add r7, sp, #0 802661e: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) 8026620: 687b ldr r3, [r7, #4] 8026622: 681b ldr r3, [r3, #0] 8026624: 691b ldr r3, [r3, #16] 8026626: f003 0302 and.w r3, r3, #2 802662a: 2b02 cmp r3, #2 802662c: d122 bne.n 8026674 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) 802662e: 687b ldr r3, [r7, #4] 8026630: 681b ldr r3, [r3, #0] 8026632: 68db ldr r3, [r3, #12] 8026634: f003 0302 and.w r3, r3, #2 8026638: 2b02 cmp r3, #2 802663a: d11b bne.n 8026674 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); 802663c: 687b ldr r3, [r7, #4] 802663e: 681b ldr r3, [r3, #0] 8026640: f06f 0202 mvn.w r2, #2 8026644: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8026646: 687b ldr r3, [r7, #4] 8026648: 2201 movs r2, #1 802664a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 802664c: 687b ldr r3, [r7, #4] 802664e: 681b ldr r3, [r3, #0] 8026650: 699b ldr r3, [r3, #24] 8026652: f003 0303 and.w r3, r3, #3 8026656: 2b00 cmp r3, #0 8026658: d003 beq.n 8026662 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 802665a: 6878 ldr r0, [r7, #4] 802665c: f7f9 f802 bl 801f664 8026660: e005 b.n 802666e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8026662: 6878 ldr r0, [r7, #4] 8026664: f7f9 f826 bl 801f6b4 HAL_TIM_PWM_PulseFinishedCallback(htim); 8026668: 6878 ldr r0, [r7, #4] 802666a: f7f9 f80f bl 801f68c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 802666e: 687b ldr r3, [r7, #4] 8026670: 2200 movs r2, #0 8026672: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) 8026674: 687b ldr r3, [r7, #4] 8026676: 681b ldr r3, [r3, #0] 8026678: 691b ldr r3, [r3, #16] 802667a: f003 0304 and.w r3, r3, #4 802667e: 2b04 cmp r3, #4 8026680: d122 bne.n 80266c8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) 8026682: 687b ldr r3, [r7, #4] 8026684: 681b ldr r3, [r3, #0] 8026686: 68db ldr r3, [r3, #12] 8026688: f003 0304 and.w r3, r3, #4 802668c: 2b04 cmp r3, #4 802668e: d11b bne.n 80266c8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); 8026690: 687b ldr r3, [r7, #4] 8026692: 681b ldr r3, [r3, #0] 8026694: f06f 0204 mvn.w r2, #4 8026698: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 802669a: 687b ldr r3, [r7, #4] 802669c: 2202 movs r2, #2 802669e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 80266a0: 687b ldr r3, [r7, #4] 80266a2: 681b ldr r3, [r3, #0] 80266a4: 699b ldr r3, [r3, #24] 80266a6: f403 7340 and.w r3, r3, #768 @ 0x300 80266aa: 2b00 cmp r3, #0 80266ac: d003 beq.n 80266b6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80266ae: 6878 ldr r0, [r7, #4] 80266b0: f7f8 ffd8 bl 801f664 80266b4: e005 b.n 80266c2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80266b6: 6878 ldr r0, [r7, #4] 80266b8: f7f8 fffc bl 801f6b4 HAL_TIM_PWM_PulseFinishedCallback(htim); 80266bc: 6878 ldr r0, [r7, #4] 80266be: f7f8 ffe5 bl 801f68c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80266c2: 687b ldr r3, [r7, #4] 80266c4: 2200 movs r2, #0 80266c6: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) 80266c8: 687b ldr r3, [r7, #4] 80266ca: 681b ldr r3, [r3, #0] 80266cc: 691b ldr r3, [r3, #16] 80266ce: f003 0308 and.w r3, r3, #8 80266d2: 2b08 cmp r3, #8 80266d4: d122 bne.n 802671c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) 80266d6: 687b ldr r3, [r7, #4] 80266d8: 681b ldr r3, [r3, #0] 80266da: 68db ldr r3, [r3, #12] 80266dc: f003 0308 and.w r3, r3, #8 80266e0: 2b08 cmp r3, #8 80266e2: d11b bne.n 802671c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); 80266e4: 687b ldr r3, [r7, #4] 80266e6: 681b ldr r3, [r3, #0] 80266e8: f06f 0208 mvn.w r2, #8 80266ec: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80266ee: 687b ldr r3, [r7, #4] 80266f0: 2204 movs r2, #4 80266f2: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 80266f4: 687b ldr r3, [r7, #4] 80266f6: 681b ldr r3, [r3, #0] 80266f8: 69db ldr r3, [r3, #28] 80266fa: f003 0303 and.w r3, r3, #3 80266fe: 2b00 cmp r3, #0 8026700: d003 beq.n 802670a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8026702: 6878 ldr r0, [r7, #4] 8026704: f7f8 ffae bl 801f664 8026708: e005 b.n 8026716 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 802670a: 6878 ldr r0, [r7, #4] 802670c: f7f8 ffd2 bl 801f6b4 HAL_TIM_PWM_PulseFinishedCallback(htim); 8026710: 6878 ldr r0, [r7, #4] 8026712: f7f8 ffbb bl 801f68c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8026716: 687b ldr r3, [r7, #4] 8026718: 2200 movs r2, #0 802671a: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) 802671c: 687b ldr r3, [r7, #4] 802671e: 681b ldr r3, [r3, #0] 8026720: 691b ldr r3, [r3, #16] 8026722: f003 0310 and.w r3, r3, #16 8026726: 2b10 cmp r3, #16 8026728: d122 bne.n 8026770 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) 802672a: 687b ldr r3, [r7, #4] 802672c: 681b ldr r3, [r3, #0] 802672e: 68db ldr r3, [r3, #12] 8026730: f003 0310 and.w r3, r3, #16 8026734: 2b10 cmp r3, #16 8026736: d11b bne.n 8026770 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); 8026738: 687b ldr r3, [r7, #4] 802673a: 681b ldr r3, [r3, #0] 802673c: f06f 0210 mvn.w r2, #16 8026740: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8026742: 687b ldr r3, [r7, #4] 8026744: 2208 movs r2, #8 8026746: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 8026748: 687b ldr r3, [r7, #4] 802674a: 681b ldr r3, [r3, #0] 802674c: 69db ldr r3, [r3, #28] 802674e: f403 7340 and.w r3, r3, #768 @ 0x300 8026752: 2b00 cmp r3, #0 8026754: d003 beq.n 802675e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8026756: 6878 ldr r0, [r7, #4] 8026758: f7f8 ff84 bl 801f664 802675c: e005 b.n 802676a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 802675e: 6878 ldr r0, [r7, #4] 8026760: f7f8 ffa8 bl 801f6b4 HAL_TIM_PWM_PulseFinishedCallback(htim); 8026764: 6878 ldr r0, [r7, #4] 8026766: f7f8 ff91 bl 801f68c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 802676a: 687b ldr r3, [r7, #4] 802676c: 2200 movs r2, #0 802676e: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) 8026770: 687b ldr r3, [r7, #4] 8026772: 681b ldr r3, [r3, #0] 8026774: 691b ldr r3, [r3, #16] 8026776: f003 0301 and.w r3, r3, #1 802677a: 2b01 cmp r3, #1 802677c: d10e bne.n 802679c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) 802677e: 687b ldr r3, [r7, #4] 8026780: 681b ldr r3, [r3, #0] 8026782: 68db ldr r3, [r3, #12] 8026784: f003 0301 and.w r3, r3, #1 8026788: 2b01 cmp r3, #1 802678a: d107 bne.n 802679c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); 802678c: 687b ldr r3, [r7, #4] 802678e: 681b ldr r3, [r3, #0] 8026790: f06f 0201 mvn.w r2, #1 8026794: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 8026796: 6878 ldr r0, [r7, #4] 8026798: f7f8 ff6e bl 801f678 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) 802679c: 687b ldr r3, [r7, #4] 802679e: 681b ldr r3, [r3, #0] 80267a0: 691b ldr r3, [r3, #16] 80267a2: f003 0380 and.w r3, r3, #128 @ 0x80 80267a6: 2b80 cmp r3, #128 @ 0x80 80267a8: d10e bne.n 80267c8 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) 80267aa: 687b ldr r3, [r7, #4] 80267ac: 681b ldr r3, [r3, #0] 80267ae: 68db ldr r3, [r3, #12] 80267b0: f003 0380 and.w r3, r3, #128 @ 0x80 80267b4: 2b80 cmp r3, #128 @ 0x80 80267b6: d107 bne.n 80267c8 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); 80267b8: 687b ldr r3, [r7, #4] 80267ba: 681b ldr r3, [r3, #0] 80267bc: f06f 0280 mvn.w r2, #128 @ 0x80 80267c0: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 80267c2: 6878 ldr r0, [r7, #4] 80267c4: f7f8 ff6c bl 801f6a0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) 80267c8: 687b ldr r3, [r7, #4] 80267ca: 681b ldr r3, [r3, #0] 80267cc: 691b ldr r3, [r3, #16] 80267ce: f003 0340 and.w r3, r3, #64 @ 0x40 80267d2: 2b40 cmp r3, #64 @ 0x40 80267d4: d10e bne.n 80267f4 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) 80267d6: 687b ldr r3, [r7, #4] 80267d8: 681b ldr r3, [r3, #0] 80267da: 68db ldr r3, [r3, #12] 80267dc: f003 0340 and.w r3, r3, #64 @ 0x40 80267e0: 2b40 cmp r3, #64 @ 0x40 80267e2: d107 bne.n 80267f4 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); 80267e4: 687b ldr r3, [r7, #4] 80267e6: 681b ldr r3, [r3, #0] 80267e8: f06f 0240 mvn.w r2, #64 @ 0x40 80267ec: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80267ee: 6878 ldr r0, [r7, #4] 80267f0: f000 f9a3 bl 8026b3a #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) 80267f4: 687b ldr r3, [r7, #4] 80267f6: 681b ldr r3, [r3, #0] 80267f8: 691b ldr r3, [r3, #16] 80267fa: f003 0320 and.w r3, r3, #32 80267fe: 2b20 cmp r3, #32 8026800: d10e bne.n 8026820 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) 8026802: 687b ldr r3, [r7, #4] 8026804: 681b ldr r3, [r3, #0] 8026806: 68db ldr r3, [r3, #12] 8026808: f003 0320 and.w r3, r3, #32 802680c: 2b20 cmp r3, #32 802680e: d107 bne.n 8026820 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); 8026810: 687b ldr r3, [r7, #4] 8026812: 681b ldr r3, [r3, #0] 8026814: f06f 0220 mvn.w r2, #32 8026818: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 802681a: 6878 ldr r0, [r7, #4] 802681c: f000 fe68 bl 80274f0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 8026820: bf00 nop 8026822: 3708 adds r7, #8 8026824: 46bd mov sp, r7 8026826: bd80 pop {r7, pc} 08026828 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8026828: b580 push {r7, lr} 802682a: b086 sub sp, #24 802682c: af00 add r7, sp, #0 802682e: 60f8 str r0, [r7, #12] 8026830: 60b9 str r1, [r7, #8] 8026832: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8026834: 2300 movs r3, #0 8026836: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8026838: 68fb ldr r3, [r7, #12] 802683a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 802683e: 2b01 cmp r3, #1 8026840: d101 bne.n 8026846 8026842: 2302 movs r3, #2 8026844: e0ae b.n 80269a4 8026846: 68fb ldr r3, [r7, #12] 8026848: 2201 movs r2, #1 802684a: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 802684e: 687b ldr r3, [r7, #4] 8026850: 2b0c cmp r3, #12 8026852: f200 809f bhi.w 8026994 8026856: a201 add r2, pc, #4 @ (adr r2, 802685c ) 8026858: f852 f023 ldr.w pc, [r2, r3, lsl #2] 802685c: 08026891 .word 0x08026891 8026860: 08026995 .word 0x08026995 8026864: 08026995 .word 0x08026995 8026868: 08026995 .word 0x08026995 802686c: 080268d1 .word 0x080268d1 8026870: 08026995 .word 0x08026995 8026874: 08026995 .word 0x08026995 8026878: 08026995 .word 0x08026995 802687c: 08026913 .word 0x08026913 8026880: 08026995 .word 0x08026995 8026884: 08026995 .word 0x08026995 8026888: 08026995 .word 0x08026995 802688c: 08026953 .word 0x08026953 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8026890: 68fb ldr r3, [r7, #12] 8026892: 681b ldr r3, [r3, #0] 8026894: 68b9 ldr r1, [r7, #8] 8026896: 4618 mov r0, r3 8026898: f000 f9fa bl 8026c90 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 802689c: 68fb ldr r3, [r7, #12] 802689e: 681b ldr r3, [r3, #0] 80268a0: 699a ldr r2, [r3, #24] 80268a2: 68fb ldr r3, [r7, #12] 80268a4: 681b ldr r3, [r3, #0] 80268a6: f042 0208 orr.w r2, r2, #8 80268aa: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 80268ac: 68fb ldr r3, [r7, #12] 80268ae: 681b ldr r3, [r3, #0] 80268b0: 699a ldr r2, [r3, #24] 80268b2: 68fb ldr r3, [r7, #12] 80268b4: 681b ldr r3, [r3, #0] 80268b6: f022 0204 bic.w r2, r2, #4 80268ba: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 80268bc: 68fb ldr r3, [r7, #12] 80268be: 681b ldr r3, [r3, #0] 80268c0: 6999 ldr r1, [r3, #24] 80268c2: 68bb ldr r3, [r7, #8] 80268c4: 691a ldr r2, [r3, #16] 80268c6: 68fb ldr r3, [r7, #12] 80268c8: 681b ldr r3, [r3, #0] 80268ca: 430a orrs r2, r1 80268cc: 619a str r2, [r3, #24] break; 80268ce: e064 b.n 802699a { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 80268d0: 68fb ldr r3, [r7, #12] 80268d2: 681b ldr r3, [r3, #0] 80268d4: 68b9 ldr r1, [r7, #8] 80268d6: 4618 mov r0, r3 80268d8: f000 fa4a bl 8026d70 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 80268dc: 68fb ldr r3, [r7, #12] 80268de: 681b ldr r3, [r3, #0] 80268e0: 699a ldr r2, [r3, #24] 80268e2: 68fb ldr r3, [r7, #12] 80268e4: 681b ldr r3, [r3, #0] 80268e6: f442 6200 orr.w r2, r2, #2048 @ 0x800 80268ea: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 80268ec: 68fb ldr r3, [r7, #12] 80268ee: 681b ldr r3, [r3, #0] 80268f0: 699a ldr r2, [r3, #24] 80268f2: 68fb ldr r3, [r7, #12] 80268f4: 681b ldr r3, [r3, #0] 80268f6: f422 6280 bic.w r2, r2, #1024 @ 0x400 80268fa: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 80268fc: 68fb ldr r3, [r7, #12] 80268fe: 681b ldr r3, [r3, #0] 8026900: 6999 ldr r1, [r3, #24] 8026902: 68bb ldr r3, [r7, #8] 8026904: 691b ldr r3, [r3, #16] 8026906: 021a lsls r2, r3, #8 8026908: 68fb ldr r3, [r7, #12] 802690a: 681b ldr r3, [r3, #0] 802690c: 430a orrs r2, r1 802690e: 619a str r2, [r3, #24] break; 8026910: e043 b.n 802699a { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8026912: 68fb ldr r3, [r7, #12] 8026914: 681b ldr r3, [r3, #0] 8026916: 68b9 ldr r1, [r7, #8] 8026918: 4618 mov r0, r3 802691a: f000 fa9f bl 8026e5c /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 802691e: 68fb ldr r3, [r7, #12] 8026920: 681b ldr r3, [r3, #0] 8026922: 69da ldr r2, [r3, #28] 8026924: 68fb ldr r3, [r7, #12] 8026926: 681b ldr r3, [r3, #0] 8026928: f042 0208 orr.w r2, r2, #8 802692c: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 802692e: 68fb ldr r3, [r7, #12] 8026930: 681b ldr r3, [r3, #0] 8026932: 69da ldr r2, [r3, #28] 8026934: 68fb ldr r3, [r7, #12] 8026936: 681b ldr r3, [r3, #0] 8026938: f022 0204 bic.w r2, r2, #4 802693c: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 802693e: 68fb ldr r3, [r7, #12] 8026940: 681b ldr r3, [r3, #0] 8026942: 69d9 ldr r1, [r3, #28] 8026944: 68bb ldr r3, [r7, #8] 8026946: 691a ldr r2, [r3, #16] 8026948: 68fb ldr r3, [r7, #12] 802694a: 681b ldr r3, [r3, #0] 802694c: 430a orrs r2, r1 802694e: 61da str r2, [r3, #28] break; 8026950: e023 b.n 802699a { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8026952: 68fb ldr r3, [r7, #12] 8026954: 681b ldr r3, [r3, #0] 8026956: 68b9 ldr r1, [r7, #8] 8026958: 4618 mov r0, r3 802695a: f000 faf3 bl 8026f44 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 802695e: 68fb ldr r3, [r7, #12] 8026960: 681b ldr r3, [r3, #0] 8026962: 69da ldr r2, [r3, #28] 8026964: 68fb ldr r3, [r7, #12] 8026966: 681b ldr r3, [r3, #0] 8026968: f442 6200 orr.w r2, r2, #2048 @ 0x800 802696c: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 802696e: 68fb ldr r3, [r7, #12] 8026970: 681b ldr r3, [r3, #0] 8026972: 69da ldr r2, [r3, #28] 8026974: 68fb ldr r3, [r7, #12] 8026976: 681b ldr r3, [r3, #0] 8026978: f422 6280 bic.w r2, r2, #1024 @ 0x400 802697c: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 802697e: 68fb ldr r3, [r7, #12] 8026980: 681b ldr r3, [r3, #0] 8026982: 69d9 ldr r1, [r3, #28] 8026984: 68bb ldr r3, [r7, #8] 8026986: 691b ldr r3, [r3, #16] 8026988: 021a lsls r2, r3, #8 802698a: 68fb ldr r3, [r7, #12] 802698c: 681b ldr r3, [r3, #0] 802698e: 430a orrs r2, r1 8026990: 61da str r2, [r3, #28] break; 8026992: e002 b.n 802699a } default: status = HAL_ERROR; 8026994: 2301 movs r3, #1 8026996: 75fb strb r3, [r7, #23] break; 8026998: bf00 nop } __HAL_UNLOCK(htim); 802699a: 68fb ldr r3, [r7, #12] 802699c: 2200 movs r2, #0 802699e: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80269a2: 7dfb ldrb r3, [r7, #23] } 80269a4: 4618 mov r0, r3 80269a6: 3718 adds r7, #24 80269a8: 46bd mov sp, r7 80269aa: bd80 pop {r7, pc} 080269ac : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) { 80269ac: b580 push {r7, lr} 80269ae: b084 sub sp, #16 80269b0: af00 add r7, sp, #0 80269b2: 6078 str r0, [r7, #4] 80269b4: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 80269b6: 2300 movs r3, #0 80269b8: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 80269ba: 687b ldr r3, [r7, #4] 80269bc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80269c0: 2b01 cmp r3, #1 80269c2: d101 bne.n 80269c8 80269c4: 2302 movs r3, #2 80269c6: e0b4 b.n 8026b32 80269c8: 687b ldr r3, [r7, #4] 80269ca: 2201 movs r2, #1 80269cc: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 80269d0: 687b ldr r3, [r7, #4] 80269d2: 2202 movs r2, #2 80269d4: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 80269d8: 687b ldr r3, [r7, #4] 80269da: 681b ldr r3, [r3, #0] 80269dc: 689b ldr r3, [r3, #8] 80269de: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 80269e0: 68bb ldr r3, [r7, #8] 80269e2: f023 0377 bic.w r3, r3, #119 @ 0x77 80269e6: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80269e8: 68bb ldr r3, [r7, #8] 80269ea: f423 437f bic.w r3, r3, #65280 @ 0xff00 80269ee: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 80269f0: 687b ldr r3, [r7, #4] 80269f2: 681b ldr r3, [r3, #0] 80269f4: 68ba ldr r2, [r7, #8] 80269f6: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 80269f8: 683b ldr r3, [r7, #0] 80269fa: 681b ldr r3, [r3, #0] 80269fc: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8026a00: d03e beq.n 8026a80 8026a02: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8026a06: f200 8087 bhi.w 8026b18 8026a0a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8026a0e: f000 8086 beq.w 8026b1e 8026a12: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8026a16: d87f bhi.n 8026b18 8026a18: 2b70 cmp r3, #112 @ 0x70 8026a1a: d01a beq.n 8026a52 8026a1c: 2b70 cmp r3, #112 @ 0x70 8026a1e: d87b bhi.n 8026b18 8026a20: 2b60 cmp r3, #96 @ 0x60 8026a22: d050 beq.n 8026ac6 8026a24: 2b60 cmp r3, #96 @ 0x60 8026a26: d877 bhi.n 8026b18 8026a28: 2b50 cmp r3, #80 @ 0x50 8026a2a: d03c beq.n 8026aa6 8026a2c: 2b50 cmp r3, #80 @ 0x50 8026a2e: d873 bhi.n 8026b18 8026a30: 2b40 cmp r3, #64 @ 0x40 8026a32: d058 beq.n 8026ae6 8026a34: 2b40 cmp r3, #64 @ 0x40 8026a36: d86f bhi.n 8026b18 8026a38: 2b30 cmp r3, #48 @ 0x30 8026a3a: d064 beq.n 8026b06 8026a3c: 2b30 cmp r3, #48 @ 0x30 8026a3e: d86b bhi.n 8026b18 8026a40: 2b20 cmp r3, #32 8026a42: d060 beq.n 8026b06 8026a44: 2b20 cmp r3, #32 8026a46: d867 bhi.n 8026b18 8026a48: 2b00 cmp r3, #0 8026a4a: d05c beq.n 8026b06 8026a4c: 2b10 cmp r3, #16 8026a4e: d05a beq.n 8026b06 8026a50: e062 b.n 8026b18 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8026a52: 687b ldr r3, [r7, #4] 8026a54: 6818 ldr r0, [r3, #0] 8026a56: 683b ldr r3, [r7, #0] 8026a58: 6899 ldr r1, [r3, #8] 8026a5a: 683b ldr r3, [r7, #0] 8026a5c: 685a ldr r2, [r3, #4] 8026a5e: 683b ldr r3, [r7, #0] 8026a60: 68db ldr r3, [r3, #12] 8026a62: f000 fb3f bl 80270e4 sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 8026a66: 687b ldr r3, [r7, #4] 8026a68: 681b ldr r3, [r3, #0] 8026a6a: 689b ldr r3, [r3, #8] 8026a6c: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8026a6e: 68bb ldr r3, [r7, #8] 8026a70: f043 0377 orr.w r3, r3, #119 @ 0x77 8026a74: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8026a76: 687b ldr r3, [r7, #4] 8026a78: 681b ldr r3, [r3, #0] 8026a7a: 68ba ldr r2, [r7, #8] 8026a7c: 609a str r2, [r3, #8] break; 8026a7e: e04f b.n 8026b20 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8026a80: 687b ldr r3, [r7, #4] 8026a82: 6818 ldr r0, [r3, #0] 8026a84: 683b ldr r3, [r7, #0] 8026a86: 6899 ldr r1, [r3, #8] 8026a88: 683b ldr r3, [r7, #0] 8026a8a: 685a ldr r2, [r3, #4] 8026a8c: 683b ldr r3, [r7, #0] 8026a8e: 68db ldr r3, [r3, #12] 8026a90: f000 fb28 bl 80270e4 sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8026a94: 687b ldr r3, [r7, #4] 8026a96: 681b ldr r3, [r3, #0] 8026a98: 689a ldr r2, [r3, #8] 8026a9a: 687b ldr r3, [r7, #4] 8026a9c: 681b ldr r3, [r3, #0] 8026a9e: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8026aa2: 609a str r2, [r3, #8] break; 8026aa4: e03c b.n 8026b20 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8026aa6: 687b ldr r3, [r7, #4] 8026aa8: 6818 ldr r0, [r3, #0] 8026aaa: 683b ldr r3, [r7, #0] 8026aac: 6859 ldr r1, [r3, #4] 8026aae: 683b ldr r3, [r7, #0] 8026ab0: 68db ldr r3, [r3, #12] 8026ab2: 461a mov r2, r3 8026ab4: f000 fa9c bl 8026ff0 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 8026ab8: 687b ldr r3, [r7, #4] 8026aba: 681b ldr r3, [r3, #0] 8026abc: 2150 movs r1, #80 @ 0x50 8026abe: 4618 mov r0, r3 8026ac0: f000 faf5 bl 80270ae break; 8026ac4: e02c b.n 8026b20 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 8026ac6: 687b ldr r3, [r7, #4] 8026ac8: 6818 ldr r0, [r3, #0] 8026aca: 683b ldr r3, [r7, #0] 8026acc: 6859 ldr r1, [r3, #4] 8026ace: 683b ldr r3, [r7, #0] 8026ad0: 68db ldr r3, [r3, #12] 8026ad2: 461a mov r2, r3 8026ad4: f000 fabb bl 802704e sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 8026ad8: 687b ldr r3, [r7, #4] 8026ada: 681b ldr r3, [r3, #0] 8026adc: 2160 movs r1, #96 @ 0x60 8026ade: 4618 mov r0, r3 8026ae0: f000 fae5 bl 80270ae break; 8026ae4: e01c b.n 8026b20 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8026ae6: 687b ldr r3, [r7, #4] 8026ae8: 6818 ldr r0, [r3, #0] 8026aea: 683b ldr r3, [r7, #0] 8026aec: 6859 ldr r1, [r3, #4] 8026aee: 683b ldr r3, [r7, #0] 8026af0: 68db ldr r3, [r3, #12] 8026af2: 461a mov r2, r3 8026af4: f000 fa7c bl 8026ff0 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 8026af8: 687b ldr r3, [r7, #4] 8026afa: 681b ldr r3, [r3, #0] 8026afc: 2140 movs r1, #64 @ 0x40 8026afe: 4618 mov r0, r3 8026b00: f000 fad5 bl 80270ae break; 8026b04: e00c b.n 8026b20 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 8026b06: 687b ldr r3, [r7, #4] 8026b08: 681a ldr r2, [r3, #0] 8026b0a: 683b ldr r3, [r7, #0] 8026b0c: 681b ldr r3, [r3, #0] 8026b0e: 4619 mov r1, r3 8026b10: 4610 mov r0, r2 8026b12: f000 facc bl 80270ae break; 8026b16: e003 b.n 8026b20 } default: status = HAL_ERROR; 8026b18: 2301 movs r3, #1 8026b1a: 73fb strb r3, [r7, #15] break; 8026b1c: e000 b.n 8026b20 break; 8026b1e: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8026b20: 687b ldr r3, [r7, #4] 8026b22: 2201 movs r2, #1 8026b24: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8026b28: 687b ldr r3, [r7, #4] 8026b2a: 2200 movs r2, #0 8026b2c: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8026b30: 7bfb ldrb r3, [r7, #15] } 8026b32: 4618 mov r0, r3 8026b34: 3710 adds r7, #16 8026b36: 46bd mov sp, r7 8026b38: bd80 pop {r7, pc} 08026b3a : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 8026b3a: b480 push {r7} 8026b3c: b083 sub sp, #12 8026b3e: af00 add r7, sp, #0 8026b40: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 8026b42: bf00 nop 8026b44: 370c adds r7, #12 8026b46: 46bd mov sp, r7 8026b48: f85d 7b04 ldr.w r7, [sp], #4 8026b4c: 4770 bx lr ... 08026b50 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { 8026b50: b480 push {r7} 8026b52: b085 sub sp, #20 8026b54: af00 add r7, sp, #0 8026b56: 6078 str r0, [r7, #4] 8026b58: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8026b5a: 687b ldr r3, [r7, #4] 8026b5c: 681b ldr r3, [r3, #0] 8026b5e: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8026b60: 687b ldr r3, [r7, #4] 8026b62: 4a40 ldr r2, [pc, #256] @ (8026c64 ) 8026b64: 4293 cmp r3, r2 8026b66: d013 beq.n 8026b90 8026b68: 687b ldr r3, [r7, #4] 8026b6a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8026b6e: d00f beq.n 8026b90 8026b70: 687b ldr r3, [r7, #4] 8026b72: 4a3d ldr r2, [pc, #244] @ (8026c68 ) 8026b74: 4293 cmp r3, r2 8026b76: d00b beq.n 8026b90 8026b78: 687b ldr r3, [r7, #4] 8026b7a: 4a3c ldr r2, [pc, #240] @ (8026c6c ) 8026b7c: 4293 cmp r3, r2 8026b7e: d007 beq.n 8026b90 8026b80: 687b ldr r3, [r7, #4] 8026b82: 4a3b ldr r2, [pc, #236] @ (8026c70 ) 8026b84: 4293 cmp r3, r2 8026b86: d003 beq.n 8026b90 8026b88: 687b ldr r3, [r7, #4] 8026b8a: 4a3a ldr r2, [pc, #232] @ (8026c74 ) 8026b8c: 4293 cmp r3, r2 8026b8e: d108 bne.n 8026ba2 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8026b90: 68fb ldr r3, [r7, #12] 8026b92: f023 0370 bic.w r3, r3, #112 @ 0x70 8026b96: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8026b98: 683b ldr r3, [r7, #0] 8026b9a: 685b ldr r3, [r3, #4] 8026b9c: 68fa ldr r2, [r7, #12] 8026b9e: 4313 orrs r3, r2 8026ba0: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8026ba2: 687b ldr r3, [r7, #4] 8026ba4: 4a2f ldr r2, [pc, #188] @ (8026c64 ) 8026ba6: 4293 cmp r3, r2 8026ba8: d02b beq.n 8026c02 8026baa: 687b ldr r3, [r7, #4] 8026bac: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8026bb0: d027 beq.n 8026c02 8026bb2: 687b ldr r3, [r7, #4] 8026bb4: 4a2c ldr r2, [pc, #176] @ (8026c68 ) 8026bb6: 4293 cmp r3, r2 8026bb8: d023 beq.n 8026c02 8026bba: 687b ldr r3, [r7, #4] 8026bbc: 4a2b ldr r2, [pc, #172] @ (8026c6c ) 8026bbe: 4293 cmp r3, r2 8026bc0: d01f beq.n 8026c02 8026bc2: 687b ldr r3, [r7, #4] 8026bc4: 4a2a ldr r2, [pc, #168] @ (8026c70 ) 8026bc6: 4293 cmp r3, r2 8026bc8: d01b beq.n 8026c02 8026bca: 687b ldr r3, [r7, #4] 8026bcc: 4a29 ldr r2, [pc, #164] @ (8026c74 ) 8026bce: 4293 cmp r3, r2 8026bd0: d017 beq.n 8026c02 8026bd2: 687b ldr r3, [r7, #4] 8026bd4: 4a28 ldr r2, [pc, #160] @ (8026c78 ) 8026bd6: 4293 cmp r3, r2 8026bd8: d013 beq.n 8026c02 8026bda: 687b ldr r3, [r7, #4] 8026bdc: 4a27 ldr r2, [pc, #156] @ (8026c7c ) 8026bde: 4293 cmp r3, r2 8026be0: d00f beq.n 8026c02 8026be2: 687b ldr r3, [r7, #4] 8026be4: 4a26 ldr r2, [pc, #152] @ (8026c80 ) 8026be6: 4293 cmp r3, r2 8026be8: d00b beq.n 8026c02 8026bea: 687b ldr r3, [r7, #4] 8026bec: 4a25 ldr r2, [pc, #148] @ (8026c84 ) 8026bee: 4293 cmp r3, r2 8026bf0: d007 beq.n 8026c02 8026bf2: 687b ldr r3, [r7, #4] 8026bf4: 4a24 ldr r2, [pc, #144] @ (8026c88 ) 8026bf6: 4293 cmp r3, r2 8026bf8: d003 beq.n 8026c02 8026bfa: 687b ldr r3, [r7, #4] 8026bfc: 4a23 ldr r2, [pc, #140] @ (8026c8c ) 8026bfe: 4293 cmp r3, r2 8026c00: d108 bne.n 8026c14 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8026c02: 68fb ldr r3, [r7, #12] 8026c04: f423 7340 bic.w r3, r3, #768 @ 0x300 8026c08: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 8026c0a: 683b ldr r3, [r7, #0] 8026c0c: 68db ldr r3, [r3, #12] 8026c0e: 68fa ldr r2, [r7, #12] 8026c10: 4313 orrs r3, r2 8026c12: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8026c14: 68fb ldr r3, [r7, #12] 8026c16: f023 0280 bic.w r2, r3, #128 @ 0x80 8026c1a: 683b ldr r3, [r7, #0] 8026c1c: 695b ldr r3, [r3, #20] 8026c1e: 4313 orrs r3, r2 8026c20: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 8026c22: 687b ldr r3, [r7, #4] 8026c24: 68fa ldr r2, [r7, #12] 8026c26: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8026c28: 683b ldr r3, [r7, #0] 8026c2a: 689a ldr r2, [r3, #8] 8026c2c: 687b ldr r3, [r7, #4] 8026c2e: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8026c30: 683b ldr r3, [r7, #0] 8026c32: 681a ldr r2, [r3, #0] 8026c34: 687b ldr r3, [r7, #4] 8026c36: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8026c38: 687b ldr r3, [r7, #4] 8026c3a: 4a0a ldr r2, [pc, #40] @ (8026c64 ) 8026c3c: 4293 cmp r3, r2 8026c3e: d003 beq.n 8026c48 8026c40: 687b ldr r3, [r7, #4] 8026c42: 4a0c ldr r2, [pc, #48] @ (8026c74 ) 8026c44: 4293 cmp r3, r2 8026c46: d103 bne.n 8026c50 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8026c48: 683b ldr r3, [r7, #0] 8026c4a: 691a ldr r2, [r3, #16] 8026c4c: 687b ldr r3, [r7, #4] 8026c4e: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8026c50: 687b ldr r3, [r7, #4] 8026c52: 2201 movs r2, #1 8026c54: 615a str r2, [r3, #20] } 8026c56: bf00 nop 8026c58: 3714 adds r7, #20 8026c5a: 46bd mov sp, r7 8026c5c: f85d 7b04 ldr.w r7, [sp], #4 8026c60: 4770 bx lr 8026c62: bf00 nop 8026c64: 40010000 .word 0x40010000 8026c68: 40000400 .word 0x40000400 8026c6c: 40000800 .word 0x40000800 8026c70: 40000c00 .word 0x40000c00 8026c74: 40010400 .word 0x40010400 8026c78: 40014000 .word 0x40014000 8026c7c: 40014400 .word 0x40014400 8026c80: 40014800 .word 0x40014800 8026c84: 40001800 .word 0x40001800 8026c88: 40001c00 .word 0x40001c00 8026c8c: 40002000 .word 0x40002000 08026c90 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8026c90: b480 push {r7} 8026c92: b087 sub sp, #28 8026c94: af00 add r7, sp, #0 8026c96: 6078 str r0, [r7, #4] 8026c98: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8026c9a: 687b ldr r3, [r7, #4] 8026c9c: 6a1b ldr r3, [r3, #32] 8026c9e: f023 0201 bic.w r2, r3, #1 8026ca2: 687b ldr r3, [r7, #4] 8026ca4: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8026ca6: 687b ldr r3, [r7, #4] 8026ca8: 6a1b ldr r3, [r3, #32] 8026caa: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8026cac: 687b ldr r3, [r7, #4] 8026cae: 685b ldr r3, [r3, #4] 8026cb0: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8026cb2: 687b ldr r3, [r7, #4] 8026cb4: 699b ldr r3, [r3, #24] 8026cb6: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8026cb8: 68fb ldr r3, [r7, #12] 8026cba: f023 0370 bic.w r3, r3, #112 @ 0x70 8026cbe: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8026cc0: 68fb ldr r3, [r7, #12] 8026cc2: f023 0303 bic.w r3, r3, #3 8026cc6: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8026cc8: 683b ldr r3, [r7, #0] 8026cca: 681b ldr r3, [r3, #0] 8026ccc: 68fa ldr r2, [r7, #12] 8026cce: 4313 orrs r3, r2 8026cd0: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 8026cd2: 697b ldr r3, [r7, #20] 8026cd4: f023 0302 bic.w r3, r3, #2 8026cd8: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 8026cda: 683b ldr r3, [r7, #0] 8026cdc: 689b ldr r3, [r3, #8] 8026cde: 697a ldr r2, [r7, #20] 8026ce0: 4313 orrs r3, r2 8026ce2: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8026ce4: 687b ldr r3, [r7, #4] 8026ce6: 4a20 ldr r2, [pc, #128] @ (8026d68 ) 8026ce8: 4293 cmp r3, r2 8026cea: d003 beq.n 8026cf4 8026cec: 687b ldr r3, [r7, #4] 8026cee: 4a1f ldr r2, [pc, #124] @ (8026d6c ) 8026cf0: 4293 cmp r3, r2 8026cf2: d10c bne.n 8026d0e { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8026cf4: 697b ldr r3, [r7, #20] 8026cf6: f023 0308 bic.w r3, r3, #8 8026cfa: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8026cfc: 683b ldr r3, [r7, #0] 8026cfe: 68db ldr r3, [r3, #12] 8026d00: 697a ldr r2, [r7, #20] 8026d02: 4313 orrs r3, r2 8026d04: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 8026d06: 697b ldr r3, [r7, #20] 8026d08: f023 0304 bic.w r3, r3, #4 8026d0c: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8026d0e: 687b ldr r3, [r7, #4] 8026d10: 4a15 ldr r2, [pc, #84] @ (8026d68 ) 8026d12: 4293 cmp r3, r2 8026d14: d003 beq.n 8026d1e 8026d16: 687b ldr r3, [r7, #4] 8026d18: 4a14 ldr r2, [pc, #80] @ (8026d6c ) 8026d1a: 4293 cmp r3, r2 8026d1c: d111 bne.n 8026d42 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 8026d1e: 693b ldr r3, [r7, #16] 8026d20: f423 7380 bic.w r3, r3, #256 @ 0x100 8026d24: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 8026d26: 693b ldr r3, [r7, #16] 8026d28: f423 7300 bic.w r3, r3, #512 @ 0x200 8026d2c: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 8026d2e: 683b ldr r3, [r7, #0] 8026d30: 695b ldr r3, [r3, #20] 8026d32: 693a ldr r2, [r7, #16] 8026d34: 4313 orrs r3, r2 8026d36: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8026d38: 683b ldr r3, [r7, #0] 8026d3a: 699b ldr r3, [r3, #24] 8026d3c: 693a ldr r2, [r7, #16] 8026d3e: 4313 orrs r3, r2 8026d40: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8026d42: 687b ldr r3, [r7, #4] 8026d44: 693a ldr r2, [r7, #16] 8026d46: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8026d48: 687b ldr r3, [r7, #4] 8026d4a: 68fa ldr r2, [r7, #12] 8026d4c: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 8026d4e: 683b ldr r3, [r7, #0] 8026d50: 685a ldr r2, [r3, #4] 8026d52: 687b ldr r3, [r7, #4] 8026d54: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8026d56: 687b ldr r3, [r7, #4] 8026d58: 697a ldr r2, [r7, #20] 8026d5a: 621a str r2, [r3, #32] } 8026d5c: bf00 nop 8026d5e: 371c adds r7, #28 8026d60: 46bd mov sp, r7 8026d62: f85d 7b04 ldr.w r7, [sp], #4 8026d66: 4770 bx lr 8026d68: 40010000 .word 0x40010000 8026d6c: 40010400 .word 0x40010400 08026d70 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8026d70: b480 push {r7} 8026d72: b087 sub sp, #28 8026d74: af00 add r7, sp, #0 8026d76: 6078 str r0, [r7, #4] 8026d78: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8026d7a: 687b ldr r3, [r7, #4] 8026d7c: 6a1b ldr r3, [r3, #32] 8026d7e: f023 0210 bic.w r2, r3, #16 8026d82: 687b ldr r3, [r7, #4] 8026d84: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8026d86: 687b ldr r3, [r7, #4] 8026d88: 6a1b ldr r3, [r3, #32] 8026d8a: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8026d8c: 687b ldr r3, [r7, #4] 8026d8e: 685b ldr r3, [r3, #4] 8026d90: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8026d92: 687b ldr r3, [r7, #4] 8026d94: 699b ldr r3, [r3, #24] 8026d96: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8026d98: 68fb ldr r3, [r7, #12] 8026d9a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8026d9e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8026da0: 68fb ldr r3, [r7, #12] 8026da2: f423 7340 bic.w r3, r3, #768 @ 0x300 8026da6: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8026da8: 683b ldr r3, [r7, #0] 8026daa: 681b ldr r3, [r3, #0] 8026dac: 021b lsls r3, r3, #8 8026dae: 68fa ldr r2, [r7, #12] 8026db0: 4313 orrs r3, r2 8026db2: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8026db4: 697b ldr r3, [r7, #20] 8026db6: f023 0320 bic.w r3, r3, #32 8026dba: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 8026dbc: 683b ldr r3, [r7, #0] 8026dbe: 689b ldr r3, [r3, #8] 8026dc0: 011b lsls r3, r3, #4 8026dc2: 697a ldr r2, [r7, #20] 8026dc4: 4313 orrs r3, r2 8026dc6: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8026dc8: 687b ldr r3, [r7, #4] 8026dca: 4a22 ldr r2, [pc, #136] @ (8026e54 ) 8026dcc: 4293 cmp r3, r2 8026dce: d003 beq.n 8026dd8 8026dd0: 687b ldr r3, [r7, #4] 8026dd2: 4a21 ldr r2, [pc, #132] @ (8026e58 ) 8026dd4: 4293 cmp r3, r2 8026dd6: d10d bne.n 8026df4 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8026dd8: 697b ldr r3, [r7, #20] 8026dda: f023 0380 bic.w r3, r3, #128 @ 0x80 8026dde: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8026de0: 683b ldr r3, [r7, #0] 8026de2: 68db ldr r3, [r3, #12] 8026de4: 011b lsls r3, r3, #4 8026de6: 697a ldr r2, [r7, #20] 8026de8: 4313 orrs r3, r2 8026dea: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8026dec: 697b ldr r3, [r7, #20] 8026dee: f023 0340 bic.w r3, r3, #64 @ 0x40 8026df2: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8026df4: 687b ldr r3, [r7, #4] 8026df6: 4a17 ldr r2, [pc, #92] @ (8026e54 ) 8026df8: 4293 cmp r3, r2 8026dfa: d003 beq.n 8026e04 8026dfc: 687b ldr r3, [r7, #4] 8026dfe: 4a16 ldr r2, [pc, #88] @ (8026e58 ) 8026e00: 4293 cmp r3, r2 8026e02: d113 bne.n 8026e2c /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8026e04: 693b ldr r3, [r7, #16] 8026e06: f423 6380 bic.w r3, r3, #1024 @ 0x400 8026e0a: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8026e0c: 693b ldr r3, [r7, #16] 8026e0e: f423 6300 bic.w r3, r3, #2048 @ 0x800 8026e12: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8026e14: 683b ldr r3, [r7, #0] 8026e16: 695b ldr r3, [r3, #20] 8026e18: 009b lsls r3, r3, #2 8026e1a: 693a ldr r2, [r7, #16] 8026e1c: 4313 orrs r3, r2 8026e1e: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 8026e20: 683b ldr r3, [r7, #0] 8026e22: 699b ldr r3, [r3, #24] 8026e24: 009b lsls r3, r3, #2 8026e26: 693a ldr r2, [r7, #16] 8026e28: 4313 orrs r3, r2 8026e2a: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8026e2c: 687b ldr r3, [r7, #4] 8026e2e: 693a ldr r2, [r7, #16] 8026e30: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8026e32: 687b ldr r3, [r7, #4] 8026e34: 68fa ldr r2, [r7, #12] 8026e36: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8026e38: 683b ldr r3, [r7, #0] 8026e3a: 685a ldr r2, [r3, #4] 8026e3c: 687b ldr r3, [r7, #4] 8026e3e: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8026e40: 687b ldr r3, [r7, #4] 8026e42: 697a ldr r2, [r7, #20] 8026e44: 621a str r2, [r3, #32] } 8026e46: bf00 nop 8026e48: 371c adds r7, #28 8026e4a: 46bd mov sp, r7 8026e4c: f85d 7b04 ldr.w r7, [sp], #4 8026e50: 4770 bx lr 8026e52: bf00 nop 8026e54: 40010000 .word 0x40010000 8026e58: 40010400 .word 0x40010400 08026e5c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8026e5c: b480 push {r7} 8026e5e: b087 sub sp, #28 8026e60: af00 add r7, sp, #0 8026e62: 6078 str r0, [r7, #4] 8026e64: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8026e66: 687b ldr r3, [r7, #4] 8026e68: 6a1b ldr r3, [r3, #32] 8026e6a: f423 7280 bic.w r2, r3, #256 @ 0x100 8026e6e: 687b ldr r3, [r7, #4] 8026e70: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8026e72: 687b ldr r3, [r7, #4] 8026e74: 6a1b ldr r3, [r3, #32] 8026e76: 617b str r3, [r7, #20] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8026e78: 687b ldr r3, [r7, #4] 8026e7a: 685b ldr r3, [r3, #4] 8026e7c: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8026e7e: 687b ldr r3, [r7, #4] 8026e80: 69db ldr r3, [r3, #28] 8026e82: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8026e84: 68fb ldr r3, [r7, #12] 8026e86: f023 0370 bic.w r3, r3, #112 @ 0x70 8026e8a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8026e8c: 68fb ldr r3, [r7, #12] 8026e8e: f023 0303 bic.w r3, r3, #3 8026e92: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8026e94: 683b ldr r3, [r7, #0] 8026e96: 681b ldr r3, [r3, #0] 8026e98: 68fa ldr r2, [r7, #12] 8026e9a: 4313 orrs r3, r2 8026e9c: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8026e9e: 697b ldr r3, [r7, #20] 8026ea0: f423 7300 bic.w r3, r3, #512 @ 0x200 8026ea4: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 8026ea6: 683b ldr r3, [r7, #0] 8026ea8: 689b ldr r3, [r3, #8] 8026eaa: 021b lsls r3, r3, #8 8026eac: 697a ldr r2, [r7, #20] 8026eae: 4313 orrs r3, r2 8026eb0: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8026eb2: 687b ldr r3, [r7, #4] 8026eb4: 4a21 ldr r2, [pc, #132] @ (8026f3c ) 8026eb6: 4293 cmp r3, r2 8026eb8: d003 beq.n 8026ec2 8026eba: 687b ldr r3, [r7, #4] 8026ebc: 4a20 ldr r2, [pc, #128] @ (8026f40 ) 8026ebe: 4293 cmp r3, r2 8026ec0: d10d bne.n 8026ede { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 8026ec2: 697b ldr r3, [r7, #20] 8026ec4: f423 6300 bic.w r3, r3, #2048 @ 0x800 8026ec8: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 8026eca: 683b ldr r3, [r7, #0] 8026ecc: 68db ldr r3, [r3, #12] 8026ece: 021b lsls r3, r3, #8 8026ed0: 697a ldr r2, [r7, #20] 8026ed2: 4313 orrs r3, r2 8026ed4: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8026ed6: 697b ldr r3, [r7, #20] 8026ed8: f423 6380 bic.w r3, r3, #1024 @ 0x400 8026edc: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8026ede: 687b ldr r3, [r7, #4] 8026ee0: 4a16 ldr r2, [pc, #88] @ (8026f3c ) 8026ee2: 4293 cmp r3, r2 8026ee4: d003 beq.n 8026eee 8026ee6: 687b ldr r3, [r7, #4] 8026ee8: 4a15 ldr r2, [pc, #84] @ (8026f40 ) 8026eea: 4293 cmp r3, r2 8026eec: d113 bne.n 8026f16 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8026eee: 693b ldr r3, [r7, #16] 8026ef0: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8026ef4: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 8026ef6: 693b ldr r3, [r7, #16] 8026ef8: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8026efc: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8026efe: 683b ldr r3, [r7, #0] 8026f00: 695b ldr r3, [r3, #20] 8026f02: 011b lsls r3, r3, #4 8026f04: 693a ldr r2, [r7, #16] 8026f06: 4313 orrs r3, r2 8026f08: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8026f0a: 683b ldr r3, [r7, #0] 8026f0c: 699b ldr r3, [r3, #24] 8026f0e: 011b lsls r3, r3, #4 8026f10: 693a ldr r2, [r7, #16] 8026f12: 4313 orrs r3, r2 8026f14: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8026f16: 687b ldr r3, [r7, #4] 8026f18: 693a ldr r2, [r7, #16] 8026f1a: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8026f1c: 687b ldr r3, [r7, #4] 8026f1e: 68fa ldr r2, [r7, #12] 8026f20: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 8026f22: 683b ldr r3, [r7, #0] 8026f24: 685a ldr r2, [r3, #4] 8026f26: 687b ldr r3, [r7, #4] 8026f28: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8026f2a: 687b ldr r3, [r7, #4] 8026f2c: 697a ldr r2, [r7, #20] 8026f2e: 621a str r2, [r3, #32] } 8026f30: bf00 nop 8026f32: 371c adds r7, #28 8026f34: 46bd mov sp, r7 8026f36: f85d 7b04 ldr.w r7, [sp], #4 8026f3a: 4770 bx lr 8026f3c: 40010000 .word 0x40010000 8026f40: 40010400 .word 0x40010400 08026f44 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) { 8026f44: b480 push {r7} 8026f46: b087 sub sp, #28 8026f48: af00 add r7, sp, #0 8026f4a: 6078 str r0, [r7, #4] 8026f4c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8026f4e: 687b ldr r3, [r7, #4] 8026f50: 6a1b ldr r3, [r3, #32] 8026f52: f423 5280 bic.w r2, r3, #4096 @ 0x1000 8026f56: 687b ldr r3, [r7, #4] 8026f58: 621a str r2, [r3, #32] /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8026f5a: 687b ldr r3, [r7, #4] 8026f5c: 6a1b ldr r3, [r3, #32] 8026f5e: 613b str r3, [r7, #16] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8026f60: 687b ldr r3, [r7, #4] 8026f62: 685b ldr r3, [r3, #4] 8026f64: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8026f66: 687b ldr r3, [r7, #4] 8026f68: 69db ldr r3, [r3, #28] 8026f6a: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 8026f6c: 68fb ldr r3, [r7, #12] 8026f6e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8026f72: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 8026f74: 68fb ldr r3, [r7, #12] 8026f76: f423 7340 bic.w r3, r3, #768 @ 0x300 8026f7a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8026f7c: 683b ldr r3, [r7, #0] 8026f7e: 681b ldr r3, [r3, #0] 8026f80: 021b lsls r3, r3, #8 8026f82: 68fa ldr r2, [r7, #12] 8026f84: 4313 orrs r3, r2 8026f86: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8026f88: 693b ldr r3, [r7, #16] 8026f8a: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8026f8e: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8026f90: 683b ldr r3, [r7, #0] 8026f92: 689b ldr r3, [r3, #8] 8026f94: 031b lsls r3, r3, #12 8026f96: 693a ldr r2, [r7, #16] 8026f98: 4313 orrs r3, r2 8026f9a: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8026f9c: 687b ldr r3, [r7, #4] 8026f9e: 4a12 ldr r2, [pc, #72] @ (8026fe8 ) 8026fa0: 4293 cmp r3, r2 8026fa2: d003 beq.n 8026fac 8026fa4: 687b ldr r3, [r7, #4] 8026fa6: 4a11 ldr r2, [pc, #68] @ (8026fec ) 8026fa8: 4293 cmp r3, r2 8026faa: d109 bne.n 8026fc0 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8026fac: 697b ldr r3, [r7, #20] 8026fae: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8026fb2: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8026fb4: 683b ldr r3, [r7, #0] 8026fb6: 695b ldr r3, [r3, #20] 8026fb8: 019b lsls r3, r3, #6 8026fba: 697a ldr r2, [r7, #20] 8026fbc: 4313 orrs r3, r2 8026fbe: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8026fc0: 687b ldr r3, [r7, #4] 8026fc2: 697a ldr r2, [r7, #20] 8026fc4: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8026fc6: 687b ldr r3, [r7, #4] 8026fc8: 68fa ldr r2, [r7, #12] 8026fca: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8026fcc: 683b ldr r3, [r7, #0] 8026fce: 685a ldr r2, [r3, #4] 8026fd0: 687b ldr r3, [r7, #4] 8026fd2: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8026fd4: 687b ldr r3, [r7, #4] 8026fd6: 693a ldr r2, [r7, #16] 8026fd8: 621a str r2, [r3, #32] } 8026fda: bf00 nop 8026fdc: 371c adds r7, #28 8026fde: 46bd mov sp, r7 8026fe0: f85d 7b04 ldr.w r7, [sp], #4 8026fe4: 4770 bx lr 8026fe6: bf00 nop 8026fe8: 40010000 .word 0x40010000 8026fec: 40010400 .word 0x40010400 08026ff0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8026ff0: b480 push {r7} 8026ff2: b087 sub sp, #28 8026ff4: af00 add r7, sp, #0 8026ff6: 60f8 str r0, [r7, #12] 8026ff8: 60b9 str r1, [r7, #8] 8026ffa: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 8026ffc: 68fb ldr r3, [r7, #12] 8026ffe: 6a1b ldr r3, [r3, #32] 8027000: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8027002: 68fb ldr r3, [r7, #12] 8027004: 6a1b ldr r3, [r3, #32] 8027006: f023 0201 bic.w r2, r3, #1 802700a: 68fb ldr r3, [r7, #12] 802700c: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 802700e: 68fb ldr r3, [r7, #12] 8027010: 699b ldr r3, [r3, #24] 8027012: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8027014: 693b ldr r3, [r7, #16] 8027016: f023 03f0 bic.w r3, r3, #240 @ 0xf0 802701a: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 802701c: 687b ldr r3, [r7, #4] 802701e: 011b lsls r3, r3, #4 8027020: 693a ldr r2, [r7, #16] 8027022: 4313 orrs r3, r2 8027024: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 8027026: 697b ldr r3, [r7, #20] 8027028: f023 030a bic.w r3, r3, #10 802702c: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 802702e: 697a ldr r2, [r7, #20] 8027030: 68bb ldr r3, [r7, #8] 8027032: 4313 orrs r3, r2 8027034: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 8027036: 68fb ldr r3, [r7, #12] 8027038: 693a ldr r2, [r7, #16] 802703a: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 802703c: 68fb ldr r3, [r7, #12] 802703e: 697a ldr r2, [r7, #20] 8027040: 621a str r2, [r3, #32] } 8027042: bf00 nop 8027044: 371c adds r7, #28 8027046: 46bd mov sp, r7 8027048: f85d 7b04 ldr.w r7, [sp], #4 802704c: 4770 bx lr 0802704e : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 802704e: b480 push {r7} 8027050: b087 sub sp, #28 8027052: af00 add r7, sp, #0 8027054: 60f8 str r0, [r7, #12] 8027056: 60b9 str r1, [r7, #8] 8027058: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 802705a: 68fb ldr r3, [r7, #12] 802705c: 6a1b ldr r3, [r3, #32] 802705e: f023 0210 bic.w r2, r3, #16 8027062: 68fb ldr r3, [r7, #12] 8027064: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8027066: 68fb ldr r3, [r7, #12] 8027068: 699b ldr r3, [r3, #24] 802706a: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; 802706c: 68fb ldr r3, [r7, #12] 802706e: 6a1b ldr r3, [r3, #32] 8027070: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 8027072: 697b ldr r3, [r7, #20] 8027074: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8027078: 617b str r3, [r7, #20] tmpccmr1 |= (TIM_ICFilter << 12U); 802707a: 687b ldr r3, [r7, #4] 802707c: 031b lsls r3, r3, #12 802707e: 697a ldr r2, [r7, #20] 8027080: 4313 orrs r3, r2 8027082: 617b str r3, [r7, #20] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 8027084: 693b ldr r3, [r7, #16] 8027086: f023 03a0 bic.w r3, r3, #160 @ 0xa0 802708a: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity << 4U); 802708c: 68bb ldr r3, [r7, #8] 802708e: 011b lsls r3, r3, #4 8027090: 693a ldr r2, [r7, #16] 8027092: 4313 orrs r3, r2 8027094: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8027096: 68fb ldr r3, [r7, #12] 8027098: 697a ldr r2, [r7, #20] 802709a: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 802709c: 68fb ldr r3, [r7, #12] 802709e: 693a ldr r2, [r7, #16] 80270a0: 621a str r2, [r3, #32] } 80270a2: bf00 nop 80270a4: 371c adds r7, #28 80270a6: 46bd mov sp, r7 80270a8: f85d 7b04 ldr.w r7, [sp], #4 80270ac: 4770 bx lr 080270ae : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 80270ae: b480 push {r7} 80270b0: b085 sub sp, #20 80270b2: af00 add r7, sp, #0 80270b4: 6078 str r0, [r7, #4] 80270b6: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 80270b8: 687b ldr r3, [r7, #4] 80270ba: 689b ldr r3, [r3, #8] 80270bc: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 80270be: 68fb ldr r3, [r7, #12] 80270c0: f023 0370 bic.w r3, r3, #112 @ 0x70 80270c4: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 80270c6: 683a ldr r2, [r7, #0] 80270c8: 68fb ldr r3, [r7, #12] 80270ca: 4313 orrs r3, r2 80270cc: f043 0307 orr.w r3, r3, #7 80270d0: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 80270d2: 687b ldr r3, [r7, #4] 80270d4: 68fa ldr r2, [r7, #12] 80270d6: 609a str r2, [r3, #8] } 80270d8: bf00 nop 80270da: 3714 adds r7, #20 80270dc: 46bd mov sp, r7 80270de: f85d 7b04 ldr.w r7, [sp], #4 80270e2: 4770 bx lr 080270e4 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 80270e4: b480 push {r7} 80270e6: b087 sub sp, #28 80270e8: af00 add r7, sp, #0 80270ea: 60f8 str r0, [r7, #12] 80270ec: 60b9 str r1, [r7, #8] 80270ee: 607a str r2, [r7, #4] 80270f0: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 80270f2: 68fb ldr r3, [r7, #12] 80270f4: 689b ldr r3, [r3, #8] 80270f6: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80270f8: 697b ldr r3, [r7, #20] 80270fa: f423 437f bic.w r3, r3, #65280 @ 0xff00 80270fe: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 8027100: 683b ldr r3, [r7, #0] 8027102: 021a lsls r2, r3, #8 8027104: 687b ldr r3, [r7, #4] 8027106: 431a orrs r2, r3 8027108: 68bb ldr r3, [r7, #8] 802710a: 4313 orrs r3, r2 802710c: 697a ldr r2, [r7, #20] 802710e: 4313 orrs r3, r2 8027110: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8027112: 68fb ldr r3, [r7, #12] 8027114: 697a ldr r2, [r7, #20] 8027116: 609a str r2, [r3, #8] } 8027118: bf00 nop 802711a: 371c adds r7, #28 802711c: 46bd mov sp, r7 802711e: f85d 7b04 ldr.w r7, [sp], #4 8027122: 4770 bx lr 08027124 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8027124: b480 push {r7} 8027126: b087 sub sp, #28 8027128: af00 add r7, sp, #0 802712a: 60f8 str r0, [r7, #12] 802712c: 60b9 str r1, [r7, #8] 802712e: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 8027130: 68bb ldr r3, [r7, #8] 8027132: f003 031f and.w r3, r3, #31 8027136: 2201 movs r2, #1 8027138: fa02 f303 lsl.w r3, r2, r3 802713c: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 802713e: 68fb ldr r3, [r7, #12] 8027140: 6a1a ldr r2, [r3, #32] 8027142: 697b ldr r3, [r7, #20] 8027144: 43db mvns r3, r3 8027146: 401a ands r2, r3 8027148: 68fb ldr r3, [r7, #12] 802714a: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 802714c: 68fb ldr r3, [r7, #12] 802714e: 6a1a ldr r2, [r3, #32] 8027150: 68bb ldr r3, [r7, #8] 8027152: f003 031f and.w r3, r3, #31 8027156: 6879 ldr r1, [r7, #4] 8027158: fa01 f303 lsl.w r3, r1, r3 802715c: 431a orrs r2, r3 802715e: 68fb ldr r3, [r7, #12] 8027160: 621a str r2, [r3, #32] } 8027162: bf00 nop 8027164: 371c adds r7, #28 8027166: 46bd mov sp, r7 8027168: f85d 7b04 ldr.w r7, [sp], #4 802716c: 4770 bx lr ... 08027170 : * @arg TIM_CHANNEL_2: TIM Channel 2 selected * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { 8027170: b580 push {r7, lr} 8027172: b084 sub sp, #16 8027174: af00 add r7, sp, #0 8027176: 6078 str r0, [r7, #4] 8027178: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 802717a: 2300 movs r3, #0 802717c: 73fb strb r3, [r7, #15] /* Check the parameters */ assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); /* Check the TIM complementary channel state */ if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 802717e: 683b ldr r3, [r7, #0] 8027180: 2b00 cmp r3, #0 8027182: d109 bne.n 8027198 8027184: 687b ldr r3, [r7, #4] 8027186: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 802718a: b2db uxtb r3, r3 802718c: 2b01 cmp r3, #1 802718e: bf14 ite ne 8027190: 2301 movne r3, #1 8027192: 2300 moveq r3, #0 8027194: b2db uxtb r3, r3 8027196: e022 b.n 80271de 8027198: 683b ldr r3, [r7, #0] 802719a: 2b04 cmp r3, #4 802719c: d109 bne.n 80271b2 802719e: 687b ldr r3, [r7, #4] 80271a0: f893 3043 ldrb.w r3, [r3, #67] @ 0x43 80271a4: b2db uxtb r3, r3 80271a6: 2b01 cmp r3, #1 80271a8: bf14 ite ne 80271aa: 2301 movne r3, #1 80271ac: 2300 moveq r3, #0 80271ae: b2db uxtb r3, r3 80271b0: e015 b.n 80271de 80271b2: 683b ldr r3, [r7, #0] 80271b4: 2b08 cmp r3, #8 80271b6: d109 bne.n 80271cc 80271b8: 687b ldr r3, [r7, #4] 80271ba: f893 3044 ldrb.w r3, [r3, #68] @ 0x44 80271be: b2db uxtb r3, r3 80271c0: 2b01 cmp r3, #1 80271c2: bf14 ite ne 80271c4: 2301 movne r3, #1 80271c6: 2300 moveq r3, #0 80271c8: b2db uxtb r3, r3 80271ca: e008 b.n 80271de 80271cc: 687b ldr r3, [r7, #4] 80271ce: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 80271d2: b2db uxtb r3, r3 80271d4: 2b01 cmp r3, #1 80271d6: bf14 ite ne 80271d8: 2301 movne r3, #1 80271da: 2300 moveq r3, #0 80271dc: b2db uxtb r3, r3 80271de: 2b00 cmp r3, #0 80271e0: d001 beq.n 80271e6 { return HAL_ERROR; 80271e2: 2301 movs r3, #1 80271e4: e0a3 b.n 802732e } /* Set the TIM complementary channel state */ TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 80271e6: 683b ldr r3, [r7, #0] 80271e8: 2b00 cmp r3, #0 80271ea: d104 bne.n 80271f6 80271ec: 687b ldr r3, [r7, #4] 80271ee: 2202 movs r2, #2 80271f0: f883 2042 strb.w r2, [r3, #66] @ 0x42 80271f4: e013 b.n 802721e 80271f6: 683b ldr r3, [r7, #0] 80271f8: 2b04 cmp r3, #4 80271fa: d104 bne.n 8027206 80271fc: 687b ldr r3, [r7, #4] 80271fe: 2202 movs r2, #2 8027200: f883 2043 strb.w r2, [r3, #67] @ 0x43 8027204: e00b b.n 802721e 8027206: 683b ldr r3, [r7, #0] 8027208: 2b08 cmp r3, #8 802720a: d104 bne.n 8027216 802720c: 687b ldr r3, [r7, #4] 802720e: 2202 movs r2, #2 8027210: f883 2044 strb.w r2, [r3, #68] @ 0x44 8027214: e003 b.n 802721e 8027216: 687b ldr r3, [r7, #4] 8027218: 2202 movs r2, #2 802721a: f883 2045 strb.w r2, [r3, #69] @ 0x45 switch (Channel) 802721e: 683b ldr r3, [r7, #0] 8027220: 2b08 cmp r3, #8 8027222: d01b beq.n 802725c 8027224: 683b ldr r3, [r7, #0] 8027226: 2b08 cmp r3, #8 8027228: d821 bhi.n 802726e 802722a: 683b ldr r3, [r7, #0] 802722c: 2b00 cmp r3, #0 802722e: d003 beq.n 8027238 8027230: 683b ldr r3, [r7, #0] 8027232: 2b04 cmp r3, #4 8027234: d009 beq.n 802724a 8027236: e01a b.n 802726e { case TIM_CHANNEL_1: { /* Enable the TIM Capture/Compare 1 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 8027238: 687b ldr r3, [r7, #4] 802723a: 681b ldr r3, [r3, #0] 802723c: 68da ldr r2, [r3, #12] 802723e: 687b ldr r3, [r7, #4] 8027240: 681b ldr r3, [r3, #0] 8027242: f042 0202 orr.w r2, r2, #2 8027246: 60da str r2, [r3, #12] break; 8027248: e014 b.n 8027274 } case TIM_CHANNEL_2: { /* Enable the TIM Capture/Compare 2 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 802724a: 687b ldr r3, [r7, #4] 802724c: 681b ldr r3, [r3, #0] 802724e: 68da ldr r2, [r3, #12] 8027250: 687b ldr r3, [r7, #4] 8027252: 681b ldr r3, [r3, #0] 8027254: f042 0204 orr.w r2, r2, #4 8027258: 60da str r2, [r3, #12] break; 802725a: e00b b.n 8027274 } case TIM_CHANNEL_3: { /* Enable the TIM Capture/Compare 3 interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 802725c: 687b ldr r3, [r7, #4] 802725e: 681b ldr r3, [r3, #0] 8027260: 68da ldr r2, [r3, #12] 8027262: 687b ldr r3, [r7, #4] 8027264: 681b ldr r3, [r3, #0] 8027266: f042 0208 orr.w r2, r2, #8 802726a: 60da str r2, [r3, #12] break; 802726c: e002 b.n 8027274 } default: status = HAL_ERROR; 802726e: 2301 movs r3, #1 8027270: 73fb strb r3, [r7, #15] break; 8027272: bf00 nop } if (status == HAL_OK) 8027274: 7bfb ldrb r3, [r7, #15] 8027276: 2b00 cmp r3, #0 8027278: d158 bne.n 802732c { /* Enable the TIM Break interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); 802727a: 687b ldr r3, [r7, #4] 802727c: 681b ldr r3, [r3, #0] 802727e: 68da ldr r2, [r3, #12] 8027280: 687b ldr r3, [r7, #4] 8027282: 681b ldr r3, [r3, #0] 8027284: f042 0280 orr.w r2, r2, #128 @ 0x80 8027288: 60da str r2, [r3, #12] /* Enable the complementary PWM output */ TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 802728a: 687b ldr r3, [r7, #4] 802728c: 681b ldr r3, [r3, #0] 802728e: 2204 movs r2, #4 8027290: 6839 ldr r1, [r7, #0] 8027292: 4618 mov r0, r3 8027294: f000 f936 bl 8027504 /* Enable the Main Output */ __HAL_TIM_MOE_ENABLE(htim); 8027298: 687b ldr r3, [r7, #4] 802729a: 681b ldr r3, [r3, #0] 802729c: 6c5a ldr r2, [r3, #68] @ 0x44 802729e: 687b ldr r3, [r7, #4] 80272a0: 681b ldr r3, [r3, #0] 80272a2: f442 4200 orr.w r2, r2, #32768 @ 0x8000 80272a6: 645a str r2, [r3, #68] @ 0x44 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80272a8: 687b ldr r3, [r7, #4] 80272aa: 681b ldr r3, [r3, #0] 80272ac: 4a22 ldr r2, [pc, #136] @ (8027338 ) 80272ae: 4293 cmp r3, r2 80272b0: d022 beq.n 80272f8 80272b2: 687b ldr r3, [r7, #4] 80272b4: 681b ldr r3, [r3, #0] 80272b6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80272ba: d01d beq.n 80272f8 80272bc: 687b ldr r3, [r7, #4] 80272be: 681b ldr r3, [r3, #0] 80272c0: 4a1e ldr r2, [pc, #120] @ (802733c ) 80272c2: 4293 cmp r3, r2 80272c4: d018 beq.n 80272f8 80272c6: 687b ldr r3, [r7, #4] 80272c8: 681b ldr r3, [r3, #0] 80272ca: 4a1d ldr r2, [pc, #116] @ (8027340 ) 80272cc: 4293 cmp r3, r2 80272ce: d013 beq.n 80272f8 80272d0: 687b ldr r3, [r7, #4] 80272d2: 681b ldr r3, [r3, #0] 80272d4: 4a1b ldr r2, [pc, #108] @ (8027344 ) 80272d6: 4293 cmp r3, r2 80272d8: d00e beq.n 80272f8 80272da: 687b ldr r3, [r7, #4] 80272dc: 681b ldr r3, [r3, #0] 80272de: 4a1a ldr r2, [pc, #104] @ (8027348 ) 80272e0: 4293 cmp r3, r2 80272e2: d009 beq.n 80272f8 80272e4: 687b ldr r3, [r7, #4] 80272e6: 681b ldr r3, [r3, #0] 80272e8: 4a18 ldr r2, [pc, #96] @ (802734c ) 80272ea: 4293 cmp r3, r2 80272ec: d004 beq.n 80272f8 80272ee: 687b ldr r3, [r7, #4] 80272f0: 681b ldr r3, [r3, #0] 80272f2: 4a17 ldr r2, [pc, #92] @ (8027350 ) 80272f4: 4293 cmp r3, r2 80272f6: d111 bne.n 802731c { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80272f8: 687b ldr r3, [r7, #4] 80272fa: 681b ldr r3, [r3, #0] 80272fc: 689b ldr r3, [r3, #8] 80272fe: f003 0307 and.w r3, r3, #7 8027302: 60bb str r3, [r7, #8] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8027304: 68bb ldr r3, [r7, #8] 8027306: 2b06 cmp r3, #6 8027308: d010 beq.n 802732c { __HAL_TIM_ENABLE(htim); 802730a: 687b ldr r3, [r7, #4] 802730c: 681b ldr r3, [r3, #0] 802730e: 681a ldr r2, [r3, #0] 8027310: 687b ldr r3, [r7, #4] 8027312: 681b ldr r3, [r3, #0] 8027314: f042 0201 orr.w r2, r2, #1 8027318: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 802731a: e007 b.n 802732c } } else { __HAL_TIM_ENABLE(htim); 802731c: 687b ldr r3, [r7, #4] 802731e: 681b ldr r3, [r3, #0] 8027320: 681a ldr r2, [r3, #0] 8027322: 687b ldr r3, [r7, #4] 8027324: 681b ldr r3, [r3, #0] 8027326: f042 0201 orr.w r2, r2, #1 802732a: 601a str r2, [r3, #0] } } /* Return function status */ return status; 802732c: 7bfb ldrb r3, [r7, #15] } 802732e: 4618 mov r0, r3 8027330: 3710 adds r7, #16 8027332: 46bd mov sp, r7 8027334: bd80 pop {r7, pc} 8027336: bf00 nop 8027338: 40010000 .word 0x40010000 802733c: 40000400 .word 0x40000400 8027340: 40000800 .word 0x40000800 8027344: 40000c00 .word 0x40000c00 8027348: 40010400 .word 0x40010400 802734c: 40014000 .word 0x40014000 8027350: 40001800 .word 0x40001800 08027354 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { 8027354: b480 push {r7} 8027356: b085 sub sp, #20 8027358: af00 add r7, sp, #0 802735a: 6078 str r0, [r7, #4] 802735c: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 802735e: 687b ldr r3, [r7, #4] 8027360: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8027364: 2b01 cmp r3, #1 8027366: d101 bne.n 802736c 8027368: 2302 movs r3, #2 802736a: e05a b.n 8027422 802736c: 687b ldr r3, [r7, #4] 802736e: 2201 movs r2, #1 8027370: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 8027374: 687b ldr r3, [r7, #4] 8027376: 2202 movs r2, #2 8027378: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 802737c: 687b ldr r3, [r7, #4] 802737e: 681b ldr r3, [r3, #0] 8027380: 685b ldr r3, [r3, #4] 8027382: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8027384: 687b ldr r3, [r7, #4] 8027386: 681b ldr r3, [r3, #0] 8027388: 689b ldr r3, [r3, #8] 802738a: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 802738c: 68fb ldr r3, [r7, #12] 802738e: f023 0370 bic.w r3, r3, #112 @ 0x70 8027392: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8027394: 683b ldr r3, [r7, #0] 8027396: 681b ldr r3, [r3, #0] 8027398: 68fa ldr r2, [r7, #12] 802739a: 4313 orrs r3, r2 802739c: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 802739e: 687b ldr r3, [r7, #4] 80273a0: 681b ldr r3, [r3, #0] 80273a2: 68fa ldr r2, [r7, #12] 80273a4: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80273a6: 687b ldr r3, [r7, #4] 80273a8: 681b ldr r3, [r3, #0] 80273aa: 4a21 ldr r2, [pc, #132] @ (8027430 ) 80273ac: 4293 cmp r3, r2 80273ae: d022 beq.n 80273f6 80273b0: 687b ldr r3, [r7, #4] 80273b2: 681b ldr r3, [r3, #0] 80273b4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80273b8: d01d beq.n 80273f6 80273ba: 687b ldr r3, [r7, #4] 80273bc: 681b ldr r3, [r3, #0] 80273be: 4a1d ldr r2, [pc, #116] @ (8027434 ) 80273c0: 4293 cmp r3, r2 80273c2: d018 beq.n 80273f6 80273c4: 687b ldr r3, [r7, #4] 80273c6: 681b ldr r3, [r3, #0] 80273c8: 4a1b ldr r2, [pc, #108] @ (8027438 ) 80273ca: 4293 cmp r3, r2 80273cc: d013 beq.n 80273f6 80273ce: 687b ldr r3, [r7, #4] 80273d0: 681b ldr r3, [r3, #0] 80273d2: 4a1a ldr r2, [pc, #104] @ (802743c ) 80273d4: 4293 cmp r3, r2 80273d6: d00e beq.n 80273f6 80273d8: 687b ldr r3, [r7, #4] 80273da: 681b ldr r3, [r3, #0] 80273dc: 4a18 ldr r2, [pc, #96] @ (8027440 ) 80273de: 4293 cmp r3, r2 80273e0: d009 beq.n 80273f6 80273e2: 687b ldr r3, [r7, #4] 80273e4: 681b ldr r3, [r3, #0] 80273e6: 4a17 ldr r2, [pc, #92] @ (8027444 ) 80273e8: 4293 cmp r3, r2 80273ea: d004 beq.n 80273f6 80273ec: 687b ldr r3, [r7, #4] 80273ee: 681b ldr r3, [r3, #0] 80273f0: 4a15 ldr r2, [pc, #84] @ (8027448 ) 80273f2: 4293 cmp r3, r2 80273f4: d10c bne.n 8027410 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 80273f6: 68bb ldr r3, [r7, #8] 80273f8: f023 0380 bic.w r3, r3, #128 @ 0x80 80273fc: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80273fe: 683b ldr r3, [r7, #0] 8027400: 685b ldr r3, [r3, #4] 8027402: 68ba ldr r2, [r7, #8] 8027404: 4313 orrs r3, r2 8027406: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8027408: 687b ldr r3, [r7, #4] 802740a: 681b ldr r3, [r3, #0] 802740c: 68ba ldr r2, [r7, #8] 802740e: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8027410: 687b ldr r3, [r7, #4] 8027412: 2201 movs r2, #1 8027414: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8027418: 687b ldr r3, [r7, #4] 802741a: 2200 movs r2, #0 802741c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8027420: 2300 movs r3, #0 } 8027422: 4618 mov r0, r3 8027424: 3714 adds r7, #20 8027426: 46bd mov sp, r7 8027428: f85d 7b04 ldr.w r7, [sp], #4 802742c: 4770 bx lr 802742e: bf00 nop 8027430: 40010000 .word 0x40010000 8027434: 40000400 .word 0x40000400 8027438: 40000800 .word 0x40000800 802743c: 40000c00 .word 0x40000c00 8027440: 40010400 .word 0x40010400 8027444: 40014000 .word 0x40014000 8027448: 40001800 .word 0x40001800 0802744c : * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) { 802744c: b480 push {r7} 802744e: b085 sub sp, #20 8027450: af00 add r7, sp, #0 8027452: 6078 str r0, [r7, #4] 8027454: 6039 str r1, [r7, #0] /* Keep this variable initialized to 0 as it is used to configure BDTR register */ uint32_t tmpbdtr = 0U; 8027456: 2300 movs r3, #0 8027458: 60fb str r3, [r7, #12] assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); /* Check input state */ __HAL_LOCK(htim); 802745a: 687b ldr r3, [r7, #4] 802745c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8027460: 2b01 cmp r3, #1 8027462: d101 bne.n 8027468 8027464: 2302 movs r3, #2 8027466: e03d b.n 80274e4 8027468: 687b ldr r3, [r7, #4] 802746a: 2201 movs r2, #1 802746c: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, the OSSI State, the dead time value and the Automatic Output Enable Bit */ /* Set the BDTR bits */ MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); 8027470: 68fb ldr r3, [r7, #12] 8027472: f023 02ff bic.w r2, r3, #255 @ 0xff 8027476: 683b ldr r3, [r7, #0] 8027478: 68db ldr r3, [r3, #12] 802747a: 4313 orrs r3, r2 802747c: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); 802747e: 68fb ldr r3, [r7, #12] 8027480: f423 7240 bic.w r2, r3, #768 @ 0x300 8027484: 683b ldr r3, [r7, #0] 8027486: 689b ldr r3, [r3, #8] 8027488: 4313 orrs r3, r2 802748a: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); 802748c: 68fb ldr r3, [r7, #12] 802748e: f423 6280 bic.w r2, r3, #1024 @ 0x400 8027492: 683b ldr r3, [r7, #0] 8027494: 685b ldr r3, [r3, #4] 8027496: 4313 orrs r3, r2 8027498: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); 802749a: 68fb ldr r3, [r7, #12] 802749c: f423 6200 bic.w r2, r3, #2048 @ 0x800 80274a0: 683b ldr r3, [r7, #0] 80274a2: 681b ldr r3, [r3, #0] 80274a4: 4313 orrs r3, r2 80274a6: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); 80274a8: 68fb ldr r3, [r7, #12] 80274aa: f423 5280 bic.w r2, r3, #4096 @ 0x1000 80274ae: 683b ldr r3, [r7, #0] 80274b0: 691b ldr r3, [r3, #16] 80274b2: 4313 orrs r3, r2 80274b4: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); 80274b6: 68fb ldr r3, [r7, #12] 80274b8: f423 5200 bic.w r2, r3, #8192 @ 0x2000 80274bc: 683b ldr r3, [r7, #0] 80274be: 695b ldr r3, [r3, #20] 80274c0: 4313 orrs r3, r2 80274c2: 60fb str r3, [r7, #12] MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); 80274c4: 68fb ldr r3, [r7, #12] 80274c6: f423 4280 bic.w r2, r3, #16384 @ 0x4000 80274ca: 683b ldr r3, [r7, #0] 80274cc: 69db ldr r3, [r3, #28] 80274ce: 4313 orrs r3, r2 80274d0: 60fb str r3, [r7, #12] /* Set TIMx_BDTR */ htim->Instance->BDTR = tmpbdtr; 80274d2: 687b ldr r3, [r7, #4] 80274d4: 681b ldr r3, [r3, #0] 80274d6: 68fa ldr r2, [r7, #12] 80274d8: 645a str r2, [r3, #68] @ 0x44 __HAL_UNLOCK(htim); 80274da: 687b ldr r3, [r7, #4] 80274dc: 2200 movs r2, #0 80274de: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 80274e2: 2300 movs r3, #0 } 80274e4: 4618 mov r0, r3 80274e6: 3714 adds r7, #20 80274e8: 46bd mov sp, r7 80274ea: f85d 7b04 ldr.w r7, [sp], #4 80274ee: 4770 bx lr 080274f0 : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 80274f0: b480 push {r7} 80274f2: b083 sub sp, #12 80274f4: af00 add r7, sp, #0 80274f6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 80274f8: bf00 nop 80274fa: 370c adds r7, #12 80274fc: 46bd mov sp, r7 80274fe: f85d 7b04 ldr.w r7, [sp], #4 8027502: 4770 bx lr 08027504 : * @param ChannelNState specifies the TIM Channel CCxNE bit new state. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. * @retval None */ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) { 8027504: b480 push {r7} 8027506: b087 sub sp, #28 8027508: af00 add r7, sp, #0 802750a: 60f8 str r0, [r7, #12] 802750c: 60b9 str r1, [r7, #8] 802750e: 607a str r2, [r7, #4] uint32_t tmp; tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 8027510: 68bb ldr r3, [r7, #8] 8027512: f003 031f and.w r3, r3, #31 8027516: 2204 movs r2, #4 8027518: fa02 f303 lsl.w r3, r2, r3 802751c: 617b str r3, [r7, #20] /* Reset the CCxNE Bit */ TIMx->CCER &= ~tmp; 802751e: 68fb ldr r3, [r7, #12] 8027520: 6a1a ldr r2, [r3, #32] 8027522: 697b ldr r3, [r7, #20] 8027524: 43db mvns r3, r3 8027526: 401a ands r2, r3 8027528: 68fb ldr r3, [r7, #12] 802752a: 621a str r2, [r3, #32] /* Set or reset the CCxNE Bit */ TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 802752c: 68fb ldr r3, [r7, #12] 802752e: 6a1a ldr r2, [r3, #32] 8027530: 68bb ldr r3, [r7, #8] 8027532: f003 031f and.w r3, r3, #31 8027536: 6879 ldr r1, [r7, #4] 8027538: fa01 f303 lsl.w r3, r1, r3 802753c: 431a orrs r2, r3 802753e: 68fb ldr r3, [r7, #12] 8027540: 621a str r2, [r3, #32] } 8027542: bf00 nop 8027544: 371c adds r7, #28 8027546: 46bd mov sp, r7 8027548: f85d 7b04 ldr.w r7, [sp], #4 802754c: 4770 bx lr 0802754e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 802754e: b580 push {r7, lr} 8027550: b082 sub sp, #8 8027552: af00 add r7, sp, #0 8027554: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8027556: 687b ldr r3, [r7, #4] 8027558: 2b00 cmp r3, #0 802755a: d101 bne.n 8027560 { return HAL_ERROR; 802755c: 2301 movs r3, #1 802755e: e03f b.n 80275e0 assert_param(IS_UART_INSTANCE(huart->Instance)); } assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); if (huart->gState == HAL_UART_STATE_RESET) 8027560: 687b ldr r3, [r7, #4] 8027562: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8027566: b2db uxtb r3, r3 8027568: 2b00 cmp r3, #0 802756a: d106 bne.n 802757a { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 802756c: 687b ldr r3, [r7, #4] 802756e: 2200 movs r2, #0 8027570: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8027574: 6878 ldr r0, [r7, #4] 8027576: f7f8 f915 bl 801f7a4 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 802757a: 687b ldr r3, [r7, #4] 802757c: 2224 movs r2, #36 @ 0x24 802757e: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8027582: 687b ldr r3, [r7, #4] 8027584: 681b ldr r3, [r3, #0] 8027586: 68da ldr r2, [r3, #12] 8027588: 687b ldr r3, [r7, #4] 802758a: 681b ldr r3, [r3, #0] 802758c: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8027590: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8027592: 6878 ldr r0, [r7, #4] 8027594: f000 fc9a bl 8027ecc /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8027598: 687b ldr r3, [r7, #4] 802759a: 681b ldr r3, [r3, #0] 802759c: 691a ldr r2, [r3, #16] 802759e: 687b ldr r3, [r7, #4] 80275a0: 681b ldr r3, [r3, #0] 80275a2: f422 4290 bic.w r2, r2, #18432 @ 0x4800 80275a6: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80275a8: 687b ldr r3, [r7, #4] 80275aa: 681b ldr r3, [r3, #0] 80275ac: 695a ldr r2, [r3, #20] 80275ae: 687b ldr r3, [r7, #4] 80275b0: 681b ldr r3, [r3, #0] 80275b2: f022 022a bic.w r2, r2, #42 @ 0x2a 80275b6: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 80275b8: 687b ldr r3, [r7, #4] 80275ba: 681b ldr r3, [r3, #0] 80275bc: 68da ldr r2, [r3, #12] 80275be: 687b ldr r3, [r7, #4] 80275c0: 681b ldr r3, [r3, #0] 80275c2: f442 5200 orr.w r2, r2, #8192 @ 0x2000 80275c6: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80275c8: 687b ldr r3, [r7, #4] 80275ca: 2200 movs r2, #0 80275cc: 641a str r2, [r3, #64] @ 0x40 huart->gState = HAL_UART_STATE_READY; 80275ce: 687b ldr r3, [r7, #4] 80275d0: 2220 movs r2, #32 80275d2: f883 203d strb.w r2, [r3, #61] @ 0x3d huart->RxState = HAL_UART_STATE_READY; 80275d6: 687b ldr r3, [r7, #4] 80275d8: 2220 movs r2, #32 80275da: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; 80275de: 2300 movs r3, #0 } 80275e0: 4618 mov r0, r3 80275e2: 3708 adds r7, #8 80275e4: 46bd mov sp, r7 80275e6: bd80 pop {r7, pc} 080275e8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) { 80275e8: b580 push {r7, lr} 80275ea: b082 sub sp, #8 80275ec: af00 add r7, sp, #0 80275ee: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 80275f0: 687b ldr r3, [r7, #4] 80275f2: 2b00 cmp r3, #0 80275f4: d101 bne.n 80275fa { return HAL_ERROR; 80275f6: 2301 movs r3, #1 80275f8: e021 b.n 802763e } /* Check the parameters */ assert_param(IS_UART_INSTANCE(huart->Instance)); huart->gState = HAL_UART_STATE_BUSY; 80275fa: 687b ldr r3, [r7, #4] 80275fc: 2224 movs r2, #36 @ 0x24 80275fe: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the Peripheral */ __HAL_UART_DISABLE(huart); 8027602: 687b ldr r3, [r7, #4] 8027604: 681b ldr r3, [r3, #0] 8027606: 68da ldr r2, [r3, #12] 8027608: 687b ldr r3, [r7, #4] 802760a: 681b ldr r3, [r3, #0] 802760c: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8027610: 60da str r2, [r3, #12] } /* DeInit the low level hardware */ huart->MspDeInitCallback(huart); #else /* DeInit the low level hardware */ HAL_UART_MspDeInit(huart); 8027612: 6878 ldr r0, [r7, #4] 8027614: f7f8 f952 bl 801f8bc #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8027618: 687b ldr r3, [r7, #4] 802761a: 2200 movs r2, #0 802761c: 641a str r2, [r3, #64] @ 0x40 huart->gState = HAL_UART_STATE_RESET; 802761e: 687b ldr r3, [r7, #4] 8027620: 2200 movs r2, #0 8027622: f883 203d strb.w r2, [r3, #61] @ 0x3d huart->RxState = HAL_UART_STATE_RESET; 8027626: 687b ldr r3, [r7, #4] 8027628: 2200 movs r2, #0 802762a: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 802762e: 687b ldr r3, [r7, #4] 8027630: 2200 movs r2, #0 8027632: 631a str r2, [r3, #48] @ 0x30 /* Process Unlock */ __HAL_UNLOCK(huart); 8027634: 687b ldr r3, [r7, #4] 8027636: 2200 movs r2, #0 8027638: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 802763c: 2300 movs r3, #0 } 802763e: 4618 mov r0, r3 8027640: 3708 adds r7, #8 8027642: 46bd mov sp, r7 8027644: bd80 pop {r7, pc} 08027646 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 8027646: b480 push {r7} 8027648: b085 sub sp, #20 802764a: af00 add r7, sp, #0 802764c: 60f8 str r0, [r7, #12] 802764e: 60b9 str r1, [r7, #8] 8027650: 4613 mov r3, r2 8027652: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8027654: 68fb ldr r3, [r7, #12] 8027656: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 802765a: b2db uxtb r3, r3 802765c: 2b20 cmp r3, #32 802765e: d130 bne.n 80276c2 { if ((pData == NULL) || (Size == 0U)) 8027660: 68bb ldr r3, [r7, #8] 8027662: 2b00 cmp r3, #0 8027664: d002 beq.n 802766c 8027666: 88fb ldrh r3, [r7, #6] 8027668: 2b00 cmp r3, #0 802766a: d101 bne.n 8027670 { return HAL_ERROR; 802766c: 2301 movs r3, #1 802766e: e029 b.n 80276c4 } /* Process Locked */ __HAL_LOCK(huart); 8027670: 68fb ldr r3, [r7, #12] 8027672: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8027676: 2b01 cmp r3, #1 8027678: d101 bne.n 802767e 802767a: 2302 movs r3, #2 802767c: e022 b.n 80276c4 802767e: 68fb ldr r3, [r7, #12] 8027680: 2201 movs r2, #1 8027682: f883 203c strb.w r2, [r3, #60] @ 0x3c huart->pTxBuffPtr = pData; 8027686: 68fb ldr r3, [r7, #12] 8027688: 68ba ldr r2, [r7, #8] 802768a: 621a str r2, [r3, #32] huart->TxXferSize = Size; 802768c: 68fb ldr r3, [r7, #12] 802768e: 88fa ldrh r2, [r7, #6] 8027690: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 8027692: 68fb ldr r3, [r7, #12] 8027694: 88fa ldrh r2, [r7, #6] 8027696: 84da strh r2, [r3, #38] @ 0x26 huart->ErrorCode = HAL_UART_ERROR_NONE; 8027698: 68fb ldr r3, [r7, #12] 802769a: 2200 movs r2, #0 802769c: 641a str r2, [r3, #64] @ 0x40 huart->gState = HAL_UART_STATE_BUSY_TX; 802769e: 68fb ldr r3, [r7, #12] 80276a0: 2221 movs r2, #33 @ 0x21 80276a2: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Process Unlocked */ __HAL_UNLOCK(huart); 80276a6: 68fb ldr r3, [r7, #12] 80276a8: 2200 movs r2, #0 80276aa: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Enable the UART Transmit data register empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TXE); 80276ae: 68fb ldr r3, [r7, #12] 80276b0: 681b ldr r3, [r3, #0] 80276b2: 68da ldr r2, [r3, #12] 80276b4: 68fb ldr r3, [r7, #12] 80276b6: 681b ldr r3, [r3, #0] 80276b8: f042 0280 orr.w r2, r2, #128 @ 0x80 80276bc: 60da str r2, [r3, #12] return HAL_OK; 80276be: 2300 movs r3, #0 80276c0: e000 b.n 80276c4 } else { return HAL_BUSY; 80276c2: 2302 movs r3, #2 } } 80276c4: 4618 mov r0, r3 80276c6: 3714 adds r7, #20 80276c8: 46bd mov sp, r7 80276ca: f85d 7b04 ldr.w r7, [sp], #4 80276ce: 4770 bx lr 080276d0 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 80276d0: b580 push {r7, lr} 80276d2: b084 sub sp, #16 80276d4: af00 add r7, sp, #0 80276d6: 60f8 str r0, [r7, #12] 80276d8: 60b9 str r1, [r7, #8] 80276da: 4613 mov r3, r2 80276dc: 80fb strh r3, [r7, #6] /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 80276de: 68fb ldr r3, [r7, #12] 80276e0: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80276e4: b2db uxtb r3, r3 80276e6: 2b20 cmp r3, #32 80276e8: d11d bne.n 8027726 { if ((pData == NULL) || (Size == 0U)) 80276ea: 68bb ldr r3, [r7, #8] 80276ec: 2b00 cmp r3, #0 80276ee: d002 beq.n 80276f6 80276f0: 88fb ldrh r3, [r7, #6] 80276f2: 2b00 cmp r3, #0 80276f4: d101 bne.n 80276fa { return HAL_ERROR; 80276f6: 2301 movs r3, #1 80276f8: e016 b.n 8027728 } /* Process Locked */ __HAL_LOCK(huart); 80276fa: 68fb ldr r3, [r7, #12] 80276fc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8027700: 2b01 cmp r3, #1 8027702: d101 bne.n 8027708 8027704: 2302 movs r3, #2 8027706: e00f b.n 8027728 8027708: 68fb ldr r3, [r7, #12] 802770a: 2201 movs r2, #1 802770c: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Set Reception type to Standard reception */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8027710: 68fb ldr r3, [r7, #12] 8027712: 2200 movs r2, #0 8027714: 631a str r2, [r3, #48] @ 0x30 return (UART_Start_Receive_IT(huart, pData, Size)); 8027716: 88fb ldrh r3, [r7, #6] 8027718: 461a mov r2, r3 802771a: 68b9 ldr r1, [r7, #8] 802771c: 68f8 ldr r0, [r7, #12] 802771e: f000 faab bl 8027c78 8027722: 4603 mov r3, r0 8027724: e000 b.n 8027728 } else { return HAL_BUSY; 8027726: 2302 movs r3, #2 } } 8027728: 4618 mov r0, r3 802772a: 3710 adds r7, #16 802772c: 46bd mov sp, r7 802772e: bd80 pop {r7, pc} 08027730 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 8027730: b580 push {r7, lr} 8027732: b0ba sub sp, #232 @ 0xe8 8027734: af00 add r7, sp, #0 8027736: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); 8027738: 687b ldr r3, [r7, #4] 802773a: 681b ldr r3, [r3, #0] 802773c: 681b ldr r3, [r3, #0] 802773e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8027742: 687b ldr r3, [r7, #4] 8027744: 681b ldr r3, [r3, #0] 8027746: 68db ldr r3, [r3, #12] 8027748: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); 802774c: 687b ldr r3, [r7, #4] 802774e: 681b ldr r3, [r3, #0] 8027750: 695b ldr r3, [r3, #20] 8027752: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; 8027756: 2300 movs r3, #0 8027758: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; 802775c: 2300 movs r3, #0 802775e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); 8027762: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8027766: f003 030f and.w r3, r3, #15 802776a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) 802776e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8027772: 2b00 cmp r3, #0 8027774: d10f bne.n 8027796 { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8027776: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 802777a: f003 0320 and.w r3, r3, #32 802777e: 2b00 cmp r3, #0 8027780: d009 beq.n 8027796 8027782: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8027786: f003 0320 and.w r3, r3, #32 802778a: 2b00 cmp r3, #0 802778c: d003 beq.n 8027796 { UART_Receive_IT(huart); 802778e: 6878 ldr r0, [r7, #4] 8027790: f000 fb8f bl 8027eb2 return; 8027794: e256 b.n 8027c44 } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) 8027796: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 802779a: 2b00 cmp r3, #0 802779c: f000 80de beq.w 802795c 80277a0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 80277a4: f003 0301 and.w r3, r3, #1 80277a8: 2b00 cmp r3, #0 80277aa: d106 bne.n 80277ba || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) 80277ac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80277b0: f403 7390 and.w r3, r3, #288 @ 0x120 80277b4: 2b00 cmp r3, #0 80277b6: f000 80d1 beq.w 802795c { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) 80277ba: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80277be: f003 0301 and.w r3, r3, #1 80277c2: 2b00 cmp r3, #0 80277c4: d00b beq.n 80277de 80277c6: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80277ca: f403 7380 and.w r3, r3, #256 @ 0x100 80277ce: 2b00 cmp r3, #0 80277d0: d005 beq.n 80277de { huart->ErrorCode |= HAL_UART_ERROR_PE; 80277d2: 687b ldr r3, [r7, #4] 80277d4: 6c1b ldr r3, [r3, #64] @ 0x40 80277d6: f043 0201 orr.w r2, r3, #1 80277da: 687b ldr r3, [r7, #4] 80277dc: 641a str r2, [r3, #64] @ 0x40 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 80277de: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 80277e2: f003 0304 and.w r3, r3, #4 80277e6: 2b00 cmp r3, #0 80277e8: d00b beq.n 8027802 80277ea: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 80277ee: f003 0301 and.w r3, r3, #1 80277f2: 2b00 cmp r3, #0 80277f4: d005 beq.n 8027802 { huart->ErrorCode |= HAL_UART_ERROR_NE; 80277f6: 687b ldr r3, [r7, #4] 80277f8: 6c1b ldr r3, [r3, #64] @ 0x40 80277fa: f043 0202 orr.w r2, r3, #2 80277fe: 687b ldr r3, [r7, #4] 8027800: 641a str r2, [r3, #64] @ 0x40 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) 8027802: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8027806: f003 0302 and.w r3, r3, #2 802780a: 2b00 cmp r3, #0 802780c: d00b beq.n 8027826 802780e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8027812: f003 0301 and.w r3, r3, #1 8027816: 2b00 cmp r3, #0 8027818: d005 beq.n 8027826 { huart->ErrorCode |= HAL_UART_ERROR_FE; 802781a: 687b ldr r3, [r7, #4] 802781c: 6c1b ldr r3, [r3, #64] @ 0x40 802781e: f043 0204 orr.w r2, r3, #4 8027822: 687b ldr r3, [r7, #4] 8027824: 641a str r2, [r3, #64] @ 0x40 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) 8027826: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 802782a: f003 0308 and.w r3, r3, #8 802782e: 2b00 cmp r3, #0 8027830: d011 beq.n 8027856 8027832: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8027836: f003 0320 and.w r3, r3, #32 802783a: 2b00 cmp r3, #0 802783c: d105 bne.n 802784a || ((cr3its & USART_CR3_EIE) != RESET))) 802783e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8027842: f003 0301 and.w r3, r3, #1 8027846: 2b00 cmp r3, #0 8027848: d005 beq.n 8027856 { huart->ErrorCode |= HAL_UART_ERROR_ORE; 802784a: 687b ldr r3, [r7, #4] 802784c: 6c1b ldr r3, [r3, #64] @ 0x40 802784e: f043 0208 orr.w r2, r3, #8 8027852: 687b ldr r3, [r7, #4] 8027854: 641a str r2, [r3, #64] @ 0x40 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8027856: 687b ldr r3, [r7, #4] 8027858: 6c1b ldr r3, [r3, #64] @ 0x40 802785a: 2b00 cmp r3, #0 802785c: f000 81ed beq.w 8027c3a { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) 8027860: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8027864: f003 0320 and.w r3, r3, #32 8027868: 2b00 cmp r3, #0 802786a: d008 beq.n 802787e 802786c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8027870: f003 0320 and.w r3, r3, #32 8027874: 2b00 cmp r3, #0 8027876: d002 beq.n 802787e { UART_Receive_IT(huart); 8027878: 6878 ldr r0, [r7, #4] 802787a: f000 fb1a bl 8027eb2 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 802787e: 687b ldr r3, [r7, #4] 8027880: 681b ldr r3, [r3, #0] 8027882: 695b ldr r3, [r3, #20] 8027884: f003 0340 and.w r3, r3, #64 @ 0x40 8027888: 2b40 cmp r3, #64 @ 0x40 802788a: bf0c ite eq 802788c: 2301 moveq r3, #1 802788e: 2300 movne r3, #0 8027890: b2db uxtb r3, r3 8027892: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) 8027896: 687b ldr r3, [r7, #4] 8027898: 6c1b ldr r3, [r3, #64] @ 0x40 802789a: f003 0308 and.w r3, r3, #8 802789e: 2b00 cmp r3, #0 80278a0: d103 bne.n 80278aa 80278a2: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 80278a6: 2b00 cmp r3, #0 80278a8: d04f beq.n 802794a { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 80278aa: 6878 ldr r0, [r7, #4] 80278ac: f000 fa22 bl 8027cf4 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 80278b0: 687b ldr r3, [r7, #4] 80278b2: 681b ldr r3, [r3, #0] 80278b4: 695b ldr r3, [r3, #20] 80278b6: f003 0340 and.w r3, r3, #64 @ 0x40 80278ba: 2b40 cmp r3, #64 @ 0x40 80278bc: d141 bne.n 8027942 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 80278be: 687b ldr r3, [r7, #4] 80278c0: 681b ldr r3, [r3, #0] 80278c2: 3314 adds r3, #20 80278c4: f8c7 309c str.w r3, [r7, #156] @ 0x9c */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80278c8: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 80278cc: e853 3f00 ldrex r3, [r3] 80278d0: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); 80278d4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 80278d8: f023 0340 bic.w r3, r3, #64 @ 0x40 80278dc: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 80278e0: 687b ldr r3, [r7, #4] 80278e2: 681b ldr r3, [r3, #0] 80278e4: 3314 adds r3, #20 80278e6: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 80278ea: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 80278ee: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80278f2: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 80278f6: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 80278fa: e841 2300 strex r3, r2, [r1] 80278fe: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); 8027902: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8027906: 2b00 cmp r3, #0 8027908: d1d9 bne.n 80278be /* Abort the UART DMA Rx stream */ if (huart->hdmarx != NULL) 802790a: 687b ldr r3, [r7, #4] 802790c: 6b9b ldr r3, [r3, #56] @ 0x38 802790e: 2b00 cmp r3, #0 8027910: d013 beq.n 802793a { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 8027912: 687b ldr r3, [r7, #4] 8027914: 6b9b ldr r3, [r3, #56] @ 0x38 8027916: 4a7d ldr r2, [pc, #500] @ (8027b0c ) 8027918: 651a str r2, [r3, #80] @ 0x50 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 802791a: 687b ldr r3, [r7, #4] 802791c: 6b9b ldr r3, [r3, #56] @ 0x38 802791e: 4618 mov r0, r3 8027920: f7fa f938 bl 8021b94 8027924: 4603 mov r3, r0 8027926: 2b00 cmp r3, #0 8027928: d016 beq.n 8027958 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 802792a: 687b ldr r3, [r7, #4] 802792c: 6b9b ldr r3, [r3, #56] @ 0x38 802792e: 6d1b ldr r3, [r3, #80] @ 0x50 8027930: 687a ldr r2, [r7, #4] 8027932: 6b92 ldr r2, [r2, #56] @ 0x38 8027934: 4610 mov r0, r2 8027936: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8027938: e00e b.n 8027958 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 802793a: 6878 ldr r0, [r7, #4] 802793c: f000 f986 bl 8027c4c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8027940: e00a b.n 8027958 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8027942: 6878 ldr r0, [r7, #4] 8027944: f000 f982 bl 8027c4c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8027948: e006 b.n 8027958 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 802794a: 6878 ldr r0, [r7, #4] 802794c: f000 f97e bl 8027c4c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8027950: 687b ldr r3, [r7, #4] 8027952: 2200 movs r2, #0 8027954: 641a str r2, [r3, #64] @ 0x40 } } return; 8027956: e170 b.n 8027c3a if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8027958: bf00 nop return; 802795a: e16e b.n 8027c3a } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 802795c: 687b ldr r3, [r7, #4] 802795e: 6b1b ldr r3, [r3, #48] @ 0x30 8027960: 2b01 cmp r3, #1 8027962: f040 814a bne.w 8027bfa && ((isrflags & USART_SR_IDLE) != 0U) 8027966: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 802796a: f003 0310 and.w r3, r3, #16 802796e: 2b00 cmp r3, #0 8027970: f000 8143 beq.w 8027bfa && ((cr1its & USART_SR_IDLE) != 0U)) 8027974: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8027978: f003 0310 and.w r3, r3, #16 802797c: 2b00 cmp r3, #0 802797e: f000 813c beq.w 8027bfa { __HAL_UART_CLEAR_IDLEFLAG(huart); 8027982: 2300 movs r3, #0 8027984: 60bb str r3, [r7, #8] 8027986: 687b ldr r3, [r7, #4] 8027988: 681b ldr r3, [r3, #0] 802798a: 681b ldr r3, [r3, #0] 802798c: 60bb str r3, [r7, #8] 802798e: 687b ldr r3, [r7, #4] 8027990: 681b ldr r3, [r3, #0] 8027992: 685b ldr r3, [r3, #4] 8027994: 60bb str r3, [r7, #8] 8027996: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8027998: 687b ldr r3, [r7, #4] 802799a: 681b ldr r3, [r3, #0] 802799c: 695b ldr r3, [r3, #20] 802799e: f003 0340 and.w r3, r3, #64 @ 0x40 80279a2: 2b40 cmp r3, #64 @ 0x40 80279a4: f040 80b4 bne.w 8027b10 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 80279a8: 687b ldr r3, [r7, #4] 80279aa: 6b9b ldr r3, [r3, #56] @ 0x38 80279ac: 681b ldr r3, [r3, #0] 80279ae: 685b ldr r3, [r3, #4] 80279b0: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) 80279b4: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe 80279b8: 2b00 cmp r3, #0 80279ba: f000 8140 beq.w 8027c3e && (nb_remaining_rx_data < huart->RxXferSize)) 80279be: 687b ldr r3, [r7, #4] 80279c0: 8d9b ldrh r3, [r3, #44] @ 0x2c 80279c2: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 80279c6: 429a cmp r2, r3 80279c8: f080 8139 bcs.w 8027c3e { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 80279cc: 687b ldr r3, [r7, #4] 80279ce: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 80279d2: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) 80279d4: 687b ldr r3, [r7, #4] 80279d6: 6b9b ldr r3, [r3, #56] @ 0x38 80279d8: 69db ldr r3, [r3, #28] 80279da: f5b3 7f80 cmp.w r3, #256 @ 0x100 80279de: f000 8088 beq.w 8027af2 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 80279e2: 687b ldr r3, [r7, #4] 80279e4: 681b ldr r3, [r3, #0] 80279e6: 330c adds r3, #12 80279e8: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80279ec: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 80279f0: e853 3f00 ldrex r3, [r3] 80279f4: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); 80279f8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 80279fc: f423 7380 bic.w r3, r3, #256 @ 0x100 8027a00: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8027a04: 687b ldr r3, [r7, #4] 8027a06: 681b ldr r3, [r3, #0] 8027a08: 330c adds r3, #12 8027a0a: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 8027a0e: f8c7 2094 str.w r2, [r7, #148] @ 0x94 8027a12: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027a16: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 8027a1a: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 8027a1e: e841 2300 strex r3, r2, [r1] 8027a22: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); 8027a26: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8027a2a: 2b00 cmp r3, #0 8027a2c: d1d9 bne.n 80279e2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8027a2e: 687b ldr r3, [r7, #4] 8027a30: 681b ldr r3, [r3, #0] 8027a32: 3314 adds r3, #20 8027a34: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027a36: 6f7b ldr r3, [r7, #116] @ 0x74 8027a38: e853 3f00 ldrex r3, [r3] 8027a3c: 673b str r3, [r7, #112] @ 0x70 return(result); 8027a3e: 6f3b ldr r3, [r7, #112] @ 0x70 8027a40: f023 0301 bic.w r3, r3, #1 8027a44: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8027a48: 687b ldr r3, [r7, #4] 8027a4a: 681b ldr r3, [r3, #0] 8027a4c: 3314 adds r3, #20 8027a4e: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8027a52: f8c7 2080 str.w r2, [r7, #128] @ 0x80 8027a56: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027a58: 6ff9 ldr r1, [r7, #124] @ 0x7c 8027a5a: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 8027a5e: e841 2300 strex r3, r2, [r1] 8027a62: 67bb str r3, [r7, #120] @ 0x78 return(result); 8027a64: 6fbb ldr r3, [r7, #120] @ 0x78 8027a66: 2b00 cmp r3, #0 8027a68: d1e1 bne.n 8027a2e /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8027a6a: 687b ldr r3, [r7, #4] 8027a6c: 681b ldr r3, [r3, #0] 8027a6e: 3314 adds r3, #20 8027a70: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027a72: 6e3b ldr r3, [r7, #96] @ 0x60 8027a74: e853 3f00 ldrex r3, [r3] 8027a78: 65fb str r3, [r7, #92] @ 0x5c return(result); 8027a7a: 6dfb ldr r3, [r7, #92] @ 0x5c 8027a7c: f023 0340 bic.w r3, r3, #64 @ 0x40 8027a80: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8027a84: 687b ldr r3, [r7, #4] 8027a86: 681b ldr r3, [r3, #0] 8027a88: 3314 adds r3, #20 8027a8a: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 8027a8e: 66fa str r2, [r7, #108] @ 0x6c 8027a90: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027a92: 6eb9 ldr r1, [r7, #104] @ 0x68 8027a94: 6efa ldr r2, [r7, #108] @ 0x6c 8027a96: e841 2300 strex r3, r2, [r1] 8027a9a: 667b str r3, [r7, #100] @ 0x64 return(result); 8027a9c: 6e7b ldr r3, [r7, #100] @ 0x64 8027a9e: 2b00 cmp r3, #0 8027aa0: d1e3 bne.n 8027a6a /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8027aa2: 687b ldr r3, [r7, #4] 8027aa4: 2220 movs r2, #32 8027aa6: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8027aaa: 687b ldr r3, [r7, #4] 8027aac: 2200 movs r2, #0 8027aae: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8027ab0: 687b ldr r3, [r7, #4] 8027ab2: 681b ldr r3, [r3, #0] 8027ab4: 330c adds r3, #12 8027ab6: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027ab8: 6cfb ldr r3, [r7, #76] @ 0x4c 8027aba: e853 3f00 ldrex r3, [r3] 8027abe: 64bb str r3, [r7, #72] @ 0x48 return(result); 8027ac0: 6cbb ldr r3, [r7, #72] @ 0x48 8027ac2: f023 0310 bic.w r3, r3, #16 8027ac6: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8027aca: 687b ldr r3, [r7, #4] 8027acc: 681b ldr r3, [r3, #0] 8027ace: 330c adds r3, #12 8027ad0: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac 8027ad4: 65ba str r2, [r7, #88] @ 0x58 8027ad6: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027ad8: 6d79 ldr r1, [r7, #84] @ 0x54 8027ada: 6dba ldr r2, [r7, #88] @ 0x58 8027adc: e841 2300 strex r3, r2, [r1] 8027ae0: 653b str r3, [r7, #80] @ 0x50 return(result); 8027ae2: 6d3b ldr r3, [r7, #80] @ 0x50 8027ae4: 2b00 cmp r3, #0 8027ae6: d1e3 bne.n 8027ab0 /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 8027ae8: 687b ldr r3, [r7, #4] 8027aea: 6b9b ldr r3, [r3, #56] @ 0x38 8027aec: 4618 mov r0, r3 8027aee: f7f9 ffe1 bl 8021ab4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 8027af2: 687b ldr r3, [r7, #4] 8027af4: 8d9a ldrh r2, [r3, #44] @ 0x2c 8027af6: 687b ldr r3, [r7, #4] 8027af8: 8ddb ldrh r3, [r3, #46] @ 0x2e 8027afa: b29b uxth r3, r3 8027afc: 1ad3 subs r3, r2, r3 8027afe: b29b uxth r3, r3 8027b00: 4619 mov r1, r3 8027b02: 6878 ldr r0, [r7, #4] 8027b04: f000 f8ac bl 8027c60 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8027b08: e099 b.n 8027c3e 8027b0a: bf00 nop 8027b0c: 08027dbb .word 0x08027dbb else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8027b10: 687b ldr r3, [r7, #4] 8027b12: 8d9a ldrh r2, [r3, #44] @ 0x2c 8027b14: 687b ldr r3, [r7, #4] 8027b16: 8ddb ldrh r3, [r3, #46] @ 0x2e 8027b18: b29b uxth r3, r3 8027b1a: 1ad3 subs r3, r2, r3 8027b1c: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) 8027b20: 687b ldr r3, [r7, #4] 8027b22: 8ddb ldrh r3, [r3, #46] @ 0x2e 8027b24: b29b uxth r3, r3 8027b26: 2b00 cmp r3, #0 8027b28: f000 808b beq.w 8027c42 && (nb_rx_data > 0U)) 8027b2c: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8027b30: 2b00 cmp r3, #0 8027b32: f000 8086 beq.w 8027c42 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8027b36: 687b ldr r3, [r7, #4] 8027b38: 681b ldr r3, [r3, #0] 8027b3a: 330c adds r3, #12 8027b3c: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027b3e: 6bbb ldr r3, [r7, #56] @ 0x38 8027b40: e853 3f00 ldrex r3, [r3] 8027b44: 637b str r3, [r7, #52] @ 0x34 return(result); 8027b46: 6b7b ldr r3, [r7, #52] @ 0x34 8027b48: f423 7390 bic.w r3, r3, #288 @ 0x120 8027b4c: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8027b50: 687b ldr r3, [r7, #4] 8027b52: 681b ldr r3, [r3, #0] 8027b54: 330c adds r3, #12 8027b56: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 8027b5a: 647a str r2, [r7, #68] @ 0x44 8027b5c: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027b5e: 6c39 ldr r1, [r7, #64] @ 0x40 8027b60: 6c7a ldr r2, [r7, #68] @ 0x44 8027b62: e841 2300 strex r3, r2, [r1] 8027b66: 63fb str r3, [r7, #60] @ 0x3c return(result); 8027b68: 6bfb ldr r3, [r7, #60] @ 0x3c 8027b6a: 2b00 cmp r3, #0 8027b6c: d1e3 bne.n 8027b36 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8027b6e: 687b ldr r3, [r7, #4] 8027b70: 681b ldr r3, [r3, #0] 8027b72: 3314 adds r3, #20 8027b74: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027b76: 6a7b ldr r3, [r7, #36] @ 0x24 8027b78: e853 3f00 ldrex r3, [r3] 8027b7c: 623b str r3, [r7, #32] return(result); 8027b7e: 6a3b ldr r3, [r7, #32] 8027b80: f023 0301 bic.w r3, r3, #1 8027b84: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8027b88: 687b ldr r3, [r7, #4] 8027b8a: 681b ldr r3, [r3, #0] 8027b8c: 3314 adds r3, #20 8027b8e: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 8027b92: 633a str r2, [r7, #48] @ 0x30 8027b94: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027b96: 6af9 ldr r1, [r7, #44] @ 0x2c 8027b98: 6b3a ldr r2, [r7, #48] @ 0x30 8027b9a: e841 2300 strex r3, r2, [r1] 8027b9e: 62bb str r3, [r7, #40] @ 0x28 return(result); 8027ba0: 6abb ldr r3, [r7, #40] @ 0x28 8027ba2: 2b00 cmp r3, #0 8027ba4: d1e3 bne.n 8027b6e /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8027ba6: 687b ldr r3, [r7, #4] 8027ba8: 2220 movs r2, #32 8027baa: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8027bae: 687b ldr r3, [r7, #4] 8027bb0: 2200 movs r2, #0 8027bb2: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8027bb4: 687b ldr r3, [r7, #4] 8027bb6: 681b ldr r3, [r3, #0] 8027bb8: 330c adds r3, #12 8027bba: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027bbc: 693b ldr r3, [r7, #16] 8027bbe: e853 3f00 ldrex r3, [r3] 8027bc2: 60fb str r3, [r7, #12] return(result); 8027bc4: 68fb ldr r3, [r7, #12] 8027bc6: f023 0310 bic.w r3, r3, #16 8027bca: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8027bce: 687b ldr r3, [r7, #4] 8027bd0: 681b ldr r3, [r3, #0] 8027bd2: 330c adds r3, #12 8027bd4: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 8027bd8: 61fa str r2, [r7, #28] 8027bda: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027bdc: 69b9 ldr r1, [r7, #24] 8027bde: 69fa ldr r2, [r7, #28] 8027be0: e841 2300 strex r3, r2, [r1] 8027be4: 617b str r3, [r7, #20] return(result); 8027be6: 697b ldr r3, [r7, #20] 8027be8: 2b00 cmp r3, #0 8027bea: d1e3 bne.n 8027bb4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8027bec: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8027bf0: 4619 mov r1, r3 8027bf2: 6878 ldr r0, [r7, #4] 8027bf4: f000 f834 bl 8027c60 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; 8027bf8: e023 b.n 8027c42 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) 8027bfa: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8027bfe: f003 0380 and.w r3, r3, #128 @ 0x80 8027c02: 2b00 cmp r3, #0 8027c04: d009 beq.n 8027c1a 8027c06: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8027c0a: f003 0380 and.w r3, r3, #128 @ 0x80 8027c0e: 2b00 cmp r3, #0 8027c10: d003 beq.n 8027c1a { UART_Transmit_IT(huart); 8027c12: 6878 ldr r0, [r7, #4] 8027c14: f000 f8e5 bl 8027de2 return; 8027c18: e014 b.n 8027c44 } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) 8027c1a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8027c1e: f003 0340 and.w r3, r3, #64 @ 0x40 8027c22: 2b00 cmp r3, #0 8027c24: d00e beq.n 8027c44 8027c26: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8027c2a: f003 0340 and.w r3, r3, #64 @ 0x40 8027c2e: 2b00 cmp r3, #0 8027c30: d008 beq.n 8027c44 { UART_EndTransmit_IT(huart); 8027c32: 6878 ldr r0, [r7, #4] 8027c34: f000 f925 bl 8027e82 return; 8027c38: e004 b.n 8027c44 return; 8027c3a: bf00 nop 8027c3c: e002 b.n 8027c44 return; 8027c3e: bf00 nop 8027c40: e000 b.n 8027c44 return; 8027c42: bf00 nop } } 8027c44: 37e8 adds r7, #232 @ 0xe8 8027c46: 46bd mov sp, r7 8027c48: bd80 pop {r7, pc} 8027c4a: bf00 nop 08027c4c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 8027c4c: b480 push {r7} 8027c4e: b083 sub sp, #12 8027c50: af00 add r7, sp, #0 8027c52: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } 8027c54: bf00 nop 8027c56: 370c adds r7, #12 8027c58: 46bd mov sp, r7 8027c5a: f85d 7b04 ldr.w r7, [sp], #4 8027c5e: 4770 bx lr 08027c60 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 8027c60: b480 push {r7} 8027c62: b083 sub sp, #12 8027c64: af00 add r7, sp, #0 8027c66: 6078 str r0, [r7, #4] 8027c68: 460b mov r3, r1 8027c6a: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } 8027c6c: bf00 nop 8027c6e: 370c adds r7, #12 8027c70: 46bd mov sp, r7 8027c72: f85d 7b04 ldr.w r7, [sp], #4 8027c76: 4770 bx lr 08027c78 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8027c78: b480 push {r7} 8027c7a: b085 sub sp, #20 8027c7c: af00 add r7, sp, #0 8027c7e: 60f8 str r0, [r7, #12] 8027c80: 60b9 str r1, [r7, #8] 8027c82: 4613 mov r3, r2 8027c84: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; 8027c86: 68fb ldr r3, [r7, #12] 8027c88: 68ba ldr r2, [r7, #8] 8027c8a: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 8027c8c: 68fb ldr r3, [r7, #12] 8027c8e: 88fa ldrh r2, [r7, #6] 8027c90: 859a strh r2, [r3, #44] @ 0x2c huart->RxXferCount = Size; 8027c92: 68fb ldr r3, [r7, #12] 8027c94: 88fa ldrh r2, [r7, #6] 8027c96: 85da strh r2, [r3, #46] @ 0x2e huart->ErrorCode = HAL_UART_ERROR_NONE; 8027c98: 68fb ldr r3, [r7, #12] 8027c9a: 2200 movs r2, #0 8027c9c: 641a str r2, [r3, #64] @ 0x40 huart->RxState = HAL_UART_STATE_BUSY_RX; 8027c9e: 68fb ldr r3, [r7, #12] 8027ca0: 2222 movs r2, #34 @ 0x22 8027ca2: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(huart); 8027ca6: 68fb ldr r3, [r7, #12] 8027ca8: 2200 movs r2, #0 8027caa: f883 203c strb.w r2, [r3, #60] @ 0x3c if (huart->Init.Parity != UART_PARITY_NONE) 8027cae: 68fb ldr r3, [r7, #12] 8027cb0: 691b ldr r3, [r3, #16] 8027cb2: 2b00 cmp r3, #0 8027cb4: d007 beq.n 8027cc6 { /* Enable the UART Parity Error Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_PE); 8027cb6: 68fb ldr r3, [r7, #12] 8027cb8: 681b ldr r3, [r3, #0] 8027cba: 68da ldr r2, [r3, #12] 8027cbc: 68fb ldr r3, [r7, #12] 8027cbe: 681b ldr r3, [r3, #0] 8027cc0: f442 7280 orr.w r2, r2, #256 @ 0x100 8027cc4: 60da str r2, [r3, #12] } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_ENABLE_IT(huart, UART_IT_ERR); 8027cc6: 68fb ldr r3, [r7, #12] 8027cc8: 681b ldr r3, [r3, #0] 8027cca: 695a ldr r2, [r3, #20] 8027ccc: 68fb ldr r3, [r7, #12] 8027cce: 681b ldr r3, [r3, #0] 8027cd0: f042 0201 orr.w r2, r2, #1 8027cd4: 615a str r2, [r3, #20] /* Enable the UART Data Register not empty Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); 8027cd6: 68fb ldr r3, [r7, #12] 8027cd8: 681b ldr r3, [r3, #0] 8027cda: 68da ldr r2, [r3, #12] 8027cdc: 68fb ldr r3, [r7, #12] 8027cde: 681b ldr r3, [r3, #0] 8027ce0: f042 0220 orr.w r2, r2, #32 8027ce4: 60da str r2, [r3, #12] return HAL_OK; 8027ce6: 2300 movs r3, #0 } 8027ce8: 4618 mov r0, r3 8027cea: 3714 adds r7, #20 8027cec: 46bd mov sp, r7 8027cee: f85d 7b04 ldr.w r7, [sp], #4 8027cf2: 4770 bx lr 08027cf4 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 8027cf4: b480 push {r7} 8027cf6: b095 sub sp, #84 @ 0x54 8027cf8: af00 add r7, sp, #0 8027cfa: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8027cfc: 687b ldr r3, [r7, #4] 8027cfe: 681b ldr r3, [r3, #0] 8027d00: 330c adds r3, #12 8027d02: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027d04: 6b7b ldr r3, [r7, #52] @ 0x34 8027d06: e853 3f00 ldrex r3, [r3] 8027d0a: 633b str r3, [r7, #48] @ 0x30 return(result); 8027d0c: 6b3b ldr r3, [r7, #48] @ 0x30 8027d0e: f423 7390 bic.w r3, r3, #288 @ 0x120 8027d12: 64fb str r3, [r7, #76] @ 0x4c 8027d14: 687b ldr r3, [r7, #4] 8027d16: 681b ldr r3, [r3, #0] 8027d18: 330c adds r3, #12 8027d1a: 6cfa ldr r2, [r7, #76] @ 0x4c 8027d1c: 643a str r2, [r7, #64] @ 0x40 8027d1e: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027d20: 6bf9 ldr r1, [r7, #60] @ 0x3c 8027d22: 6c3a ldr r2, [r7, #64] @ 0x40 8027d24: e841 2300 strex r3, r2, [r1] 8027d28: 63bb str r3, [r7, #56] @ 0x38 return(result); 8027d2a: 6bbb ldr r3, [r7, #56] @ 0x38 8027d2c: 2b00 cmp r3, #0 8027d2e: d1e5 bne.n 8027cfc ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8027d30: 687b ldr r3, [r7, #4] 8027d32: 681b ldr r3, [r3, #0] 8027d34: 3314 adds r3, #20 8027d36: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027d38: 6a3b ldr r3, [r7, #32] 8027d3a: e853 3f00 ldrex r3, [r3] 8027d3e: 61fb str r3, [r7, #28] return(result); 8027d40: 69fb ldr r3, [r7, #28] 8027d42: f023 0301 bic.w r3, r3, #1 8027d46: 64bb str r3, [r7, #72] @ 0x48 8027d48: 687b ldr r3, [r7, #4] 8027d4a: 681b ldr r3, [r3, #0] 8027d4c: 3314 adds r3, #20 8027d4e: 6cba ldr r2, [r7, #72] @ 0x48 8027d50: 62fa str r2, [r7, #44] @ 0x2c 8027d52: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027d54: 6ab9 ldr r1, [r7, #40] @ 0x28 8027d56: 6afa ldr r2, [r7, #44] @ 0x2c 8027d58: e841 2300 strex r3, r2, [r1] 8027d5c: 627b str r3, [r7, #36] @ 0x24 return(result); 8027d5e: 6a7b ldr r3, [r7, #36] @ 0x24 8027d60: 2b00 cmp r3, #0 8027d62: d1e5 bne.n 8027d30 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8027d64: 687b ldr r3, [r7, #4] 8027d66: 6b1b ldr r3, [r3, #48] @ 0x30 8027d68: 2b01 cmp r3, #1 8027d6a: d119 bne.n 8027da0 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8027d6c: 687b ldr r3, [r7, #4] 8027d6e: 681b ldr r3, [r3, #0] 8027d70: 330c adds r3, #12 8027d72: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8027d74: 68fb ldr r3, [r7, #12] 8027d76: e853 3f00 ldrex r3, [r3] 8027d7a: 60bb str r3, [r7, #8] return(result); 8027d7c: 68bb ldr r3, [r7, #8] 8027d7e: f023 0310 bic.w r3, r3, #16 8027d82: 647b str r3, [r7, #68] @ 0x44 8027d84: 687b ldr r3, [r7, #4] 8027d86: 681b ldr r3, [r3, #0] 8027d88: 330c adds r3, #12 8027d8a: 6c7a ldr r2, [r7, #68] @ 0x44 8027d8c: 61ba str r2, [r7, #24] 8027d8e: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8027d90: 6979 ldr r1, [r7, #20] 8027d92: 69ba ldr r2, [r7, #24] 8027d94: e841 2300 strex r3, r2, [r1] 8027d98: 613b str r3, [r7, #16] return(result); 8027d9a: 693b ldr r3, [r7, #16] 8027d9c: 2b00 cmp r3, #0 8027d9e: d1e5 bne.n 8027d6c } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8027da0: 687b ldr r3, [r7, #4] 8027da2: 2220 movs r2, #32 8027da4: f883 203e strb.w r2, [r3, #62] @ 0x3e huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8027da8: 687b ldr r3, [r7, #4] 8027daa: 2200 movs r2, #0 8027dac: 631a str r2, [r3, #48] @ 0x30 } 8027dae: bf00 nop 8027db0: 3754 adds r7, #84 @ 0x54 8027db2: 46bd mov sp, r7 8027db4: f85d 7b04 ldr.w r7, [sp], #4 8027db8: 4770 bx lr 08027dba : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8027dba: b580 push {r7, lr} 8027dbc: b084 sub sp, #16 8027dbe: af00 add r7, sp, #0 8027dc0: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8027dc2: 687b ldr r3, [r7, #4] 8027dc4: 6b9b ldr r3, [r3, #56] @ 0x38 8027dc6: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; 8027dc8: 68fb ldr r3, [r7, #12] 8027dca: 2200 movs r2, #0 8027dcc: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; 8027dce: 68fb ldr r3, [r7, #12] 8027dd0: 2200 movs r2, #0 8027dd2: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8027dd4: 68f8 ldr r0, [r7, #12] 8027dd6: f7ff ff39 bl 8027c4c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8027dda: bf00 nop 8027ddc: 3710 adds r7, #16 8027dde: 46bd mov sp, r7 8027de0: bd80 pop {r7, pc} 08027de2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { 8027de2: b480 push {r7} 8027de4: b085 sub sp, #20 8027de6: af00 add r7, sp, #0 8027de8: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 8027dea: 687b ldr r3, [r7, #4] 8027dec: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8027df0: b2db uxtb r3, r3 8027df2: 2b21 cmp r3, #33 @ 0x21 8027df4: d13e bne.n 8027e74 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8027df6: 687b ldr r3, [r7, #4] 8027df8: 689b ldr r3, [r3, #8] 8027dfa: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8027dfe: d114 bne.n 8027e2a 8027e00: 687b ldr r3, [r7, #4] 8027e02: 691b ldr r3, [r3, #16] 8027e04: 2b00 cmp r3, #0 8027e06: d110 bne.n 8027e2a { tmp = (const uint16_t *) huart->pTxBuffPtr; 8027e08: 687b ldr r3, [r7, #4] 8027e0a: 6a1b ldr r3, [r3, #32] 8027e0c: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); 8027e0e: 68fb ldr r3, [r7, #12] 8027e10: 881b ldrh r3, [r3, #0] 8027e12: 461a mov r2, r3 8027e14: 687b ldr r3, [r7, #4] 8027e16: 681b ldr r3, [r3, #0] 8027e18: f3c2 0208 ubfx r2, r2, #0, #9 8027e1c: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; 8027e1e: 687b ldr r3, [r7, #4] 8027e20: 6a1b ldr r3, [r3, #32] 8027e22: 1c9a adds r2, r3, #2 8027e24: 687b ldr r3, [r7, #4] 8027e26: 621a str r2, [r3, #32] 8027e28: e008 b.n 8027e3c } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); 8027e2a: 687b ldr r3, [r7, #4] 8027e2c: 6a1b ldr r3, [r3, #32] 8027e2e: 1c59 adds r1, r3, #1 8027e30: 687a ldr r2, [r7, #4] 8027e32: 6211 str r1, [r2, #32] 8027e34: 781a ldrb r2, [r3, #0] 8027e36: 687b ldr r3, [r7, #4] 8027e38: 681b ldr r3, [r3, #0] 8027e3a: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) 8027e3c: 687b ldr r3, [r7, #4] 8027e3e: 8cdb ldrh r3, [r3, #38] @ 0x26 8027e40: b29b uxth r3, r3 8027e42: 3b01 subs r3, #1 8027e44: b29b uxth r3, r3 8027e46: 687a ldr r2, [r7, #4] 8027e48: 4619 mov r1, r3 8027e4a: 84d1 strh r1, [r2, #38] @ 0x26 8027e4c: 2b00 cmp r3, #0 8027e4e: d10f bne.n 8027e70 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); 8027e50: 687b ldr r3, [r7, #4] 8027e52: 681b ldr r3, [r3, #0] 8027e54: 68da ldr r2, [r3, #12] 8027e56: 687b ldr r3, [r7, #4] 8027e58: 681b ldr r3, [r3, #0] 8027e5a: f022 0280 bic.w r2, r2, #128 @ 0x80 8027e5e: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); 8027e60: 687b ldr r3, [r7, #4] 8027e62: 681b ldr r3, [r3, #0] 8027e64: 68da ldr r2, [r3, #12] 8027e66: 687b ldr r3, [r7, #4] 8027e68: 681b ldr r3, [r3, #0] 8027e6a: f042 0240 orr.w r2, r2, #64 @ 0x40 8027e6e: 60da str r2, [r3, #12] } return HAL_OK; 8027e70: 2300 movs r3, #0 8027e72: e000 b.n 8027e76 } else { return HAL_BUSY; 8027e74: 2302 movs r3, #2 } } 8027e76: 4618 mov r0, r3 8027e78: 3714 adds r7, #20 8027e7a: 46bd mov sp, r7 8027e7c: f85d 7b04 ldr.w r7, [sp], #4 8027e80: 4770 bx lr 08027e82 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 8027e82: b580 push {r7, lr} 8027e84: b082 sub sp, #8 8027e86: af00 add r7, sp, #0 8027e88: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); 8027e8a: 687b ldr r3, [r7, #4] 8027e8c: 681b ldr r3, [r3, #0] 8027e8e: 68da ldr r2, [r3, #12] 8027e90: 687b ldr r3, [r7, #4] 8027e92: 681b ldr r3, [r3, #0] 8027e94: f022 0240 bic.w r2, r2, #64 @ 0x40 8027e98: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8027e9a: 687b ldr r3, [r7, #4] 8027e9c: 2220 movs r2, #32 8027e9e: f883 203d strb.w r2, [r3, #61] @ 0x3d #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 8027ea2: 6878 ldr r0, [r7, #4] 8027ea4: f7f7 fe4a bl 801fb3c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; 8027ea8: 2300 movs r3, #0 } 8027eaa: 4618 mov r0, r3 8027eac: 3708 adds r7, #8 8027eae: 46bd mov sp, r7 8027eb0: bd80 pop {r7, pc} 08027eb2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { 8027eb2: b580 push {r7, lr} 8027eb4: b084 sub sp, #16 8027eb6: af00 add r7, sp, #0 8027eb8: 6078 str r0, [r7, #4] HAL_UART_RxCpltCallback(huart); //insert 8027eba: 6878 ldr r0, [r7, #4] 8027ebc: f7f7 fec0 bl 801fc40 return HAL_OK; //insert 8027ec0: 2300 movs r3, #0 } else { return HAL_BUSY; } } 8027ec2: 4618 mov r0, r3 8027ec4: 3710 adds r7, #16 8027ec6: 46bd mov sp, r7 8027ec8: bd80 pop {r7, pc} ... 08027ecc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8027ecc: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 8027ed0: b0c0 sub sp, #256 @ 0x100 8027ed2: af00 add r7, sp, #0 8027ed4: f8c7 00f4 str.w r0, [r7, #244] @ 0xf4 assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8027ed8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027edc: 681b ldr r3, [r3, #0] 8027ede: 691b ldr r3, [r3, #16] 8027ee0: f423 5040 bic.w r0, r3, #12288 @ 0x3000 8027ee4: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027ee8: 68d9 ldr r1, [r3, #12] 8027eea: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027eee: 681a ldr r2, [r3, #0] 8027ef0: ea40 0301 orr.w r3, r0, r1 8027ef4: 6113 str r3, [r2, #16] Set the M bits according to huart->Init.WordLength value Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 8027ef6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027efa: 689a ldr r2, [r3, #8] 8027efc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f00: 691b ldr r3, [r3, #16] 8027f02: 431a orrs r2, r3 8027f04: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f08: 695b ldr r3, [r3, #20] 8027f0a: 431a orrs r2, r3 8027f0c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f10: 69db ldr r3, [r3, #28] 8027f12: 4313 orrs r3, r2 8027f14: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 MODIFY_REG(huart->Instance->CR1, 8027f18: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f1c: 681b ldr r3, [r3, #0] 8027f1e: 68db ldr r3, [r3, #12] 8027f20: f423 4116 bic.w r1, r3, #38400 @ 0x9600 8027f24: f021 010c bic.w r1, r1, #12 8027f28: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f2c: 681a ldr r2, [r3, #0] 8027f2e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8027f32: 430b orrs r3, r1 8027f34: 60d3 str r3, [r2, #12] (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8027f36: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f3a: 681b ldr r3, [r3, #0] 8027f3c: 695b ldr r3, [r3, #20] 8027f3e: f423 7040 bic.w r0, r3, #768 @ 0x300 8027f42: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f46: 6999 ldr r1, [r3, #24] 8027f48: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f4c: 681a ldr r2, [r3, #0] 8027f4e: ea40 0301 orr.w r3, r0, r1 8027f52: 6153 str r3, [r2, #20] if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10)) { pclk = HAL_RCC_GetPCLK2Freq(); } #elif defined(USART6) if ((huart->Instance == USART1) || (huart->Instance == USART6)) 8027f54: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f58: 681a ldr r2, [r3, #0] 8027f5a: 4b8f ldr r3, [pc, #572] @ (8028198 ) 8027f5c: 429a cmp r2, r3 8027f5e: d005 beq.n 8027f6c 8027f60: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f64: 681a ldr r2, [r3, #0] 8027f66: 4b8d ldr r3, [pc, #564] @ (802819c ) 8027f68: 429a cmp r2, r3 8027f6a: d104 bne.n 8027f76 { pclk = HAL_RCC_GetPCLK2Freq(); 8027f6c: f7fc fdea bl 8024b44 8027f70: f8c7 00fc str.w r0, [r7, #252] @ 0xfc 8027f74: e003 b.n 8027f7e pclk = HAL_RCC_GetPCLK2Freq(); } #endif /* USART6 */ else { pclk = HAL_RCC_GetPCLK1Freq(); 8027f76: f7fc fdd1 bl 8024b1c 8027f7a: f8c7 00fc str.w r0, [r7, #252] @ 0xfc } /*-------------------------- USART BRR Configuration ---------------------*/ if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 8027f7e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027f82: 69db ldr r3, [r3, #28] 8027f84: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8027f88: f040 810c bne.w 80281a4 { huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); 8027f8c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8027f90: 2200 movs r2, #0 8027f92: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 8027f96: f8c7 20ec str.w r2, [r7, #236] @ 0xec 8027f9a: e9d7 453a ldrd r4, r5, [r7, #232] @ 0xe8 8027f9e: 4622 mov r2, r4 8027fa0: 462b mov r3, r5 8027fa2: 1891 adds r1, r2, r2 8027fa4: 65b9 str r1, [r7, #88] @ 0x58 8027fa6: 415b adcs r3, r3 8027fa8: 65fb str r3, [r7, #92] @ 0x5c 8027faa: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58 8027fae: 4621 mov r1, r4 8027fb0: eb12 0801 adds.w r8, r2, r1 8027fb4: 4629 mov r1, r5 8027fb6: eb43 0901 adc.w r9, r3, r1 8027fba: f04f 0200 mov.w r2, #0 8027fbe: f04f 0300 mov.w r3, #0 8027fc2: ea4f 03c9 mov.w r3, r9, lsl #3 8027fc6: ea43 7358 orr.w r3, r3, r8, lsr #29 8027fca: ea4f 02c8 mov.w r2, r8, lsl #3 8027fce: 4690 mov r8, r2 8027fd0: 4699 mov r9, r3 8027fd2: 4623 mov r3, r4 8027fd4: eb18 0303 adds.w r3, r8, r3 8027fd8: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8027fdc: 462b mov r3, r5 8027fde: eb49 0303 adc.w r3, r9, r3 8027fe2: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8027fe6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8027fea: 685b ldr r3, [r3, #4] 8027fec: 2200 movs r2, #0 8027fee: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8027ff2: f8c7 20dc str.w r2, [r7, #220] @ 0xdc 8027ff6: e9d7 1236 ldrd r1, r2, [r7, #216] @ 0xd8 8027ffa: 460b mov r3, r1 8027ffc: 18db adds r3, r3, r3 8027ffe: 653b str r3, [r7, #80] @ 0x50 8028000: 4613 mov r3, r2 8028002: eb42 0303 adc.w r3, r2, r3 8028006: 657b str r3, [r7, #84] @ 0x54 8028008: e9d7 2314 ldrd r2, r3, [r7, #80] @ 0x50 802800c: e9d7 0138 ldrd r0, r1, [r7, #224] @ 0xe0 8028010: f7e8 fd0c bl 8010a2c <__aeabi_uldivmod> 8028014: 4602 mov r2, r0 8028016: 460b mov r3, r1 8028018: 4b61 ldr r3, [pc, #388] @ (80281a0 ) 802801a: fba3 2302 umull r2, r3, r3, r2 802801e: 095b lsrs r3, r3, #5 8028020: 011c lsls r4, r3, #4 8028022: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8028026: 2200 movs r2, #0 8028028: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 802802c: f8c7 20d4 str.w r2, [r7, #212] @ 0xd4 8028030: e9d7 8934 ldrd r8, r9, [r7, #208] @ 0xd0 8028034: 4642 mov r2, r8 8028036: 464b mov r3, r9 8028038: 1891 adds r1, r2, r2 802803a: 64b9 str r1, [r7, #72] @ 0x48 802803c: 415b adcs r3, r3 802803e: 64fb str r3, [r7, #76] @ 0x4c 8028040: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48 8028044: 4641 mov r1, r8 8028046: eb12 0a01 adds.w sl, r2, r1 802804a: 4649 mov r1, r9 802804c: eb43 0b01 adc.w fp, r3, r1 8028050: f04f 0200 mov.w r2, #0 8028054: f04f 0300 mov.w r3, #0 8028058: ea4f 03cb mov.w r3, fp, lsl #3 802805c: ea43 735a orr.w r3, r3, sl, lsr #29 8028060: ea4f 02ca mov.w r2, sl, lsl #3 8028064: 4692 mov sl, r2 8028066: 469b mov fp, r3 8028068: 4643 mov r3, r8 802806a: eb1a 0303 adds.w r3, sl, r3 802806e: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8028072: 464b mov r3, r9 8028074: eb4b 0303 adc.w r3, fp, r3 8028078: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 802807c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8028080: 685b ldr r3, [r3, #4] 8028082: 2200 movs r2, #0 8028084: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8028088: f8c7 20c4 str.w r2, [r7, #196] @ 0xc4 802808c: e9d7 1230 ldrd r1, r2, [r7, #192] @ 0xc0 8028090: 460b mov r3, r1 8028092: 18db adds r3, r3, r3 8028094: 643b str r3, [r7, #64] @ 0x40 8028096: 4613 mov r3, r2 8028098: eb42 0303 adc.w r3, r2, r3 802809c: 647b str r3, [r7, #68] @ 0x44 802809e: e9d7 2310 ldrd r2, r3, [r7, #64] @ 0x40 80280a2: e9d7 0132 ldrd r0, r1, [r7, #200] @ 0xc8 80280a6: f7e8 fcc1 bl 8010a2c <__aeabi_uldivmod> 80280aa: 4602 mov r2, r0 80280ac: 460b mov r3, r1 80280ae: 4611 mov r1, r2 80280b0: 4b3b ldr r3, [pc, #236] @ (80281a0 ) 80280b2: fba3 2301 umull r2, r3, r3, r1 80280b6: 095b lsrs r3, r3, #5 80280b8: 2264 movs r2, #100 @ 0x64 80280ba: fb02 f303 mul.w r3, r2, r3 80280be: 1acb subs r3, r1, r3 80280c0: 00db lsls r3, r3, #3 80280c2: f103 0232 add.w r2, r3, #50 @ 0x32 80280c6: 4b36 ldr r3, [pc, #216] @ (80281a0 ) 80280c8: fba3 2302 umull r2, r3, r3, r2 80280cc: 095b lsrs r3, r3, #5 80280ce: 005b lsls r3, r3, #1 80280d0: f403 73f8 and.w r3, r3, #496 @ 0x1f0 80280d4: 441c add r4, r3 80280d6: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 80280da: 2200 movs r2, #0 80280dc: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 80280e0: f8c7 20bc str.w r2, [r7, #188] @ 0xbc 80280e4: e9d7 892e ldrd r8, r9, [r7, #184] @ 0xb8 80280e8: 4642 mov r2, r8 80280ea: 464b mov r3, r9 80280ec: 1891 adds r1, r2, r2 80280ee: 63b9 str r1, [r7, #56] @ 0x38 80280f0: 415b adcs r3, r3 80280f2: 63fb str r3, [r7, #60] @ 0x3c 80280f4: e9d7 230e ldrd r2, r3, [r7, #56] @ 0x38 80280f8: 4641 mov r1, r8 80280fa: 1851 adds r1, r2, r1 80280fc: 6339 str r1, [r7, #48] @ 0x30 80280fe: 4649 mov r1, r9 8028100: 414b adcs r3, r1 8028102: 637b str r3, [r7, #52] @ 0x34 8028104: f04f 0200 mov.w r2, #0 8028108: f04f 0300 mov.w r3, #0 802810c: e9d7 ab0c ldrd sl, fp, [r7, #48] @ 0x30 8028110: 4659 mov r1, fp 8028112: 00cb lsls r3, r1, #3 8028114: 4651 mov r1, sl 8028116: ea43 7351 orr.w r3, r3, r1, lsr #29 802811a: 4651 mov r1, sl 802811c: 00ca lsls r2, r1, #3 802811e: 4610 mov r0, r2 8028120: 4619 mov r1, r3 8028122: 4603 mov r3, r0 8028124: 4642 mov r2, r8 8028126: 189b adds r3, r3, r2 8028128: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 802812c: 464b mov r3, r9 802812e: 460a mov r2, r1 8028130: eb42 0303 adc.w r3, r2, r3 8028134: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8028138: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 802813c: 685b ldr r3, [r3, #4] 802813e: 2200 movs r2, #0 8028140: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 8028144: f8c7 20ac str.w r2, [r7, #172] @ 0xac 8028148: e9d7 122a ldrd r1, r2, [r7, #168] @ 0xa8 802814c: 460b mov r3, r1 802814e: 18db adds r3, r3, r3 8028150: 62bb str r3, [r7, #40] @ 0x28 8028152: 4613 mov r3, r2 8028154: eb42 0303 adc.w r3, r2, r3 8028158: 62fb str r3, [r7, #44] @ 0x2c 802815a: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28 802815e: e9d7 012c ldrd r0, r1, [r7, #176] @ 0xb0 8028162: f7e8 fc63 bl 8010a2c <__aeabi_uldivmod> 8028166: 4602 mov r2, r0 8028168: 460b mov r3, r1 802816a: 4b0d ldr r3, [pc, #52] @ (80281a0 ) 802816c: fba3 1302 umull r1, r3, r3, r2 8028170: 095b lsrs r3, r3, #5 8028172: 2164 movs r1, #100 @ 0x64 8028174: fb01 f303 mul.w r3, r1, r3 8028178: 1ad3 subs r3, r2, r3 802817a: 00db lsls r3, r3, #3 802817c: 3332 adds r3, #50 @ 0x32 802817e: 4a08 ldr r2, [pc, #32] @ (80281a0 ) 8028180: fba2 2303 umull r2, r3, r2, r3 8028184: 095b lsrs r3, r3, #5 8028186: f003 0207 and.w r2, r3, #7 802818a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 802818e: 681b ldr r3, [r3, #0] 8028190: 4422 add r2, r4 8028192: 609a str r2, [r3, #8] } else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } 8028194: e106 b.n 80283a4 8028196: bf00 nop 8028198: 40011000 .word 0x40011000 802819c: 40011400 .word 0x40011400 80281a0: 51eb851f .word 0x51eb851f huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 80281a4: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 80281a8: 2200 movs r2, #0 80281aa: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 80281ae: f8c7 20a4 str.w r2, [r7, #164] @ 0xa4 80281b2: e9d7 8928 ldrd r8, r9, [r7, #160] @ 0xa0 80281b6: 4642 mov r2, r8 80281b8: 464b mov r3, r9 80281ba: 1891 adds r1, r2, r2 80281bc: 6239 str r1, [r7, #32] 80281be: 415b adcs r3, r3 80281c0: 627b str r3, [r7, #36] @ 0x24 80281c2: e9d7 2308 ldrd r2, r3, [r7, #32] 80281c6: 4641 mov r1, r8 80281c8: 1854 adds r4, r2, r1 80281ca: 4649 mov r1, r9 80281cc: eb43 0501 adc.w r5, r3, r1 80281d0: f04f 0200 mov.w r2, #0 80281d4: f04f 0300 mov.w r3, #0 80281d8: 00eb lsls r3, r5, #3 80281da: ea43 7354 orr.w r3, r3, r4, lsr #29 80281de: 00e2 lsls r2, r4, #3 80281e0: 4614 mov r4, r2 80281e2: 461d mov r5, r3 80281e4: 4643 mov r3, r8 80281e6: 18e3 adds r3, r4, r3 80281e8: f8c7 3098 str.w r3, [r7, #152] @ 0x98 80281ec: 464b mov r3, r9 80281ee: eb45 0303 adc.w r3, r5, r3 80281f2: f8c7 309c str.w r3, [r7, #156] @ 0x9c 80281f6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80281fa: 685b ldr r3, [r3, #4] 80281fc: 2200 movs r2, #0 80281fe: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8028202: f8c7 2094 str.w r2, [r7, #148] @ 0x94 8028206: f04f 0200 mov.w r2, #0 802820a: f04f 0300 mov.w r3, #0 802820e: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90 8028212: 4629 mov r1, r5 8028214: 008b lsls r3, r1, #2 8028216: 4621 mov r1, r4 8028218: ea43 7391 orr.w r3, r3, r1, lsr #30 802821c: 4621 mov r1, r4 802821e: 008a lsls r2, r1, #2 8028220: e9d7 0126 ldrd r0, r1, [r7, #152] @ 0x98 8028224: f7e8 fc02 bl 8010a2c <__aeabi_uldivmod> 8028228: 4602 mov r2, r0 802822a: 460b mov r3, r1 802822c: 4b60 ldr r3, [pc, #384] @ (80283b0 ) 802822e: fba3 2302 umull r2, r3, r3, r2 8028232: 095b lsrs r3, r3, #5 8028234: 011c lsls r4, r3, #4 8028236: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 802823a: 2200 movs r2, #0 802823c: f8c7 3088 str.w r3, [r7, #136] @ 0x88 8028240: f8c7 208c str.w r2, [r7, #140] @ 0x8c 8028244: e9d7 8922 ldrd r8, r9, [r7, #136] @ 0x88 8028248: 4642 mov r2, r8 802824a: 464b mov r3, r9 802824c: 1891 adds r1, r2, r2 802824e: 61b9 str r1, [r7, #24] 8028250: 415b adcs r3, r3 8028252: 61fb str r3, [r7, #28] 8028254: e9d7 2306 ldrd r2, r3, [r7, #24] 8028258: 4641 mov r1, r8 802825a: 1851 adds r1, r2, r1 802825c: 6139 str r1, [r7, #16] 802825e: 4649 mov r1, r9 8028260: 414b adcs r3, r1 8028262: 617b str r3, [r7, #20] 8028264: f04f 0200 mov.w r2, #0 8028268: f04f 0300 mov.w r3, #0 802826c: e9d7 ab04 ldrd sl, fp, [r7, #16] 8028270: 4659 mov r1, fp 8028272: 00cb lsls r3, r1, #3 8028274: 4651 mov r1, sl 8028276: ea43 7351 orr.w r3, r3, r1, lsr #29 802827a: 4651 mov r1, sl 802827c: 00ca lsls r2, r1, #3 802827e: 4610 mov r0, r2 8028280: 4619 mov r1, r3 8028282: 4603 mov r3, r0 8028284: 4642 mov r2, r8 8028286: 189b adds r3, r3, r2 8028288: f8c7 3080 str.w r3, [r7, #128] @ 0x80 802828c: 464b mov r3, r9 802828e: 460a mov r2, r1 8028290: eb42 0303 adc.w r3, r2, r3 8028294: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8028298: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 802829c: 685b ldr r3, [r3, #4] 802829e: 2200 movs r2, #0 80282a0: 67bb str r3, [r7, #120] @ 0x78 80282a2: 67fa str r2, [r7, #124] @ 0x7c 80282a4: f04f 0200 mov.w r2, #0 80282a8: f04f 0300 mov.w r3, #0 80282ac: e9d7 891e ldrd r8, r9, [r7, #120] @ 0x78 80282b0: 4649 mov r1, r9 80282b2: 008b lsls r3, r1, #2 80282b4: 4641 mov r1, r8 80282b6: ea43 7391 orr.w r3, r3, r1, lsr #30 80282ba: 4641 mov r1, r8 80282bc: 008a lsls r2, r1, #2 80282be: e9d7 0120 ldrd r0, r1, [r7, #128] @ 0x80 80282c2: f7e8 fbb3 bl 8010a2c <__aeabi_uldivmod> 80282c6: 4602 mov r2, r0 80282c8: 460b mov r3, r1 80282ca: 4611 mov r1, r2 80282cc: 4b38 ldr r3, [pc, #224] @ (80283b0 ) 80282ce: fba3 2301 umull r2, r3, r3, r1 80282d2: 095b lsrs r3, r3, #5 80282d4: 2264 movs r2, #100 @ 0x64 80282d6: fb02 f303 mul.w r3, r2, r3 80282da: 1acb subs r3, r1, r3 80282dc: 011b lsls r3, r3, #4 80282de: 3332 adds r3, #50 @ 0x32 80282e0: 4a33 ldr r2, [pc, #204] @ (80283b0 ) 80282e2: fba2 2303 umull r2, r3, r2, r3 80282e6: 095b lsrs r3, r3, #5 80282e8: f003 03f0 and.w r3, r3, #240 @ 0xf0 80282ec: 441c add r4, r3 80282ee: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 80282f2: 2200 movs r2, #0 80282f4: 673b str r3, [r7, #112] @ 0x70 80282f6: 677a str r2, [r7, #116] @ 0x74 80282f8: e9d7 891c ldrd r8, r9, [r7, #112] @ 0x70 80282fc: 4642 mov r2, r8 80282fe: 464b mov r3, r9 8028300: 1891 adds r1, r2, r2 8028302: 60b9 str r1, [r7, #8] 8028304: 415b adcs r3, r3 8028306: 60fb str r3, [r7, #12] 8028308: e9d7 2302 ldrd r2, r3, [r7, #8] 802830c: 4641 mov r1, r8 802830e: 1851 adds r1, r2, r1 8028310: 6039 str r1, [r7, #0] 8028312: 4649 mov r1, r9 8028314: 414b adcs r3, r1 8028316: 607b str r3, [r7, #4] 8028318: f04f 0200 mov.w r2, #0 802831c: f04f 0300 mov.w r3, #0 8028320: e9d7 ab00 ldrd sl, fp, [r7] 8028324: 4659 mov r1, fp 8028326: 00cb lsls r3, r1, #3 8028328: 4651 mov r1, sl 802832a: ea43 7351 orr.w r3, r3, r1, lsr #29 802832e: 4651 mov r1, sl 8028330: 00ca lsls r2, r1, #3 8028332: 4610 mov r0, r2 8028334: 4619 mov r1, r3 8028336: 4603 mov r3, r0 8028338: 4642 mov r2, r8 802833a: 189b adds r3, r3, r2 802833c: 66bb str r3, [r7, #104] @ 0x68 802833e: 464b mov r3, r9 8028340: 460a mov r2, r1 8028342: eb42 0303 adc.w r3, r2, r3 8028346: 66fb str r3, [r7, #108] @ 0x6c 8028348: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 802834c: 685b ldr r3, [r3, #4] 802834e: 2200 movs r2, #0 8028350: 663b str r3, [r7, #96] @ 0x60 8028352: 667a str r2, [r7, #100] @ 0x64 8028354: f04f 0200 mov.w r2, #0 8028358: f04f 0300 mov.w r3, #0 802835c: e9d7 8918 ldrd r8, r9, [r7, #96] @ 0x60 8028360: 4649 mov r1, r9 8028362: 008b lsls r3, r1, #2 8028364: 4641 mov r1, r8 8028366: ea43 7391 orr.w r3, r3, r1, lsr #30 802836a: 4641 mov r1, r8 802836c: 008a lsls r2, r1, #2 802836e: e9d7 011a ldrd r0, r1, [r7, #104] @ 0x68 8028372: f7e8 fb5b bl 8010a2c <__aeabi_uldivmod> 8028376: 4602 mov r2, r0 8028378: 460b mov r3, r1 802837a: 4b0d ldr r3, [pc, #52] @ (80283b0 ) 802837c: fba3 1302 umull r1, r3, r3, r2 8028380: 095b lsrs r3, r3, #5 8028382: 2164 movs r1, #100 @ 0x64 8028384: fb01 f303 mul.w r3, r1, r3 8028388: 1ad3 subs r3, r2, r3 802838a: 011b lsls r3, r3, #4 802838c: 3332 adds r3, #50 @ 0x32 802838e: 4a08 ldr r2, [pc, #32] @ (80283b0 ) 8028390: fba2 2303 umull r2, r3, r2, r3 8028394: 095b lsrs r3, r3, #5 8028396: f003 020f and.w r2, r3, #15 802839a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 802839e: 681b ldr r3, [r3, #0] 80283a0: 4422 add r2, r4 80283a2: 609a str r2, [r3, #8] } 80283a4: bf00 nop 80283a6: f507 7780 add.w r7, r7, #256 @ 0x100 80283aa: 46bd mov sp, r7 80283ac: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 80283b0: 51eb851f .word 0x51eb851f 080283b4 : 80283b4: b40e push {r1, r2, r3} 80283b6: b500 push {lr} 80283b8: b09c sub sp, #112 @ 0x70 80283ba: ab1d add r3, sp, #116 @ 0x74 80283bc: 9002 str r0, [sp, #8] 80283be: 9006 str r0, [sp, #24] 80283c0: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 80283c4: 4809 ldr r0, [pc, #36] @ (80283ec ) 80283c6: 9107 str r1, [sp, #28] 80283c8: 9104 str r1, [sp, #16] 80283ca: 4909 ldr r1, [pc, #36] @ (80283f0 ) 80283cc: f853 2b04 ldr.w r2, [r3], #4 80283d0: 9105 str r1, [sp, #20] 80283d2: 6800 ldr r0, [r0, #0] 80283d4: 9301 str r3, [sp, #4] 80283d6: a902 add r1, sp, #8 80283d8: f000 f9b4 bl 8028744 <_svfiprintf_r> 80283dc: 9b02 ldr r3, [sp, #8] 80283de: 2200 movs r2, #0 80283e0: 701a strb r2, [r3, #0] 80283e2: b01c add sp, #112 @ 0x70 80283e4: f85d eb04 ldr.w lr, [sp], #4 80283e8: b003 add sp, #12 80283ea: 4770 bx lr 80283ec: 20000044 .word 0x20000044 80283f0: ffff0208 .word 0xffff0208 080283f4 <_vsiprintf_r>: 80283f4: b500 push {lr} 80283f6: b09b sub sp, #108 @ 0x6c 80283f8: 9100 str r1, [sp, #0] 80283fa: 9104 str r1, [sp, #16] 80283fc: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 8028400: 9105 str r1, [sp, #20] 8028402: 9102 str r1, [sp, #8] 8028404: 4905 ldr r1, [pc, #20] @ (802841c <_vsiprintf_r+0x28>) 8028406: 9103 str r1, [sp, #12] 8028408: 4669 mov r1, sp 802840a: f000 f99b bl 8028744 <_svfiprintf_r> 802840e: 9b00 ldr r3, [sp, #0] 8028410: 2200 movs r2, #0 8028412: 701a strb r2, [r3, #0] 8028414: b01b add sp, #108 @ 0x6c 8028416: f85d fb04 ldr.w pc, [sp], #4 802841a: bf00 nop 802841c: ffff0208 .word 0xffff0208 08028420 : 8028420: 4613 mov r3, r2 8028422: 460a mov r2, r1 8028424: 4601 mov r1, r0 8028426: 4802 ldr r0, [pc, #8] @ (8028430 ) 8028428: 6800 ldr r0, [r0, #0] 802842a: f7ff bfe3 b.w 80283f4 <_vsiprintf_r> 802842e: bf00 nop 8028430: 20000044 .word 0x20000044 08028434 : 8028434: 4402 add r2, r0 8028436: 4603 mov r3, r0 8028438: 4293 cmp r3, r2 802843a: d100 bne.n 802843e 802843c: 4770 bx lr 802843e: f803 1b01 strb.w r1, [r3], #1 8028442: e7f9 b.n 8028438 08028444 <__errno>: 8028444: 4b01 ldr r3, [pc, #4] @ (802844c <__errno+0x8>) 8028446: 6818 ldr r0, [r3, #0] 8028448: 4770 bx lr 802844a: bf00 nop 802844c: 20000044 .word 0x20000044 08028450 <__libc_init_array>: 8028450: b570 push {r4, r5, r6, lr} 8028452: 4d0d ldr r5, [pc, #52] @ (8028488 <__libc_init_array+0x38>) 8028454: 4c0d ldr r4, [pc, #52] @ (802848c <__libc_init_array+0x3c>) 8028456: 1b64 subs r4, r4, r5 8028458: 10a4 asrs r4, r4, #2 802845a: 2600 movs r6, #0 802845c: 42a6 cmp r6, r4 802845e: d109 bne.n 8028474 <__libc_init_array+0x24> 8028460: 4d0b ldr r5, [pc, #44] @ (8028490 <__libc_init_array+0x40>) 8028462: 4c0c ldr r4, [pc, #48] @ (8028494 <__libc_init_array+0x44>) 8028464: f001 fd1a bl 8029e9c <_init> 8028468: 1b64 subs r4, r4, r5 802846a: 10a4 asrs r4, r4, #2 802846c: 2600 movs r6, #0 802846e: 42a6 cmp r6, r4 8028470: d105 bne.n 802847e <__libc_init_array+0x2e> 8028472: bd70 pop {r4, r5, r6, pc} 8028474: f855 3b04 ldr.w r3, [r5], #4 8028478: 4798 blx r3 802847a: 3601 adds r6, #1 802847c: e7ee b.n 802845c <__libc_init_array+0xc> 802847e: f855 3b04 ldr.w r3, [r5], #4 8028482: 4798 blx r3 8028484: 3601 adds r6, #1 8028486: e7f2 b.n 802846e <__libc_init_array+0x1e> 8028488: 0802db1c .word 0x0802db1c 802848c: 0802db1c .word 0x0802db1c 8028490: 0802db1c .word 0x0802db1c 8028494: 0802db20 .word 0x0802db20 08028498 <__retarget_lock_acquire_recursive>: 8028498: 4770 bx lr 0802849a <__retarget_lock_release_recursive>: 802849a: 4770 bx lr 0802849c <_free_r>: 802849c: b538 push {r3, r4, r5, lr} 802849e: 4605 mov r5, r0 80284a0: 2900 cmp r1, #0 80284a2: d041 beq.n 8028528 <_free_r+0x8c> 80284a4: f851 3c04 ldr.w r3, [r1, #-4] 80284a8: 1f0c subs r4, r1, #4 80284aa: 2b00 cmp r3, #0 80284ac: bfb8 it lt 80284ae: 18e4 addlt r4, r4, r3 80284b0: f000 f8e0 bl 8028674 <__malloc_lock> 80284b4: 4a1d ldr r2, [pc, #116] @ (802852c <_free_r+0x90>) 80284b6: 6813 ldr r3, [r2, #0] 80284b8: b933 cbnz r3, 80284c8 <_free_r+0x2c> 80284ba: 6063 str r3, [r4, #4] 80284bc: 6014 str r4, [r2, #0] 80284be: 4628 mov r0, r5 80284c0: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 80284c4: f000 b8dc b.w 8028680 <__malloc_unlock> 80284c8: 42a3 cmp r3, r4 80284ca: d908 bls.n 80284de <_free_r+0x42> 80284cc: 6820 ldr r0, [r4, #0] 80284ce: 1821 adds r1, r4, r0 80284d0: 428b cmp r3, r1 80284d2: bf01 itttt eq 80284d4: 6819 ldreq r1, [r3, #0] 80284d6: 685b ldreq r3, [r3, #4] 80284d8: 1809 addeq r1, r1, r0 80284da: 6021 streq r1, [r4, #0] 80284dc: e7ed b.n 80284ba <_free_r+0x1e> 80284de: 461a mov r2, r3 80284e0: 685b ldr r3, [r3, #4] 80284e2: b10b cbz r3, 80284e8 <_free_r+0x4c> 80284e4: 42a3 cmp r3, r4 80284e6: d9fa bls.n 80284de <_free_r+0x42> 80284e8: 6811 ldr r1, [r2, #0] 80284ea: 1850 adds r0, r2, r1 80284ec: 42a0 cmp r0, r4 80284ee: d10b bne.n 8028508 <_free_r+0x6c> 80284f0: 6820 ldr r0, [r4, #0] 80284f2: 4401 add r1, r0 80284f4: 1850 adds r0, r2, r1 80284f6: 4283 cmp r3, r0 80284f8: 6011 str r1, [r2, #0] 80284fa: d1e0 bne.n 80284be <_free_r+0x22> 80284fc: 6818 ldr r0, [r3, #0] 80284fe: 685b ldr r3, [r3, #4] 8028500: 6053 str r3, [r2, #4] 8028502: 4408 add r0, r1 8028504: 6010 str r0, [r2, #0] 8028506: e7da b.n 80284be <_free_r+0x22> 8028508: d902 bls.n 8028510 <_free_r+0x74> 802850a: 230c movs r3, #12 802850c: 602b str r3, [r5, #0] 802850e: e7d6 b.n 80284be <_free_r+0x22> 8028510: 6820 ldr r0, [r4, #0] 8028512: 1821 adds r1, r4, r0 8028514: 428b cmp r3, r1 8028516: bf04 itt eq 8028518: 6819 ldreq r1, [r3, #0] 802851a: 685b ldreq r3, [r3, #4] 802851c: 6063 str r3, [r4, #4] 802851e: bf04 itt eq 8028520: 1809 addeq r1, r1, r0 8028522: 6021 streq r1, [r4, #0] 8028524: 6054 str r4, [r2, #4] 8028526: e7ca b.n 80284be <_free_r+0x22> 8028528: bd38 pop {r3, r4, r5, pc} 802852a: bf00 nop 802852c: 200055b4 .word 0x200055b4 08028530 : 8028530: b570 push {r4, r5, r6, lr} 8028532: 4e0f ldr r6, [pc, #60] @ (8028570 ) 8028534: 460c mov r4, r1 8028536: 6831 ldr r1, [r6, #0] 8028538: 4605 mov r5, r0 802853a: b911 cbnz r1, 8028542 802853c: f000 fba6 bl 8028c8c <_sbrk_r> 8028540: 6030 str r0, [r6, #0] 8028542: 4621 mov r1, r4 8028544: 4628 mov r0, r5 8028546: f000 fba1 bl 8028c8c <_sbrk_r> 802854a: 1c43 adds r3, r0, #1 802854c: d103 bne.n 8028556 802854e: f04f 34ff mov.w r4, #4294967295 8028552: 4620 mov r0, r4 8028554: bd70 pop {r4, r5, r6, pc} 8028556: 1cc4 adds r4, r0, #3 8028558: f024 0403 bic.w r4, r4, #3 802855c: 42a0 cmp r0, r4 802855e: d0f8 beq.n 8028552 8028560: 1a21 subs r1, r4, r0 8028562: 4628 mov r0, r5 8028564: f000 fb92 bl 8028c8c <_sbrk_r> 8028568: 3001 adds r0, #1 802856a: d1f2 bne.n 8028552 802856c: e7ef b.n 802854e 802856e: bf00 nop 8028570: 200055b0 .word 0x200055b0 08028574 <_malloc_r>: 8028574: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8028578: 1ccd adds r5, r1, #3 802857a: f025 0503 bic.w r5, r5, #3 802857e: 3508 adds r5, #8 8028580: 2d0c cmp r5, #12 8028582: bf38 it cc 8028584: 250c movcc r5, #12 8028586: 2d00 cmp r5, #0 8028588: 4606 mov r6, r0 802858a: db01 blt.n 8028590 <_malloc_r+0x1c> 802858c: 42a9 cmp r1, r5 802858e: d904 bls.n 802859a <_malloc_r+0x26> 8028590: 230c movs r3, #12 8028592: 6033 str r3, [r6, #0] 8028594: 2000 movs r0, #0 8028596: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 802859a: f8df 80d4 ldr.w r8, [pc, #212] @ 8028670 <_malloc_r+0xfc> 802859e: f000 f869 bl 8028674 <__malloc_lock> 80285a2: f8d8 3000 ldr.w r3, [r8] 80285a6: 461c mov r4, r3 80285a8: bb44 cbnz r4, 80285fc <_malloc_r+0x88> 80285aa: 4629 mov r1, r5 80285ac: 4630 mov r0, r6 80285ae: f7ff ffbf bl 8028530 80285b2: 1c43 adds r3, r0, #1 80285b4: 4604 mov r4, r0 80285b6: d158 bne.n 802866a <_malloc_r+0xf6> 80285b8: f8d8 4000 ldr.w r4, [r8] 80285bc: 4627 mov r7, r4 80285be: 2f00 cmp r7, #0 80285c0: d143 bne.n 802864a <_malloc_r+0xd6> 80285c2: 2c00 cmp r4, #0 80285c4: d04b beq.n 802865e <_malloc_r+0xea> 80285c6: 6823 ldr r3, [r4, #0] 80285c8: 4639 mov r1, r7 80285ca: 4630 mov r0, r6 80285cc: eb04 0903 add.w r9, r4, r3 80285d0: f000 fb5c bl 8028c8c <_sbrk_r> 80285d4: 4581 cmp r9, r0 80285d6: d142 bne.n 802865e <_malloc_r+0xea> 80285d8: 6821 ldr r1, [r4, #0] 80285da: 1a6d subs r5, r5, r1 80285dc: 4629 mov r1, r5 80285de: 4630 mov r0, r6 80285e0: f7ff ffa6 bl 8028530 80285e4: 3001 adds r0, #1 80285e6: d03a beq.n 802865e <_malloc_r+0xea> 80285e8: 6823 ldr r3, [r4, #0] 80285ea: 442b add r3, r5 80285ec: 6023 str r3, [r4, #0] 80285ee: f8d8 3000 ldr.w r3, [r8] 80285f2: 685a ldr r2, [r3, #4] 80285f4: bb62 cbnz r2, 8028650 <_malloc_r+0xdc> 80285f6: f8c8 7000 str.w r7, [r8] 80285fa: e00f b.n 802861c <_malloc_r+0xa8> 80285fc: 6822 ldr r2, [r4, #0] 80285fe: 1b52 subs r2, r2, r5 8028600: d420 bmi.n 8028644 <_malloc_r+0xd0> 8028602: 2a0b cmp r2, #11 8028604: d917 bls.n 8028636 <_malloc_r+0xc2> 8028606: 1961 adds r1, r4, r5 8028608: 42a3 cmp r3, r4 802860a: 6025 str r5, [r4, #0] 802860c: bf18 it ne 802860e: 6059 strne r1, [r3, #4] 8028610: 6863 ldr r3, [r4, #4] 8028612: bf08 it eq 8028614: f8c8 1000 streq.w r1, [r8] 8028618: 5162 str r2, [r4, r5] 802861a: 604b str r3, [r1, #4] 802861c: 4630 mov r0, r6 802861e: f000 f82f bl 8028680 <__malloc_unlock> 8028622: f104 000b add.w r0, r4, #11 8028626: 1d23 adds r3, r4, #4 8028628: f020 0007 bic.w r0, r0, #7 802862c: 1ac2 subs r2, r0, r3 802862e: bf1c itt ne 8028630: 1a1b subne r3, r3, r0 8028632: 50a3 strne r3, [r4, r2] 8028634: e7af b.n 8028596 <_malloc_r+0x22> 8028636: 6862 ldr r2, [r4, #4] 8028638: 42a3 cmp r3, r4 802863a: bf0c ite eq 802863c: f8c8 2000 streq.w r2, [r8] 8028640: 605a strne r2, [r3, #4] 8028642: e7eb b.n 802861c <_malloc_r+0xa8> 8028644: 4623 mov r3, r4 8028646: 6864 ldr r4, [r4, #4] 8028648: e7ae b.n 80285a8 <_malloc_r+0x34> 802864a: 463c mov r4, r7 802864c: 687f ldr r7, [r7, #4] 802864e: e7b6 b.n 80285be <_malloc_r+0x4a> 8028650: 461a mov r2, r3 8028652: 685b ldr r3, [r3, #4] 8028654: 42a3 cmp r3, r4 8028656: d1fb bne.n 8028650 <_malloc_r+0xdc> 8028658: 2300 movs r3, #0 802865a: 6053 str r3, [r2, #4] 802865c: e7de b.n 802861c <_malloc_r+0xa8> 802865e: 230c movs r3, #12 8028660: 6033 str r3, [r6, #0] 8028662: 4630 mov r0, r6 8028664: f000 f80c bl 8028680 <__malloc_unlock> 8028668: e794 b.n 8028594 <_malloc_r+0x20> 802866a: 6005 str r5, [r0, #0] 802866c: e7d6 b.n 802861c <_malloc_r+0xa8> 802866e: bf00 nop 8028670: 200055b4 .word 0x200055b4 08028674 <__malloc_lock>: 8028674: 4801 ldr r0, [pc, #4] @ (802867c <__malloc_lock+0x8>) 8028676: f7ff bf0f b.w 8028498 <__retarget_lock_acquire_recursive> 802867a: bf00 nop 802867c: 200055ac .word 0x200055ac 08028680 <__malloc_unlock>: 8028680: 4801 ldr r0, [pc, #4] @ (8028688 <__malloc_unlock+0x8>) 8028682: f7ff bf0a b.w 802849a <__retarget_lock_release_recursive> 8028686: bf00 nop 8028688: 200055ac .word 0x200055ac 0802868c <__ssputs_r>: 802868c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8028690: 688e ldr r6, [r1, #8] 8028692: 461f mov r7, r3 8028694: 42be cmp r6, r7 8028696: 680b ldr r3, [r1, #0] 8028698: 4682 mov sl, r0 802869a: 460c mov r4, r1 802869c: 4690 mov r8, r2 802869e: d82d bhi.n 80286fc <__ssputs_r+0x70> 80286a0: f9b1 200c ldrsh.w r2, [r1, #12] 80286a4: f412 6f90 tst.w r2, #1152 @ 0x480 80286a8: d026 beq.n 80286f8 <__ssputs_r+0x6c> 80286aa: 6965 ldr r5, [r4, #20] 80286ac: 6909 ldr r1, [r1, #16] 80286ae: eb05 0545 add.w r5, r5, r5, lsl #1 80286b2: eba3 0901 sub.w r9, r3, r1 80286b6: eb05 75d5 add.w r5, r5, r5, lsr #31 80286ba: 1c7b adds r3, r7, #1 80286bc: 444b add r3, r9 80286be: 106d asrs r5, r5, #1 80286c0: 429d cmp r5, r3 80286c2: bf38 it cc 80286c4: 461d movcc r5, r3 80286c6: 0553 lsls r3, r2, #21 80286c8: d527 bpl.n 802871a <__ssputs_r+0x8e> 80286ca: 4629 mov r1, r5 80286cc: f7ff ff52 bl 8028574 <_malloc_r> 80286d0: 4606 mov r6, r0 80286d2: b360 cbz r0, 802872e <__ssputs_r+0xa2> 80286d4: 6921 ldr r1, [r4, #16] 80286d6: 464a mov r2, r9 80286d8: f000 fae8 bl 8028cac 80286dc: 89a3 ldrh r3, [r4, #12] 80286de: f423 6390 bic.w r3, r3, #1152 @ 0x480 80286e2: f043 0380 orr.w r3, r3, #128 @ 0x80 80286e6: 81a3 strh r3, [r4, #12] 80286e8: 6126 str r6, [r4, #16] 80286ea: 6165 str r5, [r4, #20] 80286ec: 444e add r6, r9 80286ee: eba5 0509 sub.w r5, r5, r9 80286f2: 6026 str r6, [r4, #0] 80286f4: 60a5 str r5, [r4, #8] 80286f6: 463e mov r6, r7 80286f8: 42be cmp r6, r7 80286fa: d900 bls.n 80286fe <__ssputs_r+0x72> 80286fc: 463e mov r6, r7 80286fe: 6820 ldr r0, [r4, #0] 8028700: 4632 mov r2, r6 8028702: 4641 mov r1, r8 8028704: f000 faa8 bl 8028c58 8028708: 68a3 ldr r3, [r4, #8] 802870a: 1b9b subs r3, r3, r6 802870c: 60a3 str r3, [r4, #8] 802870e: 6823 ldr r3, [r4, #0] 8028710: 4433 add r3, r6 8028712: 6023 str r3, [r4, #0] 8028714: 2000 movs r0, #0 8028716: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 802871a: 462a mov r2, r5 802871c: f000 fad4 bl 8028cc8 <_realloc_r> 8028720: 4606 mov r6, r0 8028722: 2800 cmp r0, #0 8028724: d1e0 bne.n 80286e8 <__ssputs_r+0x5c> 8028726: 6921 ldr r1, [r4, #16] 8028728: 4650 mov r0, sl 802872a: f7ff feb7 bl 802849c <_free_r> 802872e: 230c movs r3, #12 8028730: f8ca 3000 str.w r3, [sl] 8028734: 89a3 ldrh r3, [r4, #12] 8028736: f043 0340 orr.w r3, r3, #64 @ 0x40 802873a: 81a3 strh r3, [r4, #12] 802873c: f04f 30ff mov.w r0, #4294967295 8028740: e7e9 b.n 8028716 <__ssputs_r+0x8a> ... 08028744 <_svfiprintf_r>: 8028744: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8028748: 4698 mov r8, r3 802874a: 898b ldrh r3, [r1, #12] 802874c: 061b lsls r3, r3, #24 802874e: b09d sub sp, #116 @ 0x74 8028750: 4607 mov r7, r0 8028752: 460d mov r5, r1 8028754: 4614 mov r4, r2 8028756: d510 bpl.n 802877a <_svfiprintf_r+0x36> 8028758: 690b ldr r3, [r1, #16] 802875a: b973 cbnz r3, 802877a <_svfiprintf_r+0x36> 802875c: 2140 movs r1, #64 @ 0x40 802875e: f7ff ff09 bl 8028574 <_malloc_r> 8028762: 6028 str r0, [r5, #0] 8028764: 6128 str r0, [r5, #16] 8028766: b930 cbnz r0, 8028776 <_svfiprintf_r+0x32> 8028768: 230c movs r3, #12 802876a: 603b str r3, [r7, #0] 802876c: f04f 30ff mov.w r0, #4294967295 8028770: b01d add sp, #116 @ 0x74 8028772: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8028776: 2340 movs r3, #64 @ 0x40 8028778: 616b str r3, [r5, #20] 802877a: 2300 movs r3, #0 802877c: 9309 str r3, [sp, #36] @ 0x24 802877e: 2320 movs r3, #32 8028780: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8028784: f8cd 800c str.w r8, [sp, #12] 8028788: 2330 movs r3, #48 @ 0x30 802878a: f8df 819c ldr.w r8, [pc, #412] @ 8028928 <_svfiprintf_r+0x1e4> 802878e: f88d 302a strb.w r3, [sp, #42] @ 0x2a 8028792: f04f 0901 mov.w r9, #1 8028796: 4623 mov r3, r4 8028798: 469a mov sl, r3 802879a: f813 2b01 ldrb.w r2, [r3], #1 802879e: b10a cbz r2, 80287a4 <_svfiprintf_r+0x60> 80287a0: 2a25 cmp r2, #37 @ 0x25 80287a2: d1f9 bne.n 8028798 <_svfiprintf_r+0x54> 80287a4: ebba 0b04 subs.w fp, sl, r4 80287a8: d00b beq.n 80287c2 <_svfiprintf_r+0x7e> 80287aa: 465b mov r3, fp 80287ac: 4622 mov r2, r4 80287ae: 4629 mov r1, r5 80287b0: 4638 mov r0, r7 80287b2: f7ff ff6b bl 802868c <__ssputs_r> 80287b6: 3001 adds r0, #1 80287b8: f000 80a7 beq.w 802890a <_svfiprintf_r+0x1c6> 80287bc: 9a09 ldr r2, [sp, #36] @ 0x24 80287be: 445a add r2, fp 80287c0: 9209 str r2, [sp, #36] @ 0x24 80287c2: f89a 3000 ldrb.w r3, [sl] 80287c6: 2b00 cmp r3, #0 80287c8: f000 809f beq.w 802890a <_svfiprintf_r+0x1c6> 80287cc: 2300 movs r3, #0 80287ce: f04f 32ff mov.w r2, #4294967295 80287d2: e9cd 2305 strd r2, r3, [sp, #20] 80287d6: f10a 0a01 add.w sl, sl, #1 80287da: 9304 str r3, [sp, #16] 80287dc: 9307 str r3, [sp, #28] 80287de: f88d 3053 strb.w r3, [sp, #83] @ 0x53 80287e2: 931a str r3, [sp, #104] @ 0x68 80287e4: 4654 mov r4, sl 80287e6: 2205 movs r2, #5 80287e8: f814 1b01 ldrb.w r1, [r4], #1 80287ec: 484e ldr r0, [pc, #312] @ (8028928 <_svfiprintf_r+0x1e4>) 80287ee: f7e7 fc27 bl 8010040 80287f2: 9a04 ldr r2, [sp, #16] 80287f4: b9d8 cbnz r0, 802882e <_svfiprintf_r+0xea> 80287f6: 06d0 lsls r0, r2, #27 80287f8: bf44 itt mi 80287fa: 2320 movmi r3, #32 80287fc: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8028800: 0711 lsls r1, r2, #28 8028802: bf44 itt mi 8028804: 232b movmi r3, #43 @ 0x2b 8028806: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 802880a: f89a 3000 ldrb.w r3, [sl] 802880e: 2b2a cmp r3, #42 @ 0x2a 8028810: d015 beq.n 802883e <_svfiprintf_r+0xfa> 8028812: 9a07 ldr r2, [sp, #28] 8028814: 4654 mov r4, sl 8028816: 2000 movs r0, #0 8028818: f04f 0c0a mov.w ip, #10 802881c: 4621 mov r1, r4 802881e: f811 3b01 ldrb.w r3, [r1], #1 8028822: 3b30 subs r3, #48 @ 0x30 8028824: 2b09 cmp r3, #9 8028826: d94b bls.n 80288c0 <_svfiprintf_r+0x17c> 8028828: b1b0 cbz r0, 8028858 <_svfiprintf_r+0x114> 802882a: 9207 str r2, [sp, #28] 802882c: e014 b.n 8028858 <_svfiprintf_r+0x114> 802882e: eba0 0308 sub.w r3, r0, r8 8028832: fa09 f303 lsl.w r3, r9, r3 8028836: 4313 orrs r3, r2 8028838: 9304 str r3, [sp, #16] 802883a: 46a2 mov sl, r4 802883c: e7d2 b.n 80287e4 <_svfiprintf_r+0xa0> 802883e: 9b03 ldr r3, [sp, #12] 8028840: 1d19 adds r1, r3, #4 8028842: 681b ldr r3, [r3, #0] 8028844: 9103 str r1, [sp, #12] 8028846: 2b00 cmp r3, #0 8028848: bfbb ittet lt 802884a: 425b neglt r3, r3 802884c: f042 0202 orrlt.w r2, r2, #2 8028850: 9307 strge r3, [sp, #28] 8028852: 9307 strlt r3, [sp, #28] 8028854: bfb8 it lt 8028856: 9204 strlt r2, [sp, #16] 8028858: 7823 ldrb r3, [r4, #0] 802885a: 2b2e cmp r3, #46 @ 0x2e 802885c: d10a bne.n 8028874 <_svfiprintf_r+0x130> 802885e: 7863 ldrb r3, [r4, #1] 8028860: 2b2a cmp r3, #42 @ 0x2a 8028862: d132 bne.n 80288ca <_svfiprintf_r+0x186> 8028864: 9b03 ldr r3, [sp, #12] 8028866: 1d1a adds r2, r3, #4 8028868: 681b ldr r3, [r3, #0] 802886a: 9203 str r2, [sp, #12] 802886c: ea43 73e3 orr.w r3, r3, r3, asr #31 8028870: 3402 adds r4, #2 8028872: 9305 str r3, [sp, #20] 8028874: f8df a0c0 ldr.w sl, [pc, #192] @ 8028938 <_svfiprintf_r+0x1f4> 8028878: 7821 ldrb r1, [r4, #0] 802887a: 2203 movs r2, #3 802887c: 4650 mov r0, sl 802887e: f7e7 fbdf bl 8010040 8028882: b138 cbz r0, 8028894 <_svfiprintf_r+0x150> 8028884: 9b04 ldr r3, [sp, #16] 8028886: eba0 000a sub.w r0, r0, sl 802888a: 2240 movs r2, #64 @ 0x40 802888c: 4082 lsls r2, r0 802888e: 4313 orrs r3, r2 8028890: 3401 adds r4, #1 8028892: 9304 str r3, [sp, #16] 8028894: f814 1b01 ldrb.w r1, [r4], #1 8028898: 4824 ldr r0, [pc, #144] @ (802892c <_svfiprintf_r+0x1e8>) 802889a: f88d 1028 strb.w r1, [sp, #40] @ 0x28 802889e: 2206 movs r2, #6 80288a0: f7e7 fbce bl 8010040 80288a4: 2800 cmp r0, #0 80288a6: d036 beq.n 8028916 <_svfiprintf_r+0x1d2> 80288a8: 4b21 ldr r3, [pc, #132] @ (8028930 <_svfiprintf_r+0x1ec>) 80288aa: bb1b cbnz r3, 80288f4 <_svfiprintf_r+0x1b0> 80288ac: 9b03 ldr r3, [sp, #12] 80288ae: 3307 adds r3, #7 80288b0: f023 0307 bic.w r3, r3, #7 80288b4: 3308 adds r3, #8 80288b6: 9303 str r3, [sp, #12] 80288b8: 9b09 ldr r3, [sp, #36] @ 0x24 80288ba: 4433 add r3, r6 80288bc: 9309 str r3, [sp, #36] @ 0x24 80288be: e76a b.n 8028796 <_svfiprintf_r+0x52> 80288c0: fb0c 3202 mla r2, ip, r2, r3 80288c4: 460c mov r4, r1 80288c6: 2001 movs r0, #1 80288c8: e7a8 b.n 802881c <_svfiprintf_r+0xd8> 80288ca: 2300 movs r3, #0 80288cc: 3401 adds r4, #1 80288ce: 9305 str r3, [sp, #20] 80288d0: 4619 mov r1, r3 80288d2: f04f 0c0a mov.w ip, #10 80288d6: 4620 mov r0, r4 80288d8: f810 2b01 ldrb.w r2, [r0], #1 80288dc: 3a30 subs r2, #48 @ 0x30 80288de: 2a09 cmp r2, #9 80288e0: d903 bls.n 80288ea <_svfiprintf_r+0x1a6> 80288e2: 2b00 cmp r3, #0 80288e4: d0c6 beq.n 8028874 <_svfiprintf_r+0x130> 80288e6: 9105 str r1, [sp, #20] 80288e8: e7c4 b.n 8028874 <_svfiprintf_r+0x130> 80288ea: fb0c 2101 mla r1, ip, r1, r2 80288ee: 4604 mov r4, r0 80288f0: 2301 movs r3, #1 80288f2: e7f0 b.n 80288d6 <_svfiprintf_r+0x192> 80288f4: ab03 add r3, sp, #12 80288f6: 9300 str r3, [sp, #0] 80288f8: 462a mov r2, r5 80288fa: 4b0e ldr r3, [pc, #56] @ (8028934 <_svfiprintf_r+0x1f0>) 80288fc: a904 add r1, sp, #16 80288fe: 4638 mov r0, r7 8028900: f3af 8000 nop.w 8028904: 1c42 adds r2, r0, #1 8028906: 4606 mov r6, r0 8028908: d1d6 bne.n 80288b8 <_svfiprintf_r+0x174> 802890a: 89ab ldrh r3, [r5, #12] 802890c: 065b lsls r3, r3, #25 802890e: f53f af2d bmi.w 802876c <_svfiprintf_r+0x28> 8028912: 9809 ldr r0, [sp, #36] @ 0x24 8028914: e72c b.n 8028770 <_svfiprintf_r+0x2c> 8028916: ab03 add r3, sp, #12 8028918: 9300 str r3, [sp, #0] 802891a: 462a mov r2, r5 802891c: 4b05 ldr r3, [pc, #20] @ (8028934 <_svfiprintf_r+0x1f0>) 802891e: a904 add r1, sp, #16 8028920: 4638 mov r0, r7 8028922: f000 f879 bl 8028a18 <_printf_i> 8028926: e7ed b.n 8028904 <_svfiprintf_r+0x1c0> 8028928: 0802d6f8 .word 0x0802d6f8 802892c: 0802d702 .word 0x0802d702 8028930: 00000000 .word 0x00000000 8028934: 0802868d .word 0x0802868d 8028938: 0802d6fe .word 0x0802d6fe 0802893c <_printf_common>: 802893c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8028940: 4616 mov r6, r2 8028942: 4698 mov r8, r3 8028944: 688a ldr r2, [r1, #8] 8028946: 690b ldr r3, [r1, #16] 8028948: f8dd 9020 ldr.w r9, [sp, #32] 802894c: 4293 cmp r3, r2 802894e: bfb8 it lt 8028950: 4613 movlt r3, r2 8028952: 6033 str r3, [r6, #0] 8028954: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8028958: 4607 mov r7, r0 802895a: 460c mov r4, r1 802895c: b10a cbz r2, 8028962 <_printf_common+0x26> 802895e: 3301 adds r3, #1 8028960: 6033 str r3, [r6, #0] 8028962: 6823 ldr r3, [r4, #0] 8028964: 0699 lsls r1, r3, #26 8028966: bf42 ittt mi 8028968: 6833 ldrmi r3, [r6, #0] 802896a: 3302 addmi r3, #2 802896c: 6033 strmi r3, [r6, #0] 802896e: 6825 ldr r5, [r4, #0] 8028970: f015 0506 ands.w r5, r5, #6 8028974: d106 bne.n 8028984 <_printf_common+0x48> 8028976: f104 0a19 add.w sl, r4, #25 802897a: 68e3 ldr r3, [r4, #12] 802897c: 6832 ldr r2, [r6, #0] 802897e: 1a9b subs r3, r3, r2 8028980: 42ab cmp r3, r5 8028982: dc26 bgt.n 80289d2 <_printf_common+0x96> 8028984: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8028988: 6822 ldr r2, [r4, #0] 802898a: 3b00 subs r3, #0 802898c: bf18 it ne 802898e: 2301 movne r3, #1 8028990: 0692 lsls r2, r2, #26 8028992: d42b bmi.n 80289ec <_printf_common+0xb0> 8028994: f104 0243 add.w r2, r4, #67 @ 0x43 8028998: 4641 mov r1, r8 802899a: 4638 mov r0, r7 802899c: 47c8 blx r9 802899e: 3001 adds r0, #1 80289a0: d01e beq.n 80289e0 <_printf_common+0xa4> 80289a2: 6823 ldr r3, [r4, #0] 80289a4: 6922 ldr r2, [r4, #16] 80289a6: f003 0306 and.w r3, r3, #6 80289aa: 2b04 cmp r3, #4 80289ac: bf02 ittt eq 80289ae: 68e5 ldreq r5, [r4, #12] 80289b0: 6833 ldreq r3, [r6, #0] 80289b2: 1aed subeq r5, r5, r3 80289b4: 68a3 ldr r3, [r4, #8] 80289b6: bf0c ite eq 80289b8: ea25 75e5 biceq.w r5, r5, r5, asr #31 80289bc: 2500 movne r5, #0 80289be: 4293 cmp r3, r2 80289c0: bfc4 itt gt 80289c2: 1a9b subgt r3, r3, r2 80289c4: 18ed addgt r5, r5, r3 80289c6: 2600 movs r6, #0 80289c8: 341a adds r4, #26 80289ca: 42b5 cmp r5, r6 80289cc: d11a bne.n 8028a04 <_printf_common+0xc8> 80289ce: 2000 movs r0, #0 80289d0: e008 b.n 80289e4 <_printf_common+0xa8> 80289d2: 2301 movs r3, #1 80289d4: 4652 mov r2, sl 80289d6: 4641 mov r1, r8 80289d8: 4638 mov r0, r7 80289da: 47c8 blx r9 80289dc: 3001 adds r0, #1 80289de: d103 bne.n 80289e8 <_printf_common+0xac> 80289e0: f04f 30ff mov.w r0, #4294967295 80289e4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80289e8: 3501 adds r5, #1 80289ea: e7c6 b.n 802897a <_printf_common+0x3e> 80289ec: 18e1 adds r1, r4, r3 80289ee: 1c5a adds r2, r3, #1 80289f0: 2030 movs r0, #48 @ 0x30 80289f2: f881 0043 strb.w r0, [r1, #67] @ 0x43 80289f6: 4422 add r2, r4 80289f8: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 80289fc: f882 1043 strb.w r1, [r2, #67] @ 0x43 8028a00: 3302 adds r3, #2 8028a02: e7c7 b.n 8028994 <_printf_common+0x58> 8028a04: 2301 movs r3, #1 8028a06: 4622 mov r2, r4 8028a08: 4641 mov r1, r8 8028a0a: 4638 mov r0, r7 8028a0c: 47c8 blx r9 8028a0e: 3001 adds r0, #1 8028a10: d0e6 beq.n 80289e0 <_printf_common+0xa4> 8028a12: 3601 adds r6, #1 8028a14: e7d9 b.n 80289ca <_printf_common+0x8e> ... 08028a18 <_printf_i>: 8028a18: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 8028a1c: 7e0f ldrb r7, [r1, #24] 8028a1e: 9e0c ldr r6, [sp, #48] @ 0x30 8028a20: 2f78 cmp r7, #120 @ 0x78 8028a22: 4691 mov r9, r2 8028a24: 4680 mov r8, r0 8028a26: 460c mov r4, r1 8028a28: 469a mov sl, r3 8028a2a: f101 0243 add.w r2, r1, #67 @ 0x43 8028a2e: d807 bhi.n 8028a40 <_printf_i+0x28> 8028a30: 2f62 cmp r7, #98 @ 0x62 8028a32: d80a bhi.n 8028a4a <_printf_i+0x32> 8028a34: 2f00 cmp r7, #0 8028a36: f000 80d2 beq.w 8028bde <_printf_i+0x1c6> 8028a3a: 2f58 cmp r7, #88 @ 0x58 8028a3c: f000 80b9 beq.w 8028bb2 <_printf_i+0x19a> 8028a40: f104 0642 add.w r6, r4, #66 @ 0x42 8028a44: f884 7042 strb.w r7, [r4, #66] @ 0x42 8028a48: e03a b.n 8028ac0 <_printf_i+0xa8> 8028a4a: f1a7 0363 sub.w r3, r7, #99 @ 0x63 8028a4e: 2b15 cmp r3, #21 8028a50: d8f6 bhi.n 8028a40 <_printf_i+0x28> 8028a52: a101 add r1, pc, #4 @ (adr r1, 8028a58 <_printf_i+0x40>) 8028a54: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8028a58: 08028ab1 .word 0x08028ab1 8028a5c: 08028ac5 .word 0x08028ac5 8028a60: 08028a41 .word 0x08028a41 8028a64: 08028a41 .word 0x08028a41 8028a68: 08028a41 .word 0x08028a41 8028a6c: 08028a41 .word 0x08028a41 8028a70: 08028ac5 .word 0x08028ac5 8028a74: 08028a41 .word 0x08028a41 8028a78: 08028a41 .word 0x08028a41 8028a7c: 08028a41 .word 0x08028a41 8028a80: 08028a41 .word 0x08028a41 8028a84: 08028bc5 .word 0x08028bc5 8028a88: 08028aef .word 0x08028aef 8028a8c: 08028b7f .word 0x08028b7f 8028a90: 08028a41 .word 0x08028a41 8028a94: 08028a41 .word 0x08028a41 8028a98: 08028be7 .word 0x08028be7 8028a9c: 08028a41 .word 0x08028a41 8028aa0: 08028aef .word 0x08028aef 8028aa4: 08028a41 .word 0x08028a41 8028aa8: 08028a41 .word 0x08028a41 8028aac: 08028b87 .word 0x08028b87 8028ab0: 6833 ldr r3, [r6, #0] 8028ab2: 1d1a adds r2, r3, #4 8028ab4: 681b ldr r3, [r3, #0] 8028ab6: 6032 str r2, [r6, #0] 8028ab8: f104 0642 add.w r6, r4, #66 @ 0x42 8028abc: f884 3042 strb.w r3, [r4, #66] @ 0x42 8028ac0: 2301 movs r3, #1 8028ac2: e09d b.n 8028c00 <_printf_i+0x1e8> 8028ac4: 6833 ldr r3, [r6, #0] 8028ac6: 6820 ldr r0, [r4, #0] 8028ac8: 1d19 adds r1, r3, #4 8028aca: 6031 str r1, [r6, #0] 8028acc: 0606 lsls r6, r0, #24 8028ace: d501 bpl.n 8028ad4 <_printf_i+0xbc> 8028ad0: 681d ldr r5, [r3, #0] 8028ad2: e003 b.n 8028adc <_printf_i+0xc4> 8028ad4: 0645 lsls r5, r0, #25 8028ad6: d5fb bpl.n 8028ad0 <_printf_i+0xb8> 8028ad8: f9b3 5000 ldrsh.w r5, [r3] 8028adc: 2d00 cmp r5, #0 8028ade: da03 bge.n 8028ae8 <_printf_i+0xd0> 8028ae0: 232d movs r3, #45 @ 0x2d 8028ae2: 426d negs r5, r5 8028ae4: f884 3043 strb.w r3, [r4, #67] @ 0x43 8028ae8: 4859 ldr r0, [pc, #356] @ (8028c50 <_printf_i+0x238>) 8028aea: 230a movs r3, #10 8028aec: e011 b.n 8028b12 <_printf_i+0xfa> 8028aee: 6821 ldr r1, [r4, #0] 8028af0: 6833 ldr r3, [r6, #0] 8028af2: 0608 lsls r0, r1, #24 8028af4: f853 5b04 ldr.w r5, [r3], #4 8028af8: d402 bmi.n 8028b00 <_printf_i+0xe8> 8028afa: 0649 lsls r1, r1, #25 8028afc: bf48 it mi 8028afe: b2ad uxthmi r5, r5 8028b00: 2f6f cmp r7, #111 @ 0x6f 8028b02: 4853 ldr r0, [pc, #332] @ (8028c50 <_printf_i+0x238>) 8028b04: 6033 str r3, [r6, #0] 8028b06: bf14 ite ne 8028b08: 230a movne r3, #10 8028b0a: 2308 moveq r3, #8 8028b0c: 2100 movs r1, #0 8028b0e: f884 1043 strb.w r1, [r4, #67] @ 0x43 8028b12: 6866 ldr r6, [r4, #4] 8028b14: 60a6 str r6, [r4, #8] 8028b16: 2e00 cmp r6, #0 8028b18: bfa2 ittt ge 8028b1a: 6821 ldrge r1, [r4, #0] 8028b1c: f021 0104 bicge.w r1, r1, #4 8028b20: 6021 strge r1, [r4, #0] 8028b22: b90d cbnz r5, 8028b28 <_printf_i+0x110> 8028b24: 2e00 cmp r6, #0 8028b26: d04b beq.n 8028bc0 <_printf_i+0x1a8> 8028b28: 4616 mov r6, r2 8028b2a: fbb5 f1f3 udiv r1, r5, r3 8028b2e: fb03 5711 mls r7, r3, r1, r5 8028b32: 5dc7 ldrb r7, [r0, r7] 8028b34: f806 7d01 strb.w r7, [r6, #-1]! 8028b38: 462f mov r7, r5 8028b3a: 42bb cmp r3, r7 8028b3c: 460d mov r5, r1 8028b3e: d9f4 bls.n 8028b2a <_printf_i+0x112> 8028b40: 2b08 cmp r3, #8 8028b42: d10b bne.n 8028b5c <_printf_i+0x144> 8028b44: 6823 ldr r3, [r4, #0] 8028b46: 07df lsls r7, r3, #31 8028b48: d508 bpl.n 8028b5c <_printf_i+0x144> 8028b4a: 6923 ldr r3, [r4, #16] 8028b4c: 6861 ldr r1, [r4, #4] 8028b4e: 4299 cmp r1, r3 8028b50: bfde ittt le 8028b52: 2330 movle r3, #48 @ 0x30 8028b54: f806 3c01 strble.w r3, [r6, #-1] 8028b58: f106 36ff addle.w r6, r6, #4294967295 8028b5c: 1b92 subs r2, r2, r6 8028b5e: 6122 str r2, [r4, #16] 8028b60: f8cd a000 str.w sl, [sp] 8028b64: 464b mov r3, r9 8028b66: aa03 add r2, sp, #12 8028b68: 4621 mov r1, r4 8028b6a: 4640 mov r0, r8 8028b6c: f7ff fee6 bl 802893c <_printf_common> 8028b70: 3001 adds r0, #1 8028b72: d14a bne.n 8028c0a <_printf_i+0x1f2> 8028b74: f04f 30ff mov.w r0, #4294967295 8028b78: b004 add sp, #16 8028b7a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8028b7e: 6823 ldr r3, [r4, #0] 8028b80: f043 0320 orr.w r3, r3, #32 8028b84: 6023 str r3, [r4, #0] 8028b86: 4833 ldr r0, [pc, #204] @ (8028c54 <_printf_i+0x23c>) 8028b88: 2778 movs r7, #120 @ 0x78 8028b8a: f884 7045 strb.w r7, [r4, #69] @ 0x45 8028b8e: 6823 ldr r3, [r4, #0] 8028b90: 6831 ldr r1, [r6, #0] 8028b92: 061f lsls r7, r3, #24 8028b94: f851 5b04 ldr.w r5, [r1], #4 8028b98: d402 bmi.n 8028ba0 <_printf_i+0x188> 8028b9a: 065f lsls r7, r3, #25 8028b9c: bf48 it mi 8028b9e: b2ad uxthmi r5, r5 8028ba0: 6031 str r1, [r6, #0] 8028ba2: 07d9 lsls r1, r3, #31 8028ba4: bf44 itt mi 8028ba6: f043 0320 orrmi.w r3, r3, #32 8028baa: 6023 strmi r3, [r4, #0] 8028bac: b11d cbz r5, 8028bb6 <_printf_i+0x19e> 8028bae: 2310 movs r3, #16 8028bb0: e7ac b.n 8028b0c <_printf_i+0xf4> 8028bb2: 4827 ldr r0, [pc, #156] @ (8028c50 <_printf_i+0x238>) 8028bb4: e7e9 b.n 8028b8a <_printf_i+0x172> 8028bb6: 6823 ldr r3, [r4, #0] 8028bb8: f023 0320 bic.w r3, r3, #32 8028bbc: 6023 str r3, [r4, #0] 8028bbe: e7f6 b.n 8028bae <_printf_i+0x196> 8028bc0: 4616 mov r6, r2 8028bc2: e7bd b.n 8028b40 <_printf_i+0x128> 8028bc4: 6833 ldr r3, [r6, #0] 8028bc6: 6825 ldr r5, [r4, #0] 8028bc8: 6961 ldr r1, [r4, #20] 8028bca: 1d18 adds r0, r3, #4 8028bcc: 6030 str r0, [r6, #0] 8028bce: 062e lsls r6, r5, #24 8028bd0: 681b ldr r3, [r3, #0] 8028bd2: d501 bpl.n 8028bd8 <_printf_i+0x1c0> 8028bd4: 6019 str r1, [r3, #0] 8028bd6: e002 b.n 8028bde <_printf_i+0x1c6> 8028bd8: 0668 lsls r0, r5, #25 8028bda: d5fb bpl.n 8028bd4 <_printf_i+0x1bc> 8028bdc: 8019 strh r1, [r3, #0] 8028bde: 2300 movs r3, #0 8028be0: 6123 str r3, [r4, #16] 8028be2: 4616 mov r6, r2 8028be4: e7bc b.n 8028b60 <_printf_i+0x148> 8028be6: 6833 ldr r3, [r6, #0] 8028be8: 1d1a adds r2, r3, #4 8028bea: 6032 str r2, [r6, #0] 8028bec: 681e ldr r6, [r3, #0] 8028bee: 6862 ldr r2, [r4, #4] 8028bf0: 2100 movs r1, #0 8028bf2: 4630 mov r0, r6 8028bf4: f7e7 fa24 bl 8010040 8028bf8: b108 cbz r0, 8028bfe <_printf_i+0x1e6> 8028bfa: 1b80 subs r0, r0, r6 8028bfc: 6060 str r0, [r4, #4] 8028bfe: 6863 ldr r3, [r4, #4] 8028c00: 6123 str r3, [r4, #16] 8028c02: 2300 movs r3, #0 8028c04: f884 3043 strb.w r3, [r4, #67] @ 0x43 8028c08: e7aa b.n 8028b60 <_printf_i+0x148> 8028c0a: 6923 ldr r3, [r4, #16] 8028c0c: 4632 mov r2, r6 8028c0e: 4649 mov r1, r9 8028c10: 4640 mov r0, r8 8028c12: 47d0 blx sl 8028c14: 3001 adds r0, #1 8028c16: d0ad beq.n 8028b74 <_printf_i+0x15c> 8028c18: 6823 ldr r3, [r4, #0] 8028c1a: 079b lsls r3, r3, #30 8028c1c: d413 bmi.n 8028c46 <_printf_i+0x22e> 8028c1e: 68e0 ldr r0, [r4, #12] 8028c20: 9b03 ldr r3, [sp, #12] 8028c22: 4298 cmp r0, r3 8028c24: bfb8 it lt 8028c26: 4618 movlt r0, r3 8028c28: e7a6 b.n 8028b78 <_printf_i+0x160> 8028c2a: 2301 movs r3, #1 8028c2c: 4632 mov r2, r6 8028c2e: 4649 mov r1, r9 8028c30: 4640 mov r0, r8 8028c32: 47d0 blx sl 8028c34: 3001 adds r0, #1 8028c36: d09d beq.n 8028b74 <_printf_i+0x15c> 8028c38: 3501 adds r5, #1 8028c3a: 68e3 ldr r3, [r4, #12] 8028c3c: 9903 ldr r1, [sp, #12] 8028c3e: 1a5b subs r3, r3, r1 8028c40: 42ab cmp r3, r5 8028c42: dcf2 bgt.n 8028c2a <_printf_i+0x212> 8028c44: e7eb b.n 8028c1e <_printf_i+0x206> 8028c46: 2500 movs r5, #0 8028c48: f104 0619 add.w r6, r4, #25 8028c4c: e7f5 b.n 8028c3a <_printf_i+0x222> 8028c4e: bf00 nop 8028c50: 0802d709 .word 0x0802d709 8028c54: 0802d71a .word 0x0802d71a 08028c58 : 8028c58: 4288 cmp r0, r1 8028c5a: b510 push {r4, lr} 8028c5c: eb01 0402 add.w r4, r1, r2 8028c60: d902 bls.n 8028c68 8028c62: 4284 cmp r4, r0 8028c64: 4623 mov r3, r4 8028c66: d807 bhi.n 8028c78 8028c68: 1e43 subs r3, r0, #1 8028c6a: 42a1 cmp r1, r4 8028c6c: d008 beq.n 8028c80 8028c6e: f811 2b01 ldrb.w r2, [r1], #1 8028c72: f803 2f01 strb.w r2, [r3, #1]! 8028c76: e7f8 b.n 8028c6a 8028c78: 4402 add r2, r0 8028c7a: 4601 mov r1, r0 8028c7c: 428a cmp r2, r1 8028c7e: d100 bne.n 8028c82 8028c80: bd10 pop {r4, pc} 8028c82: f813 4d01 ldrb.w r4, [r3, #-1]! 8028c86: f802 4d01 strb.w r4, [r2, #-1]! 8028c8a: e7f7 b.n 8028c7c 08028c8c <_sbrk_r>: 8028c8c: b538 push {r3, r4, r5, lr} 8028c8e: 4d06 ldr r5, [pc, #24] @ (8028ca8 <_sbrk_r+0x1c>) 8028c90: 2300 movs r3, #0 8028c92: 4604 mov r4, r0 8028c94: 4608 mov r0, r1 8028c96: 602b str r3, [r5, #0] 8028c98: f7f5 fc0e bl 801e4b8 <_sbrk> 8028c9c: 1c43 adds r3, r0, #1 8028c9e: d102 bne.n 8028ca6 <_sbrk_r+0x1a> 8028ca0: 682b ldr r3, [r5, #0] 8028ca2: b103 cbz r3, 8028ca6 <_sbrk_r+0x1a> 8028ca4: 6023 str r3, [r4, #0] 8028ca6: bd38 pop {r3, r4, r5, pc} 8028ca8: 200055a8 .word 0x200055a8 08028cac : 8028cac: 440a add r2, r1 8028cae: 4291 cmp r1, r2 8028cb0: f100 33ff add.w r3, r0, #4294967295 8028cb4: d100 bne.n 8028cb8 8028cb6: 4770 bx lr 8028cb8: b510 push {r4, lr} 8028cba: f811 4b01 ldrb.w r4, [r1], #1 8028cbe: f803 4f01 strb.w r4, [r3, #1]! 8028cc2: 4291 cmp r1, r2 8028cc4: d1f9 bne.n 8028cba 8028cc6: bd10 pop {r4, pc} 08028cc8 <_realloc_r>: 8028cc8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8028ccc: 4680 mov r8, r0 8028cce: 4615 mov r5, r2 8028cd0: 460c mov r4, r1 8028cd2: b921 cbnz r1, 8028cde <_realloc_r+0x16> 8028cd4: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8028cd8: 4611 mov r1, r2 8028cda: f7ff bc4b b.w 8028574 <_malloc_r> 8028cde: b92a cbnz r2, 8028cec <_realloc_r+0x24> 8028ce0: f7ff fbdc bl 802849c <_free_r> 8028ce4: 2400 movs r4, #0 8028ce6: 4620 mov r0, r4 8028ce8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8028cec: f000 f81a bl 8028d24 <_malloc_usable_size_r> 8028cf0: 4285 cmp r5, r0 8028cf2: 4606 mov r6, r0 8028cf4: d802 bhi.n 8028cfc <_realloc_r+0x34> 8028cf6: ebb5 0f50 cmp.w r5, r0, lsr #1 8028cfa: d8f4 bhi.n 8028ce6 <_realloc_r+0x1e> 8028cfc: 4629 mov r1, r5 8028cfe: 4640 mov r0, r8 8028d00: f7ff fc38 bl 8028574 <_malloc_r> 8028d04: 4607 mov r7, r0 8028d06: 2800 cmp r0, #0 8028d08: d0ec beq.n 8028ce4 <_realloc_r+0x1c> 8028d0a: 42b5 cmp r5, r6 8028d0c: 462a mov r2, r5 8028d0e: 4621 mov r1, r4 8028d10: bf28 it cs 8028d12: 4632 movcs r2, r6 8028d14: f7ff ffca bl 8028cac 8028d18: 4621 mov r1, r4 8028d1a: 4640 mov r0, r8 8028d1c: f7ff fbbe bl 802849c <_free_r> 8028d20: 463c mov r4, r7 8028d22: e7e0 b.n 8028ce6 <_realloc_r+0x1e> 08028d24 <_malloc_usable_size_r>: 8028d24: f851 3c04 ldr.w r3, [r1, #-4] 8028d28: 1f18 subs r0, r3, #4 8028d2a: 2b00 cmp r3, #0 8028d2c: bfbc itt lt 8028d2e: 580b ldrlt r3, [r1, r0] 8028d30: 18c0 addlt r0, r0, r3 8028d32: 4770 bx lr 08028d34 : 8028d34: b508 push {r3, lr} 8028d36: ed2d 8b04 vpush {d8-d9} 8028d3a: eeb0 8a60 vmov.f32 s16, s1 8028d3e: eeb0 9a40 vmov.f32 s18, s0 8028d42: f000 f961 bl 8029008 <__ieee754_powf> 8028d46: eeb4 8a48 vcmp.f32 s16, s16 8028d4a: eef1 fa10 vmrs APSR_nzcv, fpscr 8028d4e: eef0 8a40 vmov.f32 s17, s0 8028d52: d63e bvs.n 8028dd2 8028d54: eeb5 9a40 vcmp.f32 s18, #0.0 8028d58: eef1 fa10 vmrs APSR_nzcv, fpscr 8028d5c: d112 bne.n 8028d84 8028d5e: eeb5 8a40 vcmp.f32 s16, #0.0 8028d62: eef1 fa10 vmrs APSR_nzcv, fpscr 8028d66: d039 beq.n 8028ddc 8028d68: eeb0 0a48 vmov.f32 s0, s16 8028d6c: f000 f89e bl 8028eac 8028d70: b378 cbz r0, 8028dd2 8028d72: eeb5 8ac0 vcmpe.f32 s16, #0.0 8028d76: eef1 fa10 vmrs APSR_nzcv, fpscr 8028d7a: d52a bpl.n 8028dd2 8028d7c: f7ff fb62 bl 8028444 <__errno> 8028d80: 2322 movs r3, #34 @ 0x22 8028d82: e014 b.n 8028dae 8028d84: f000 f892 bl 8028eac 8028d88: b998 cbnz r0, 8028db2 8028d8a: eeb0 0a49 vmov.f32 s0, s18 8028d8e: f000 f88d bl 8028eac 8028d92: b170 cbz r0, 8028db2 8028d94: eeb0 0a48 vmov.f32 s0, s16 8028d98: f000 f888 bl 8028eac 8028d9c: b148 cbz r0, 8028db2 8028d9e: eef4 8a68 vcmp.f32 s17, s17 8028da2: eef1 fa10 vmrs APSR_nzcv, fpscr 8028da6: d7e9 bvc.n 8028d7c 8028da8: f7ff fb4c bl 8028444 <__errno> 8028dac: 2321 movs r3, #33 @ 0x21 8028dae: 6003 str r3, [r0, #0] 8028db0: e00f b.n 8028dd2 8028db2: eef5 8a40 vcmp.f32 s17, #0.0 8028db6: eef1 fa10 vmrs APSR_nzcv, fpscr 8028dba: d10a bne.n 8028dd2 8028dbc: eeb0 0a49 vmov.f32 s0, s18 8028dc0: f000 f874 bl 8028eac 8028dc4: b128 cbz r0, 8028dd2 8028dc6: eeb0 0a48 vmov.f32 s0, s16 8028dca: f000 f86f bl 8028eac 8028dce: 2800 cmp r0, #0 8028dd0: d1d4 bne.n 8028d7c 8028dd2: eeb0 0a68 vmov.f32 s0, s17 8028dd6: ecbd 8b04 vpop {d8-d9} 8028dda: bd08 pop {r3, pc} 8028ddc: eef7 8a00 vmov.f32 s17, #112 @ 0x3f800000 1.0 8028de0: e7f7 b.n 8028dd2 ... 08028de4 : 8028de4: b508 push {r3, lr} 8028de6: ed2d 8b02 vpush {d8} 8028dea: eeb0 8a40 vmov.f32 s16, s0 8028dee: f000 f867 bl 8028ec0 <__ieee754_sqrtf> 8028df2: eeb4 8a48 vcmp.f32 s16, s16 8028df6: eef1 fa10 vmrs APSR_nzcv, fpscr 8028dfa: d60c bvs.n 8028e16 8028dfc: eddf 8a07 vldr s17, [pc, #28] @ 8028e1c 8028e00: eeb4 8ae8 vcmpe.f32 s16, s17 8028e04: eef1 fa10 vmrs APSR_nzcv, fpscr 8028e08: d505 bpl.n 8028e16 8028e0a: f7ff fb1b bl 8028444 <__errno> 8028e0e: ee88 0aa8 vdiv.f32 s0, s17, s17 8028e12: 2321 movs r3, #33 @ 0x21 8028e14: 6003 str r3, [r0, #0] 8028e16: ecbd 8b02 vpop {d8} 8028e1a: bd08 pop {r3, pc} 8028e1c: 00000000 .word 0x00000000 08028e20 : 8028e20: ee10 3a10 vmov r3, s0 8028e24: b507 push {r0, r1, r2, lr} 8028e26: 4a1f ldr r2, [pc, #124] @ (8028ea4 ) 8028e28: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8028e2c: 4293 cmp r3, r2 8028e2e: d807 bhi.n 8028e40 8028e30: eddf 0a1d vldr s1, [pc, #116] @ 8028ea8 8028e34: 2000 movs r0, #0 8028e36: b003 add sp, #12 8028e38: f85d eb04 ldr.w lr, [sp], #4 8028e3c: f000 b89c b.w 8028f78 <__kernel_sinf> 8028e40: f1b3 4fff cmp.w r3, #2139095040 @ 0x7f800000 8028e44: d304 bcc.n 8028e50 8028e46: ee30 0a40 vsub.f32 s0, s0, s0 8028e4a: b003 add sp, #12 8028e4c: f85d fb04 ldr.w pc, [sp], #4 8028e50: 4668 mov r0, sp 8028e52: f000 fba9 bl 80295a8 <__ieee754_rem_pio2f> 8028e56: f000 0003 and.w r0, r0, #3 8028e5a: 2801 cmp r0, #1 8028e5c: d00a beq.n 8028e74 8028e5e: 2802 cmp r0, #2 8028e60: d00f beq.n 8028e82 8028e62: b9c0 cbnz r0, 8028e96 8028e64: eddd 0a01 vldr s1, [sp, #4] 8028e68: ed9d 0a00 vldr s0, [sp] 8028e6c: 2001 movs r0, #1 8028e6e: f000 f883 bl 8028f78 <__kernel_sinf> 8028e72: e7ea b.n 8028e4a 8028e74: eddd 0a01 vldr s1, [sp, #4] 8028e78: ed9d 0a00 vldr s0, [sp] 8028e7c: f000 f824 bl 8028ec8 <__kernel_cosf> 8028e80: e7e3 b.n 8028e4a 8028e82: eddd 0a01 vldr s1, [sp, #4] 8028e86: ed9d 0a00 vldr s0, [sp] 8028e8a: 2001 movs r0, #1 8028e8c: f000 f874 bl 8028f78 <__kernel_sinf> 8028e90: eeb1 0a40 vneg.f32 s0, s0 8028e94: e7d9 b.n 8028e4a 8028e96: eddd 0a01 vldr s1, [sp, #4] 8028e9a: ed9d 0a00 vldr s0, [sp] 8028e9e: f000 f813 bl 8028ec8 <__kernel_cosf> 8028ea2: e7f5 b.n 8028e90 8028ea4: 3f490fd8 .word 0x3f490fd8 8028ea8: 00000000 .word 0x00000000 08028eac : 8028eac: ee10 3a10 vmov r3, s0 8028eb0: f023 4000 bic.w r0, r3, #2147483648 @ 0x80000000 8028eb4: f1b0 4fff cmp.w r0, #2139095040 @ 0x7f800000 8028eb8: bfac ite ge 8028eba: 2000 movge r0, #0 8028ebc: 2001 movlt r0, #1 8028ebe: 4770 bx lr 08028ec0 <__ieee754_sqrtf>: 8028ec0: eeb1 0ac0 vsqrt.f32 s0, s0 8028ec4: 4770 bx lr ... 08028ec8 <__kernel_cosf>: 8028ec8: ee10 3a10 vmov r3, s0 8028ecc: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8028ed0: f1b3 5f48 cmp.w r3, #838860800 @ 0x32000000 8028ed4: eef0 6a40 vmov.f32 s13, s0 8028ed8: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 8028edc: d204 bcs.n 8028ee8 <__kernel_cosf+0x20> 8028ede: eefd 7ae6 vcvt.s32.f32 s15, s13 8028ee2: ee17 2a90 vmov r2, s15 8028ee6: b342 cbz r2, 8028f3a <__kernel_cosf+0x72> 8028ee8: ee26 7aa6 vmul.f32 s14, s13, s13 8028eec: eddf 7a1a vldr s15, [pc, #104] @ 8028f58 <__kernel_cosf+0x90> 8028ef0: ed9f 6a1a vldr s12, [pc, #104] @ 8028f5c <__kernel_cosf+0x94> 8028ef4: 4a1a ldr r2, [pc, #104] @ (8028f60 <__kernel_cosf+0x98>) 8028ef6: eea7 6a27 vfma.f32 s12, s14, s15 8028efa: 4293 cmp r3, r2 8028efc: eddf 7a19 vldr s15, [pc, #100] @ 8028f64 <__kernel_cosf+0x9c> 8028f00: eee6 7a07 vfma.f32 s15, s12, s14 8028f04: ed9f 6a18 vldr s12, [pc, #96] @ 8028f68 <__kernel_cosf+0xa0> 8028f08: eea7 6a87 vfma.f32 s12, s15, s14 8028f0c: eddf 7a17 vldr s15, [pc, #92] @ 8028f6c <__kernel_cosf+0xa4> 8028f10: eee6 7a07 vfma.f32 s15, s12, s14 8028f14: ed9f 6a16 vldr s12, [pc, #88] @ 8028f70 <__kernel_cosf+0xa8> 8028f18: eea7 6a87 vfma.f32 s12, s15, s14 8028f1c: ee60 0ae6 vnmul.f32 s1, s1, s13 8028f20: ee26 6a07 vmul.f32 s12, s12, s14 8028f24: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5 8028f28: eee7 0a06 vfma.f32 s1, s14, s12 8028f2c: ee67 7a27 vmul.f32 s15, s14, s15 8028f30: d804 bhi.n 8028f3c <__kernel_cosf+0x74> 8028f32: ee77 7ae0 vsub.f32 s15, s15, s1 8028f36: ee30 0a67 vsub.f32 s0, s0, s15 8028f3a: 4770 bx lr 8028f3c: 4a0d ldr r2, [pc, #52] @ (8028f74 <__kernel_cosf+0xac>) 8028f3e: 4293 cmp r3, r2 8028f40: bf9a itte ls 8028f42: f103 437f addls.w r3, r3, #4278190080 @ 0xff000000 8028f46: ee07 3a10 vmovls s14, r3 8028f4a: eeb5 7a02 vmovhi.f32 s14, #82 @ 0x3e900000 0.2812500 8028f4e: ee30 0a47 vsub.f32 s0, s0, s14 8028f52: ee77 7ac7 vsub.f32 s15, s15, s14 8028f56: e7ec b.n 8028f32 <__kernel_cosf+0x6a> 8028f58: ad47d74e .word 0xad47d74e 8028f5c: 310f74f6 .word 0x310f74f6 8028f60: 3e999999 .word 0x3e999999 8028f64: b493f27c .word 0xb493f27c 8028f68: 37d00d01 .word 0x37d00d01 8028f6c: bab60b61 .word 0xbab60b61 8028f70: 3d2aaaab .word 0x3d2aaaab 8028f74: 3f480000 .word 0x3f480000 08028f78 <__kernel_sinf>: 8028f78: ee10 3a10 vmov r3, s0 8028f7c: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8028f80: f1b3 5f48 cmp.w r3, #838860800 @ 0x32000000 8028f84: d204 bcs.n 8028f90 <__kernel_sinf+0x18> 8028f86: eefd 7ac0 vcvt.s32.f32 s15, s0 8028f8a: ee17 3a90 vmov r3, s15 8028f8e: b35b cbz r3, 8028fe8 <__kernel_sinf+0x70> 8028f90: ee20 7a00 vmul.f32 s14, s0, s0 8028f94: eddf 7a15 vldr s15, [pc, #84] @ 8028fec <__kernel_sinf+0x74> 8028f98: ed9f 6a15 vldr s12, [pc, #84] @ 8028ff0 <__kernel_sinf+0x78> 8028f9c: eea7 6a27 vfma.f32 s12, s14, s15 8028fa0: eddf 7a14 vldr s15, [pc, #80] @ 8028ff4 <__kernel_sinf+0x7c> 8028fa4: eee6 7a07 vfma.f32 s15, s12, s14 8028fa8: ed9f 6a13 vldr s12, [pc, #76] @ 8028ff8 <__kernel_sinf+0x80> 8028fac: eea7 6a87 vfma.f32 s12, s15, s14 8028fb0: eddf 7a12 vldr s15, [pc, #72] @ 8028ffc <__kernel_sinf+0x84> 8028fb4: ee60 6a07 vmul.f32 s13, s0, s14 8028fb8: eee6 7a07 vfma.f32 s15, s12, s14 8028fbc: b930 cbnz r0, 8028fcc <__kernel_sinf+0x54> 8028fbe: ed9f 6a10 vldr s12, [pc, #64] @ 8029000 <__kernel_sinf+0x88> 8028fc2: eea7 6a27 vfma.f32 s12, s14, s15 8028fc6: eea6 0a26 vfma.f32 s0, s12, s13 8028fca: 4770 bx lr 8028fcc: ee67 7ae6 vnmul.f32 s15, s15, s13 8028fd0: eeb6 6a00 vmov.f32 s12, #96 @ 0x3f000000 0.5 8028fd4: eee0 7a86 vfma.f32 s15, s1, s12 8028fd8: eed7 0a87 vfnms.f32 s1, s15, s14 8028fdc: eddf 7a09 vldr s15, [pc, #36] @ 8029004 <__kernel_sinf+0x8c> 8028fe0: eee6 0aa7 vfma.f32 s1, s13, s15 8028fe4: ee30 0a60 vsub.f32 s0, s0, s1 8028fe8: 4770 bx lr 8028fea: bf00 nop 8028fec: 2f2ec9d3 .word 0x2f2ec9d3 8028ff0: b2d72f34 .word 0xb2d72f34 8028ff4: 3638ef1b .word 0x3638ef1b 8028ff8: b9500d01 .word 0xb9500d01 8028ffc: 3c088889 .word 0x3c088889 8029000: be2aaaab .word 0xbe2aaaab 8029004: 3e2aaaab .word 0x3e2aaaab 08029008 <__ieee754_powf>: 8029008: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 802900c: ee10 4a90 vmov r4, s1 8029010: f034 4900 bics.w r9, r4, #2147483648 @ 0x80000000 8029014: ed2d 8b02 vpush {d8} 8029018: ee10 6a10 vmov r6, s0 802901c: eeb0 8a40 vmov.f32 s16, s0 8029020: eef0 8a60 vmov.f32 s17, s1 8029024: d10c bne.n 8029040 <__ieee754_powf+0x38> 8029026: f486 0680 eor.w r6, r6, #4194304 @ 0x400000 802902a: 0076 lsls r6, r6, #1 802902c: f516 0f00 cmn.w r6, #8388608 @ 0x800000 8029030: f240 829c bls.w 802956c <__ieee754_powf+0x564> 8029034: ee38 0a28 vadd.f32 s0, s16, s17 8029038: ecbd 8b02 vpop {d8} 802903c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8029040: f026 4800 bic.w r8, r6, #2147483648 @ 0x80000000 8029044: f1b8 4fff cmp.w r8, #2139095040 @ 0x7f800000 8029048: d802 bhi.n 8029050 <__ieee754_powf+0x48> 802904a: f1b9 4fff cmp.w r9, #2139095040 @ 0x7f800000 802904e: d908 bls.n 8029062 <__ieee754_powf+0x5a> 8029050: f1b6 5f7e cmp.w r6, #1065353216 @ 0x3f800000 8029054: d1ee bne.n 8029034 <__ieee754_powf+0x2c> 8029056: f484 0480 eor.w r4, r4, #4194304 @ 0x400000 802905a: 0064 lsls r4, r4, #1 802905c: f514 0f00 cmn.w r4, #8388608 @ 0x800000 8029060: e7e6 b.n 8029030 <__ieee754_powf+0x28> 8029062: 2e00 cmp r6, #0 8029064: da1e bge.n 80290a4 <__ieee754_powf+0x9c> 8029066: f1b9 4f97 cmp.w r9, #1266679808 @ 0x4b800000 802906a: d22b bcs.n 80290c4 <__ieee754_powf+0xbc> 802906c: f1b9 5f7e cmp.w r9, #1065353216 @ 0x3f800000 8029070: d332 bcc.n 80290d8 <__ieee754_powf+0xd0> 8029072: ea4f 53e9 mov.w r3, r9, asr #23 8029076: f1c3 0396 rsb r3, r3, #150 @ 0x96 802907a: fa49 f503 asr.w r5, r9, r3 802907e: fa05 f303 lsl.w r3, r5, r3 8029082: 454b cmp r3, r9 8029084: d126 bne.n 80290d4 <__ieee754_powf+0xcc> 8029086: f005 0501 and.w r5, r5, #1 802908a: f1c5 0502 rsb r5, r5, #2 802908e: f1b9 5f7e cmp.w r9, #1065353216 @ 0x3f800000 8029092: d122 bne.n 80290da <__ieee754_powf+0xd2> 8029094: 2c00 cmp r4, #0 8029096: f280 826f bge.w 8029578 <__ieee754_powf+0x570> 802909a: eef7 7a00 vmov.f32 s15, #112 @ 0x3f800000 1.0 802909e: ee87 0a88 vdiv.f32 s0, s15, s16 80290a2: e7c9 b.n 8029038 <__ieee754_powf+0x30> 80290a4: 2500 movs r5, #0 80290a6: f1b9 4fff cmp.w r9, #2139095040 @ 0x7f800000 80290aa: d1f0 bne.n 802908e <__ieee754_powf+0x86> 80290ac: f1b8 5f7e cmp.w r8, #1065353216 @ 0x3f800000 80290b0: f000 825c beq.w 802956c <__ieee754_powf+0x564> 80290b4: d908 bls.n 80290c8 <__ieee754_powf+0xc0> 80290b6: ed9f 0ad8 vldr s0, [pc, #864] @ 8029418 <__ieee754_powf+0x410> 80290ba: 2c00 cmp r4, #0 80290bc: bfa8 it ge 80290be: eeb0 0a68 vmovge.f32 s0, s17 80290c2: e7b9 b.n 8029038 <__ieee754_powf+0x30> 80290c4: 2502 movs r5, #2 80290c6: e7ee b.n 80290a6 <__ieee754_powf+0x9e> 80290c8: 2c00 cmp r4, #0 80290ca: f280 8252 bge.w 8029572 <__ieee754_powf+0x56a> 80290ce: eeb1 0a68 vneg.f32 s0, s17 80290d2: e7b1 b.n 8029038 <__ieee754_powf+0x30> 80290d4: 2500 movs r5, #0 80290d6: e7da b.n 802908e <__ieee754_powf+0x86> 80290d8: 2500 movs r5, #0 80290da: f1b4 4f80 cmp.w r4, #1073741824 @ 0x40000000 80290de: d102 bne.n 80290e6 <__ieee754_powf+0xde> 80290e0: ee28 0a08 vmul.f32 s0, s16, s16 80290e4: e7a8 b.n 8029038 <__ieee754_powf+0x30> 80290e6: f1b4 5f7c cmp.w r4, #1056964608 @ 0x3f000000 80290ea: d109 bne.n 8029100 <__ieee754_powf+0xf8> 80290ec: 2e00 cmp r6, #0 80290ee: db07 blt.n 8029100 <__ieee754_powf+0xf8> 80290f0: eeb0 0a48 vmov.f32 s0, s16 80290f4: ecbd 8b02 vpop {d8} 80290f8: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80290fc: f7ff bee0 b.w 8028ec0 <__ieee754_sqrtf> 8029100: eeb0 0a48 vmov.f32 s0, s16 8029104: f000 fb80 bl 8029808 8029108: f026 4340 bic.w r3, r6, #3221225472 @ 0xc0000000 802910c: f1b3 5f7e cmp.w r3, #1065353216 @ 0x3f800000 8029110: 4647 mov r7, r8 8029112: d002 beq.n 802911a <__ieee754_powf+0x112> 8029114: f1b8 0f00 cmp.w r8, #0 8029118: d117 bne.n 802914a <__ieee754_powf+0x142> 802911a: 2c00 cmp r4, #0 802911c: bfbc itt lt 802911e: eef7 7a00 vmovlt.f32 s15, #112 @ 0x3f800000 1.0 8029122: ee87 0a80 vdivlt.f32 s0, s15, s0 8029126: 2e00 cmp r6, #0 8029128: da86 bge.n 8029038 <__ieee754_powf+0x30> 802912a: f1a8 587e sub.w r8, r8, #1065353216 @ 0x3f800000 802912e: ea58 0805 orrs.w r8, r8, r5 8029132: d104 bne.n 802913e <__ieee754_powf+0x136> 8029134: ee70 7a40 vsub.f32 s15, s0, s0 8029138: ee87 0aa7 vdiv.f32 s0, s15, s15 802913c: e77c b.n 8029038 <__ieee754_powf+0x30> 802913e: 2d01 cmp r5, #1 8029140: f47f af7a bne.w 8029038 <__ieee754_powf+0x30> 8029144: eeb1 0a40 vneg.f32 s0, s0 8029148: e776 b.n 8029038 <__ieee754_powf+0x30> 802914a: 0ff0 lsrs r0, r6, #31 802914c: 3801 subs r0, #1 802914e: ea55 0300 orrs.w r3, r5, r0 8029152: d104 bne.n 802915e <__ieee754_powf+0x156> 8029154: ee38 8a48 vsub.f32 s16, s16, s16 8029158: ee88 0a08 vdiv.f32 s0, s16, s16 802915c: e76c b.n 8029038 <__ieee754_powf+0x30> 802915e: f1b9 4f9a cmp.w r9, #1291845632 @ 0x4d000000 8029162: d973 bls.n 802924c <__ieee754_powf+0x244> 8029164: 4bad ldr r3, [pc, #692] @ (802941c <__ieee754_powf+0x414>) 8029166: 4598 cmp r8, r3 8029168: d808 bhi.n 802917c <__ieee754_powf+0x174> 802916a: 2c00 cmp r4, #0 802916c: da0b bge.n 8029186 <__ieee754_powf+0x17e> 802916e: 2000 movs r0, #0 8029170: ecbd 8b02 vpop {d8} 8029174: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8029178: f000 bbd4 b.w 8029924 <__math_oflowf> 802917c: 4ba8 ldr r3, [pc, #672] @ (8029420 <__ieee754_powf+0x418>) 802917e: 4598 cmp r8, r3 8029180: d908 bls.n 8029194 <__ieee754_powf+0x18c> 8029182: 2c00 cmp r4, #0 8029184: dcf3 bgt.n 802916e <__ieee754_powf+0x166> 8029186: 2000 movs r0, #0 8029188: ecbd 8b02 vpop {d8} 802918c: e8bd 43f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8029190: f000 bbc2 b.w 8029918 <__math_uflowf> 8029194: eef7 7a00 vmov.f32 s15, #112 @ 0x3f800000 1.0 8029198: ee30 0a67 vsub.f32 s0, s0, s15 802919c: eddf 6aa1 vldr s13, [pc, #644] @ 8029424 <__ieee754_powf+0x41c> 80291a0: eef5 7a00 vmov.f32 s15, #80 @ 0x3e800000 0.250 80291a4: eee0 6a67 vfms.f32 s13, s0, s15 80291a8: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5 80291ac: eee6 7ac0 vfms.f32 s15, s13, s0 80291b0: ee20 7a00 vmul.f32 s14, s0, s0 80291b4: ee27 7a27 vmul.f32 s14, s14, s15 80291b8: eddf 7a9b vldr s15, [pc, #620] @ 8029428 <__ieee754_powf+0x420> 80291bc: ee67 7ac7 vnmul.f32 s15, s15, s14 80291c0: ed9f 7a9a vldr s14, [pc, #616] @ 802942c <__ieee754_powf+0x424> 80291c4: eee0 7a07 vfma.f32 s15, s0, s14 80291c8: ed9f 7a99 vldr s14, [pc, #612] @ 8029430 <__ieee754_powf+0x428> 80291cc: eef0 6a67 vmov.f32 s13, s15 80291d0: eee0 6a07 vfma.f32 s13, s0, s14 80291d4: ee16 3a90 vmov r3, s13 80291d8: f423 637f bic.w r3, r3, #4080 @ 0xff0 80291dc: f023 030f bic.w r3, r3, #15 80291e0: ee06 3a90 vmov s13, r3 80291e4: eee0 6a47 vfms.f32 s13, s0, s14 80291e8: ee77 7ae6 vsub.f32 s15, s15, s13 80291ec: 3d01 subs r5, #1 80291ee: f424 647f bic.w r4, r4, #4080 @ 0xff0 80291f2: 4305 orrs r5, r0 80291f4: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0 80291f8: f024 040f bic.w r4, r4, #15 80291fc: eebf 8a00 vmov.f32 s16, #240 @ 0xbf800000 -1.0 8029200: bf18 it ne 8029202: eeb0 8a47 vmovne.f32 s16, s14 8029206: ee07 4a10 vmov s14, r4 802920a: ee67 0aa8 vmul.f32 s1, s15, s17 802920e: ee38 7ac7 vsub.f32 s14, s17, s14 8029212: ee07 3a90 vmov s15, r3 8029216: eee7 0a27 vfma.f32 s1, s14, s15 802921a: ee07 4a10 vmov s14, r4 802921e: ee67 7a87 vmul.f32 s15, s15, s14 8029222: ee30 7aa7 vadd.f32 s14, s1, s15 8029226: ee17 1a10 vmov r1, s14 802922a: 2900 cmp r1, #0 802922c: f021 4300 bic.w r3, r1, #2147483648 @ 0x80000000 8029230: f340 80dd ble.w 80293ee <__ieee754_powf+0x3e6> 8029234: f1b3 4f86 cmp.w r3, #1124073472 @ 0x43000000 8029238: f240 80ca bls.w 80293d0 <__ieee754_powf+0x3c8> 802923c: eeb5 8ac0 vcmpe.f32 s16, #0.0 8029240: eef1 fa10 vmrs APSR_nzcv, fpscr 8029244: bf4c ite mi 8029246: 2001 movmi r0, #1 8029248: 2000 movpl r0, #0 802924a: e791 b.n 8029170 <__ieee754_powf+0x168> 802924c: f016 4fff tst.w r6, #2139095040 @ 0x7f800000 8029250: bf01 itttt eq 8029252: eddf 7a78 vldreq s15, [pc, #480] @ 8029434 <__ieee754_powf+0x42c> 8029256: ee60 7a27 vmuleq.f32 s15, s0, s15 802925a: f06f 0317 mvneq.w r3, #23 802925e: ee17 7a90 vmoveq r7, s15 8029262: ea4f 52e7 mov.w r2, r7, asr #23 8029266: bf18 it ne 8029268: 2300 movne r3, #0 802926a: 3a7f subs r2, #127 @ 0x7f 802926c: 441a add r2, r3 802926e: 4b72 ldr r3, [pc, #456] @ (8029438 <__ieee754_powf+0x430>) 8029270: f3c7 0716 ubfx r7, r7, #0, #23 8029274: 429f cmp r7, r3 8029276: f047 517e orr.w r1, r7, #1065353216 @ 0x3f800000 802927a: dd06 ble.n 802928a <__ieee754_powf+0x282> 802927c: 4b6f ldr r3, [pc, #444] @ (802943c <__ieee754_powf+0x434>) 802927e: 429f cmp r7, r3 8029280: f340 80a4 ble.w 80293cc <__ieee754_powf+0x3c4> 8029284: 3201 adds r2, #1 8029286: f5a1 0100 sub.w r1, r1, #8388608 @ 0x800000 802928a: 2600 movs r6, #0 802928c: 4b6c ldr r3, [pc, #432] @ (8029440 <__ieee754_powf+0x438>) 802928e: eb03 0386 add.w r3, r3, r6, lsl #2 8029292: ee07 1a10 vmov s14, r1 8029296: edd3 5a00 vldr s11, [r3] 802929a: 4b6a ldr r3, [pc, #424] @ (8029444 <__ieee754_powf+0x43c>) 802929c: ee75 7a87 vadd.f32 s15, s11, s14 80292a0: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0 80292a4: eec6 4aa7 vdiv.f32 s9, s13, s15 80292a8: 1049 asrs r1, r1, #1 80292aa: f041 5100 orr.w r1, r1, #536870912 @ 0x20000000 80292ae: f501 2180 add.w r1, r1, #262144 @ 0x40000 80292b2: eb01 5146 add.w r1, r1, r6, lsl #21 80292b6: ee37 6a65 vsub.f32 s12, s14, s11 80292ba: ee07 1a90 vmov s15, r1 80292be: ee26 5a24 vmul.f32 s10, s12, s9 80292c2: ee77 5ae5 vsub.f32 s11, s15, s11 80292c6: ee15 7a10 vmov r7, s10 80292ca: 401f ands r7, r3 80292cc: ee06 7a90 vmov s13, r7 80292d0: eea6 6ae7 vfms.f32 s12, s13, s15 80292d4: ee37 7a65 vsub.f32 s14, s14, s11 80292d8: ee65 7a05 vmul.f32 s15, s10, s10 80292dc: eea6 6ac7 vfms.f32 s12, s13, s14 80292e0: eddf 5a59 vldr s11, [pc, #356] @ 8029448 <__ieee754_powf+0x440> 80292e4: ed9f 7a59 vldr s14, [pc, #356] @ 802944c <__ieee754_powf+0x444> 80292e8: eee7 5a87 vfma.f32 s11, s15, s14 80292ec: ed9f 7a58 vldr s14, [pc, #352] @ 8029450 <__ieee754_powf+0x448> 80292f0: eea5 7aa7 vfma.f32 s14, s11, s15 80292f4: eddf 5a4b vldr s11, [pc, #300] @ 8029424 <__ieee754_powf+0x41c> 80292f8: eee7 5a27 vfma.f32 s11, s14, s15 80292fc: ed9f 7a55 vldr s14, [pc, #340] @ 8029454 <__ieee754_powf+0x44c> 8029300: eea5 7aa7 vfma.f32 s14, s11, s15 8029304: eddf 5a54 vldr s11, [pc, #336] @ 8029458 <__ieee754_powf+0x450> 8029308: ee26 6a24 vmul.f32 s12, s12, s9 802930c: eee7 5a27 vfma.f32 s11, s14, s15 8029310: ee35 7a26 vadd.f32 s14, s10, s13 8029314: ee67 4aa7 vmul.f32 s9, s15, s15 8029318: ee27 7a06 vmul.f32 s14, s14, s12 802931c: eef0 7a08 vmov.f32 s15, #8 @ 0x40400000 3.0 8029320: eea4 7aa5 vfma.f32 s14, s9, s11 8029324: eef0 5a67 vmov.f32 s11, s15 8029328: eee6 5aa6 vfma.f32 s11, s13, s13 802932c: ee75 5a87 vadd.f32 s11, s11, s14 8029330: ee15 1a90 vmov r1, s11 8029334: 4019 ands r1, r3 8029336: ee05 1a90 vmov s11, r1 802933a: ee75 7ae7 vsub.f32 s15, s11, s15 802933e: eee6 7ae6 vfms.f32 s15, s13, s13 8029342: ee77 7a67 vsub.f32 s15, s14, s15 8029346: ee67 7a85 vmul.f32 s15, s15, s10 802934a: eee6 7a25 vfma.f32 s15, s12, s11 802934e: eeb0 6a67 vmov.f32 s12, s15 8029352: eea6 6aa5 vfma.f32 s12, s13, s11 8029356: ee16 1a10 vmov r1, s12 802935a: 4019 ands r1, r3 802935c: ee06 1a10 vmov s12, r1 8029360: eeb0 7a46 vmov.f32 s14, s12 8029364: eea6 7ae5 vfms.f32 s14, s13, s11 8029368: 493c ldr r1, [pc, #240] @ (802945c <__ieee754_powf+0x454>) 802936a: eb01 0186 add.w r1, r1, r6, lsl #2 802936e: ee77 7ac7 vsub.f32 s15, s15, s14 8029372: ed9f 7a3b vldr s14, [pc, #236] @ 8029460 <__ieee754_powf+0x458> 8029376: eddf 5a3b vldr s11, [pc, #236] @ 8029464 <__ieee754_powf+0x45c> 802937a: ee67 7a87 vmul.f32 s15, s15, s14 802937e: ed9f 7a3a vldr s14, [pc, #232] @ 8029468 <__ieee754_powf+0x460> 8029382: eee6 7a07 vfma.f32 s15, s12, s14 8029386: ed91 7a00 vldr s14, [r1] 802938a: ee77 7a87 vadd.f32 s15, s15, s14 802938e: ee07 2a10 vmov s14, r2 8029392: eef0 6a67 vmov.f32 s13, s15 8029396: 4a35 ldr r2, [pc, #212] @ (802946c <__ieee754_powf+0x464>) 8029398: eee6 6a25 vfma.f32 s13, s12, s11 802939c: eb02 0286 add.w r2, r2, r6, lsl #2 80293a0: ed92 5a00 vldr s10, [r2] 80293a4: eeb8 7ac7 vcvt.f32.s32 s14, s14 80293a8: ee76 6a85 vadd.f32 s13, s13, s10 80293ac: ee76 6a87 vadd.f32 s13, s13, s14 80293b0: ee16 2a90 vmov r2, s13 80293b4: 4013 ands r3, r2 80293b6: ee06 3a90 vmov s13, r3 80293ba: ee36 7ac7 vsub.f32 s14, s13, s14 80293be: ee37 7a45 vsub.f32 s14, s14, s10 80293c2: eea6 7a65 vfms.f32 s14, s12, s11 80293c6: ee77 7ac7 vsub.f32 s15, s15, s14 80293ca: e70f b.n 80291ec <__ieee754_powf+0x1e4> 80293cc: 2601 movs r6, #1 80293ce: e75d b.n 802928c <__ieee754_powf+0x284> 80293d0: d152 bne.n 8029478 <__ieee754_powf+0x470> 80293d2: eddf 6a27 vldr s13, [pc, #156] @ 8029470 <__ieee754_powf+0x468> 80293d6: ee37 7a67 vsub.f32 s14, s14, s15 80293da: ee70 6aa6 vadd.f32 s13, s1, s13 80293de: eef4 6ac7 vcmpe.f32 s13, s14 80293e2: eef1 fa10 vmrs APSR_nzcv, fpscr 80293e6: f73f af29 bgt.w 802923c <__ieee754_powf+0x234> 80293ea: 2386 movs r3, #134 @ 0x86 80293ec: e048 b.n 8029480 <__ieee754_powf+0x478> 80293ee: 4a21 ldr r2, [pc, #132] @ (8029474 <__ieee754_powf+0x46c>) 80293f0: 4293 cmp r3, r2 80293f2: d907 bls.n 8029404 <__ieee754_powf+0x3fc> 80293f4: eeb5 8ac0 vcmpe.f32 s16, #0.0 80293f8: eef1 fa10 vmrs APSR_nzcv, fpscr 80293fc: bf4c ite mi 80293fe: 2001 movmi r0, #1 8029400: 2000 movpl r0, #0 8029402: e6c1 b.n 8029188 <__ieee754_powf+0x180> 8029404: d138 bne.n 8029478 <__ieee754_powf+0x470> 8029406: ee37 7a67 vsub.f32 s14, s14, s15 802940a: eeb4 7ae0 vcmpe.f32 s14, s1 802940e: eef1 fa10 vmrs APSR_nzcv, fpscr 8029412: dbea blt.n 80293ea <__ieee754_powf+0x3e2> 8029414: e7ee b.n 80293f4 <__ieee754_powf+0x3ec> 8029416: bf00 nop 8029418: 00000000 .word 0x00000000 802941c: 3f7ffff3 .word 0x3f7ffff3 8029420: 3f800007 .word 0x3f800007 8029424: 3eaaaaab .word 0x3eaaaaab 8029428: 3fb8aa3b .word 0x3fb8aa3b 802942c: 36eca570 .word 0x36eca570 8029430: 3fb8aa00 .word 0x3fb8aa00 8029434: 4b800000 .word 0x4b800000 8029438: 001cc471 .word 0x001cc471 802943c: 005db3d6 .word 0x005db3d6 8029440: 0802d73c .word 0x0802d73c 8029444: fffff000 .word 0xfffff000 8029448: 3e6c3255 .word 0x3e6c3255 802944c: 3e53f142 .word 0x3e53f142 8029450: 3e8ba305 .word 0x3e8ba305 8029454: 3edb6db7 .word 0x3edb6db7 8029458: 3f19999a .word 0x3f19999a 802945c: 0802d72c .word 0x0802d72c 8029460: 3f76384f .word 0x3f76384f 8029464: 3f763800 .word 0x3f763800 8029468: 369dc3a0 .word 0x369dc3a0 802946c: 0802d734 .word 0x0802d734 8029470: 3338aa3c .word 0x3338aa3c 8029474: 43160000 .word 0x43160000 8029478: f1b3 5f7c cmp.w r3, #1056964608 @ 0x3f000000 802947c: d971 bls.n 8029562 <__ieee754_powf+0x55a> 802947e: 15db asrs r3, r3, #23 8029480: 3b7e subs r3, #126 @ 0x7e 8029482: f44f 0000 mov.w r0, #8388608 @ 0x800000 8029486: 4118 asrs r0, r3 8029488: 4408 add r0, r1 802948a: f3c0 53c7 ubfx r3, r0, #23, #8 802948e: 4a3c ldr r2, [pc, #240] @ (8029580 <__ieee754_powf+0x578>) 8029490: 3b7f subs r3, #127 @ 0x7f 8029492: 411a asrs r2, r3 8029494: 4002 ands r2, r0 8029496: ee07 2a10 vmov s14, r2 802949a: f3c0 0016 ubfx r0, r0, #0, #23 802949e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 80294a2: f1c3 0317 rsb r3, r3, #23 80294a6: 4118 asrs r0, r3 80294a8: 2900 cmp r1, #0 80294aa: ee77 7ac7 vsub.f32 s15, s15, s14 80294ae: bfb8 it lt 80294b0: 4240 neglt r0, r0 80294b2: ee37 7aa0 vadd.f32 s14, s15, s1 80294b6: eddf 6a33 vldr s13, [pc, #204] @ 8029584 <__ieee754_powf+0x57c> 80294ba: ed9f 6a33 vldr s12, [pc, #204] @ 8029588 <__ieee754_powf+0x580> 80294be: ee17 3a10 vmov r3, s14 80294c2: f423 637f bic.w r3, r3, #4080 @ 0xff0 80294c6: f023 030f bic.w r3, r3, #15 80294ca: ee07 3a10 vmov s14, r3 80294ce: ee77 7a67 vsub.f32 s15, s14, s15 80294d2: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 80294d6: ee70 0ae7 vsub.f32 s1, s1, s15 80294da: eddf 7a2c vldr s15, [pc, #176] @ 802958c <__ieee754_powf+0x584> 80294de: ee67 7a27 vmul.f32 s15, s14, s15 80294e2: eee0 7aa6 vfma.f32 s15, s1, s13 80294e6: eef0 6a67 vmov.f32 s13, s15 80294ea: eee7 6a06 vfma.f32 s13, s14, s12 80294ee: eef0 5a66 vmov.f32 s11, s13 80294f2: eee7 5a46 vfms.f32 s11, s14, s12 80294f6: ee26 7aa6 vmul.f32 s14, s13, s13 80294fa: ee77 7ae5 vsub.f32 s15, s15, s11 80294fe: ed9f 6a24 vldr s12, [pc, #144] @ 8029590 <__ieee754_powf+0x588> 8029502: eddf 5a24 vldr s11, [pc, #144] @ 8029594 <__ieee754_powf+0x58c> 8029506: eea7 6a25 vfma.f32 s12, s14, s11 802950a: eddf 5a23 vldr s11, [pc, #140] @ 8029598 <__ieee754_powf+0x590> 802950e: eee6 5a07 vfma.f32 s11, s12, s14 8029512: ed9f 6a22 vldr s12, [pc, #136] @ 802959c <__ieee754_powf+0x594> 8029516: eea5 6a87 vfma.f32 s12, s11, s14 802951a: eddf 5a21 vldr s11, [pc, #132] @ 80295a0 <__ieee754_powf+0x598> 802951e: eee6 5a07 vfma.f32 s11, s12, s14 8029522: eeb0 6a66 vmov.f32 s12, s13 8029526: eea5 6ac7 vfms.f32 s12, s11, s14 802952a: eeb0 7a00 vmov.f32 s14, #0 @ 0x40000000 2.0 802952e: ee66 5a86 vmul.f32 s11, s13, s12 8029532: ee36 6a47 vsub.f32 s12, s12, s14 8029536: eee6 7aa7 vfma.f32 s15, s13, s15 802953a: ee85 7a86 vdiv.f32 s14, s11, s12 802953e: ee77 7a67 vsub.f32 s15, s14, s15 8029542: ee77 7ae6 vsub.f32 s15, s15, s13 8029546: ee30 0a67 vsub.f32 s0, s0, s15 802954a: ee10 3a10 vmov r3, s0 802954e: eb03 53c0 add.w r3, r3, r0, lsl #23 8029552: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000 8029556: da06 bge.n 8029566 <__ieee754_powf+0x55e> 8029558: f000 f95e bl 8029818 802955c: ee20 0a08 vmul.f32 s0, s0, s16 8029560: e56a b.n 8029038 <__ieee754_powf+0x30> 8029562: 2000 movs r0, #0 8029564: e7a5 b.n 80294b2 <__ieee754_powf+0x4aa> 8029566: ee00 3a10 vmov s0, r3 802956a: e7f7 b.n 802955c <__ieee754_powf+0x554> 802956c: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 8029570: e562 b.n 8029038 <__ieee754_powf+0x30> 8029572: ed9f 0a0c vldr s0, [pc, #48] @ 80295a4 <__ieee754_powf+0x59c> 8029576: e55f b.n 8029038 <__ieee754_powf+0x30> 8029578: eeb0 0a48 vmov.f32 s0, s16 802957c: e55c b.n 8029038 <__ieee754_powf+0x30> 802957e: bf00 nop 8029580: ff800000 .word 0xff800000 8029584: 3f317218 .word 0x3f317218 8029588: 3f317200 .word 0x3f317200 802958c: 35bfbe8c .word 0x35bfbe8c 8029590: b5ddea0e .word 0xb5ddea0e 8029594: 3331bb4c .word 0x3331bb4c 8029598: 388ab355 .word 0x388ab355 802959c: bb360b61 .word 0xbb360b61 80295a0: 3e2aaaab .word 0x3e2aaaab 80295a4: 00000000 .word 0x00000000 080295a8 <__ieee754_rem_pio2f>: 80295a8: b5f0 push {r4, r5, r6, r7, lr} 80295aa: ee10 6a10 vmov r6, s0 80295ae: 4b88 ldr r3, [pc, #544] @ (80297d0 <__ieee754_rem_pio2f+0x228>) 80295b0: f026 4500 bic.w r5, r6, #2147483648 @ 0x80000000 80295b4: 429d cmp r5, r3 80295b6: b087 sub sp, #28 80295b8: 4604 mov r4, r0 80295ba: d805 bhi.n 80295c8 <__ieee754_rem_pio2f+0x20> 80295bc: 2300 movs r3, #0 80295be: ed80 0a00 vstr s0, [r0] 80295c2: 6043 str r3, [r0, #4] 80295c4: 2000 movs r0, #0 80295c6: e022 b.n 802960e <__ieee754_rem_pio2f+0x66> 80295c8: 4b82 ldr r3, [pc, #520] @ (80297d4 <__ieee754_rem_pio2f+0x22c>) 80295ca: 429d cmp r5, r3 80295cc: d83a bhi.n 8029644 <__ieee754_rem_pio2f+0x9c> 80295ce: f026 4300 bic.w r3, r6, #2147483648 @ 0x80000000 80295d2: 2e00 cmp r6, #0 80295d4: ed9f 7a80 vldr s14, [pc, #512] @ 80297d8 <__ieee754_rem_pio2f+0x230> 80295d8: 4a80 ldr r2, [pc, #512] @ (80297dc <__ieee754_rem_pio2f+0x234>) 80295da: f023 030f bic.w r3, r3, #15 80295de: dd18 ble.n 8029612 <__ieee754_rem_pio2f+0x6a> 80295e0: 4293 cmp r3, r2 80295e2: ee70 7a47 vsub.f32 s15, s0, s14 80295e6: bf09 itett eq 80295e8: ed9f 7a7d vldreq s14, [pc, #500] @ 80297e0 <__ieee754_rem_pio2f+0x238> 80295ec: eddf 6a7d vldrne s13, [pc, #500] @ 80297e4 <__ieee754_rem_pio2f+0x23c> 80295f0: eddf 6a7d vldreq s13, [pc, #500] @ 80297e8 <__ieee754_rem_pio2f+0x240> 80295f4: ee77 7ac7 vsubeq.f32 s15, s15, s14 80295f8: ee37 7ae6 vsub.f32 s14, s15, s13 80295fc: ee77 7ac7 vsub.f32 s15, s15, s14 8029600: ed80 7a00 vstr s14, [r0] 8029604: ee77 7ae6 vsub.f32 s15, s15, s13 8029608: edc0 7a01 vstr s15, [r0, #4] 802960c: 2001 movs r0, #1 802960e: b007 add sp, #28 8029610: bdf0 pop {r4, r5, r6, r7, pc} 8029612: 4293 cmp r3, r2 8029614: ee70 7a07 vadd.f32 s15, s0, s14 8029618: bf09 itett eq 802961a: ed9f 7a71 vldreq s14, [pc, #452] @ 80297e0 <__ieee754_rem_pio2f+0x238> 802961e: eddf 6a71 vldrne s13, [pc, #452] @ 80297e4 <__ieee754_rem_pio2f+0x23c> 8029622: eddf 6a71 vldreq s13, [pc, #452] @ 80297e8 <__ieee754_rem_pio2f+0x240> 8029626: ee77 7a87 vaddeq.f32 s15, s15, s14 802962a: ee37 7aa6 vadd.f32 s14, s15, s13 802962e: ee77 7ac7 vsub.f32 s15, s15, s14 8029632: ed80 7a00 vstr s14, [r0] 8029636: ee77 7aa6 vadd.f32 s15, s15, s13 802963a: edc0 7a01 vstr s15, [r0, #4] 802963e: f04f 30ff mov.w r0, #4294967295 8029642: e7e4 b.n 802960e <__ieee754_rem_pio2f+0x66> 8029644: 4b69 ldr r3, [pc, #420] @ (80297ec <__ieee754_rem_pio2f+0x244>) 8029646: 429d cmp r5, r3 8029648: d873 bhi.n 8029732 <__ieee754_rem_pio2f+0x18a> 802964a: f000 f8dd bl 8029808 802964e: ed9f 7a68 vldr s14, [pc, #416] @ 80297f0 <__ieee754_rem_pio2f+0x248> 8029652: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5 8029656: eee0 7a07 vfma.f32 s15, s0, s14 802965a: eefd 7ae7 vcvt.s32.f32 s15, s15 802965e: eeb8 7ae7 vcvt.f32.s32 s14, s15 8029662: ee17 0a90 vmov r0, s15 8029666: eddf 7a5c vldr s15, [pc, #368] @ 80297d8 <__ieee754_rem_pio2f+0x230> 802966a: eea7 0a67 vfms.f32 s0, s14, s15 802966e: 281f cmp r0, #31 8029670: eddf 7a5c vldr s15, [pc, #368] @ 80297e4 <__ieee754_rem_pio2f+0x23c> 8029674: ee67 7a27 vmul.f32 s15, s14, s15 8029678: eeb1 6a47 vneg.f32 s12, s14 802967c: ee70 6a67 vsub.f32 s13, s0, s15 8029680: ee16 1a90 vmov r1, s13 8029684: dc09 bgt.n 802969a <__ieee754_rem_pio2f+0xf2> 8029686: 4a5b ldr r2, [pc, #364] @ (80297f4 <__ieee754_rem_pio2f+0x24c>) 8029688: 1e47 subs r7, r0, #1 802968a: f026 4300 bic.w r3, r6, #2147483648 @ 0x80000000 802968e: f852 2027 ldr.w r2, [r2, r7, lsl #2] 8029692: f023 03ff bic.w r3, r3, #255 @ 0xff 8029696: 4293 cmp r3, r2 8029698: d107 bne.n 80296aa <__ieee754_rem_pio2f+0x102> 802969a: f3c1 52c7 ubfx r2, r1, #23, #8 802969e: ebc2 52d5 rsb r2, r2, r5, lsr #23 80296a2: 2a08 cmp r2, #8 80296a4: ea4f 53e5 mov.w r3, r5, asr #23 80296a8: dc14 bgt.n 80296d4 <__ieee754_rem_pio2f+0x12c> 80296aa: 6021 str r1, [r4, #0] 80296ac: ed94 7a00 vldr s14, [r4] 80296b0: ee30 0a47 vsub.f32 s0, s0, s14 80296b4: 2e00 cmp r6, #0 80296b6: ee30 0a67 vsub.f32 s0, s0, s15 80296ba: ed84 0a01 vstr s0, [r4, #4] 80296be: daa6 bge.n 802960e <__ieee754_rem_pio2f+0x66> 80296c0: eeb1 7a47 vneg.f32 s14, s14 80296c4: eeb1 0a40 vneg.f32 s0, s0 80296c8: ed84 7a00 vstr s14, [r4] 80296cc: ed84 0a01 vstr s0, [r4, #4] 80296d0: 4240 negs r0, r0 80296d2: e79c b.n 802960e <__ieee754_rem_pio2f+0x66> 80296d4: eddf 5a42 vldr s11, [pc, #264] @ 80297e0 <__ieee754_rem_pio2f+0x238> 80296d8: eef0 6a40 vmov.f32 s13, s0 80296dc: eee6 6a25 vfma.f32 s13, s12, s11 80296e0: ee70 7a66 vsub.f32 s15, s0, s13 80296e4: eee6 7a25 vfma.f32 s15, s12, s11 80296e8: eddf 5a3f vldr s11, [pc, #252] @ 80297e8 <__ieee754_rem_pio2f+0x240> 80296ec: eed7 7a25 vfnms.f32 s15, s14, s11 80296f0: ee76 5ae7 vsub.f32 s11, s13, s15 80296f4: ee15 2a90 vmov r2, s11 80296f8: f3c2 51c7 ubfx r1, r2, #23, #8 80296fc: 1a5b subs r3, r3, r1 80296fe: 2b19 cmp r3, #25 8029700: dc04 bgt.n 802970c <__ieee754_rem_pio2f+0x164> 8029702: edc4 5a00 vstr s11, [r4] 8029706: eeb0 0a66 vmov.f32 s0, s13 802970a: e7cf b.n 80296ac <__ieee754_rem_pio2f+0x104> 802970c: eddf 5a3a vldr s11, [pc, #232] @ 80297f8 <__ieee754_rem_pio2f+0x250> 8029710: eeb0 0a66 vmov.f32 s0, s13 8029714: eea6 0a25 vfma.f32 s0, s12, s11 8029718: ee76 7ac0 vsub.f32 s15, s13, s0 802971c: eddf 6a37 vldr s13, [pc, #220] @ 80297fc <__ieee754_rem_pio2f+0x254> 8029720: eee6 7a25 vfma.f32 s15, s12, s11 8029724: eed7 7a26 vfnms.f32 s15, s14, s13 8029728: ee30 7a67 vsub.f32 s14, s0, s15 802972c: ed84 7a00 vstr s14, [r4] 8029730: e7bc b.n 80296ac <__ieee754_rem_pio2f+0x104> 8029732: f1b5 4fff cmp.w r5, #2139095040 @ 0x7f800000 8029736: d306 bcc.n 8029746 <__ieee754_rem_pio2f+0x19e> 8029738: ee70 7a40 vsub.f32 s15, s0, s0 802973c: edc0 7a01 vstr s15, [r0, #4] 8029740: edc0 7a00 vstr s15, [r0] 8029744: e73e b.n 80295c4 <__ieee754_rem_pio2f+0x1c> 8029746: 15ea asrs r2, r5, #23 8029748: 3a86 subs r2, #134 @ 0x86 802974a: eba5 53c2 sub.w r3, r5, r2, lsl #23 802974e: ee07 3a90 vmov s15, r3 8029752: eebd 7ae7 vcvt.s32.f32 s14, s15 8029756: eddf 6a2a vldr s13, [pc, #168] @ 8029800 <__ieee754_rem_pio2f+0x258> 802975a: eeb8 7ac7 vcvt.f32.s32 s14, s14 802975e: ee77 7ac7 vsub.f32 s15, s15, s14 8029762: ed8d 7a03 vstr s14, [sp, #12] 8029766: ee67 7aa6 vmul.f32 s15, s15, s13 802976a: eebd 7ae7 vcvt.s32.f32 s14, s15 802976e: eeb8 7ac7 vcvt.f32.s32 s14, s14 8029772: ee77 7ac7 vsub.f32 s15, s15, s14 8029776: ed8d 7a04 vstr s14, [sp, #16] 802977a: ee67 7aa6 vmul.f32 s15, s15, s13 802977e: eef5 7a40 vcmp.f32 s15, #0.0 8029782: eef1 fa10 vmrs APSR_nzcv, fpscr 8029786: edcd 7a05 vstr s15, [sp, #20] 802978a: d11e bne.n 80297ca <__ieee754_rem_pio2f+0x222> 802978c: eeb5 7a40 vcmp.f32 s14, #0.0 8029790: eef1 fa10 vmrs APSR_nzcv, fpscr 8029794: bf0c ite eq 8029796: 2301 moveq r3, #1 8029798: 2302 movne r3, #2 802979a: 491a ldr r1, [pc, #104] @ (8029804 <__ieee754_rem_pio2f+0x25c>) 802979c: 9101 str r1, [sp, #4] 802979e: 2102 movs r1, #2 80297a0: 9100 str r1, [sp, #0] 80297a2: a803 add r0, sp, #12 80297a4: 4621 mov r1, r4 80297a6: f000 f8c3 bl 8029930 <__kernel_rem_pio2f> 80297aa: 2e00 cmp r6, #0 80297ac: f6bf af2f bge.w 802960e <__ieee754_rem_pio2f+0x66> 80297b0: edd4 7a00 vldr s15, [r4] 80297b4: eef1 7a67 vneg.f32 s15, s15 80297b8: edc4 7a00 vstr s15, [r4] 80297bc: edd4 7a01 vldr s15, [r4, #4] 80297c0: eef1 7a67 vneg.f32 s15, s15 80297c4: edc4 7a01 vstr s15, [r4, #4] 80297c8: e782 b.n 80296d0 <__ieee754_rem_pio2f+0x128> 80297ca: 2303 movs r3, #3 80297cc: e7e5 b.n 802979a <__ieee754_rem_pio2f+0x1f2> 80297ce: bf00 nop 80297d0: 3f490fd8 .word 0x3f490fd8 80297d4: 4016cbe3 .word 0x4016cbe3 80297d8: 3fc90f80 .word 0x3fc90f80 80297dc: 3fc90fd0 .word 0x3fc90fd0 80297e0: 37354400 .word 0x37354400 80297e4: 37354443 .word 0x37354443 80297e8: 2e85a308 .word 0x2e85a308 80297ec: 43490f80 .word 0x43490f80 80297f0: 3f22f984 .word 0x3f22f984 80297f4: 0802d744 .word 0x0802d744 80297f8: 2e85a300 .word 0x2e85a300 80297fc: 248d3132 .word 0x248d3132 8029800: 43800000 .word 0x43800000 8029804: 0802d7c4 .word 0x0802d7c4 08029808 : 8029808: ee10 3a10 vmov r3, s0 802980c: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8029810: ee00 3a10 vmov s0, r3 8029814: 4770 bx lr ... 08029818 : 8029818: ee10 3a10 vmov r3, s0 802981c: f033 4200 bics.w r2, r3, #2147483648 @ 0x80000000 8029820: d02b beq.n 802987a 8029822: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 8029826: d302 bcc.n 802982e 8029828: ee30 0a00 vadd.f32 s0, s0, s0 802982c: 4770 bx lr 802982e: f013 4fff tst.w r3, #2139095040 @ 0x7f800000 8029832: d123 bne.n 802987c 8029834: 4b24 ldr r3, [pc, #144] @ (80298c8 ) 8029836: eddf 7a25 vldr s15, [pc, #148] @ 80298cc 802983a: 4298 cmp r0, r3 802983c: ee20 0a27 vmul.f32 s0, s0, s15 8029840: db17 blt.n 8029872 8029842: ee10 3a10 vmov r3, s0 8029846: f3c3 52c7 ubfx r2, r3, #23, #8 802984a: 3a19 subs r2, #25 802984c: f24c 3150 movw r1, #50000 @ 0xc350 8029850: 4288 cmp r0, r1 8029852: dd15 ble.n 8029880 8029854: eddf 7a1e vldr s15, [pc, #120] @ 80298d0 8029858: eddf 6a1e vldr s13, [pc, #120] @ 80298d4 802985c: ee10 3a10 vmov r3, s0 8029860: eeb0 7a67 vmov.f32 s14, s15 8029864: 2b00 cmp r3, #0 8029866: bfb8 it lt 8029868: eef0 7a66 vmovlt.f32 s15, s13 802986c: ee27 0a87 vmul.f32 s0, s15, s14 8029870: 4770 bx lr 8029872: eddf 7a19 vldr s15, [pc, #100] @ 80298d8 8029876: ee27 0a80 vmul.f32 s0, s15, s0 802987a: 4770 bx lr 802987c: 0dd2 lsrs r2, r2, #23 802987e: e7e5 b.n 802984c 8029880: 4410 add r0, r2 8029882: 28fe cmp r0, #254 @ 0xfe 8029884: dce6 bgt.n 8029854 8029886: 2800 cmp r0, #0 8029888: dd06 ble.n 8029898 802988a: f023 43ff bic.w r3, r3, #2139095040 @ 0x7f800000 802988e: ea43 53c0 orr.w r3, r3, r0, lsl #23 8029892: ee00 3a10 vmov s0, r3 8029896: 4770 bx lr 8029898: f110 0f16 cmn.w r0, #22 802989c: da09 bge.n 80298b2 802989e: eddf 7a0e vldr s15, [pc, #56] @ 80298d8 80298a2: eddf 6a0e vldr s13, [pc, #56] @ 80298dc 80298a6: ee10 3a10 vmov r3, s0 80298aa: eeb0 7a67 vmov.f32 s14, s15 80298ae: 2b00 cmp r3, #0 80298b0: e7d9 b.n 8029866 80298b2: 3019 adds r0, #25 80298b4: f023 43ff bic.w r3, r3, #2139095040 @ 0x7f800000 80298b8: ea43 53c0 orr.w r3, r3, r0, lsl #23 80298bc: ed9f 0a08 vldr s0, [pc, #32] @ 80298e0 80298c0: ee07 3a90 vmov s15, r3 80298c4: e7d7 b.n 8029876 80298c6: bf00 nop 80298c8: ffff3cb0 .word 0xffff3cb0 80298cc: 4c000000 .word 0x4c000000 80298d0: 7149f2ca .word 0x7149f2ca 80298d4: f149f2ca .word 0xf149f2ca 80298d8: 0da24260 .word 0x0da24260 80298dc: 8da24260 .word 0x8da24260 80298e0: 33000000 .word 0x33000000 080298e4 : 80298e4: b510 push {r4, lr} 80298e6: ed2d 8b02 vpush {d8} 80298ea: eeb0 8a40 vmov.f32 s16, s0 80298ee: 4604 mov r4, r0 80298f0: f7fe fda8 bl 8028444 <__errno> 80298f4: eeb0 0a48 vmov.f32 s0, s16 80298f8: ecbd 8b02 vpop {d8} 80298fc: 6004 str r4, [r0, #0] 80298fe: bd10 pop {r4, pc} 08029900 : 8029900: b130 cbz r0, 8029910 8029902: eef1 7a40 vneg.f32 s15, s0 8029906: ee27 0a80 vmul.f32 s0, s15, s0 802990a: 2022 movs r0, #34 @ 0x22 802990c: f7ff bfea b.w 80298e4 8029910: eef0 7a40 vmov.f32 s15, s0 8029914: e7f7 b.n 8029906 ... 08029918 <__math_uflowf>: 8029918: ed9f 0a01 vldr s0, [pc, #4] @ 8029920 <__math_uflowf+0x8> 802991c: f7ff bff0 b.w 8029900 8029920: 10000000 .word 0x10000000 08029924 <__math_oflowf>: 8029924: ed9f 0a01 vldr s0, [pc, #4] @ 802992c <__math_oflowf+0x8> 8029928: f7ff bfea b.w 8029900 802992c: 70000000 .word 0x70000000 08029930 <__kernel_rem_pio2f>: 8029930: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8029934: ed2d 8b04 vpush {d8-d9} 8029938: b0d9 sub sp, #356 @ 0x164 802993a: 4690 mov r8, r2 802993c: 9001 str r0, [sp, #4] 802993e: 4ab9 ldr r2, [pc, #740] @ (8029c24 <__kernel_rem_pio2f+0x2f4>) 8029940: 9866 ldr r0, [sp, #408] @ 0x198 8029942: f118 0f04 cmn.w r8, #4 8029946: f852 a020 ldr.w sl, [r2, r0, lsl #2] 802994a: 460f mov r7, r1 802994c: f103 3bff add.w fp, r3, #4294967295 8029950: db27 blt.n 80299a2 <__kernel_rem_pio2f+0x72> 8029952: f1b8 0203 subs.w r2, r8, #3 8029956: bf48 it mi 8029958: f108 0204 addmi.w r2, r8, #4 802995c: 10d2 asrs r2, r2, #3 802995e: 1c55 adds r5, r2, #1 8029960: 9967 ldr r1, [sp, #412] @ 0x19c 8029962: ed9f 7ab4 vldr s14, [pc, #720] @ 8029c34 <__kernel_rem_pio2f+0x304> 8029966: 00e8 lsls r0, r5, #3 8029968: eba2 060b sub.w r6, r2, fp 802996c: 9002 str r0, [sp, #8] 802996e: eba8 05c5 sub.w r5, r8, r5, lsl #3 8029972: eb0a 0c0b add.w ip, sl, fp 8029976: ac1c add r4, sp, #112 @ 0x70 8029978: eb01 0e86 add.w lr, r1, r6, lsl #2 802997c: 2000 movs r0, #0 802997e: 4560 cmp r0, ip 8029980: dd11 ble.n 80299a6 <__kernel_rem_pio2f+0x76> 8029982: a91c add r1, sp, #112 @ 0x70 8029984: eb01 0083 add.w r0, r1, r3, lsl #2 8029988: f50d 7988 add.w r9, sp, #272 @ 0x110 802998c: f04f 0c00 mov.w ip, #0 8029990: 45d4 cmp ip, sl 8029992: dc27 bgt.n 80299e4 <__kernel_rem_pio2f+0xb4> 8029994: f8dd e004 ldr.w lr, [sp, #4] 8029998: eddf 7aa6 vldr s15, [pc, #664] @ 8029c34 <__kernel_rem_pio2f+0x304> 802999c: 4606 mov r6, r0 802999e: 2400 movs r4, #0 80299a0: e016 b.n 80299d0 <__kernel_rem_pio2f+0xa0> 80299a2: 2200 movs r2, #0 80299a4: e7db b.n 802995e <__kernel_rem_pio2f+0x2e> 80299a6: 42c6 cmn r6, r0 80299a8: bf5d ittte pl 80299aa: f85e 1020 ldrpl.w r1, [lr, r0, lsl #2] 80299ae: ee07 1a90 vmovpl s15, r1 80299b2: eef8 7ae7 vcvtpl.f32.s32 s15, s15 80299b6: eef0 7a47 vmovmi.f32 s15, s14 80299ba: ece4 7a01 vstmia r4!, {s15} 80299be: 3001 adds r0, #1 80299c0: e7dd b.n 802997e <__kernel_rem_pio2f+0x4e> 80299c2: ecfe 6a01 vldmia lr!, {s13} 80299c6: ed96 7a00 vldr s14, [r6] 80299ca: eee6 7a87 vfma.f32 s15, s13, s14 80299ce: 3401 adds r4, #1 80299d0: 455c cmp r4, fp 80299d2: f1a6 0604 sub.w r6, r6, #4 80299d6: ddf4 ble.n 80299c2 <__kernel_rem_pio2f+0x92> 80299d8: ece9 7a01 vstmia r9!, {s15} 80299dc: f10c 0c01 add.w ip, ip, #1 80299e0: 3004 adds r0, #4 80299e2: e7d5 b.n 8029990 <__kernel_rem_pio2f+0x60> 80299e4: a908 add r1, sp, #32 80299e6: eb01 018a add.w r1, r1, sl, lsl #2 80299ea: 9104 str r1, [sp, #16] 80299ec: 9967 ldr r1, [sp, #412] @ 0x19c 80299ee: eddf 8a90 vldr s17, [pc, #576] @ 8029c30 <__kernel_rem_pio2f+0x300> 80299f2: ed9f 9a8e vldr s18, [pc, #568] @ 8029c2c <__kernel_rem_pio2f+0x2fc> 80299f6: eb01 0282 add.w r2, r1, r2, lsl #2 80299fa: 9203 str r2, [sp, #12] 80299fc: 4654 mov r4, sl 80299fe: 00a2 lsls r2, r4, #2 8029a00: 9205 str r2, [sp, #20] 8029a02: aa58 add r2, sp, #352 @ 0x160 8029a04: eb02 0284 add.w r2, r2, r4, lsl #2 8029a08: ed12 0a14 vldr s0, [r2, #-80] @ 0xffffffb0 8029a0c: a944 add r1, sp, #272 @ 0x110 8029a0e: aa08 add r2, sp, #32 8029a10: eb01 0084 add.w r0, r1, r4, lsl #2 8029a14: 4694 mov ip, r2 8029a16: 4626 mov r6, r4 8029a18: 2e00 cmp r6, #0 8029a1a: f1a0 0004 sub.w r0, r0, #4 8029a1e: dc4c bgt.n 8029aba <__kernel_rem_pio2f+0x18a> 8029a20: 4628 mov r0, r5 8029a22: e9cd 2306 strd r2, r3, [sp, #24] 8029a26: f7ff fef7 bl 8029818 8029a2a: eeb0 8a40 vmov.f32 s16, s0 8029a2e: eeb4 0a00 vmov.f32 s0, #64 @ 0x3e000000 0.125 8029a32: ee28 0a00 vmul.f32 s0, s16, s0 8029a36: f000 f9ed bl 8029e14 8029a3a: eef2 7a00 vmov.f32 s15, #32 @ 0x41000000 8.0 8029a3e: eea0 8a67 vfms.f32 s16, s0, s15 8029a42: 2d00 cmp r5, #0 8029a44: e9dd 2306 ldrd r2, r3, [sp, #24] 8029a48: eefd 7ac8 vcvt.s32.f32 s15, s16 8029a4c: ee17 9a90 vmov r9, s15 8029a50: eef8 7ae7 vcvt.f32.s32 s15, s15 8029a54: ee38 8a67 vsub.f32 s16, s16, s15 8029a58: dd41 ble.n 8029ade <__kernel_rem_pio2f+0x1ae> 8029a5a: f104 3cff add.w ip, r4, #4294967295 8029a5e: a908 add r1, sp, #32 8029a60: f1c5 0e08 rsb lr, r5, #8 8029a64: f851 602c ldr.w r6, [r1, ip, lsl #2] 8029a68: fa46 f00e asr.w r0, r6, lr 8029a6c: 4481 add r9, r0 8029a6e: fa00 f00e lsl.w r0, r0, lr 8029a72: 1a36 subs r6, r6, r0 8029a74: f1c5 0007 rsb r0, r5, #7 8029a78: f841 602c str.w r6, [r1, ip, lsl #2] 8029a7c: 4106 asrs r6, r0 8029a7e: 2e00 cmp r6, #0 8029a80: dd3c ble.n 8029afc <__kernel_rem_pio2f+0x1cc> 8029a82: f04f 0e00 mov.w lr, #0 8029a86: f109 0901 add.w r9, r9, #1 8029a8a: 4670 mov r0, lr 8029a8c: 4574 cmp r4, lr 8029a8e: dc68 bgt.n 8029b62 <__kernel_rem_pio2f+0x232> 8029a90: 2d00 cmp r5, #0 8029a92: dd03 ble.n 8029a9c <__kernel_rem_pio2f+0x16c> 8029a94: 2d01 cmp r5, #1 8029a96: d074 beq.n 8029b82 <__kernel_rem_pio2f+0x252> 8029a98: 2d02 cmp r5, #2 8029a9a: d07d beq.n 8029b98 <__kernel_rem_pio2f+0x268> 8029a9c: 2e02 cmp r6, #2 8029a9e: d12d bne.n 8029afc <__kernel_rem_pio2f+0x1cc> 8029aa0: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 8029aa4: ee30 8a48 vsub.f32 s16, s0, s16 8029aa8: b340 cbz r0, 8029afc <__kernel_rem_pio2f+0x1cc> 8029aaa: 4628 mov r0, r5 8029aac: 9306 str r3, [sp, #24] 8029aae: f7ff feb3 bl 8029818 8029ab2: 9b06 ldr r3, [sp, #24] 8029ab4: ee38 8a40 vsub.f32 s16, s16, s0 8029ab8: e020 b.n 8029afc <__kernel_rem_pio2f+0x1cc> 8029aba: ee60 7a28 vmul.f32 s15, s0, s17 8029abe: 3e01 subs r6, #1 8029ac0: eefd 7ae7 vcvt.s32.f32 s15, s15 8029ac4: eef8 7ae7 vcvt.f32.s32 s15, s15 8029ac8: eea7 0ac9 vfms.f32 s0, s15, s18 8029acc: eebd 0ac0 vcvt.s32.f32 s0, s0 8029ad0: ecac 0a01 vstmia ip!, {s0} 8029ad4: ed90 0a00 vldr s0, [r0] 8029ad8: ee37 0a80 vadd.f32 s0, s15, s0 8029adc: e79c b.n 8029a18 <__kernel_rem_pio2f+0xe8> 8029ade: d105 bne.n 8029aec <__kernel_rem_pio2f+0x1bc> 8029ae0: 1e60 subs r0, r4, #1 8029ae2: a908 add r1, sp, #32 8029ae4: f851 6020 ldr.w r6, [r1, r0, lsl #2] 8029ae8: 11f6 asrs r6, r6, #7 8029aea: e7c8 b.n 8029a7e <__kernel_rem_pio2f+0x14e> 8029aec: eef6 7a00 vmov.f32 s15, #96 @ 0x3f000000 0.5 8029af0: eeb4 8ae7 vcmpe.f32 s16, s15 8029af4: eef1 fa10 vmrs APSR_nzcv, fpscr 8029af8: da31 bge.n 8029b5e <__kernel_rem_pio2f+0x22e> 8029afa: 2600 movs r6, #0 8029afc: eeb5 8a40 vcmp.f32 s16, #0.0 8029b00: eef1 fa10 vmrs APSR_nzcv, fpscr 8029b04: f040 8098 bne.w 8029c38 <__kernel_rem_pio2f+0x308> 8029b08: 1e60 subs r0, r4, #1 8029b0a: 2200 movs r2, #0 8029b0c: 4550 cmp r0, sl 8029b0e: da4b bge.n 8029ba8 <__kernel_rem_pio2f+0x278> 8029b10: 2a00 cmp r2, #0 8029b12: d065 beq.n 8029be0 <__kernel_rem_pio2f+0x2b0> 8029b14: 3c01 subs r4, #1 8029b16: ab08 add r3, sp, #32 8029b18: 3d08 subs r5, #8 8029b1a: f853 3024 ldr.w r3, [r3, r4, lsl #2] 8029b1e: 2b00 cmp r3, #0 8029b20: d0f8 beq.n 8029b14 <__kernel_rem_pio2f+0x1e4> 8029b22: 4628 mov r0, r5 8029b24: eeb7 0a00 vmov.f32 s0, #112 @ 0x3f800000 1.0 8029b28: f7ff fe76 bl 8029818 8029b2c: 1c63 adds r3, r4, #1 8029b2e: aa44 add r2, sp, #272 @ 0x110 8029b30: ed9f 7a3f vldr s14, [pc, #252] @ 8029c30 <__kernel_rem_pio2f+0x300> 8029b34: 0099 lsls r1, r3, #2 8029b36: eb02 0283 add.w r2, r2, r3, lsl #2 8029b3a: 4623 mov r3, r4 8029b3c: 2b00 cmp r3, #0 8029b3e: f280 80a9 bge.w 8029c94 <__kernel_rem_pio2f+0x364> 8029b42: 4623 mov r3, r4 8029b44: 2b00 cmp r3, #0 8029b46: f2c0 80c7 blt.w 8029cd8 <__kernel_rem_pio2f+0x3a8> 8029b4a: aa44 add r2, sp, #272 @ 0x110 8029b4c: eb02 0583 add.w r5, r2, r3, lsl #2 8029b50: f8df c0d4 ldr.w ip, [pc, #212] @ 8029c28 <__kernel_rem_pio2f+0x2f8> 8029b54: eddf 7a37 vldr s15, [pc, #220] @ 8029c34 <__kernel_rem_pio2f+0x304> 8029b58: 2000 movs r0, #0 8029b5a: 1ae2 subs r2, r4, r3 8029b5c: e0b1 b.n 8029cc2 <__kernel_rem_pio2f+0x392> 8029b5e: 2602 movs r6, #2 8029b60: e78f b.n 8029a82 <__kernel_rem_pio2f+0x152> 8029b62: f852 1b04 ldr.w r1, [r2], #4 8029b66: b948 cbnz r0, 8029b7c <__kernel_rem_pio2f+0x24c> 8029b68: b121 cbz r1, 8029b74 <__kernel_rem_pio2f+0x244> 8029b6a: f5c1 7180 rsb r1, r1, #256 @ 0x100 8029b6e: f842 1c04 str.w r1, [r2, #-4] 8029b72: 2101 movs r1, #1 8029b74: f10e 0e01 add.w lr, lr, #1 8029b78: 4608 mov r0, r1 8029b7a: e787 b.n 8029a8c <__kernel_rem_pio2f+0x15c> 8029b7c: f1c1 01ff rsb r1, r1, #255 @ 0xff 8029b80: e7f5 b.n 8029b6e <__kernel_rem_pio2f+0x23e> 8029b82: f104 3cff add.w ip, r4, #4294967295 8029b86: aa08 add r2, sp, #32 8029b88: f852 202c ldr.w r2, [r2, ip, lsl #2] 8029b8c: f002 027f and.w r2, r2, #127 @ 0x7f 8029b90: a908 add r1, sp, #32 8029b92: f841 202c str.w r2, [r1, ip, lsl #2] 8029b96: e781 b.n 8029a9c <__kernel_rem_pio2f+0x16c> 8029b98: f104 3cff add.w ip, r4, #4294967295 8029b9c: aa08 add r2, sp, #32 8029b9e: f852 202c ldr.w r2, [r2, ip, lsl #2] 8029ba2: f002 023f and.w r2, r2, #63 @ 0x3f 8029ba6: e7f3 b.n 8029b90 <__kernel_rem_pio2f+0x260> 8029ba8: a908 add r1, sp, #32 8029baa: f851 1020 ldr.w r1, [r1, r0, lsl #2] 8029bae: 3801 subs r0, #1 8029bb0: 430a orrs r2, r1 8029bb2: e7ab b.n 8029b0c <__kernel_rem_pio2f+0x1dc> 8029bb4: 3201 adds r2, #1 8029bb6: f850 6d04 ldr.w r6, [r0, #-4]! 8029bba: 2e00 cmp r6, #0 8029bbc: d0fa beq.n 8029bb4 <__kernel_rem_pio2f+0x284> 8029bbe: 9905 ldr r1, [sp, #20] 8029bc0: f501 71b0 add.w r1, r1, #352 @ 0x160 8029bc4: eb0d 0001 add.w r0, sp, r1 8029bc8: 18e6 adds r6, r4, r3 8029bca: a91c add r1, sp, #112 @ 0x70 8029bcc: f104 0c01 add.w ip, r4, #1 8029bd0: 384c subs r0, #76 @ 0x4c 8029bd2: eb01 0686 add.w r6, r1, r6, lsl #2 8029bd6: 4422 add r2, r4 8029bd8: 4562 cmp r2, ip 8029bda: da04 bge.n 8029be6 <__kernel_rem_pio2f+0x2b6> 8029bdc: 4614 mov r4, r2 8029bde: e70e b.n 80299fe <__kernel_rem_pio2f+0xce> 8029be0: 9804 ldr r0, [sp, #16] 8029be2: 2201 movs r2, #1 8029be4: e7e7 b.n 8029bb6 <__kernel_rem_pio2f+0x286> 8029be6: 9903 ldr r1, [sp, #12] 8029be8: f8dd e004 ldr.w lr, [sp, #4] 8029bec: f851 102c ldr.w r1, [r1, ip, lsl #2] 8029bf0: 9105 str r1, [sp, #20] 8029bf2: ee07 1a90 vmov s15, r1 8029bf6: eef8 7ae7 vcvt.f32.s32 s15, s15 8029bfa: 2400 movs r4, #0 8029bfc: ece6 7a01 vstmia r6!, {s15} 8029c00: eddf 7a0c vldr s15, [pc, #48] @ 8029c34 <__kernel_rem_pio2f+0x304> 8029c04: 46b1 mov r9, r6 8029c06: 455c cmp r4, fp 8029c08: dd04 ble.n 8029c14 <__kernel_rem_pio2f+0x2e4> 8029c0a: ece0 7a01 vstmia r0!, {s15} 8029c0e: f10c 0c01 add.w ip, ip, #1 8029c12: e7e1 b.n 8029bd8 <__kernel_rem_pio2f+0x2a8> 8029c14: ecfe 6a01 vldmia lr!, {s13} 8029c18: ed39 7a01 vldmdb r9!, {s14} 8029c1c: 3401 adds r4, #1 8029c1e: eee6 7a87 vfma.f32 s15, s13, s14 8029c22: e7f0 b.n 8029c06 <__kernel_rem_pio2f+0x2d6> 8029c24: 0802db08 .word 0x0802db08 8029c28: 0802dadc .word 0x0802dadc 8029c2c: 43800000 .word 0x43800000 8029c30: 3b800000 .word 0x3b800000 8029c34: 00000000 .word 0x00000000 8029c38: 9b02 ldr r3, [sp, #8] 8029c3a: eeb0 0a48 vmov.f32 s0, s16 8029c3e: eba3 0008 sub.w r0, r3, r8 8029c42: f7ff fde9 bl 8029818 8029c46: ed1f 7a07 vldr s14, [pc, #-28] @ 8029c2c <__kernel_rem_pio2f+0x2fc> 8029c4a: eeb4 0ac7 vcmpe.f32 s0, s14 8029c4e: eef1 fa10 vmrs APSR_nzcv, fpscr 8029c52: db19 blt.n 8029c88 <__kernel_rem_pio2f+0x358> 8029c54: ed5f 7a0a vldr s15, [pc, #-40] @ 8029c30 <__kernel_rem_pio2f+0x300> 8029c58: ee60 7a27 vmul.f32 s15, s0, s15 8029c5c: aa08 add r2, sp, #32 8029c5e: eefd 7ae7 vcvt.s32.f32 s15, s15 8029c62: 3508 adds r5, #8 8029c64: eef8 7ae7 vcvt.f32.s32 s15, s15 8029c68: eea7 0ac7 vfms.f32 s0, s15, s14 8029c6c: eefd 7ae7 vcvt.s32.f32 s15, s15 8029c70: eebd 0ac0 vcvt.s32.f32 s0, s0 8029c74: ee10 3a10 vmov r3, s0 8029c78: f842 3024 str.w r3, [r2, r4, lsl #2] 8029c7c: ee17 3a90 vmov r3, s15 8029c80: 3401 adds r4, #1 8029c82: f842 3024 str.w r3, [r2, r4, lsl #2] 8029c86: e74c b.n 8029b22 <__kernel_rem_pio2f+0x1f2> 8029c88: eebd 0ac0 vcvt.s32.f32 s0, s0 8029c8c: aa08 add r2, sp, #32 8029c8e: ee10 3a10 vmov r3, s0 8029c92: e7f6 b.n 8029c82 <__kernel_rem_pio2f+0x352> 8029c94: a808 add r0, sp, #32 8029c96: f850 0023 ldr.w r0, [r0, r3, lsl #2] 8029c9a: 9001 str r0, [sp, #4] 8029c9c: ee07 0a90 vmov s15, r0 8029ca0: eef8 7ae7 vcvt.f32.s32 s15, s15 8029ca4: 3b01 subs r3, #1 8029ca6: ee67 7a80 vmul.f32 s15, s15, s0 8029caa: ee20 0a07 vmul.f32 s0, s0, s14 8029cae: ed62 7a01 vstmdb r2!, {s15} 8029cb2: e743 b.n 8029b3c <__kernel_rem_pio2f+0x20c> 8029cb4: ecfc 6a01 vldmia ip!, {s13} 8029cb8: ecb5 7a01 vldmia r5!, {s14} 8029cbc: eee6 7a87 vfma.f32 s15, s13, s14 8029cc0: 3001 adds r0, #1 8029cc2: 4550 cmp r0, sl 8029cc4: dc01 bgt.n 8029cca <__kernel_rem_pio2f+0x39a> 8029cc6: 4282 cmp r2, r0 8029cc8: daf4 bge.n 8029cb4 <__kernel_rem_pio2f+0x384> 8029cca: a858 add r0, sp, #352 @ 0x160 8029ccc: eb00 0282 add.w r2, r0, r2, lsl #2 8029cd0: ed42 7a28 vstr s15, [r2, #-160] @ 0xffffff60 8029cd4: 3b01 subs r3, #1 8029cd6: e735 b.n 8029b44 <__kernel_rem_pio2f+0x214> 8029cd8: 9b66 ldr r3, [sp, #408] @ 0x198 8029cda: 2b02 cmp r3, #2 8029cdc: dc09 bgt.n 8029cf2 <__kernel_rem_pio2f+0x3c2> 8029cde: 2b00 cmp r3, #0 8029ce0: dc2b bgt.n 8029d3a <__kernel_rem_pio2f+0x40a> 8029ce2: d044 beq.n 8029d6e <__kernel_rem_pio2f+0x43e> 8029ce4: f009 0007 and.w r0, r9, #7 8029ce8: b059 add sp, #356 @ 0x164 8029cea: ecbd 8b04 vpop {d8-d9} 8029cee: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8029cf2: 9b66 ldr r3, [sp, #408] @ 0x198 8029cf4: 2b03 cmp r3, #3 8029cf6: d1f5 bne.n 8029ce4 <__kernel_rem_pio2f+0x3b4> 8029cf8: aa30 add r2, sp, #192 @ 0xc0 8029cfa: 1f0b subs r3, r1, #4 8029cfc: 4413 add r3, r2 8029cfe: 461a mov r2, r3 8029d00: 4620 mov r0, r4 8029d02: 2800 cmp r0, #0 8029d04: f1a2 0204 sub.w r2, r2, #4 8029d08: dc52 bgt.n 8029db0 <__kernel_rem_pio2f+0x480> 8029d0a: 4622 mov r2, r4 8029d0c: 2a01 cmp r2, #1 8029d0e: f1a3 0304 sub.w r3, r3, #4 8029d12: dc5d bgt.n 8029dd0 <__kernel_rem_pio2f+0x4a0> 8029d14: ab30 add r3, sp, #192 @ 0xc0 8029d16: ed5f 7a39 vldr s15, [pc, #-228] @ 8029c34 <__kernel_rem_pio2f+0x304> 8029d1a: 440b add r3, r1 8029d1c: 2c01 cmp r4, #1 8029d1e: dc67 bgt.n 8029df0 <__kernel_rem_pio2f+0x4c0> 8029d20: eddd 6a30 vldr s13, [sp, #192] @ 0xc0 8029d24: ed9d 7a31 vldr s14, [sp, #196] @ 0xc4 8029d28: 2e00 cmp r6, #0 8029d2a: d167 bne.n 8029dfc <__kernel_rem_pio2f+0x4cc> 8029d2c: edc7 6a00 vstr s13, [r7] 8029d30: ed87 7a01 vstr s14, [r7, #4] 8029d34: edc7 7a02 vstr s15, [r7, #8] 8029d38: e7d4 b.n 8029ce4 <__kernel_rem_pio2f+0x3b4> 8029d3a: ab30 add r3, sp, #192 @ 0xc0 8029d3c: ed1f 7a43 vldr s14, [pc, #-268] @ 8029c34 <__kernel_rem_pio2f+0x304> 8029d40: 440b add r3, r1 8029d42: 4622 mov r2, r4 8029d44: 2a00 cmp r2, #0 8029d46: da24 bge.n 8029d92 <__kernel_rem_pio2f+0x462> 8029d48: b34e cbz r6, 8029d9e <__kernel_rem_pio2f+0x46e> 8029d4a: eef1 7a47 vneg.f32 s15, s14 8029d4e: edc7 7a00 vstr s15, [r7] 8029d52: eddd 7a30 vldr s15, [sp, #192] @ 0xc0 8029d56: ee77 7ac7 vsub.f32 s15, s15, s14 8029d5a: aa31 add r2, sp, #196 @ 0xc4 8029d5c: 2301 movs r3, #1 8029d5e: 429c cmp r4, r3 8029d60: da20 bge.n 8029da4 <__kernel_rem_pio2f+0x474> 8029d62: b10e cbz r6, 8029d68 <__kernel_rem_pio2f+0x438> 8029d64: eef1 7a67 vneg.f32 s15, s15 8029d68: edc7 7a01 vstr s15, [r7, #4] 8029d6c: e7ba b.n 8029ce4 <__kernel_rem_pio2f+0x3b4> 8029d6e: ab30 add r3, sp, #192 @ 0xc0 8029d70: ed5f 7a50 vldr s15, [pc, #-320] @ 8029c34 <__kernel_rem_pio2f+0x304> 8029d74: 440b add r3, r1 8029d76: 2c00 cmp r4, #0 8029d78: da05 bge.n 8029d86 <__kernel_rem_pio2f+0x456> 8029d7a: b10e cbz r6, 8029d80 <__kernel_rem_pio2f+0x450> 8029d7c: eef1 7a67 vneg.f32 s15, s15 8029d80: edc7 7a00 vstr s15, [r7] 8029d84: e7ae b.n 8029ce4 <__kernel_rem_pio2f+0x3b4> 8029d86: ed33 7a01 vldmdb r3!, {s14} 8029d8a: 3c01 subs r4, #1 8029d8c: ee77 7a87 vadd.f32 s15, s15, s14 8029d90: e7f1 b.n 8029d76 <__kernel_rem_pio2f+0x446> 8029d92: ed73 7a01 vldmdb r3!, {s15} 8029d96: 3a01 subs r2, #1 8029d98: ee37 7a27 vadd.f32 s14, s14, s15 8029d9c: e7d2 b.n 8029d44 <__kernel_rem_pio2f+0x414> 8029d9e: eef0 7a47 vmov.f32 s15, s14 8029da2: e7d4 b.n 8029d4e <__kernel_rem_pio2f+0x41e> 8029da4: ecb2 7a01 vldmia r2!, {s14} 8029da8: 3301 adds r3, #1 8029daa: ee77 7a87 vadd.f32 s15, s15, s14 8029dae: e7d6 b.n 8029d5e <__kernel_rem_pio2f+0x42e> 8029db0: edd2 7a00 vldr s15, [r2] 8029db4: edd2 6a01 vldr s13, [r2, #4] 8029db8: ee37 7aa6 vadd.f32 s14, s15, s13 8029dbc: 3801 subs r0, #1 8029dbe: ee77 7ac7 vsub.f32 s15, s15, s14 8029dc2: ed82 7a00 vstr s14, [r2] 8029dc6: ee77 7aa6 vadd.f32 s15, s15, s13 8029dca: edc2 7a01 vstr s15, [r2, #4] 8029dce: e798 b.n 8029d02 <__kernel_rem_pio2f+0x3d2> 8029dd0: edd3 7a00 vldr s15, [r3] 8029dd4: edd3 6a01 vldr s13, [r3, #4] 8029dd8: ee37 7aa6 vadd.f32 s14, s15, s13 8029ddc: 3a01 subs r2, #1 8029dde: ee77 7ac7 vsub.f32 s15, s15, s14 8029de2: ed83 7a00 vstr s14, [r3] 8029de6: ee77 7aa6 vadd.f32 s15, s15, s13 8029dea: edc3 7a01 vstr s15, [r3, #4] 8029dee: e78d b.n 8029d0c <__kernel_rem_pio2f+0x3dc> 8029df0: ed33 7a01 vldmdb r3!, {s14} 8029df4: 3c01 subs r4, #1 8029df6: ee77 7a87 vadd.f32 s15, s15, s14 8029dfa: e78f b.n 8029d1c <__kernel_rem_pio2f+0x3ec> 8029dfc: eef1 6a66 vneg.f32 s13, s13 8029e00: eeb1 7a47 vneg.f32 s14, s14 8029e04: edc7 6a00 vstr s13, [r7] 8029e08: ed87 7a01 vstr s14, [r7, #4] 8029e0c: eef1 7a67 vneg.f32 s15, s15 8029e10: e790 b.n 8029d34 <__kernel_rem_pio2f+0x404> 8029e12: bf00 nop 08029e14 : 8029e14: ee10 3a10 vmov r3, s0 8029e18: f3c3 52c7 ubfx r2, r3, #23, #8 8029e1c: 3a7f subs r2, #127 @ 0x7f 8029e1e: 2a16 cmp r2, #22 8029e20: f023 4100 bic.w r1, r3, #2147483648 @ 0x80000000 8029e24: dc2b bgt.n 8029e7e 8029e26: 2a00 cmp r2, #0 8029e28: da12 bge.n 8029e50 8029e2a: eddf 7a19 vldr s15, [pc, #100] @ 8029e90 8029e2e: ee30 0a27 vadd.f32 s0, s0, s15 8029e32: eeb5 0ac0 vcmpe.f32 s0, #0.0 8029e36: eef1 fa10 vmrs APSR_nzcv, fpscr 8029e3a: dd06 ble.n 8029e4a 8029e3c: 2b00 cmp r3, #0 8029e3e: da24 bge.n 8029e8a 8029e40: 2900 cmp r1, #0 8029e42: 4b14 ldr r3, [pc, #80] @ (8029e94 ) 8029e44: bf08 it eq 8029e46: f04f 4300 moveq.w r3, #2147483648 @ 0x80000000 8029e4a: ee00 3a10 vmov s0, r3 8029e4e: 4770 bx lr 8029e50: 4911 ldr r1, [pc, #68] @ (8029e98 ) 8029e52: 4111 asrs r1, r2 8029e54: 420b tst r3, r1 8029e56: d0fa beq.n 8029e4e 8029e58: eddf 7a0d vldr s15, [pc, #52] @ 8029e90 8029e5c: ee30 0a27 vadd.f32 s0, s0, s15 8029e60: eeb5 0ac0 vcmpe.f32 s0, #0.0 8029e64: eef1 fa10 vmrs APSR_nzcv, fpscr 8029e68: ddef ble.n 8029e4a 8029e6a: 2b00 cmp r3, #0 8029e6c: bfbe ittt lt 8029e6e: f44f 0000 movlt.w r0, #8388608 @ 0x800000 8029e72: fa40 f202 asrlt.w r2, r0, r2 8029e76: 189b addlt r3, r3, r2 8029e78: ea23 0301 bic.w r3, r3, r1 8029e7c: e7e5 b.n 8029e4a 8029e7e: f1b1 4fff cmp.w r1, #2139095040 @ 0x7f800000 8029e82: d3e4 bcc.n 8029e4e 8029e84: ee30 0a00 vadd.f32 s0, s0, s0 8029e88: 4770 bx lr 8029e8a: 2300 movs r3, #0 8029e8c: e7dd b.n 8029e4a 8029e8e: bf00 nop 8029e90: 7149f2ca .word 0x7149f2ca 8029e94: bf800000 .word 0xbf800000 8029e98: 007fffff .word 0x007fffff 08029e9c <_init>: 8029e9c: b5f8 push {r3, r4, r5, r6, r7, lr} 8029e9e: bf00 nop 8029ea0: bcf8 pop {r3, r4, r5, r6, r7} 8029ea2: bc08 pop {r3} 8029ea4: 469e mov lr, r3 8029ea6: 4770 bx lr 08029ea8 <_fini>: 8029ea8: b5f8 push {r3, r4, r5, r6, r7, lr} 8029eaa: bf00 nop 8029eac: bcf8 pop {r3, r4, r5, r6, r7} 8029eae: bc08 pop {r3} 8029eb0: 469e mov lr, r3 8029eb2: 4770 bx lr